PCB signal line adjusting method and device, electronic equipment and storage medium

Abstract

The invention provides a PCB signal line adjusting method and device, electronic equipment and a storage medium, and relates to the technical field of computers. The method comprises the following steps: based on a PCB design file, obtaining a total signal line length corresponding to a target pin identifier indicated by each target signal in a preset target PCB; if it is determined that the difference value between the total signal line lengths corresponding to the target pin identifiers does not meet the preset requirement, determining at least one target adjustment pin identifier based on the total signal line lengths corresponding to the target pin identifiers; and in response to the signal line length adjustment operation, adjusting the length of the target signal line corresponding to each target adjustment pin identifier in the target adjustment PCB, so that the difference value between the total signal line length corresponding to each target adjustment pin identifier and the reference signal line length meets the preset requirement. Through a quantitative statistical adjustment mode, accurate adjustment can be realized, and the adjustment effect is ensured.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a method, device, electronic device and storage medium for adjusting a PCB signal line. Background Art

[0002] In PCB design, according to the needs of the design scenario, the design often includes multiple target PCB boards, and the multiple target PCB boards are connected by connectors. In particular, in some similar line designs, length matching control is required to meet the signal transmission timing synchronization.

[0003] In the prior art, when performing length matching control, designers often observe the gaps between multiple signal lines with the naked eye and make equal length adjustments accordingly.

[0004] It can be seen that the existing equal length control method of PCB signal lines mainly grasps the control accuracy through the naked eye, so the control result is not accurate enough. Summary of the invention

[0005] The purpose of the present application is to provide a method, device, electronic device and storage medium for adjusting a PCB signal line in view of the deficiencies in the above-mentioned prior art, which can achieve precise equal length adjustment and ensure the adjustment effect.

[0006] To achieve the above purpose, the technical solution adopted in the embodiment of the present application is as follows:

[0007] In a first aspect, the present invention provides a method for adjusting a PCB signal line, the method comprising:

[0008] Based on a PCB design file, a total signal line length corresponding to a target pin identifier indicated by each target signal in a preset target PCB board is obtained, wherein the PCB design file at least includes a plurality of target PCB boards connected in sequence, and a plurality of target signals are transmitted between the target PCB boards through a plurality of target signal lines. The preset target PCB board is a designated PCB board among the plurality of target PCB boards, and the total signal line length corresponding to each target pin identifier is used to characterize the total signal line length corresponding to the target signal line indicated by each target signal from the start to the end;

[0009] If it is determined that the difference between the total signal line lengths corresponding to the target pin identifiers does not meet the preset requirement, determining at least one target adjustment pin identifier based on the total signal line lengths corresponding to the target pin identifiers;

[0010] In response to the signal line length adjustment operation, the length of the target signal line corresponding to each target adjustment pin identifier in the target adjustment PCB board is adjusted so that the difference between the total signal line length corresponding to each target adjustment pin identifier and the reference signal line length meets the preset requirements.

[0011] In an optional implementation manner, adjusting the length of the target signal line corresponding to each target adjustment pin identifier in the target adjustment PCB board includes:

[0012] The total signal line lengths corresponding to the target adjustment pin identifiers are sequentially imported into the target adjustment PCB board indicated by the preset adjustment sequence, and the total signal line lengths corresponding to the target adjustment pin identifiers are updated until the difference between the total signal line lengths corresponding to the target adjustment pin identifiers and the reference signal line lengths meets the preset requirements;

[0013] The preset adjustment sequence is used to indicate the adjustment sequence of target adjustment PCB boards that need to be adjusted among multiple target PCB boards, and the reference signal line length is determined according to multiple total signal line lengths.

[0014] In an optional implementation manner, the obtaining, based on the PCB design file, a total signal line length corresponding to a target pin identifier indicated by each target signal in a preset target PCB board includes:

[0015] Respectively obtain a first report file and a second report file corresponding to each target PCB board in the PCB design file, wherein the first report file includes a target signal line identifier on each target PCB board and a target routing length corresponding to each target signal line identifier, and the second report file includes a target signal line identifier on each target PCB board and a pin identifier of an output pin or an input pin corresponding to each target signal line identifier;

[0016] According to the first report file and the second report file, the total signal line length corresponding to the target pin identifier indicated by each target signal in the preset target PCB board is obtained.

[0017] In an optional implementation manner, obtaining the total signal line length corresponding to the target pin identifier indicated by each target signal in the preset target PCB board according to the first report file and the second report file includes:

[0018] According to the first report file and the second report file, obtaining a target routing length corresponding to a pin identifier of each of the output pins or the input pin based on matching of each of the target signal line identifiers;

[0019] Based on each target signal, the target routing lengths corresponding to the pin identifiers of each of the output pins or the input pins are summed to obtain the total signal line lengths corresponding to each of the target pin identifiers.

[0020] In an optional implementation manner, the obtaining of the second report file corresponding to each target PCB board in the PCB design file includes:

[0021] In response to a copy operation on the PCB design file, obtaining a copy of the PCB design file;

[0022] In response to a deletion operation on the target signal lines indicated by the target signal line identifiers in the PCB design file copy, deleting the target signal lines;

[0023] By using a preset unconnected line prompt function, the target signal line identifiers on each target PCB board and the pin identifiers of the output pins or input pins corresponding to each target signal line identifier are obtained from the copy of the PCB design file, and the second report file is generated.

[0024] In an optional implementation, the target routing length corresponding to each of the target signal line identifiers includes: the length of the target signal line corresponding to each of the target signal line identifiers and the pin length of the target pin corresponding to the target signal line.

[0025] In an optional implementation manner, the adjusting the length of the target signal line corresponding to each target adjustment pin identifier in the target adjustment PCB board further includes:

[0026] Adjust the length of the target signal line corresponding to the target adjustment pin identifier in the target adjustment PCB board, and determine whether the difference between the total signal line length corresponding to each of the target adjustment pin identifiers and the reference signal line length meets the preset requirements;

[0027] If not, a preset prompt message is displayed, wherein the preset prompt message includes the adjustment progress corresponding to each target adjustment pin identifier.

[0028] In a second aspect, the present invention provides a PCB signal line adjustment device, comprising:

[0029] An acquisition module is used to acquire, based on a PCB design file, a total signal line length corresponding to a target pin identifier indicated by each target signal in a preset target PCB board, wherein the PCB design file at least includes a plurality of target PCB boards connected in sequence, wherein a plurality of target signals are transmitted between the target PCB boards via a plurality of target signal lines, wherein the preset target PCB board is a designated PCB board among the plurality of target PCB boards, and the total signal line length corresponding to each target pin identifier is used to characterize a total signal line length corresponding to a target signal line indicated by each target signal from the start to the end;

[0030] A determination module, configured to determine at least one target adjustment pin identifier based on the total signal line lengths corresponding to the target pin identifiers if it is determined that the difference between the total signal line lengths corresponding to the target pin identifiers does not meet a preset requirement;

[0031] The adjustment module is used to adjust the length of the target signal line corresponding to each target adjustment pin identifier in the target adjustment PCB board in response to the signal line length adjustment operation, so that the difference between the total signal line length corresponding to each target adjustment pin identifier and the reference signal line length meets the preset requirements.

[0032] In an optional embodiment, the adjustment module is specifically used to sequentially import the total signal line lengths corresponding to each of the target adjustment pin identifiers into a target adjustment PCB board indicated by a preset adjustment sequence, and update the total signal line lengths corresponding to each of the target adjustment pin identifiers until the difference between the total signal line lengths corresponding to each of the target adjustment pin identifiers and the reference signal line length meets the preset requirements;

[0033] The preset adjustment sequence is used to indicate the adjustment sequence of target adjustment PCB boards that need to be adjusted among multiple target PCB boards, and the reference signal line length is determined according to multiple total signal line lengths.

[0034] In an optional embodiment, the acquisition module is specifically used to respectively acquire a first report file and a second report file corresponding to each target PCB board in the PCB design file, wherein the first report file includes a target signal line identifier on each target PCB board and a target routing length corresponding to each target signal line identifier, and the second report file includes a target signal line identifier on each target PCB board and a pin identifier of an output pin or an input pin corresponding to each target signal line identifier;

[0035] According to the first report file and the second report file, the total signal line length corresponding to the target pin identifier indicated by each target signal in the preset target PCB board is obtained.

[0036] In an optional embodiment, the acquisition module is specifically used to obtain, for the target signal line, the target routing length corresponding to the pin identifier of each output pin or the input pin based on the matching of each target signal line identifier according to the first report file and the second report file;

[0037] Based on each target signal, the target routing lengths corresponding to the pin identifiers of each of the output pins or the input pins are summed to obtain the total signal line lengths corresponding to each of the target pin identifiers.

[0038] In an optional implementation, the acquisition module is specifically configured to acquire a copy of the PCB design file in response to a copy operation on the PCB design file;

[0039] In response to a deletion operation on the target signal lines indicated by the target signal line identifiers in the PCB design file copy, deleting the target signal lines;

[0040] By using a preset unconnected line prompt function, the target signal line identifiers on each target PCB board and the pin identifiers of the output pins or input pins corresponding to each target signal line identifier are obtained from the copy of the PCB design file, and the second report file is generated.

[0041] In an optional implementation, the target routing length corresponding to each of the target signal line identifiers includes: the length of the target signal line corresponding to each of the target signal line identifiers and the pin length of the target pin corresponding to the target signal line.

[0042] In an optional embodiment, the adjustment module is further used to adjust the length of the target signal line corresponding to the target adjustment pin identifier in the target adjustment PCB board, and determine whether the difference between the total signal line length corresponding to each of the target adjustment pin identifiers and the reference signal line length meets the preset requirements;

[0043] If not, a preset prompt message is displayed, wherein the preset prompt message includes the adjustment progress corresponding to each target adjustment pin identifier.

[0044] In an optional implementation, the adjustment progress includes: an adjustment state and a remaining adjustment length parameter, and the adjustment state includes: adjustment completed and adjustment not completed.

[0045] In a third aspect, the present invention provides an electronic device, comprising: a processor, a storage medium and a bus, wherein the storage medium stores machine-readable instructions executable by the processor, and when the electronic device is running, the processor communicates with the storage medium through the bus, and the processor executes the machine-readable instructions to perform the steps of the PCB signal line adjustment method as described in any of the aforementioned implementations.

[0046] The beneficial effects of this application are:

[0047] In the adjustment method, device, electronic device and storage medium of PCB signal lines provided in the embodiments of the present application, based on the PCB design file, the total signal line length corresponding to the target pin identifier indicated by each target signal in the preset target PCB board is obtained, the PCB design file includes at least a plurality of target PCB boards connected in sequence, and a plurality of target signals are transmitted between each target PCB board through a plurality of target signal lines. The preset target PCB board is a designated PCB board among the plurality of target PCB boards, and the total signal line length corresponding to each target pin identifier is used to characterize the total signal line length corresponding to the target signal line indicated by each target signal from the start to the end; if the difference between the total signal line lengths corresponding to each target pin identifier is determined If it does not meet the preset requirements, at least one target adjustment pin identifier is determined based on the total signal line lengths corresponding to the target pin identifiers; in response to the signal line length adjustment operation, the lengths of the target signal lines corresponding to the target adjustment pin identifiers in the target adjustment PCB board are adjusted so that the difference between the total signal line lengths corresponding to the target adjustment pin identifiers and the reference signal line length meets the preset requirements, thereby achieving the ability to adjust the lengths of the target signal lines corresponding to the target adjustment pin identifiers according to the total signal line lengths corresponding to the target pin identifiers in the target PCB boards. Compared with the existing adjustment method through human eye observation, the quantitative statistical adjustment method can achieve precise adjustment and ensure the adjustment effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0049] Figure 1 A schematic diagram of a flow chart of a method for adjusting a PCB signal line provided in an embodiment of the present application;

[0050] Figure 2 A schematic flow chart of another method for adjusting a PCB signal line provided in an embodiment of the present application;

[0051] Figure 3 A schematic flow chart of another method for adjusting a PCB signal line provided in an embodiment of the present application;

[0052] Figure 4 A schematic diagram of adjusting the PCB signal line provided in an embodiment of the present application;

[0053] Figure 5 A schematic flow chart of another method for adjusting a PCB signal line provided in an embodiment of the present application;

[0054] Figure 6 A schematic flow chart of another method for adjusting a PCB signal line provided in an embodiment of the present application;

[0055] Figure 7 A schematic diagram of the functional modules of a PCB signal line adjustment device provided in an embodiment of the present application;

[0056] Figure 8 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0057] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.

[0058] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0059] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0060] In PCB design, according to the needs of the design scenario, in some similar line designs, length matching control is required to meet the signal transmission timing synchronization; in the prior art, when performing length matching control, designers often observe the gap between multiple signal lines with the naked eye and make equal length adjustments accordingly.

[0061] In view of this, an embodiment of the present application provides a method for adjusting a PCB signal line, and the application of this method can achieve precise equal length control of multiple target signal lines.

[0062] Figure 1 A flow chart of a method for adjusting a PCB signal line provided in an embodiment of the present application, the execution subject of the method can be an electronic device such as a computer, a server, a processor, etc., and optionally, the electronic device can be installed with PCB design software. Of course, in some embodiments, the method provided in the embodiment of the present application can also be integrated into the PCB design software in the form of a plug-in or a control, or presented in the form of a small program, which is not limited here.

[0063] Alternatively, if Figure 1 As shown, the method may include:

[0064] Step 101: Obtain the total signal line length corresponding to the target pin identifier indicated by each target signal in the preset target PCB board in the PCB design file.

[0065] Among them, the PCB design file includes at least multiple target PCB boards connected in sequence, multiple target signals are transmitted between the target PCB boards through multiple target signal lines, the preset target PCB board is a designated PCB board among the multiple target PCB boards, the total signal line length corresponding to each target pin identifier is used to characterize the total signal line length corresponding to the target signal line indicated by each target signal from the start to the end, and each target signal line can be distinguished by a unique target signal line identifier.

[0066] Optionally, the preset target PCB board may be the first PCB board among multiple target PCB boards that transmits the target signal, or may be the last PCB board that transmits the target signal. If the preset target PCB board is the first PCB board that transmits the target signal, the target pin identifier may be the pin identifier of the output pin used to transmit the target signal in the preset target PCB board; if the preset target PCB board is the last PCB board that transmits the target signal, the target pin identifier may be the pin identifier of the input pin used to transmit the target signal in the preset target PCB board. This is not limited here and can be flexibly selected according to the actual application scenario.

[0067] Optionally, each target PCB board can transmit a pair of differential signals (for example, USB differential signals) and a group of bus signals (for example, SPI bus, PCI bus, etc.) through multiple target signal lines. Taking a pair of differential signals as an example for explanation, it can be understood that at this time, the multiple target signals may include: a first differential signal and a second differential signal. Accordingly, the corresponding target signal lines may include two, namely, a first target signal line for transmitting the first differential signal and a second target signal line for transmitting the second differential signal.

[0068] Of course, in some embodiments, each target signal line may include 2 or more lines, which is not limited here.

[0069] Optionally, during the specific calculation, the total signal line length corresponding to the target pin identifier indicated by each target signal can be determined according to the target routing length of multiple sections of target signal lines used to transmit the target signal between each target PCB board.

[0070] Step 102: If it is determined that the difference between the total signal line lengths corresponding to the target pin identifiers does not meet the preset requirement, then at least one target adjustment pin identifier is determined based on the total signal line lengths corresponding to the target pin identifiers.

[0071] Optionally, the preset requirement may correspond to a preset difference, such as 20 MIL, 25 MIL, etc., which is not limited here and can be flexibly set according to actual application scenarios.

[0072] Based on the above description, after obtaining the total signal line length corresponding to each target pin identifier in each target PCB board, it is possible to calculate whether the difference between the total signal line lengths corresponding to each target pin identifier is less than the preset difference. If so, it can be considered that the target signal lines corresponding to each target pin identifier are equal-length signal lines. Otherwise, the target pin identifier corresponding to the total signal line length whose difference does not meet the preset difference can be obtained as the target adjustment pin identifier.

[0073] Optionally, when performing specific calculations, the longest total signal line length can be selected from multiple total signal line lengths as a reference signal line length, and the difference between other total signal line lengths and the reference signal line length can be compared to see whether it meets preset requirements. If so, the multiple target signal lines can be considered to be equal-length signal lines; otherwise, refer to the above method to obtain the target adjustment pin identifier accordingly.

[0074] In some embodiments, the target adjustment pin identifier may include one or more, which is not limited here.

[0075] Step 103, in response to the signal line length adjustment operation, adjusting the length of the target signal line corresponding to each target adjustment pin identifier in the target adjustment PCB board so that the difference between the total signal line length corresponding to each target adjustment pin identifier and the reference signal line length meets the preset requirement.

[0076] The target adjustment PCB board may be one or more of a plurality of target PCB boards, which is not limited here and can be flexibly selected according to the actual application scenario.

[0077] Optionally, in response to a signal line length adjustment operation, a target adjustment PCB board is selected as an adjustment object, and the length of a target signal line corresponding to a target adjustment pin identifier that needs to be adjusted in the target adjustment PCB board is adjusted, so that the difference between the total signal line length corresponding to each target adjustment pin identifier and the reference signal line length meets preset requirements.

[0078] For example, in some scenarios, a reference signal line length is determined. Optionally, adjustment is performed so that the difference between the total signal line length corresponding to each target adjustment pin identifier and the reference signal line length meets a preset requirement.

[0079] It should be noted that the adjustment method for adjusting the length of the target signal line corresponding to the target adjustment pin identifier can be: compensating adjustment for the shorter target signal line, or shortening adjustment for the longer target signal line, which is not limited here, and the adjustment method can be flexibly set according to the actual application scenario. Optionally, the specific adjustment method can determine the layout position of the compensation signal line according to the preset winding rules without affecting other functions of the target adjustment PCB board, or the re-routing method of the shortened signal line.

[0080] In summary, an embodiment of the present application provides a method for adjusting a PCB signal line, the method comprising: based on a PCB design file, obtaining a total signal line length corresponding to a target pin identifier indicated by each target signal in a preset target PCB board, the PCB design file at least comprising a plurality of target PCB boards connected in sequence, a plurality of target signals being transmitted between each target PCB board through a plurality of target signal lines, the preset target PCB board being a designated PCB board among the plurality of target PCB boards, the total signal line length corresponding to each target pin identifier being used to characterize the total signal line length corresponding to the target signal line indicated by each target signal from the start to the end; if it is determined that the difference between the total signal line lengths corresponding to each target pin identifier does not match If the preset requirement is met, at least one target adjustment pin identifier is determined based on the total signal line length corresponding to each target pin identifier; in response to the signal line length adjustment operation, the length of the target signal line corresponding to each target adjustment pin identifier in the target adjustment PCB board is adjusted so that the difference between the total signal line length corresponding to each target adjustment pin identifier and the reference signal line length meets the preset requirement, thereby achieving that the length of the target signal line corresponding to the target adjustment pin identifier can be adjusted according to the total signal line length corresponding to each target pin identifier in each target PCB board. Compared with the existing adjustment method through human eye observation, the quantitative statistical adjustment method can achieve accurate adjustment and ensure the adjustment effect.

[0081] In an optional implementation manner, the above-mentioned adjusting the length of the target signal line corresponding to each target adjustment pin identifier in the target adjustment PCB board includes:

[0082] The total signal line lengths corresponding to the target adjustment pin identifiers are sequentially imported into the target adjustment PCB board indicated by the preset adjustment sequence, and the total signal line lengths corresponding to the target adjustment pin identifiers are updated until the difference between the total signal line lengths corresponding to the target adjustment pin identifiers and the reference signal line lengths meets the preset requirements;

[0083] The preset adjustment sequence is used to indicate the adjustment sequence of target adjustment PCB boards that need to be adjusted among multiple target PCB boards, and the reference signal line length is determined according to multiple total signal line lengths.

[0084] Optionally, the preset adjustment order can be determined according to a preset algorithm, or determined by a user according to the surrounding available layout space of each target PCB board in the PCB design file, wherein the larger the surrounding available layout space of each target adjustment PCB board in the PCB design file, the higher the corresponding adjustment order, that is, the priority adjustment; the smaller the surrounding available layout space of the target adjustment PCB board in the PCB design file, the later the corresponding adjustment order can be.

[0085] In some embodiments, the reference signal line length may be the longest total signal line length among multiple total signal line lengths, or may be an average signal line length of multiple total signal line lengths, which is not limited herein.

[0086] Optionally, in conjunction with the reference signal line length, the description is given. When adjusting each target PCB board according to a preset adjustment sequence, the total signal line length corresponding to each target adjustment pin identifier can be imported into each target adjustment PCB board, and the difference between the total signal line length corresponding to each target adjustment pin identifier and the reference signal line length is calculated. Optionally, the specific calculation can be implemented with the help of PCB design software. According to the length difference, the length of the target signal line corresponding to the target adjustment pin identifier in each target adjustment PCB board is adjusted. After the adjustment, the total signal line length corresponding to each target adjustment pin identifier is updated, and it is determined whether the difference between the total signal line length corresponding to each target adjustment pin identifier and the reference signal line length meets the preset requirements. If yes, the current adjustment operation can be stopped; otherwise, the next target adjustment PCB board can be adjusted according to the preset adjustment sequence until the difference between the total signal line length corresponding to each target adjustment pin identifier and the reference signal line length meets the preset requirements.

[0087] In some embodiments, when performing the import operation, the total signal line length corresponding to each target adjustment pin identifier can be converted into a file in PIN DELAY format, and imported into each target adjustment PCB board by importing the PIN DELAY file.

[0088] Optionally, each target adjustment PCB board may be a PCB connector, or may be a PCB board for implementing a specific function (eg, image processing, signal conversion, etc.), which is not limited here.

[0089] It can be seen that the present application can adjust the total signal line length corresponding to each target adjustment pin identifier multiple times through multiple imports, thereby avoiding the cumulative error caused by different PCB settings and improving the control accuracy.

[0090] Figure 2 A schematic diagram of a flow chart of another PCB signal line adjustment method provided in an embodiment of the present application. In an optional implementation manner, Figure 2As shown, the above-mentioned method of obtaining the total signal line length corresponding to the target pin identifier indicated by each target signal in the preset target PCB board based on the PCB design file includes:

[0091] Step 301: respectively obtain a first report file and a second report file corresponding to each target PCB board in a PCB design file.

[0092] Among them, the first report file includes the target signal line identification on each target PCB board and the target routing length corresponding to each target signal line identification, and the second report file includes the target signal line identification on each target PCB board and the pin identification of the output pin or input pin corresponding to each target signal line identification.

[0093] In some embodiments, based on PCB design software, a first report file may be generated by a signal line etching length acquisition control, and a second report file may be generated by a preset unconnected line prompt function.

[0094] Optionally, taking ALLEGRO design software as an example, optionally, the first report file can be exported through the REPORTS-ETCH LENGTH BY NETREPORT function in the ALLEGRO design software, and the second report file can be exported through the REPORTS-UNCONNECTED PINS REPORT function in the ALLEGRO design software.

[0095] Step 302: According to the first report file and the second report file, the total signal line length corresponding to the target pin identifier indicated by each target signal in the preset target PCB board is obtained.

[0096] In some embodiments, based on the first report file and the second report file, an association between the pin identifier of the output pin or the input pin and the total signal line length can be established according to the target signal line identifier, and the total signal line length corresponding to the target pin identifier indicated by each target signal in the preset target PCB board can be obtained accordingly.

[0097] By applying the embodiments of the present application, the PCB design file can be quickly matched according to the first report file and the second report file to obtain the total signal line length corresponding to the target pin identifier indicated by each target signal in the preset target PCB board. Compared with the existing manual troubleshooting method, the matching efficiency and matching accuracy can be improved.

[0098] Figure 3 A schematic diagram of a flow chart of another PCB signal line adjustment method provided in an embodiment of the present application. In an optional implementation manner, Figure 3As shown, the above-mentioned method of obtaining the total signal line length corresponding to the target pin identifier indicated by each target signal in the preset target PCB board based on the first report file and the second report file and the PCB design file includes:

[0099] Step 401 : According to the first report file and the second report file, a target routing length corresponding to the pin identifier of each output pin or input pin is obtained based on the matching of each target signal line identifier.

[0100] Step 402: Based on each target signal, the target routing lengths corresponding to the pin identifiers of each output pin or input pin are summed to calculate the total signal line lengths corresponding to each target pin identifier.

[0101] Specifically, when matching, the target routing length corresponding to the pin identifier of each output pin or input pin can be obtained based on each target signal line identifier, according to the target routing length corresponding to each target signal line identifier and the pin identifier of the output pin or input pin.

[0102] Optionally, the output pin or input pin may include multiple pin identifiers, each pin identifier may correspond to a target routing length, and based on each target signal, the target routing lengths corresponding to the pin identifiers of each output pin or input pin are summed to obtain the total signal line length corresponding to each target pin identifier.

[0103] Figure 4 The following is a schematic diagram of adjusting the PCB signal line provided in the embodiment of the present application. Figure 4 As shown, for example, a PCB design file includes three first target PCB boards A, second target PCB boards B and third target PCB boards C which are connected in sequence, wherein a target signal (for example, a two-line differential signal) is used to be transmitted from the first target PCB board A to the third target PCB board C.

[0104] Specifically, the Ka1o and Ka2o output pins in the first target PCB board A are respectively used to transmit the first target signal (i.e., the first differential signal) and the second target signal (i.e., the second differential signal), the Kb1i input pin and Kb1o output pin in the second target PCB board B are used to transmit the first target signal, the Kb2i input pin and Kb2o output pin are used to transmit the second target signal, and the Kc1i and Kc2i input pins in the third target PCB board C are respectively used to transmit the first target signal and the second target signal.

[0105] Optionally, the first target PCB board or the third target PCB board C may be a preset target PCB board. If the first target PCB board is used as the preset target PCB board, the target pins are identified as Ka1o and Ka2o output pins.

[0106] Taking the output pin as an example, in some embodiments, according to the first report file and the second report file corresponding to each PCB board, the target routing length corresponding to the pin identifier of the output pin used to transmit each target signal in each target PCB can be obtained, and the total signal line length corresponding to each target pin identifier can be calculated accordingly. That is, the total signal line length L1 corresponding to Ka1o in the first target PCB board is equal to the sum of the length of S11 corresponding to Ka1o and the length of S21 corresponding to Kb1o, that is, L1 = S11 + S12; the total signal line length L2 corresponding to Ka2o in the first target PCB board is equal to the sum of the length of S12 corresponding to Ka2o and the length of S22 corresponding to Kb2o, that is, L2 = S21 + S22.

[0107] In addition, it can be seen that L1 and L2 are not set to be of equal length. Therefore, the signal line can be adjusted according to the method of the present application so that L1 and L2 are set to be of equal length. This can ensure timing matching, reduce common-mode interference, optimize signal integrity, and improve signal transmission quality.

[0108] In addition, it should be noted that it can be seen that the corresponding pin identifiers of different target PCB boards may be different. Therefore, the target pin identifiers used to transmit the target signal lines in each target PCB board can be determined by analyzing the pin functions of each target PCB board.

[0109] In combination with the embodiment of the present application, the first target PCB board A is used as an example for explanation. For the target signal line, the total signal line lengths L1 and L2 corresponding to the Ka1o and Ka2o pins can be obtained, wherein, with reference to Figure 4 It can be seen that L1 is greater than L2, and the difference between L1 and L2 does not meet the preset requirements. If L1 is set as the reference signal line length, L2 corresponding to Ka2o can be adjusted. Through adjustment, the difference between L2 corresponding to Ka2o and the reference signal line length L1 meets the preset requirements.

[0110] Optionally, when applying the embodiment of the present application, the length of the target signal line S21 corresponding to Ka2o in the first target PCB board A can be adjusted during specific adjustment; if after the adjustment, the difference between L2 corresponding to Ka2o and the reference signal line length L1 meets the preset requirements, the adjustment is stopped; otherwise, the length of the target signal line S22 corresponding to Kc2i in the third target PCB board C can be adjusted so that the difference between L2 corresponding to Ka2o and the reference signal line length L1 meets the preset requirements.

[0111] Of course, it should be noted that, in some embodiments, the length of the target signal line S21 corresponding to Kb2i and / or the target signal line S22 corresponding to Kb2o in the second target PCB board B can be adjusted again from the perspective of the second target PCB board B. This is not limited here and can be flexibly set according to the actual application scenario.

[0112] Figure 5 A schematic diagram of another method for adjusting a PCB signal line provided in an embodiment of the present application. In an optional implementation, as Figure 5 As shown, the second report file corresponding to each target PCB board in the PCB design file is obtained, including:

[0113] Step 501: In response to a copy operation on a PCB design file, a copy of the PCB design file is obtained.

[0114] Step 502: In response to a deletion operation on the target signal lines indicated by the target signal line identifiers in the PCB design file copy, delete the target signal lines.

[0115] Step 503: using the preset unconnected line prompt function, obtaining the target signal line identifiers on each target PCB board and the pin identifiers of the output pins or input pins corresponding to each target signal line identifier based on the PCB design file copy, and generating a second report file.

[0116] It can be understood that, in some embodiments, for a PCB design file, including a target PCB board, a target signal line, and may also include other PCB boards and other non-target signal lines. Therefore, a copy of the PCB design file can be obtained through a copy operation; and the target signal lines indicated by each target signal line identifier in the copy of the PCB design file can be deleted through a delete operation. Furthermore, at this time, the preset unconnected line prompt function in the PCB design software can be used to export the target signal line identifier of the unconnected line and the pin identifier of the output pin or input pin corresponding to each target signal line identifier in the PCB design software, and generate a second report file accordingly.

[0117] By applying the embodiment of the present application, in the scenario of equal length control of PCB signal lines, the preset unconnected line prompt function in the PCB design software can be fully utilized to obtain the second report file, thereby shortening the development cycle of the method of the present application.

[0118] Optionally, taking ALLEGRO design software as an example, for example, the second report file can be generated by using the UNROUTED CONNECTIONS function or the REPORTS-UNCONNECTED PINS REPORT function provided in the design software.

[0119] The pin length of the target pin corresponding to each target signal line may include: the pin length of the target pins connected to both ends of the target signal line.

[0120] Optionally, in order to take the pin length of the target pin into account, reduce control errors and improve control accuracy, the length of each target routing line can be set, including the length of each target signal line and the pin length of the target pin corresponding to each target signal line. In this way, the control accuracy can be improved during equal length control.

[0121] Figure 6 A schematic diagram of another method for adjusting a PCB signal line provided in an embodiment of the present application. In an optional implementation, as Figure 6 As shown, the above adjustment of the length of the target signal line corresponding to the target adjustment pin mark in the target adjustment PCB board also includes:

[0122] Step 601: adjust the length of the target signal line corresponding to the target adjustment pin identifier in the target adjustment PCB board, and determine whether the difference between the total signal line length corresponding to each target adjustment pin identifier and the reference signal line length meets the preset requirement.

[0123] Step 602: If not, display preset prompt information, which includes the adjustment progress corresponding to each target adjustment pin identifier.

[0124] Optionally, when making specific adjustments, a target adjustment PCB board can be flexibly selected from multiple target PCB boards as the PCB board adjustment subject according to the layout space of each target PCB board, and the length of the target signal line corresponding to the target adjustment pin identifier of the target adjustment PCB board is adjusted. Optionally, the adjustment method can be a compensating adjustment, or a shortening adjustment. Optionally, the adjustment method can be determined according to the current layout space of the target adjustment PCB board, and does not affect other functions of the target adjustment PCB board.

[0125] In some embodiments, the preset requirement may correspond to a preset difference, such as 20 MIL, 25 MIL, etc., which is not limited here and can be flexibly set according to actual application scenarios.

[0126] Optionally, after each adjustment, it can be determined whether the difference between the total signal line length corresponding to each target adjustment pin identifier and the reference signal line length meets a preset requirement. If not, a preset prompt message can be displayed.

[0127] Optionally, the preset prompt information may include: an adjustment progress corresponding to each target adjustment pin identifier, and the adjustment progress may include: an adjustment state and a remaining adjustment length parameter.

[0128] The adjustment status may include: adjustment completed and adjustment not completed, wherein if the adjustment status is adjustment completed, the remaining adjustment length parameter may be 0, and if the adjustment status is adjustment not completed, the remaining adjustment length parameter may indicate a specific length parameter to be adjusted.

[0129] For example, in a certain scenario, the preset prompt information may be: the target pins K5 and K6 have been adjusted, and the remaining adjustment length parameter is 0; the target pin K7 has not been adjusted, and there are still 30MIL to be compensated; the target pin K8 has not been adjusted, and there are still 30MIL to be shortened.

[0130] Of course, it should be noted that the specific compensation method is not limited to this and may vary according to the actual application scenario.

[0131] Figure 7 A functional module diagram of a PCB signal line adjustment device provided in an embodiment of the present application. The basic principle of the device and the technical effects produced are the same as those of the corresponding method embodiment described above. For the sake of brief description, parts not mentioned in this embodiment may refer to the corresponding contents in the method embodiment.

[0132] like Figure 7 As shown, the adjustment device 100 includes:

[0133] The acquisition module 110 is used to acquire the total signal line length corresponding to the target pin identifier indicated by each target signal in a preset target PCB board based on a PCB design file, wherein the PCB design file at least includes a plurality of target PCB boards connected in sequence, and a plurality of target signals are transmitted between the target PCB boards through a plurality of target signal lines. The preset target PCB board is a designated PCB board among the plurality of target PCB boards, and the total signal line length corresponding to each target pin identifier is used to characterize the total signal line length corresponding to the target signal line indicated by each target signal from the start to the end;

[0134] The determination module 120 is configured to determine at least one target adjustment pin identifier based on the total signal line lengths corresponding to the target pin identifiers if it is determined that the difference between the total signal line lengths corresponding to the target pin identifiers does not meet the preset requirement;

[0135] The adjustment module 130 is used to adjust the length of the target signal line corresponding to each target adjustment pin identifier in the target adjustment PCB board in response to the signal line length adjustment operation, so that the difference between the total signal line length corresponding to each target adjustment pin identifier and the reference signal line length meets the preset requirements.

[0136] In an optional embodiment, the adjustment module 130 is specifically used to sequentially import the total signal line lengths corresponding to each of the target adjustment pin identifiers into the target adjustment PCB board indicated by a preset adjustment sequence, and update the total signal line lengths corresponding to each of the target adjustment pin identifiers until the difference between the total signal line lengths corresponding to each of the target adjustment pin identifiers and the reference signal line length meets the preset requirements;

[0137] The preset adjustment sequence is used to indicate the adjustment sequence of target adjustment PCB boards that need to be adjusted among multiple target PCB boards, and the reference signal line length is determined according to multiple total signal line lengths.

[0138] In an optional embodiment, the acquisition module 110 is specifically used to respectively acquire a first report file and a second report file corresponding to each target PCB board in the PCB design file, wherein the first report file includes a target signal line identifier on each target PCB board and a target routing length corresponding to each target signal line identifier, and the second report file includes a target signal line identifier on each target PCB board and a pin identifier of an output pin or an input pin corresponding to each target signal line identifier;

[0139] According to the first report file and the second report file, the total signal line length corresponding to the target pin identifier indicated by each target signal in the preset target PCB board is obtained.

[0140] In an optional implementation, the acquisition module 110 is specifically used to acquire the target routing length corresponding to the pin identifier of each output pin or the input pin based on the matching of each target signal line identifier according to the first report file and the second report file;

[0141] Based on each target signal, the target routing lengths corresponding to the pin identifiers of each of the output pins or the input pins are summed to obtain the total signal line lengths corresponding to each of the target pin identifiers.

[0142] In an optional implementation, the acquisition module 110 is specifically configured to acquire a copy of the PCB design file in response to a copy operation on the PCB design file;

[0143] In response to a deletion operation on the target signal lines indicated by the target signal line identifiers in the PCB design file copy, deleting the target signal lines;

[0144] By using a preset unconnected line prompt function, the target signal line identifiers on each target PCB board and the pin identifiers of the output pins or input pins corresponding to each target signal line identifier are obtained from the copy of the PCB design file, and the second report file is generated.

[0145] In an optional implementation, the target routing length corresponding to each of the target signal line identifiers includes: the length of the target signal line corresponding to each of the target signal line identifiers and the pin length of the target pin corresponding to the target signal line.

[0146] In an optional embodiment, the adjustment module 130 is further used to adjust the length of the target signal line corresponding to the target adjustment pin identifier in the target adjustment PCB board, and determine whether the difference between the total signal line length corresponding to each of the target adjustment pin identifiers and the reference signal line length meets the preset requirements;

[0147] If not, a preset prompt message is displayed, wherein the preset prompt message includes the adjustment progress corresponding to each target adjustment pin identifier.

[0148] In an optional implementation, the adjustment progress includes: an adjustment state and a remaining adjustment length parameter, and the adjustment state includes: adjustment completed and adjustment not completed.

[0149] The above-mentioned device is used to execute the method provided by the aforementioned embodiment, and its implementation principle and technical effect are similar, which will not be repeated here.

[0150] The above modules may be one or more integrated circuits configured to implement the above methods, such as one or more application specific integrated circuits (ASICs), or one or more microprocessors, or one or more field programmable gate arrays (FPGAs). For another example, when a module is implemented in the form of a processing element scheduling program code, the processing element may be a general-purpose processor, such as a central processing unit (CPU) or other processor that can call program code. For another example, these modules may be integrated together and implemented in the form of a system-on-a-chip (SOC).

[0151] Figure 8 The following is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. The electronic device can be integrated into the above-mentioned adjustment device. Figure 8 As shown, the electronic device may include: a processor 210, a storage medium 220 and a bus 230, the storage medium 220 stores machine-readable instructions executable by the processor 210, when the electronic device is running, the processor 210 and the storage medium 220 communicate through the bus 230, and the processor 210 executes the machine-readable instructions to perform the steps of the above method embodiment. The specific implementation method and technical effect are similar and will not be repeated here.

[0152] Optionally, the present application further provides a storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the above method embodiment are executed. The specific implementation method and technical effect are similar and will not be repeated here.

[0153] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0154] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0155] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of hardware plus software functional units.

[0156] The above-mentioned integrated unit implemented in the form of a software functional unit can be stored in a computer-readable storage medium. The above-mentioned software functional unit is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor (English: processor) to perform some steps of the methods of each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (English: Read-Only Memory, abbreviated: ROM), random access memory (English: Random Access Memory, abbreviated: RAM), disk or optical disk and other media that can store program codes.

[0157] It should be noted that, in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0158] The above are only preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application. It should be noted that similar numbers and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. The above are only preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A method for adjusting a PCB signal line, characterized in that: The method comprises: Based on a PCB design file, a total signal line length corresponding to a target pin identifier indicated by each target signal in a preset target PCB board is obtained, wherein the PCB design file at least includes a plurality of target PCB boards connected in sequence, and a plurality of target signals are transmitted between the target PCB boards through a plurality of target signal lines. The preset target PCB board is a designated PCB board among the plurality of target PCB boards, and the total signal line length corresponding to each target pin identifier is used to characterize the total signal line length corresponding to the target signal line indicated by each target signal from the start to the end; If it is determined that the difference between the total signal line lengths corresponding to the target pin identifiers does not meet the preset requirement, determining at least one target adjustment pin identifier based on the total signal line lengths corresponding to the target pin identifiers; In response to the signal line length adjustment operation, the length of the target signal line corresponding to each target adjustment pin identifier in the target adjustment PCB board is adjusted so that the difference between the total signal line length corresponding to each target adjustment pin identifier and the reference signal line length meets the preset requirements.

2. The method according to claim 1, characterized in that: The step of adjusting the length of the target signal line corresponding to each target adjustment pin mark in the target adjustment PCB board includes: The total signal line lengths corresponding to the target adjustment pin identifiers are sequentially imported into the target adjustment PCB board indicated by the preset adjustment sequence, and the total signal line lengths corresponding to the target adjustment pin identifiers are updated until the difference between the total signal line lengths corresponding to the target adjustment pin identifiers and the reference signal line lengths meets the preset requirements; The preset adjustment sequence is used to indicate the adjustment sequence of target adjustment PCB boards that need to be adjusted among multiple target PCB boards, and the reference signal line length is determined according to multiple total signal line lengths.

3. The method according to claim 1, characterized in that: The method of obtaining the total signal line length corresponding to the target pin identifier indicated by each target signal in the preset target PCB board based on the PCB design file includes: Respectively obtain a first report file and a second report file corresponding to each target PCB board in the PCB design file, wherein the first report file includes a target signal line identifier on each target PCB board and a target routing length corresponding to each target signal line identifier, and the second report file includes a target signal line identifier on each target PCB board and a pin identifier of an output pin or an input pin corresponding to each target signal line identifier; According to the first report file and the second report file, the total signal line length corresponding to the target pin identifier indicated by each target signal in the preset target PCB board is obtained.

4. The method according to claim 3, characterized in that The step of obtaining the total signal line length corresponding to the target pin identifier indicated by each target signal in the preset target PCB board according to the first report file and the second report file includes: According to the first report file and the second report file, obtaining a target routing length corresponding to a pin identifier of each of the output pins or the input pin based on matching of each of the target signal line identifiers; Based on each of the target signals, the target routing lengths corresponding to the pin identifiers of each of the output pins or the input pins are summed to obtain the total signal line lengths corresponding to each of the target pin identifiers.

5. The method according to claim 3, characterized in that: The obtaining of the second report file corresponding to each target PCB board in the PCB design file comprises: In response to a copy operation on the PCB design file, obtaining a copy of the PCB design file; In response to a deletion operation on the target signal lines indicated by the target signal line identifiers in the PCB design file copy, deleting the target signal lines; Using the preset unconnected line prompt function, the target signal line identifiers on each target PCB board and the pin identifiers of the output pins or input pins corresponding to each target signal line identifier are obtained based on the copy of the PCB design file, and the second report file is generated.

6. The method according to claim 3, characterized in that The target routing length corresponding to each of the target signal line identifiers includes: the length of the target signal line corresponding to each of the target signal line identifiers and the pin length of the target pin corresponding to the target signal line.

7. The method according to any one of claims 1 to 6, characterized in that: The adjusting the length of the target signal line corresponding to each target adjustment pin mark in the target adjustment PCB board also includes: Adjust the length of the target signal line corresponding to the target adjustment pin identifier in the target adjustment PCB board, and determine whether the difference between the total signal line length corresponding to each of the target adjustment pin identifiers and the reference signal line length meets the preset requirements; If not, a preset prompt message is displayed, wherein the preset prompt message includes the adjustment progress corresponding to each target adjustment pin identifier.

8. The method according to claim 7, characterized in that The adjustment progress includes: adjustment status and remaining adjustment length parameter, and the adjustment status includes: adjustment completed and adjustment not completed.

9. A PCB signal line adjustment device, characterized in that: include: An acquisition module is used to acquire, based on a PCB design file, a total signal line length corresponding to a target pin identifier indicated by each target signal in a preset target PCB board, wherein the PCB design file at least includes a plurality of target PCB boards connected in sequence, wherein a plurality of target signals are transmitted between the target PCB boards through a plurality of target signal lines, wherein the preset target PCB board is a designated PCB board among the plurality of target PCB boards, and the total signal line length corresponding to each target pin identifier is used to characterize a total signal line length corresponding to a target signal line indicated by each target signal from the start to the end; A determination module, configured to determine at least one target adjustment pin identifier based on the total signal line lengths corresponding to the target pin identifiers if it is determined that the difference between the total signal line lengths corresponding to the target pin identifiers does not meet a preset requirement; The adjustment module is used to adjust the length of the target signal line corresponding to each target adjustment pin identifier in the target adjustment PCB board in response to the signal line length adjustment operation, so that the difference between the total signal line length corresponding to each target adjustment pin identifier and the reference signal line length meets the preset requirements.

10. An electronic device, characterized in that: include: A processor, a storage medium and a bus, wherein the storage medium stores machine-readable instructions executable by the processor. When the electronic device is running, the processor communicates with the storage medium via the bus, and the processor executes the machine-readable instructions to perform the steps of the PCB signal line adjustment method as described in any one of claims 1-8.

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