Memory data correction method and device, storage medium and product

Abstract

The invention discloses a memory data correction method and device, a storage medium and a product, and relates to the technical field of data storage, the memory is provided with verification current thresholds, and the method comprises the following steps: for any memory unit in the memory, obtaining current reading results of the memory unit under the verification current thresholds; if the current reading results are different, unit data correction is carried out on the storage unit, so that the current reading results of the storage unit under the verification current thresholds are consistent. The technical problem of low stability of the memory is solved.

Description

Technical Field

[0001] The present application relates to the technical field of data storage, and in particular to a memory data correction method, device, electronic device, storage medium and computer program product. Background Art

[0002] As the trend of product intelligence intensifies, the application of system on chip (SoC) is becoming more and more extensive, and the demand for memory chips has risen sharply, especially in terms of storage capacity and performance. In order to meet this challenge, storage technology continues to innovate, process size continues to shrink, and multi-level cell (MLC) technology is widely adopted. Although these measures have significantly improved storage density and met the market's urgent demand for large-capacity storage, they are accompanied by more stringent tests on memory stability. While pursuing higher storage efficiency, ensuring stable storage and long-term retention of data and improving the data retention of memory have become key links that cannot be ignored in the development of storage technology. Summary of the invention

[0003] The main purpose of the present application is to provide a memory data correction method, device, electronic device, storage medium and computer program product, aiming to solve the technical problem of low memory stability.

[0004] To achieve the above object, the present application proposes a memory data correction method, wherein the memory is provided with various verification current thresholds, and the memory data correction method comprises:

[0005] For any storage unit in the memory, obtaining current reading results of the storage unit at each verification current threshold value;

[0006] If there is a difference between the current reading results, a unit data correction is performed on the memory cell to make the current reading results of the memory cell at each verification current threshold consistent.

[0007] In one embodiment, after the step of obtaining the current reading results of the storage unit at each verification current threshold, the step further includes:

[0008] Counting the number of the current reading results that are in the first state;

[0009] If the number of the first states is equal to the number of the verification current thresholds or equal to zero, it is determined that there is no difference between the current reading results;

[0010] If the number of the first states is not equal to the number of the verification current thresholds and is not equal to zero, it is determined that there is a difference between the current reading results.

[0011] In one embodiment, the step of obtaining the current reading results of the storage unit at each verification current threshold comprises:

[0012] Acquiring a read current of the memory cell;

[0013] For any one of the verification current thresholds, comparing the read current with each verification current threshold respectively;

[0014] If the read current is lower than the verification current threshold, the current reading result under the verification current threshold is recorded as a first state;

[0015] If the read current is higher than the verification current threshold, the current reading result under the verification current threshold is recorded as the second state;

[0016] After traversing the various verification current thresholds, various current reading results are obtained.

[0017] In one embodiment, the number of the verification current thresholds is an odd number, and if there is a difference between the current reading results, the step of performing unit data correction on the memory cell includes:

[0018] If the number of the first states in each current reading result is greater than half of the number of the verification current threshold, performing a zeroing operation on the storage unit to change the second state in each current reading result into the first state;

[0019] If the number of the first states in the current reading results is less than half of the number of the verification current threshold, a set operation is performed on the storage unit to change the first state in the current reading results into a second state.

[0020] In one embodiment, after the step of performing unit data correction on the storage unit, the method further includes:

[0021] The number of corrections performed by the storage unit for unit data correction is recorded, and when the number of corrections reaches a preset number of corrections and there is still a difference in the current reading results of the storage unit, an alarm message is output.

[0022] In one embodiment, the memory data correction method further includes:

[0023] Receive gear selection operation;

[0024] When the gear selection operation is to select the first verification current threshold group, a first verification threshold adjustment operation is performed to shift each verification current threshold toward the first state;

[0025] When the gear selection operation is to select the second verification current threshold group, a second verification threshold adjustment operation is performed to shift each verification current threshold toward the second state;

[0026] In the case where the gear selection operation is to select the first verification current threshold group and the second verification current threshold group, the first verification current threshold adjustment operation and the second current threshold adjustment operation are respectively performed.

[0027] In one embodiment, the memory data correction method further includes:

[0028] For each storage unit in the memory, obtaining a current reading result of each storage unit under each verification current threshold;

[0029] In the case where the current reading results under the verification current thresholds are the same, then the storage units do not need to be verified;

[0030] When the current reading results under the verification current thresholds are different, counting the storage units with different current reading results, and performing unit data correction on the storage units;

[0031] The step of obtaining the current reading results of each storage unit at each verification current threshold is performed based on each storage unit after the unit data correction.

[0032] In addition, to achieve the above-mentioned purpose, the present application also proposes a memory data correction device, which is applied to multiple storage units of the memory, and the memory data correction device includes:

[0033] A reading module, used for obtaining, for any storage unit in the memory, current reading results of the storage unit at each verification current threshold;

[0034] The correction module is used for performing unit data correction on the storage unit if there is a difference between the current reading results, so as to make the current reading results of the storage unit consistent under each verification current threshold.

[0035] In addition, to achieve the above-mentioned purpose, the present application also proposes an electronic device, which includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program is configured to implement the steps of the memory data correction method described above.

[0036] In addition, to achieve the above-mentioned purpose, the present application also proposes a storage medium, which is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, the steps of the memory data correction method described above are implemented.

[0037] In addition, to achieve the above-mentioned purpose, the present application also provides a computer program product, which includes a computer program, and when the computer program is executed by a processor, the steps of the memory data correction method described above are implemented.

[0038] The present application provides a memory data correction method, wherein the memory is provided with various verification current thresholds, and the memory data correction method comprises: for any memory cell in the memory, obtaining the current reading results of the memory cell at each verification current threshold respectively; if there is a difference between the current reading results, performing unit data correction on the memory cell to make the current reading results of the memory cell at each verification current threshold consistent.

[0039] The present application performs current reading operations on each storage unit in the memory under a series of preset verification current thresholds, comprehensively evaluates the current reading results of the storage unit under different verification current thresholds, and provides basic data for subsequent analysis and correction. In a complex storage environment, due to the influence of various factors (such as temperature fluctuations, voltage instability, material aging, etc.), the electrical characteristics of the storage unit may change, resulting in inconsistency when reading data, thereby affecting the performance and reliability of the entire storage system. The current reading results obtained for the same storage unit under different verification current thresholds are compared and analyzed. By detecting whether there are significant differences between these reading results, those units with unstable performance that may be caused by physical aging, manufacturing defects or environmental factors are identified. Once it is detected that there are significant differences in the reading results of the storage unit under different current thresholds, the system immediately starts the unit data correction process to ensure that the unit can produce consistent current reading results in subsequent operations, regardless of which verification current threshold, to ensure that the storage unit can work stably, thereby improving the accuracy and reliability of the data. Compared with related solutions that mostly improve data retention by increasing the area (such as thick gate oxide layer, dual storage cells, CRC+backup), complex circuit design (such as programming / erase circuit) or margin reservation (Margin test), but generally have problems such as large area sacrifice, high design complexity or limited improvement effect, the present application ensures that the storage cell can output accurate and consistent data by real-time monitoring and correction of the current response of the storage cell, effectively reduces data errors caused by cell performance fluctuations, significantly improves the stability and data retention of the storage cell, and provides a strong guarantee for the application of memory in high-demand application scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0041] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0042] Figure 1 A schematic diagram of a flow chart provided for the first embodiment of the memory data correction method of the present application;

[0043] Figure 2 A schematic diagram of a memory cell current distribution scenario provided in Embodiment 1 of the memory data correction method of the present application;

[0044] Figure 3 A flowchart of the second embodiment of the memory data correction method of the present application is provided;

[0045] Figure 4 A schematic diagram of a unit data verification scenario provided in Embodiment 2 of the memory data correction method of the present application;

[0046] Figure 5 A schematic diagram of a multi-bit data verification scenario provided in Embodiment 2 of the memory data correction method of the present application;

[0047] Figure 6 A schematic diagram of a scenario of storage unit threshold distribution provided in Embodiment 2 of the memory data correction method of the present application;

[0048] Figure 7 A flow chart of a method for unit data verification provided in Embodiment 2 of the memory data correction method of the present application;

[0049] Figure 8 A flowchart of a method for multi-bit data verification provided in Embodiment 2 of the memory data correction method of the present application;

[0050] Fig. 9 This is a schematic diagram of the module structure of the memory data correction device according to an embodiment of the present application;

[0051] Fig.10 Schematic diagram of the device structure of the hardware operating environment involved in the memory data correction method in the embodiment of the present application.

[0052] The purpose, features and advantages of this application will be further described in conjunction with the embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0053] It should be understood that the specific embodiments described herein are only used to explain the technical solutions of the present application and are not used to limit the present application.

[0054] In order to better understand the technical solution of the present application, a detailed description will be given below in conjunction with the accompanying drawings and specific implementation methods.

[0055] The present application provides a memory data correction method, wherein the memory is provided with various verification current thresholds, and the memory data correction method comprises: for any memory cell in the memory, obtaining the current reading results of the memory cell at each verification current threshold respectively; if there is a difference between the current reading results, performing unit data correction on the memory cell to make the current reading results of the memory cell at each verification current threshold consistent.

[0056] In this embodiment, for the convenience of description, the memory data correction system is used as the execution subject for explanation below.

[0057] In the prior art, methods for improving data retention include: enhancing data retention at the physical level (such as thick gate oxide layer), but significantly increasing area cost and circuit complexity; redundant design (such as dual storage cells or CRC+backup sectors) sacrifices precious area resources, but increases storage cost; although margin testing improves retention by adjusting the reference current reserve margin, the effect is limited and it is difficult to meet the stringent requirements under extreme or long-term storage conditions. These solutions have their own advantages and disadvantages, but none of them can achieve an ideal balance between retention improvement and cost and complexity control.

[0058] By verifying storage units with multiple verification current thresholds, the current reading results at different verification current thresholds are comprehensively evaluated to provide data for subsequent corrections. For data inconsistencies caused by changes in electrical characteristics in complex storage environments, unstable performance units are identified by comparing the reading results at different current thresholds. Once differences are found, the correction process is initiated to ensure that the reading results at each current threshold are consistent, thereby improving the stability of the storage unit and data retention, and enhancing the overall performance and reliability of the storage system.

[0059] It should be noted that the execution subject of this embodiment can be a memory with data processing, network communication and program running functions, such as a chip, memory, disk, etc., or an electronic device capable of realizing the above functions, a memory data correction system, etc. The following takes the memory data correction system as an example to illustrate this embodiment and the following embodiments.

[0060] Based on this, the embodiment of the present application provides a memory data correction method, referring to Figure 1 , Figure 1 This is a flow chart of the first embodiment of the memory data correction method of the present application.

[0061] In this embodiment, the memory is provided with various verification current thresholds, and the memory data correction method includes steps S01-S02:

[0062] Step S01, for any storage unit in the memory, obtaining the current reading result of the storage unit under each verification current threshold;

[0063] It should be noted that a memory refers to an electronic device used to store data, usually composed of multiple storage units. The storage unit is a different current level set in order to test the performance of the storage unit, which is used to simulate different working conditions. The verification current threshold is a current threshold pre-set in order to test the performance of the storage unit under different current conditions.

[0064] In addition, it should be noted that the system presets a series of verification current thresholds for testing the performance of storage cells under different current conditions. For the selected storage cells, the system performs current reading operations at each verification current threshold in turn. For each verification current threshold, the system records and saves the corresponding current reading results for subsequent difference detection and analysis.

[0065] It can be understood that, compared with the solution of testing only under a single or limited number of current conditions, step S01 performs reading through a series of verification current thresholds, thereby achieving a comprehensive evaluation of the performance of the storage unit and improving the accuracy and effectiveness of the test. At the same time, through multi-bit current reading, it provides accurate data support for subsequent data correction, which helps to improve the analysis and optimization capabilities of data retention.

[0066] Step S02 : if there is a difference between the current reading results, then performing unit data correction on the memory cell to make the current reading results of the memory cell at each verification current threshold consistent.

[0067] It should be noted that by comparing the current reading results of the storage unit at each verification current threshold, if the system detects significant differences between the current reading results, it indicates that the storage unit may have unstable performance problems. At this time, the unit data correction process will be triggered. After completing the unit data correction, the system re-executes the reading step under multiple current thresholds to verify the correction effect. If the correction is successful, the current reading results of the storage unit at each verification current threshold should be consistent.

[0068] It can be understood that for storage cells with inconsistent reading results, step S02 not only identifies their status (not all zero, not all one, etc.), but also performs targeted correction operations and ensures the correction effect through re-verification. Performing step S02 can eliminate inconsistencies through unit data verification while keeping costs and complexity controllable, thereby improving the stability and reliability of storage cells or data bits, ensuring that the current state inside the storage cell tends to be stable, and significantly improving the data retention of the storage cell.

[0069] In a feasible implementation manner, in step S01, after the step of obtaining the current reading results of the storage unit at each verification current threshold, steps A01 to A03 are also included:

[0070] Step A01, counting the number of current reading results that are in the first state;

[0071] It should be noted that the first state indicates that the current of the storage unit is lower than the current current threshold, and the current reading results under each verification current threshold obtained in step S01 are traversed to count the number of current reading results in the first state.

[0072] Step A02, if the number of first states is equal to the number of verification current thresholds or equal to zero, it is determined that there is no difference between the current reading results;

[0073] It should be noted that, based on the number of first states counted in step A01, a conditional judgment is performed. If the number of first states is equal to the preset current threshold number (indicating that the first state is read at all current thresholds, that is, a strong "0") or equal to zero (indicating that the second state is read at all current thresholds, that is, a strong "1"), it is determined that there is no difference between the current reading results.

[0074] Step A03: if the number of the first states is not equal to the number of the verification current thresholds and is not equal to zero, it is determined that there is a difference between the current reading results.

[0075] It should be noted that if the number of first states is neither equal to the number of verification current thresholds nor equal to zero, it indicates that the data state of the memory cell may be unstable (weak "0" or weak "1"), and it is determined that there are differences between the current reading results.

[0076] In this embodiment, by reading with multiple current levels and counting the number of first states, the data state of the storage unit (strong "0", strong "1", weak "0", weak "1") can be preliminarily determined, providing a basis for subsequent data verification operations. Through simple conditional judgment, storage units with unstable data states can be quickly identified, providing a clear target for subsequent correction measures.

[0077] In a feasible implementation manner, in step S01, the step of obtaining the current reading results of the storage unit at each verification current threshold includes steps A11 to A15:

[0078] Step A11, obtaining a read current of a memory cell;

[0079] It should be noted that the current value is read from the target storage unit through a specific current detection mechanism (such as a current sensor), that is, the read current. The read current refers to the current value read from the storage unit, which is used to reflect the state or data content of the storage unit.

[0080] Step A12, for any one of the verification current thresholds, comparing the read current with each verification current threshold respectively;

[0081] It should be noted that the read current obtained in step A11 is compared one by one with a series of preset verification current thresholds, which are usually set according to the design characteristics of the memory cell and are used to distinguish different storage states.

[0082] Step A13, if the read current is lower than the verification current threshold, the current reading result under the verification current threshold is recorded as the first state;

[0083] It should be noted that when the read current of the storage unit is lower than a certain verification current threshold, the system records the unit current reading result under the threshold as the first state, which means that under the current current threshold, the current of the storage unit is insufficient to trigger the level signal under the threshold.

[0084] Step A14, if the read current is higher than the verification current threshold, the current reading result under the verification current threshold is recorded as the second state;

[0085] It should be noted that when the read current of the storage cell is higher than a certain verification current threshold, the system records the unit current reading result under the threshold as the second state, and the second state indicates that the read storage cell current is higher than the set current threshold, which means that under the current threshold, the current of the storage cell is sufficient to trigger the level signal under the threshold, and the first state and the second state can be converted to each other, in which one state indicates that the read current of the storage cell is lower than a certain verification current threshold, and the other state corresponds to the read current of the storage cell being higher than a certain verification current threshold.

[0086] Step A15, after traversing each verification current threshold, obtain each current reading result.

[0087] It should be noted that after all verification current thresholds are compared, all read results are integrated to form a comprehensive judgment on the state of the storage unit.

[0088] For example, to help understand the technical concept or technical principle of this application, please refer to Figure 2 , Figure 2A schematic diagram of a memory cell current distribution scenario is provided, where the horizontal axis represents the current value of the memory cell in the memory, A is the current distribution of data "0", representing the first state, C is the current distribution of data "1", representing the second state, and B is a reference current for determining whether it is data "0" or data "1", that is, if it is less than the reference current B, it is determined to be data "0", indicating that the current unit current reading result is the first state, and if it is greater than the reference current B, it is determined to be data "1", indicating that the current unit current reading result is the second state.

[0089] In this embodiment, through direct measurement and comparison of current values, the actual state of the storage unit can be more accurately reflected, providing strong support for subsequent data processing. By clearly recording the first state and the second state, the system can more clearly understand the current state of the storage unit, providing a strong basis for subsequent data verification.

[0090] Based on the first embodiment of the present application, in the second embodiment of the present application, the same or similar contents as those in the above-mentioned embodiment 1 can be referred to the above introduction, and will not be repeated in the following. Figure 3 , the number of each verification current threshold is an odd number. In step S02, if there is a difference between the current reading results, the step of performing unit data correction on the storage unit includes steps S11 to S12:

[0091] Step S11, if the number of first states in each current reading result is greater than half of the number of the verification current threshold, a zeroing operation is performed on the storage unit to change the second state in each current reading result into the first state;

[0092] It should be noted that the number of each verification current threshold is an odd number, and the more the number of verification current thresholds, the more accurate the calibration result. If the number of the first state exceeds half of the number of verification current thresholds (for the 5-level current threshold number, that is, 2.5, then "3", "4", and "5" means that it exceeds half of the number of verification current thresholds), the system determines that the data state of the storage unit tends to be data "0", so the system will perform a zeroing operation on the storage unit, that is, the data in the storage unit is forced to change from the second state to the first state, and the data is changed from the previously unstable state to data "0" to ensure the stability and accuracy of the data.

[0093] Step S12: if the number of the first state in each current reading result is less than half of the number of the verification current threshold, a set operation is performed on the storage unit to change the first state in each current reading result into a second state.

[0094] It should be noted that, contrary to step S11, if the number of first states counted is less than half of the number of verification current thresholds (that is, 2 or less for the 5-level current threshold number), the system determines that the data state of the storage unit may be more inclined to data "1", and thus the system will perform a set operation on the storage unit, that is, forcing the data in the storage unit to change from the first state to the second state, and the data to change from the previously unstable state to data "1", so as to ensure the correctness and stability of the data.

[0095] It should be noted that the zeroing operation and the one-setting operation can be converted to each other. When one operation indicates forcing the data in the storage unit to change from the second state to the first state, the other operation indicates forcing the data in the storage unit to change from the first state to the second state.

[0096] For example, to help understand the technical concept or technical principle of this application, please refer to Figure 4 and Figure 5 , Figure 4 A schematic diagram of the unit data verification scenario is provided. Figure 5 A schematic diagram of a multi-bit data verification scenario is provided, specifically:

[0097] like Figure 4 As shown, the system sets 5 current thresholds Ith1, Ith2, Ith3, Ith4, and Ith5. The storage cell D is read under the 5-level threshold current, and the reading results of the storage cell D are "1", "1", "0", "0", and "0" in sequence. The number of "0" (i.e., marked as the first state) in the reading results is equal to 3, and the number of first states in the storage cell D is greater than half of the number of verification current thresholds (weak "0"). The storage cell D needs to be reset to zero so that the first state in the unit current reading result of the storage cell D is changed to the second state. After the zeroing operation is completed, the calibrated storage cell D' is obtained. The storage cell D' is read under the 5-level current threshold, and the reading results are "0", "0", "0", "0", and "0" in sequence, indicating that the first state in the unit current reading result of the storage cell D' has all been changed to the second state (calibrated from weak "0" to strong "0").

[0098] like Figure 5 As shown, for multiple storage units, the system sets 5 current thresholds Ith1, Ith2, Ith3, Ith4, and Ith5, and reads the multi-bit storage units in the memory under the 5 threshold currents. As shown in Table 1, the reading results are recorded as "Dataa", a=1, 2, 3, 4, 5, and the reading results of "Data a" are "BF", "B7", "B2", "B0", and "A0" respectively.

[0099] Data Reading results bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 Data 1 0xBF 1 0 1 1 1 1 1 1 Data 2 0xB7 1 0 1 1 0 1 1 1 Data 3 0xB2 1 0 1 1 0 0 1 0 Data 4 0xB0 1 0 1 1 0 0 0 0 Data 5 0xA0 1 0 1 0 0 0 0 0 √ √ √ × × × × ×

[0100] Table 1

[0101] Under the 5-level threshold current, the reading results of "Data a" are not all the same, indicating that there are storage cells with different multi-bit current reading results (weak "0" and weak "1") in the multi-bit storage cells, and multi-bit data calibration is required for "Data a". The number of storage cells (bits) with different reading results in "Data a" is counted, and the counting result is 5 (bit0~bit4). Unit data verification is performed on the storage cells with different multi-bit current reading results in turn. There is no need to reset the current threshold when performing unit data verification. When the unit data verification of all storage cells with different multi-bit current reading results passes, the calibrated byte is obtained.

[0102]

[0103]

[0104] Table 2

[0105] The calibrated bytes are read under 5 levels of current thresholds. As shown in Table 2, the read results are recorded as "Data'a", a=1, 2, 3, 4, 5, and the read results of "Data'a" are "B2", "B2", "B2", "B2", "B2" respectively. The multi-bit current reading results are all the same, indicating that the weak "0" and weak "1" in the multi-bit storage unit have all been calibrated to strong "0" and strong "1", and the multi-bit storage unit has passed the verification.

[0106] In this embodiment, through intelligent judgment and data correction based on the number of first states, and through zeroing and setting operations, the system can automatically correct existing data errors, reduce reading errors and data loss problems caused by unstable data states, and thus improve data retention and reliability.

[0107] In a feasible implementation manner, in step S02, after the step of performing unit data correction on the storage unit, step A21 is further included:

[0108] Step A21 , recording the number of corrections performed by the storage unit for the unit data correction, and outputting an alarm message when the number of corrections reaches a preset number of corrections and the current reading results of the storage unit are still different.

[0109] It should be noted that the preset number of calibration times is an upper limit of the number of calibration times that is pre-set based on factors such as the design specifications, usage scenarios and expected life of the storage device, to ensure that potential problems are warned within a reasonable range. Alarm information is a system-level notification used to alert administrators or maintenance personnel to specific problems so that relevant personnel can take corresponding measures. For example, the alarm information may include the content "The number of calibration times of storage unit X has reached the preset upper limit, please check and handle it immediately."

[0110] In addition, it should be noted that the number of correction operations performed on each storage unit when the current reading result is inconsistent is monitored and recorded. The number of corrections refers to the number of times unit data corrections are performed on a storage unit. Each time the system detects that the current reading result of the storage unit is inconsistent with expectations, it will try to restore the correct data through the correction mechanism. The number of corrections is recorded as the number of corrections. When the number of corrections of a storage unit accumulates to a preset threshold, it indicates that the unit may have serious stability problems, such as physical damage, severe aging, or continuous environmental impacts. At this time, simple correction operations may no longer be able to effectively restore the correctness of the data, and higher-level countermeasures need to be taken.

[0111] In this embodiment, by recording the number of corrections, the system can promptly discover and pay attention to storage units that frequently need correction, providing data support for subsequent maintenance or replacement. By setting a preset number of corrections and outputting an alarm message when the threshold is reached, the system can promptly issue a warning to the administrator or maintenance personnel, prompting them to inspect, repair or replace the problem unit, which helps to quickly respond to potential hardware failures, avoid data loss or system crashes, and improve the overall reliability and data security of the storage.

[0112] In a feasible implementation manner, the memory data correction method further includes steps A31 to A34:

[0113] Step A31, receiving a gear selection operation;

[0114] It should be noted that the system first receives the gear selection operation input by the user. The "gear" here refers to the various verification current threshold gears, that is, the current threshold range that the memory needs to follow when reading and writing data, including the selection of the first verification current threshold group and the second verification current threshold group.

[0115] Step A32, when the gear selection operation is to select the first verification current threshold group, performing a first verification current threshold adjustment operation to shift each verification current threshold toward the first state;

[0116] It should be noted that when the user selects the first verification current threshold group, it means that the user is currently more concerned about the data "0" in the memory. For example, a memory defaults to all data being "0" when not programmed. Then, before programming, you should be concerned about whether the data stored in the memory are all "0". At this time, the first verification current threshold adjustment operation is performed, and each verification current threshold will be set at an end close to the corresponding first state, so that the total difference of each verification current threshold relative to the corresponding end of the first state is smaller than the total difference of each verification current threshold relative to the corresponding end of the second state.

[0117] Step A33, when the gear selection operation is to select the second verification current threshold group, performing a second verification current threshold adjustment operation to shift each verification current threshold toward the second state;

[0118] It should be noted that when the user selects the second verification current threshold group, it means that the user is currently more concerned about the data "1" in the memory. For example, if the user has programmed multiple bits of data "1" into a memory, then the user should be concerned about whether the programmed multiple bits of data "1" are written into the memory. At this time, the second verification current threshold adjustment operation is performed, and each verification current threshold will be set at an end close to the corresponding second state, so that the total difference of each verification current threshold relative to the corresponding end of the second state is less than the total difference of each verification current threshold relative to the corresponding end of the first state.

[0119] Step A34, when the gear selection operation is to select the first verification current threshold group and the second verification current threshold group, respectively perform the first verification current threshold adjustment operation and the second verification current threshold adjustment operation.

[0120] It should be noted that when the user selects the first verification current threshold group and the second verification current threshold group, it means that the user is concerned about both data "0" and data "1". At this time, both data should be considered, and the first verification current threshold adjustment operation and the second current threshold adjustment operation should be performed, that is, the verification current threshold should be set at one end close to the first state and the other end close to the second state, respectively, and in both cases, the data in the memory needs to be verified.

[0121] For example, to help understand the technical concept or technical principle of this application, please refer to Figure 6 , Figure 6 A scenario schematic diagram of the storage cell threshold distribution is provided, where the horizontal axis represents the current value of the storage cell in the memory, A is the current distribution of data "0", corresponding to the first state, C is the current distribution of data "1", corresponding to the second state, B1~B5 are 5 levels of current thresholds, and when the user selects the second verification current threshold group, the verification current threshold is set at one end close to the second state (data "1"), so as to make a more accurate judgment for the situation where the user is more concerned about the data "1".

[0122] In this implementation, each current threshold can be adaptively adjusted in combination with actual conditions and user needs, thereby improving adaptability to different data types, thereby more accurately identifying the data state of the storage unit, enhancing the pertinence and accuracy of data verification, and improving data retention.

[0123] In a feasible implementation manner, the memory includes various storage units, and the memory data correction method further includes steps A41 to A44:

[0124] Step A41, obtaining the current reading result of each storage unit at each verification current threshold;

[0125] It should be noted that different verification current thresholds are applied to each storage unit of the memory, and the current reading results of each unit under these thresholds are recorded.

[0126] Step A42, when the current reading results under each verification current threshold are the same, then each storage unit does not need to be verified;

[0127] It should be noted that if the current reading results of each storage unit at all verification current thresholds are consistent, this indicates that the electrical characteristics of the memory are stable and no abnormalities occur, and therefore, the system deems that these storage units do not require further verification.

[0128] Step A43, when the current reading results under each verification current threshold are different, counting the storage cells with different current reading results, and performing unit data correction on the storage cells;

[0129] It should be noted that if the current reading results of some storage cells are different from those of other cells under certain verification current thresholds, this indicates that these cells may have problems with unstable electrical characteristics or data corruption. These abnormal storage cells are counted and single-bit data correction operations are performed on them to restore or correct their data status.

[0130] Step A44 is a step of acquiring current reading results of each memory cell at each verification current threshold based on each memory cell after the unit data correction is performed.

[0131] It should be noted that after the unit data correction is completed, step A41 is performed again to verify whether the correction operation is effective, and each unit in the memory is checked cyclically until the reading results of all units are consistent.

[0132] In this embodiment, through cyclic verification and unit data correction operations, the system can ensure that the data in the memory remains accurate and consistent, thereby improving the reliability of the data. For storage cells with the same reading results, that is, storage cells with stable electrical characteristics, the system can automatically skip the verification step, thereby reducing unnecessary verification operations and waste of resources.

[0133] For example, to help understand the implementation process of the memory data correction method, please refer to Figure 7 and Figure 8 , Figure 7 A flow chart of the unit data verification method is provided. Figure 8 A flow chart of a method for multi-bit data verification is provided, specifically:

[0134] like Figure 7 As shown, the memory enters the unit data verification mode, sets N current thresholds, and performs a read operation on the data of the memory at each current threshold. The read result is determined by the set current threshold and the read current of the storage unit, and the number of read results in the first state is counted. It is determined whether the number of read results in the first state is equal to 0 or N. If the count result of the first state is equal to 0, it means that the read data is a strong "1", and this bit verification passes; if the count result of the first state is equal to N, it means that the read data is a strong "0", and this bit verification passes; if the count result of the first state is not equal to 0 or N, it is determined whether the count result of the first state is greater than N / 2. If the count result of the first state is greater than N / 2, it means that the data is a weak "0", and the data needs to be reset to zero, that is, the second state in the current reading result of the data is changed to the first state. After the zeroing operation is completed, the data is read at the N current thresholds, and the number of read results in the first state is counted. If the number of the first state is equal to N, then It means that the second state in the current reading result of this bit has all changed to the first state (from weak "0" to strong "0"), and the bit check has passed. If the number of first states is not equal to N, it means that the bit check has failed. If the number of first states is less than N / 2, it means that the data is weak "1", and the data needs to be set to one, that is, the first state in the current reading result of the data is changed to the second state. After the set operation is completed, the data is read under the N-level current threshold, and the number of read results with the second state is counted). If the number of second states is equal to N, it means that the first state in the current reading result of this bit has all changed to the second state (from weak "1" to strong "1"), and the bit check has passed. If the number of second states is not equal to N, it means that the bit check has failed.

[0135] like Figure 8As shown, the memory enters the multi-bit data verification mode, and the system sets N current thresholds from low to high. Under each current threshold, the multi-bit data of the memory is read, and the reading result is recorded as "Data a", a = 1, 2, ..., N, and the reading result of each bit of data is determined by the set current threshold and the reading current of the storage unit. If the "Data a" under each current threshold is the same, it means that all bits in this multi-bit data are all in the first state or all in the second state (strong "0" or strong "1"), and this multi-bit data verification passes; if the "Data a" under each current threshold is not the same, it means that there are bits in this multi-bit data that are not all in the first state or not all in the second state (weak "0" or weak "1"), and the multi-bit data needs to be calibrated. The number of bits with different read results is counted, and the count result is recorded as n. A positive integer variable i is set, and i=1 is set. If i is less than or equal to n, the i-th bit with different read results is read, and the unit data verification mode is entered. At this time, there is no need to repeatedly set the current threshold. If the unit data verification result of the i-th bit with different read results passes the verification, then i=i+1 is set, and the unit data verification of the i-th bit with different read results continues until i>n; if the unit data verification result of the i-th bit with different read results fails to be verified, the unit data verification of the remaining bits with different read results is no longer performed, and the multi-bit data verification fails. After all bits with different read results have successfully performed unit data verification, the corrected multi-bit data is read in turn under the N-level current threshold. If the read results under the N-level current threshold are all the same, it means that the weak "0" and weak "1" in the multi-bit data have all been calibrated to strong "0" and strong "1", and the multi-bit data verification passes; if the read results under the N-level current threshold are not all the same, the multi-bit data verification fails.

[0136] It should be noted that the above examples are only used to understand the present application and do not constitute a limitation on the memory data correction method of the present application. More simple transformations based on this technical concept are all within the scope of protection of the present application.

[0137] The present application also provides a memory data correction device, please refer to Fig. 9 The memory data correction device is applied to a plurality of memory cells of the memory, and the memory data correction device comprises:

[0138] The reading module 10 is used to obtain the current reading result of each storage unit under each verification current threshold for any storage unit in the memory;

[0139] The correction module 20 is used to perform unit data correction on the memory cell if there is a difference between the current reading results, so as to make the current reading results of the memory cell at each verification current threshold consistent.

[0140] Optionally, the memory data correction device further includes a verification module 30, and the verification module 30 is further used for:

[0141] Counting the number of current reading results that are in the first state;

[0142] If the number of first states is equal to the number of verification current thresholds or equal to zero, it is determined that there is no difference between the current reading results;

[0143] If the number of the first states is not equal to the number of the verification current thresholds and is not equal to zero, it is determined that there is a difference between the current reading results.

[0144] Optionally, the reading module 10 is further used for:

[0145] Obtaining a read current of a memory cell;

[0146] For any one of the verification current thresholds, the read current is compared with each verification current threshold respectively;

[0147] If the read current is lower than the verification current threshold, the current reading result under the verification current threshold is recorded as the first state;

[0148] If the read current is higher than the verification current threshold, the current reading result under the verification current threshold is recorded as the second state;

[0149] After traversing each verification current threshold, each current reading result is obtained.

[0150] Optionally, the number of the verification current thresholds is an odd number, and the correction module 20 is further used for:

[0151] If the number of first states in each current reading result is greater than half of the number of the verification current threshold, a zeroing operation is performed on the storage unit to change the second state in each current reading result into the first state;

[0152] If the number of the first state in each current reading result is less than half of the number of the verification current threshold, a set operation is performed on the storage unit to change the first state in each current reading result into a second state.

[0153] Optionally, the memory data correction device further includes an alarm module 40, and the alarm module 40 is further used for:

[0154] The number of corrections performed by the storage unit for unit data correction is recorded, and when the number of corrections reaches a preset number of corrections and there is still a difference in the reading results of each current of the storage unit, an alarm message is output.

[0155] Optionally, the memory data correction device further includes a selection module 50, and the selection module 50 is further used for:

[0156] Receive gear selection operation;

[0157] In the case where the gear selection operation is to select the first verification current threshold group, performing a first verification current threshold adjustment operation to shift each verification current threshold toward the first state;

[0158] When the gear selection operation is to select the second verification current threshold group, performing the second verification current threshold adjustment operation to shift each verification current threshold toward the second state;

[0159] In the case where the gear selection operation is to select the first verification current threshold group and the second verification current threshold group, the first verification current threshold adjustment operation and the second current threshold adjustment operation are respectively performed.

[0160] Optionally, the memory data correction device further includes a multi-bit verification module 60, and the multi-bit verification module 60 is further used for:

[0161] Obtaining current reading results of each storage unit at each verification current threshold;

[0162] When the current reading results under each verification current threshold are the same, then each storage unit does not need to be verified;

[0163] When the current reading results under each verification current threshold are different, the storage units with different current reading results are counted, and the unit data correction is performed on the storage units;

[0164] The step of obtaining the current reading result of each memory cell at each verification current threshold is performed based on each memory cell after the unit data correction is performed.

[0165] The memory data correction device provided by the present application adopts the memory data correction method in the above embodiment, which can solve the technical problem of low stability of the memory. Compared with the prior art, the beneficial effects of the memory data correction device provided by the present application are the same as the beneficial effects of the memory data correction method provided by the above embodiment, and other technical features in the memory data correction device are the same as the features disclosed in the above embodiment method, which will not be repeated here.

[0166] The present application provides an electronic device, which includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the memory data correction method in the above-mentioned embodiment 1.

[0167] Reference below Fig.10, which shows a schematic diagram of the structure of an electronic device suitable for implementing an embodiment of the present application. The electronic device in the embodiment of the present application may include but is not limited to mobile terminals such as mobile phones, notebook computers, PADs (Portable Application Description: tablet computers), etc., and fixed terminals such as digital TVs, desktop computers, etc. Fig.10 The electronic device shown is merely an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0168] like Fig.10 As shown, the electronic device may include a processing device 1001 (e.g., a central processing unit, a graphics processor, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM: Read Only Memory) 1002 or a program loaded from a storage device 1003 to a random access memory (RAM: Random Access Memory) 1004. In RAM1004, various programs and data required for the operation of the electronic device are also stored. The processing device 1001, ROM1002, and RAM1004 are connected to each other through a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Generally, the following systems can be connected to the I / O interface 1006: an input device 1007 including, for example, a touch screen, a touch pad, a keyboard, a mouse, a microphone, etc.; an output device 1008 including, for example, a liquid crystal display (LCD: Liquid Crystal Display), a speaker, a vibrator, etc.; a storage device 1003 including, for example, a disk, a hard disk, etc.; and a communication device 1009. The communication device 1009 can allow the electronic device to communicate with other devices wirelessly or by wire to exchange data. Although the figure shows an electronic device with various systems, it should be understood that it is not required to implement or have all the systems shown. More or fewer systems can be implemented or have alternatively.

[0169] In particular, according to the embodiments disclosed in the present application, the process described above with reference to the flowchart can be implemented as a computer software program. For example, the embodiments disclosed in the present application include a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through a communication device, or installed from a storage device 1003, or installed from a ROM 1002. When the computer program is executed by the processing device 1001, the above-mentioned functions defined in the method of the embodiment disclosed in the present application are executed.

[0170] The electronic device provided by the present application adopts the memory data correction method in the above embodiment to solve the technical problem of low memory stability. Compared with the prior art, the beneficial effects of the electronic device provided by the present application are the same as the beneficial effects of the memory data correction method provided by the above embodiment, and the other technical features in the electronic device are the same as the features disclosed in the method of the previous embodiment, which will not be repeated here.

[0171] It should be understood that the various parts disclosed in this application can be implemented by hardware, software, firmware or a combination thereof. In the description of the above embodiments, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0172] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

[0173] The present application provides a computer-readable storage medium having computer-readable program instructions (ie, computer programs) stored thereon, and the computer-readable program instructions are used to execute the memory data correction method in the above-mentioned embodiment.

[0174] The computer-readable storage medium provided in the present application may be, for example, a USB flash drive, but is not limited to electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems or devices, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM: Random Access Memory), a read-only memory (ROM: Read Only Memory), an erasable programmable read-only memory (EPROM: Erasable Programmable Read Only Memory or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM: CD-Read Only Memory), an optical storage device, a magnetic storage device, or any suitable combination of the above. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in combination with an instruction execution system or device. The program code contained on the computer-readable storage medium may be transmitted using any appropriate medium, including but not limited to: wires, optical cables, RF (Radio Frequency: Radio Frequency), etc., or any suitable combination of the above.

[0175] The computer-readable storage medium may be included in the electronic device, or may exist independently without being installed in the electronic device.

[0176] The above-mentioned computer-readable storage medium carries one or more programs. When the above-mentioned one or more programs are executed by an electronic device, the memory data correction device: for any storage unit in the memory, obtains the current reading results of the storage unit at each verification current threshold; if there is a difference between the current reading results, performs unit data correction on the storage unit to make the current reading results of the storage unit at each verification current threshold consistent.

[0177] Computer program code for performing the operations of the present application may be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0178] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present application. In this regard, each square box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two square boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0179] The modules involved in the embodiments described in this application may be implemented by software or hardware, wherein the name of the module does not constitute a limitation on the unit itself in some cases.

[0180] The readable storage medium provided in the present application is a computer-readable storage medium, which stores computer-readable program instructions (i.e., computer programs) for executing the above-mentioned memory data correction method, and can solve the technical problem of low memory stability. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided in the present application are the same as the beneficial effects of the memory data correction method provided in the above-mentioned embodiment, and will not be repeated here.

[0181] The present application also provides a computer program product, including a computer program, which implements the steps of the above-mentioned memory data correction method when executed by a processor.

[0182] The computer program product provided by the present application can solve the technical problem of low stability of memory. Compared with the prior art, the beneficial effects of the computer program product provided by the present application are the same as the beneficial effects of the memory data correction method provided by the above embodiment, which will not be repeated here.

[0183] The above descriptions are only some embodiments of the present application, and are not intended to limit the patent scope of the present application. All equivalent structural changes made using the contents of the present application specification and drawings under the technical concept of the present application, or direct / indirect applications in other related technical fields are included in the patent protection scope of the present application.

Claims

1. A memory data correction method, characterized in that: The memory is provided with various verification current thresholds, and the memory data correction method comprises: For any storage unit in the memory, obtaining current reading results of the storage unit at each verification current threshold value; If there is a difference between the current reading results, a unit data correction is performed on the memory cell to make the current reading results of the memory cell at each verification current threshold consistent.

2. The memory data correction method according to claim 1, characterized in that: After the step of obtaining the current reading results of the storage unit at each verification current threshold, the following step is further included: Counting the number of the current reading results that are in the first state; If the number of the first states is equal to the number of the verification current thresholds or equal to zero, it is determined that there is no difference between the current reading results; If the number of the first states is not equal to the number of the verification current thresholds and is not equal to zero, it is determined that there is a difference between the current reading results.

3. The memory data correction method according to claim 1, characterized in that: The step of obtaining the current reading results of the storage unit at each verification current threshold comprises: Acquiring a read current of the memory cell; For any one of the verification current thresholds, comparing the read current with each verification current threshold respectively; If the read current is lower than the verification current threshold, the current reading result under the verification current threshold is recorded as a first state; If the read current is higher than the verification current threshold, the current reading result under the verification current threshold is recorded as the second state; After traversing the various verification current thresholds, various current reading results are obtained.

4. The memory data correction method according to claim 3, characterized in that: The number of the verification current thresholds is an odd number, and if there is a difference between the current reading results, the step of performing unit data correction on the storage unit includes: If the number of the first states in each current reading result is greater than half of the number of the verification current threshold, performing a zeroing operation on the storage unit to change the second state in each current reading result into the first state; If the number of the first states in the current reading results is less than half of the number of the verification current threshold, a set operation is performed on the storage unit to change the first state in the current reading results into a second state.

5. The memory data correction method according to claim 1, characterized in that: After the step of performing unit data correction on the storage unit, the step further includes: The number of corrections performed by the storage unit for unit data correction is recorded, and when the number of corrections reaches a preset number of corrections and there is still a difference in the current reading results of the storage unit, an alarm message is output.

6. The memory data correction method according to claim 3, characterized in that: The memory data correction method further comprises: Accept the gear selection operation; When the gear selection operation is to select the first verification current threshold group, performing a first verification current threshold adjustment operation to shift each verification current threshold toward a first state; When the gear selection operation is to select the second verification current threshold group, performing a second verification current threshold adjustment operation to shift each verification current threshold toward the second state; In the case where the gear selection operation is to select the first verification current threshold group and the second verification current threshold group, the first verification current threshold adjustment operation and the second current threshold adjustment operation are respectively performed.

7. The memory data correction method according to claim 1, characterized in that: The memory includes various storage units, and the memory data correction method further includes: Obtaining current reading results of each storage unit at each verification current threshold; In the case where the current reading results under the verification current thresholds are the same, then the storage units do not need to be verified; When the current reading results under the verification current thresholds are different, counting the storage units with different current reading results, and performing unit data correction on the storage units; The step of obtaining the current reading results of each storage unit at each verification current threshold is performed based on each storage unit after the unit data correction.

8. An electronic device, characterized in that: The device comprises: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program is configured to implement the steps of the memory data correction method according to any one of claims 1 to 7.

9. A storage medium, characterized in that: The storage medium is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, the steps of the memory data correction method according to any one of claims 1 to 7 are implemented.

10. A computer program product, characterized in that The computer program product comprises a computer program, and when the computer program is executed by a processor, the steps of the memory data correction method according to any one of claims 1 to 7 are implemented.

Images