Chip eutectic bonding process method and application

Abstract

The invention belongs to the technical field of semiconductor power module packaging, and particularly relates to a chip eutectic welding process method and application, and the process method comprises the following steps: employing a conventional magnetron sputtering or electron beam evaporation technology to manufacture a low-melting-point eutectic welding metal layer on the back surface of a chip; mounting the eutectic welding metal layer of the chip on the metal circuit topology layer of the ceramic substrate by adopting a module packaging conventional chip mounter; heating and pressurizing equipment is adopted to heat and pressurize the chip on the ceramic substrate, and welding can be completed after the chip is cooled. The eutectic welding metal layer is arranged on the back surface of the chip to replace silver paste sintered by silver or copper paste sintered by copper, and the chip is welded on the copper layer of the ceramic substrate through heating and pressurizing, so that the processes of screen printing of the welding paste, hot pasting machine pasting and welding paste baking are omitted, the oxidation of the silver paste or the copper paste is avoided, the thermal resistance can reach the same level of the silver paste or the copper paste, and the production efficiency is improved. A silver sintering or copper sintering process can be greatly simplified, the processing cost is reduced, and the yield is improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor power module packaging, and in particular relates to a chip eutectic welding process method and application. Background Art

[0002] The eutectic soldering metal layer on the back of power semiconductor chips is a mature technology, but it can only be used for 5mm 2 The following small chip packaging discrete devices are used in a single tube. The advantage is that solder is no longer needed. The melting point of the eutectic solder metal layer is around 230°C. The chip has its own metal on the back to complete the chip bonding process. The disadvantage is that the metal on the back of the chip generally does not exceed 2um. If the chip area is large, large areas of voids are prone to appear in the solder layer after bonding. If the eutectic solder metal layer is thickened, the material cost will be too high and the product price will be unaffordable.

[0003] At present, power semiconductor chip packaging technology is constantly innovating, especially in the welding technology of silicon carbide MOS chips, silver sintering or copper sintering technology is widely used, which can greatly reduce the thermal resistance of the welding layer, give full play to the performance of silicon carbide chips, and improve product reliability. However, both sintering technologies require silver paste or copper paste. The solder paste is printed on the position where the chip needs to be welded on the ceramic board through screen printing, and then the chip is attached to the solder paste with a hot paste machine. After pre-baking in an oven, the chip is pressed by a heating and pressurizing device to weld the chip on the ceramic board.

[0004] In addition to the high cost of the solder paste itself, silver sintering or copper sintering also has certain difficulties in printing the solder paste's thickness uniformity, shape control, and flatness. The most difficult thing is that silver paste and copper paste are extremely easy to oxidize, and the oxidation protection requirements of heating and pressurizing equipment are very high. Summary of the invention

[0005] The purpose of the present invention is to solve the defects and shortcomings in the prior art and to provide a chip eutectic welding process method and application.

[0006] To achieve the above object, the technical solution adopted by the present invention is: a chip eutectic welding process method, comprising the following steps:

[0007] S1. Use conventional magnetron sputtering or electron beam evaporation process to make a low melting point eutectic solder metal layer on the back of the chip;

[0008] S2, using a conventional chip mounter for module packaging to mount the eutectic solder metal layer of the chip onto the metal circuit topology layer of the ceramic substrate;

[0009] S3. Use heating and pressurizing equipment to heat and pressurize the chip on the ceramic substrate, and the welding can be completed after the chip cools down.

[0010] Preferably, in step S1, the material of the eutectic soldering metal layer is selected from AuAs, AuGe, AuGa, AuSn, AuSi, SnIn, SnAg, SnCu, SnAgCu, SnSb, PbSnAg, aluminum-titanium-nickel-silver-tin or pure tin.

[0011] Preferably, in step S1, the thickness of the eutectic solder metal layer is 20-150 um, and the melting point is 180-400°C.

[0012] Preferably, the eutectic soldering metal layer in step S1 comprises a titanium layer, a nickel layer, a silver layer and a silver-tin alloy layer arranged in sequence, and the thickness of the titanium layer is The thickness of the nickel layer is The thickness of the silver layer is The thickness of the silver-tin alloy layer is 20-150um.

[0013] Preferably, in step S2, the metal circuit topology layer is a copper-clad circuit topology layer.

[0014] Preferably, the heating and pressurizing equipment in step S3 comprises a heating plate and a pressing head arranged above the heating plate, and the ceramic substrate on which the chip mounting is completed in step S2 is placed between the heating plate and the pressing head.

[0015] Preferably, in step S3, the heating and pressurizing temperature is 350° C., the pressure is 1-50 kg, and the time is 10-60 s.

[0016] A semiconductor chip manufactured by the above process method.

[0017] Application of the above semiconductor chip in semiconductor power module packaging.

[0018] After adopting the above technical solution, the chip eutectic welding process method and application provided by the present invention have the following beneficial effects:

[0019] 1) The present invention can replace the silver paste of silver sintering or the copper paste of copper sintering by designing the eutectic solder metal layer on the back of the chip, and solder the chip to the copper layer of the ceramic substrate by heating and pressurizing, thereby eliminating the screen printing solder paste, hot-mounting machine patch and solder paste baking process, avoiding the oxidation of silver paste or copper paste, eliminating the welding layer voids caused by the deformation of the chip or ceramic substrate, and achieving the same level of thermal resistance as silver paste or copper paste, which can greatly simplify the silver sintering or copper sintering process;

[0020] 2) Although the thickening of the eutectic solder metal layer of the present invention increases the material cost, the cost is roughly equivalent to that of silver paste / copper paste. At the same time, the saved process equipment and labor costs make the product cost of the present invention lower, the operation is simpler and more convenient, and has a higher yield rate;

[0021] 3) The thermal resistance of the eutectic solder metal layer of the present invention depends on which eutectic solder metal material is selected on the back of the chip. If a gold-based eutectic solder metal is used, the thermal resistance is lower than that of silver paste / copper paste. At the same time, since the thickness of the eutectic solder metal layer can be precisely controlled, the uniformity, consistency and stability of the product welding thermal resistance value can be ensured. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 The figure is a welding schematic diagram of a chip eutectic welding process method of the present invention.

[0023] Among them: ceramic substrate 1, metal circuit topology layer 2, eutectic soldering metal layer 3, chip 4, heating plate 5, pressing head 6. DETAILED DESCRIPTION

[0024] The present invention is further described clearly and completely below in conjunction with the accompanying drawings and specific embodiments. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. The following description of at least one exemplary embodiment is actually only illustrative and is by no means intended to limit the present invention and its application or use. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0025] This embodiment provides a chip eutectic welding process method. The semiconductor chip manufactured by the method is used in semiconductor power module packaging technology. The process method includes the following steps:

[0026] S1. A low melting point eutectic soldering metal layer 3 is produced on the back of the chip 4 by conventional magnetron sputtering or electron beam evaporation process. The eutectic soldering metal layer 3 has a thickness of 20-150 um and a melting point of 180-400° C. The material is AuAs, AuGe, AuGa, AuSn, AuSi, SnIn, SnAg, SnCu, SnAgCu, SnSb, PbSnAg, aluminum-titanium-nickel-silver-tin or pure tin;

[0027] S2, using a conventional chip mounter for module packaging to mount the eutectic solder metal layer 3 of the chip 4 onto the metal circuit topology layer 2 of the ceramic substrate 1;

[0028] S3, heating and pressurizing the chip 4 on the ceramic substrate 1 by using a heating and pressurizing device, and the welding can be completed after the chip 4 is cooled. The heating and pressurizing device includes a heating plate 5 and a pressing head 6 arranged above the heating plate 5. The ceramic substrate 1 on which the chip 4 is mounted in step S2 is placed between the heating plate 5 and the pressing head 6, that is, the side of the ceramic substrate 1 away from the chip 4 is placed on the heating plate 5, and the pressing head 6 applies pressure from top to bottom to the side of the chip 4 away from the eutectic welding metal layer 3, such as Figure 1 shown.

[0029] Preferably, the eutectic solder metal layer 3 of this embodiment includes a titanium layer, a nickel layer, a silver layer and a silver-tin alloy layer arranged in sequence, and the thickness of the titanium layer is The thickness of the nickel layer is The thickness of the silver layer is The thickness of the silver-tin alloy layer is 20-150um, the metal circuit topology layer 2 is a copper-clad circuit topology layer, the heating and pressurizing temperature is 350°C, the pressure is 1-50kg, the time is 10-60s, and the welding can be completed after the chip 4 cools down.

[0030] The present invention provides a chip eutectic welding process method and application, which provides a eutectic welding metal layer on the back of the chip to replace the silver paste of silver sintering or the copper paste of copper sintering, and welds the chip to the copper layer of the ceramic substrate by heating and pressurizing, thereby eliminating the screen printing solder paste, hot-mounting machine patch and solder paste baking processes, avoiding the oxidation of silver paste or copper paste, and achieving the same level of thermal resistance as silver paste or copper paste, which can greatly simplify the silver sintering or copper sintering process, reduce processing costs, and improve the yield rate.

[0031] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A chip eutectic welding process method, characterized in that: The following steps are involved: S1, using conventional magnetron sputtering or electron beam evaporation technology to form a low melting point eutectic solder metal layer (3) on the back side of the chip (4); S2, using a conventional chip mounter for module packaging to mount the eutectic solder metal layer (3) of the chip (4) onto the metal circuit topology layer (2) of the ceramic substrate (1); S3, using a heating and pressurizing device to heat and pressurize the chip (4) on the ceramic substrate (1), and the welding can be completed after the chip (4) is cooled.

2. A chip eutectic welding process method according to claim 1, characterized in that: In the step S1, the material of the eutectic soldering metal layer (3) is selected from AuAs, AuGe, AuGa, AuSn, AuSi, SnIn, SnAg, SnCu, SnAgCu, SnSb, PbSnAg, aluminum-titanium-nickel-silver-tin or pure tin.

3. A chip eutectic welding process method according to claim 1, characterized in that: In the step S1, the thickness of the eutectic solder metal layer (3) is 20-150 um and the melting point is 180-400°C.

4. A chip eutectic welding process method according to claim 1, characterized in that: In step S1, the eutectic soldering metal layer (3) comprises a titanium layer, a nickel layer, a silver layer and a silver-tin alloy layer arranged in sequence, and the thickness of the titanium layer is The thickness of the nickel layer is The thickness of the silver layer is The thickness of the silver-tin alloy layer is 20-150um.

5. The chip eutectic welding process according to claim 1, characterized in that: In the step S2, the metal circuit topology layer (2) is a copper-clad circuit topology layer.

6. A chip eutectic welding process method according to claim 1, characterized in that: The heating and pressurizing equipment in step S3 comprises a heating plate (5) and a pressing head (6) arranged above the heating plate (5), and the ceramic substrate (1) on which the chip (4) is mounted in step S2 is placed between the heating plate (5) and the pressing head (6).

7. The chip eutectic welding process according to claim 1, characterized in that: In step S3, the heating and pressurizing temperature is 350° C., the pressure is 1-50 kg, and the time is 10-60 seconds.

8. A semiconductor chip manufactured by the process according to any one of claims 1 to 7.

9. Use of the semiconductor chip according to claim 8 in semiconductor power module packaging.

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