Control method of multi-phase switch circuit, control circuit and multi-phase switch circuit

Abstract

The present invention discloses a control method, a control circuit and a multi-phase switching circuit, wherein the multi-phase switching circuit comprises an N-phase switching circuit, wherein the N-phase switching circuit comprises N inductors, and the inductance value of each inductor is L; an m-th upper limit instruction voltage, an m-th lower limit instruction voltage and an m-th reconstruction current are set; the m-th upper limit instruction voltage is equal to the difference between a compensation voltage and an m-th peak slope, and controls the peak value of the m-th reconstruction current; the m-th lower limit instruction voltage is equal to the sum of the compensation voltage and the m-th valley slope, and controls the valley value of the inductor current of the m-phase switching circuit; the slope of the m-th reconstruction current is the difference between the input voltage and the output voltage of the multi-phase switching circuit divided by the inductance value L.

Description

Technical Field

[0001] The present invention relates to the technical field of power electronics, and in particular to a control method, a control circuit and a multi-phase switch circuit. Background Art

[0002] The parallel connection of multi-phase switch circuits can easily increase the power supply current level to meet the needs of large currents, such as processors. At the same time, by controlling the drive signal to make each phase switch circuit staggered, the input and output current ripples can be reduced while reducing the inductance of the single-phase switch circuit, and the input and output capacitance can be effectively reduced. The reduction in inductance not only reduces the size of the inductor and the number of capacitors, improves the power density, but also improves the dynamic response speed of the voltage regulator. For the processor power supply, the dynamic response speed to the load jump is very important, because it will directly affect the performance of the processor. The processor has strict requirements for its maximum and minimum working voltages. If the voltage exceeds the maximum voltage value allowed by the processor due to the slow response speed of the voltage regulator when the current is unloaded, this will directly affect the reliability of the processor. On the contrary, if the voltage is lower than the minimum voltage value allowed by the processor when loading, it will cause the computer to crash with a blue screen. In summary, how to meet the requirements of dynamic loads and provide steady-state voltage has always been a very important indicator for measuring controller performance. For loading conditions during load changes, if the controller responds too slowly and energy cannot be transferred from the input side to the output side in time, the required energy can only be provided by the output capacitor, which will inevitably cause a large drop in the output voltage. Conversely, for unloading conditions, if the upper tube cannot be turned off in time and the energy transmission path on the input side is cut off, more additional energy will be transmitted to the output capacitor, resulting in a large bump in the output voltage. In this case, in order to stabilize the output voltage, a large number of output capacitors need to be placed, which increases the system cost and volume. Therefore, a controller with fast dynamic response capability can not only reduce the output capacitance and save space for the system, but also improve the system power density and reduce costs. Summary of the invention

[0003] In view of this, an object of the present invention is to provide a control method, a control circuit and a multi-phase switching circuit for a multi-phase switching circuit, so as to solve the problem that the dynamic response speed of the multi-phase switching circuit in the prior art is not fast enough.

[0004] The technical solution of the present invention is to provide a control method of a multi-phase switch circuit, wherein the multi-phase switch circuit includes an N-phase switch circuit, and the N-phase switch circuit includes N inductors, and the inductance value of each inductor is L;

[0005] Setting the mth upper limit command voltage, the mth lower limit command voltage and the mth reconstruction current;

[0006] The mth upper limit instruction voltage is equal to the difference between the compensation voltage and the mth peak slope, and controls the peak value of the mth reconstruction current; when the peak value of the mth reconstruction current reaches the mth upper limit instruction voltage, the main switch tube of the mth phase switch circuit is turned off;

[0007] The mth lower limit instruction voltage is equal to the sum of the compensation voltage and the mth valley slope, and controls the valley value of the inductor current of the mth phase switch circuit;

[0008] The slope of the mth reconstruction current is the difference between the input voltage and the output voltage of the multi-phase switching circuit divided by the inductance value L;

[0009] Wherein, N is a natural number greater than or equal to 2; m is any natural number from 1 to N.

[0010] Optionally, before the main switch tube of the m-phase switch circuit is turned on, the m-th peak slope is reset to the first initial value, and when the main switch tube of the m-phase switch circuit is turned on, the m-th peak slope starts to rise; before the m-phase clock signal representation is valid, the m-th valley slope is reset to the second initial value, and when the m-phase clock signal representation of the m-phase switch circuit is valid, the m-th valley slope starts to rise;

[0011] The m-th clock signal of the m-th phase switch circuit controls the switching period of the m-th phase switch circuit.

[0012] As an option, the mth controllable current charges the mth capacitor when the main switch tube of the mth phase switching circuit is turned on, and the voltage on the mth capacitor represents the mth reconstructed current; the difference between the mth controllable current and the input and output voltages of the multi-phase switching circuit is proportional to the inductance value L.

[0013] Another technical solution of the present invention is to provide a control circuit of a multi-phase switch circuit, wherein the multi-phase switch circuit includes an N-phase switch circuit, and the N-phase switch circuit includes N inductors, and the inductance value of each inductor is L;

[0014] The control circuit sets the mth upper limit instruction voltage, the mth lower limit instruction voltage and the mth reconstruction current;

[0015] The mth upper limit instruction voltage is equal to the difference between the compensation voltage and the mth peak slope, and controls the peak value of the mth reconstruction current; when the peak value of the mth reconstruction current reaches the mth upper limit instruction voltage, the main switch tube of the mth phase switch circuit is turned off;

[0016] The mth lower limit instruction voltage is equal to the sum of the compensation voltage and the mth valley slope, and controls the valley value of the inductor current of the mth phase switch circuit;

[0017] The slope of the mth reconstruction current is the difference between the input voltage and the output voltage of the multi-phase switching circuit divided by the inductance value L;

[0018] Wherein, N is a natural number greater than or equal to 2; m is any natural number from 1 to N.

[0019] Optionally, before the main switch tube of the m-phase switch circuit is turned on, the m-th peak slope is reset to the first initial value, and when the main switch tube of the m-phase switch circuit is turned on, the m-th peak slope starts to rise; before the m-phase clock signal representation is valid, the m-th valley slope is reset to the second initial value, and when the m-phase clock signal representation of the m-phase switch circuit is valid, the m-th valley slope starts to rise;

[0020] The m-th clock signal of the m-th phase switch circuit controls the switching period of the m-th phase switch circuit.

[0021] Optionally, the control circuit includes N-phase switch signal generating circuits, each of which receives a compensation voltage and generates a corresponding switch signal;

[0022] The mth switch signal generating circuit includes a reconstruction current generating circuit; the reconstruction current generating circuit includes an mth controllable current and an mth capacitor; when the main switch tube of the mth phase switch circuit is turned on, the mth controllable current charges the mth capacitor, and the voltage on the mth capacitor represents the mth reconstruction current; the difference between the mth controllable current and the input and output voltages of the multi-phase switch circuit is proportional to the inductance value L.

[0023] Optionally, the mth switch signal generating circuit further includes an RS trigger, an mth upper comparator, an mth lower comparator, an mth upper limit instruction voltage generating circuit and an mth lower limit instruction voltage generating circuit; the mth upper limit instruction voltage generating circuit receives the compensation voltage, and subtracts the compensation voltage from the mth peak slope to obtain the mth upper limit instruction voltage; the mth upper comparator compares the mth reconstruction current and the mth upper limit instruction voltage, and when the main switch tube of the mth phase switch circuit is turned on, the mth reconstruction current is greater than or equal to the mth upper limit instruction voltage, and the output of the mth upper comparator is flipped;

[0024] The mth lower limit instruction voltage generating circuit receives the compensation voltage, and adds the compensation voltage to the mth valley slope to obtain the mth lower limit instruction voltage; the mth lower comparator compares the inductor current sampling value with the mth lower limit instruction voltage, and when the main switch tube of the mth phase switch circuit is turned off, the inductor current sampling value is less than or equal to the mth lower limit instruction voltage, and the output of the mth lower comparator is flipped;

[0025] The RS trigger receives the output voltages of the mth upper comparator and the mth lower comparator, and outputs an mth phase switch signal; when the output voltage of the mth upper comparator is reversed, the mth phase switch signal changes from valid to invalid; when the output voltage of the mth lower comparator is reversed, the mth phase switch signal changes from invalid to valid.

[0026] Optionally, the mth upper limit instruction voltage generating circuit includes an mth peak slope generating circuit and a subtractor, wherein the mth peak slope generating circuit receives the mth phase switching signal and generates an mth peak slope; the subtractor receives the compensation voltage and the mth peak slope, subtracts the mth peak slope from the compensation voltage, and obtains the mth upper limit instruction voltage.

[0027] Optionally, the mth lower limit instruction voltage generating circuit includes an mth valley slope generating circuit and an adder, wherein the mth valley slope generating circuit receives the mth phase switching signal and the mth phase clock signal to generate the mth valley slope; the adder receives the compensation voltage and the mth valley slope, adds the compensation voltage to the mth valley slope to obtain the mth lower limit instruction voltage.

[0028] Another technical solution of the present invention is to provide a multi-phase switching circuit.

[0029] Compared with the prior art, the circuit structure and method of the present invention have the following advantages: fast dynamic response capability, reduced output capacitance and space for the system, and increased system power density and reduced costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 is a schematic diagram of a multi-phase switching circuit;

[0031] Figure 2 is a schematic diagram of a two-phase switching circuit and a coupled inductor;

[0032] Figure 3 The waveforms of the first clock signal CLK1, the second clock signal CLK2, the first upper limit command voltage, the first reconstruction current, the inductor current of the first phase switch circuit, the first lower limit command voltage, the second upper limit command voltage, the second reconstruction current, the inductor current of the second phase switch circuit, the second lower limit command voltage, the first phase switch signal PWM1 and the second phase switch signal PWM2 in the two-phase switch circuit of the present invention and inductive coupling;

[0033] Figure 4The waveforms of the first clock signal CLK1, the second clock signal CLK2, the first upper limit command voltage, the first reconstruction current, the inductor current of the first phase switch circuit, the first lower limit command voltage, the second upper limit command voltage, the second reconstruction current, the inductor current of the second phase switch circuit, the second lower limit command voltage, the first phase switch signal PWM1 and the second phase switch signal PWM2 when the two-phase switch circuit of the present invention is separated in inductance;

[0034] Figure 5 is a schematic diagram of an embodiment of a control circuit 200 of the present invention;

[0035] Figure 6 is a schematic diagram of an embodiment of an mth switch signal generating circuit of the present invention;

[0036] Figure 7 is a schematic diagram of an embodiment of a reconstruction current generating circuit 260 of the present invention;

[0037] Figure 8 is a schematic diagram of an embodiment of the m-th upper limit instruction voltage generating circuit 210 of the present invention;

[0038] Fig. 9 FIG. 2 is a schematic diagram of an embodiment of the m-th lower limit instruction voltage generating circuit 230 of the present invention. DETAILED DESCRIPTION

[0039] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings, but the present invention is not limited to these embodiments. The present invention covers any substitution, modification, equivalent method and scheme made within the spirit and scope of the present invention.

[0040] In order to make the public have a thorough understanding of the present invention, specific details are described in detail in the following preferred embodiments of the present invention, but those skilled in the art can fully understand the present invention without these detailed descriptions.

[0041] The present invention is described in more detail in the following paragraphs by way of example with reference to the accompanying drawings. It should be noted that the accompanying drawings are all simplified and not in exact proportion, and are only used for the purpose of conveniently and clearly assisting in explaining the embodiments of the present invention.

[0042] The present invention provides a control circuit of a multi-phase switch circuit, wherein the multi-phase switch circuit includes an N-phase switch circuit, wherein the N-phase switch circuit includes N inductors, and the inductance value of each inductor is L; Figure 1 As shown, it is an N-phase switch circuit. The upper tube of each phase switch circuit is the main switch tube, and the lower tube is a synchronous rectifier tube. The lower tube can also use a freewheeling diode. Each phase has an inductor connected to the output end. Figure 1The inductors of each phase are discrete. Inductors can also be coupled, for example, the first phase inductor is coupled with the second phase inductor; the third phase inductor is coupled with the fourth phase inductor, and so on. The control current receives the feedback voltage and outputs N switching signals to N drive circuits to drive the main switch tube and synchronous rectifier tube of each phase switch circuit. If it is a freewheeling diode, only the main switch tube needs to be driven.

[0043] The control circuit sets the mth upper limit command voltage, the mth lower limit command voltage and the mth reconstruction current; the mth upper limit command voltage is equal to the difference between the compensation voltage and the mth peak slope, and controls the peak value of the mth reconstruction current; when the peak value of the mth reconstruction current reaches the mth upper limit command voltage, the main switch tube of the mth phase switch circuit is turned off; the mth lower limit command voltage is equal to the sum of the compensation voltage and the mth valley slope, and controls the valley value of the inductor current of the mth phase switch circuit; the slope of the mth reconstruction current is the difference between the input voltage and the output voltage of the multi-phase switch circuit divided by the inductance value L; wherein N is a natural number greater than or equal to 2; m is any natural number from 1 to N. That is to say, the mth reconstruction current and the mth upper limit command voltage are used to determine the turn-off moment of the main switch tube of the mth phase switch circuit; the mth lower limit command voltage and the inductor current of the mth phase switch circuit are used to determine the turn-on moment of the main switch tube.

[0044] Before the main switch tube of the m-phase switch circuit is turned on, the m-th peak slope is reset to the first initial value, and when the main switch tube of the m-phase switch circuit is turned on, the m-th peak slope starts to rise; before the m-phase clock signal is effective, the m-th valley slope is reset to the second initial value, and when the m-phase clock signal of the m-phase switch circuit is effective, the m-th valley slope starts to rise; the m-th clock signal of the m-phase switch circuit controls the switching cycle of the m-phase switch circuit. For convenience, the first initial value is generally set to zero. The second initial value is set to be less than zero. The present invention can synchronize the multi-phase switch circuit with the clock and has a fast dynamic response. In one embodiment, effective can correspond to a high level and invalid can correspond to a low level; in another embodiment, effective can correspond to a low level and invalid can correspond to a high level.

[0045] It should be noted that the slope of the mth peak slope and / or the mth valley slope may be linear or nonlinear, including various forms such as piecewise linear, parabolic, and exponential.

[0046] Please refer to Figure 2 As shown, it is a schematic diagram of a two-phase switching circuit and a coupled inductor; and a freewheeling diode is used. Figure 3 and Figure 4The waveforms of the first clock signal CLK1, the second clock signal CLK2, the first upper limit command voltage, the first reconstruction current, the inductor current of the first phase switch circuit, the first lower limit command voltage, the second upper limit command voltage, the second reconstruction current, the inductor current of the second phase switch circuit, the second lower limit command voltage, the first phase switch signal PWM1 and the second phase switch signal PWM2 are respectively for the two-phase switch circuit of the present invention with inductor coupling and inductor separation. The first clock signal CLK1 and the second clock signal CLK2 are out of phase by 180 degrees. Since there is a coupling coefficient in the coupled inductor, Figure 3 In the embodiment, when the first phase main switch is turned on, the inductor current of the first phase switch circuit is greater than the inductor current of the second phase switch circuit, and the first reconstruction current is greater than the inductor current of the first phase switch circuit. Figure 4 In the circuit, since the inductance of each phase is discrete, when the main switch tube of the first phase is turned on, the first reconstruction current is equal to the inductance current of the first phase switch circuit; that is, when the main switch tube of the m-th phase switch circuit is turned on, the m-th reconstruction current is equal to the inductance current of the m-th phase switch circuit.

[0047] Please refer to Figure 5 As shown, the control circuit includes N-phase switch signal generating circuits, each of which receives a compensation voltage and generates a corresponding switch signal; the control circuit also includes an operational amplifier, which receives a feedback voltage and performs operational amplification on a reference voltage to obtain a compensation voltage.

[0048] Please refer to Figure 6 As shown, the mth switch signal generating circuit includes a reconstruction current generating circuit 260; the reconstruction current generating circuit includes an mth controllable current and an mth capacitor; when the main switch tube of the mth phase switch circuit is turned on, the mth controllable current charges the mth capacitor, and the voltage on the mth capacitor represents the mth reconstruction current; the difference between the mth controllable current and the input and output voltages of the multi-phase switch circuit is proportional to the inductance value L.

[0049] Please refer to Figure 7As shown, it is an embodiment of the current reconstruction circuit. The current reconstruction circuit includes an mth controllable current I261, an mth capacitor C261, a switch K261, a switch K262, and a switch K263. When the mth switch signal PWM m indicates that it is valid, the switch K262 is turned on, and the switch K263 and the switch K264 are turned off. The mth controllable current I261 charges the mth capacitor C261, and the voltage ISNS_SH on the mth capacitor indicates the mth reconstruction current; when the mth switch signal PWM m indicates that it is invalid, the switch K262 is turned off, and the switch K263 and the switch K264 are turned on. The mth controllable current I261 stops charging the mth capacitor C261, and the voltage ISNS_SH on the mth capacitor is equal to the inductor sampling current ISNS. Therefore, the voltage ISNS_SH on the mth capacitor is compared with the mth upper limit instruction voltage when the mth switch signal PWM m indicates that it is valid; and compared with the mth lower limit instruction voltage when the mth switch signal PWM m indicates that it is invalid. It should be noted that, in one embodiment, effective may correspond to a high level, and ineffective may correspond to a low level; in another embodiment, effective may correspond to a low level, and ineffective may correspond to a high level. When the switch signal indicates effective, the main switch tube is turned on; when the switch signal indicates ineffective, the main switch tube is turned off.

[0050] Please refer to Figure 6 As shown, the m-th switch signal generating circuit further includes an RS trigger 250, an m-th upper comparator 220, an m-th lower comparator 240, an m-th upper limit instruction voltage generating circuit 210 and an m-th lower limit instruction voltage generating circuit 230; the m-th upper limit instruction voltage generating circuit 210 receives the compensation voltage, and subtracts the compensation voltage from the m-th peak slope to obtain the m-th upper limit instruction voltage; the m-th upper comparator compares the m-th reconstruction current and the m-th upper limit instruction voltage, and when the main switch tube of the m-th phase switch circuit is turned on, the m-th reconstruction current is greater than or equal to the m-th upper limit instruction voltage, and the output of the m-th upper comparator is flipped;

[0051] The mth lower limit instruction voltage generating circuit receives the compensation voltage and adds the compensation voltage to the mth valley slope to obtain the mth lower limit instruction voltage; the mth lower comparator compares the inductor current sampling value with the mth lower limit instruction voltage. When the main switch tube of the mth phase switch circuit is turned off, the inductor current sampling value is less than or equal to the mth lower limit instruction voltage, and the output of the mth lower comparator is flipped;

[0052] The RS trigger 250 receives the output voltages of the mth upper comparator 220 and the mth lower comparator 230, and outputs the mth phase switching signal PWM m; when the output voltage of the mth upper comparator 220 is reversed, the mth phase switching signal PWM m changes from valid to invalid; when the output voltage of the mth lower comparator 240 is reversed, the mth phase switching signal PWM m changes from invalid to valid.

[0053] Please refer to Figure 8 As shown, an implementation of the m-th upper limit instruction voltage generating circuit is shown. The m-th upper limit instruction voltage generating circuit 210 includes an m-th peak slope generating circuit 212 and a subtractor 211. The m-th peak slope generating circuit 212 receives the m-th phase switching signal PWM m and generates an m-th peak slope; the subtractor 211 receives the compensation voltage and the m-th peak slope, and subtracts the m-th peak slope from the compensation voltage to obtain the m-th upper limit instruction voltage.

[0054] Please refer to Fig. 9 As shown, an implementation of the mth lower limit instruction voltage generating circuit 230 is shown. The mth lower limit instruction voltage generating circuit includes an mth valley slope generating circuit 232 and an adder 231. The mth valley slope generating circuit 232 receives the mth phase switch signal and the mth phase clock signal CLK m to generate the mth valley slope; the adder 231 receives the compensation voltage and the mth valley slope, adds the compensation voltage to the mth valley slope, and obtains the mth lower limit instruction voltage.

[0055] The present invention also provides a control method for a multi-phase switching circuit, wherein the multi-phase switching circuit includes an N-phase switching circuit, and the N-phase switching circuit includes N inductors, each of which has an inductance value of L; an m-th upper limit command voltage, an m-th lower limit command voltage and an m-th reconstruction current are set; the m-th upper limit command voltage is equal to the difference between the compensation voltage and the m-th peak slope, and controls the peak value of the m-th reconstruction current; when the peak value of the m-th reconstruction current reaches the m-th upper limit command voltage, the main switch tube of the m-phase switching circuit is turned off; the m-th lower limit command voltage is equal to the sum of the compensation voltage and the m-th valley slope, and controls the valley value of the inductor current of the m-phase switching circuit; the slope of the m-th reconstruction current is the difference between the input voltage and the output voltage of the multi-phase switching circuit divided by the inductance value L; wherein N is a natural number greater than or equal to 2; and m is any natural number from 1 to N.

[0056] In one embodiment, before the main switch tube of the m-phase switching circuit is turned on, the m-th peak slope is reset to the first initial value, and when the main switch tube of the m-phase switching circuit is turned on, the m-th peak slope starts to rise; before the m-phase clock signal is valid, the m-th valley slope is reset to the second initial value, and when the m-phase clock signal of the m-phase switching circuit is valid, the m-th valley slope starts to rise; the m-th clock signal of the m-phase switching circuit controls the switching cycle of the m-phase switching circuit.

[0057] In one embodiment, the mth controllable current charges the mth capacitor when the main switch tube of the mth phase switching circuit is turned on, and the voltage on the mth capacitor represents the mth reconstructed current; the difference between the mth controllable current and the input and output voltages of the multi-phase switching circuit is proportional to the inductance value L.

[0058] Another technical solution of the present invention is to provide a multi-phase switching circuit.

[0059] Although the embodiments are described and illustrated separately above, some common technologies are involved. It is the opinion of ordinary technicians in this field that the embodiments can be replaced and integrated. If the content is not clearly recorded in one of the embodiments, reference can be made to another recorded embodiment.

[0060] The above-described implementation methods do not constitute a limitation on the protection scope of the technical solution. Any modification, equivalent replacement and improvement made within the spirit and principle of the above-described implementation methods shall be included in the protection scope of the technical solution.

Claims

1. A control method for a multi-phase switching circuit, characterized in that: The multi-phase switch circuit includes an N-phase switch circuit, and the N-phase switch circuit includes N inductors, and the inductance value of each inductor is L; Setting the mth upper limit command voltage, the mth lower limit command voltage and the mth reconstruction current; The mth upper limit instruction voltage is equal to the difference between the compensation voltage and the mth peak slope, and controls the peak value of the mth reconstruction current; when the peak value of the mth reconstruction current reaches the mth upper limit instruction voltage, the main switch tube of the mth phase switch circuit is turned off; The mth lower limit instruction voltage is equal to the sum of the compensation voltage and the mth valley slope, and controls the valley value of the inductor current of the mth phase switch circuit; The slope of the mth reconstruction current is the difference between the input voltage and the output voltage of the multi-phase switching circuit divided by the inductance value L; Wherein, N is a natural number greater than or equal to 2; m is any natural number from 1 to N.

2. The control method according to claim 1, characterized in that: Before the main switch tube of the m-phase switch circuit is turned on, the m-th peak slope is reset to the first initial value, and when the main switch tube of the m-phase switch circuit is turned on, the m-th peak slope starts to rise; before the m-phase clock signal is valid, the m-th valley slope is reset to the second initial value, and when the m-phase clock signal of the m-phase switch circuit is valid, the m-th valley slope starts to rise; The m-th clock signal of the m-th phase switch circuit controls the switching period of the m-th phase switch circuit.

3. The control method according to claim 1, characterized in that: When the main switch tube of the m-phase switching circuit is turned on, the m-th controllable current charges the m-th capacitor, and the voltage on the m-th capacitor represents the m-th reconstructed current; the difference between the m-th controllable current and the input and output voltages of the multi-phase switching circuit is proportional to the inductance value L.

4. A control circuit of a multi-phase switch circuit, the multi-phase switch circuit comprising an N-phase switch circuit, the N-phase switch circuit comprising N inductors, each of which has an inductance value of L; The control circuit sets the mth upper limit instruction voltage, the mth lower limit instruction voltage and the mth reconstruction current; The mth upper limit instruction voltage is equal to the difference between the compensation voltage and the mth peak slope, and controls the peak value of the mth reconstruction current; when the peak value of the mth reconstruction current reaches the mth upper limit instruction voltage, the main switch tube of the mth phase switch circuit is turned off; The mth lower limit instruction voltage is equal to the sum of the compensation voltage and the mth valley slope, and controls the valley value of the inductor current of the mth phase switch circuit; The slope of the mth reconstruction current is the difference between the input voltage and the output voltage of the multi-phase switching circuit divided by the inductance value L; in, N is a natural number greater than or equal to 2; m is any natural number from 1 to N.

5. The control circuit according to claim 4, characterized in that: Before the main switch tube of the m-phase switch circuit is turned on, the m-th peak slope is reset to the first initial value, and when the main switch tube of the m-phase switch circuit is turned on, the m-th peak slope starts to rise; before the m-phase clock signal is valid, the m-th valley slope is reset to the second initial value, and when the m-phase clock signal of the m-phase switch circuit is valid, the m-th valley slope starts to rise; The m-th clock signal of the m-th phase switch circuit controls the switching period of the m-th phase switch circuit.

6. The control circuit according to claim 5, characterized in that: The control circuit includes N-phase switch signal generating circuits, each of which receives a compensation voltage and generates a corresponding switch signal; The mth switch signal generating circuit comprises a reconstructed current generating circuit; the reconstructed current generating circuit comprises an mth controllable current and an mth capacitor; When the main switch tube of the m-phase switching circuit is turned on, the m-th controllable current charges the m-th capacitor, and the voltage on the m-th capacitor represents the m-th reconstructed current; the difference between the m-th controllable current and the input and output voltages of the multi-phase switching circuit is proportional to the inductance value L.

7. The control circuit according to claim 6, characterized in that: The mth switch signal generating circuit further includes an RS trigger, an mth upper comparator, an mth lower comparator, an mth upper limit instruction voltage generating circuit and an mth lower limit instruction voltage generating circuit; the mth upper limit instruction voltage generating circuit receives the compensation voltage and subtracts the mth peak slope from the compensation voltage to obtain the mth upper limit instruction voltage; The mth upper comparator compares the mth reconstruction current and the mth upper limit instruction voltage. When the main switch tube of the mth phase switch circuit is turned on, the mth reconstruction current is greater than or equal to the mth upper limit instruction voltage, and the output of the mth upper comparator is flipped; The mth lower limit instruction voltage generating circuit receives the compensation voltage, and adds the compensation voltage to the mth valley slope to obtain the mth lower limit instruction voltage; the mth lower comparator compares the inductor current sampling value with the mth lower limit instruction voltage, and when the main switch tube of the mth phase switch circuit is turned off, the inductor current sampling value is less than or equal to the mth lower limit instruction voltage, and the output of the mth lower comparator is flipped; The RS trigger receives the output voltages of the mth upper comparator and the mth lower comparator, and outputs an mth phase switch signal; When the output voltage of the mth upper comparator is reversed, the mth phase switch signal changes from valid to invalid; when the output voltage of the mth lower comparator is reversed, the mth phase switch signal changes from invalid to valid.

8. The control circuit according to claim 7, characterized in that: The mth upper limit instruction voltage generating circuit includes an mth peak slope generating circuit and a subtractor. The mth peak slope generating circuit receives the mth phase switching signal and generates an mth peak slope. The subtractor receives the compensation voltage and the mth peak slope, subtracts the mth peak slope from the compensation voltage, and obtains the mth upper limit instruction voltage.

9. The control circuit according to claim 7, characterized in that: The mth lower limit instruction voltage generating circuit includes an mth valley slope generating circuit and an adder. The mth valley slope generating circuit receives the mth phase switching signal and the mth phase clock signal to generate the mth valley slope. The adder receives the compensation voltage and the mth valley slope, adds the compensation voltage to the mth valley slope, and obtains the mth lower limit instruction voltage.

10. A multi-phase switching circuit, characterized in that: It comprises a control circuit as claimed in any one of claims 4 to 9, or adopts a control method as claimed in any one of claims 1 to 3.

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