Single local oscillator frequency reduction circuit and frequency reducer

CN111683214BActive Publication Date: 2025-03-07ZHUHAISHI PUSISAITE KEJI
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Patent Information

Application Number
CN202010587897.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-06-24
Publication Date
2025-03-07
Estimated Expiration
2040-06-24

AI Technical Summary

Technical Problem

When existing satellite TV downspeakers face interference with 5G technology signals, they are difficult to effectively resist interference, resulting in some programs being unable to receive.

Method used

A single local oscillator downfrequency circuit is designed, including a multi-stage cascade amplifier circuit, a multi-stage radio frequency narrowband filter, a phase-locked loop integrated circuit, a dielectric filter and an output filter circuit. Through the combination of these circuit components, signals in the 3.4GHz to 3.7GHz band are effectively suppressed and anti-interference ability is improved.

Benefits of technology

通过多级射频窄带滤波器和锁相环集成电路的组合,能够有效抑制干扰信号,提高降频器的抗干扰能力,确保卫星电视信号的稳定接收。

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses a single local oscillator frequency reduction circuit and a frequency reducer, including a polarized antenna; a multi-stage cascade amplifier circuit, the first stage amplifier circuit is connected to the polarized antenna; a multi-stage radio frequency narrowband filter, the radio frequency narrowband filter is connected to the cascade amplifier circuit at intervals; a phase-locked loop integrated circuit is connected to the last stage radio frequency narrowband filter; a dielectric filter is connected to the phase-locked loop integrated circuit; an output filter circuit is connected to the dielectric filter, and the output filter circuit is connected to an external interface. The multi-stage cascade amplifier circuit can enhance the reception of radio frequency signals, and the multi-stage radio frequency narrowband filter can effectively suppress signals in the 3.4GHz to 3.7GHz band during the transmission of radio frequency signals, thereby achieving anti-interference. After the radio frequency signal is processed by the phase-locked loop integrated circuit, it enters the dielectric filter, which can suppress the out-of-frequency signal, and further filter out the interference signal through the output filter circuit to obtain a high narrowband intermediate frequency bandwidth, which is beneficial to improving the anti-interference ability of the frequency reducer.
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Description

Technical Field

[0001] The invention relates to the technical field of satellite communication, and in particular to a single local oscillator frequency reduction circuit and a frequency reducer. Background Art

[0002] Satellite TV has experienced half a century of development and popularization, and now covers the world. With the continuous development of satellite network technology, more and more devices require the support of satellite signals of different frequencies, resulting in more and more signals radiating and interfering with each other. In addition, the emerging 5G technology in recent years has a signal frequency band that partially overlaps with the satellite TV C-band receiving frequency band (3.4GHz~3.7GHz), which causes great radiation interference to the C-band downconverter on the market, resulting in some satellite TV programs being unable to be received. In addition, with the continuous improvement of safety awareness, the user end needs to avoid accidents caused by high voltage or high current when designing products. Summary of the invention

[0003] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, the present invention provides a single local oscillator frequency reduction circuit and a frequency reducer, which can improve the anti-interference ability of the frequency reducer.

[0004] In the first aspect, a single local oscillator frequency reduction circuit according to an embodiment of the present invention includes a polarized antenna; a multi-stage cascade amplifier circuit, wherein an input end of the first stage of the cascade amplifier circuit is connected to the polarized antenna; a multi-stage radio frequency narrowband filter, wherein the radio frequency narrowband filter is connected to the cascade amplifier circuit at intervals; a phase-locked loop integrated circuit, wherein an input end is connected to the radio frequency narrowband filter of the last stage; a dielectric filter, wherein an input end is connected to an output end of the phase-locked loop integrated circuit; and an output filter circuit, wherein an input end is connected to an output end of the dielectric filter, wherein an output end of the output filter circuit is connected to an external interface.

[0005] According to some embodiments of the present invention, the number of the cascade amplifier circuit and the number of the radio frequency narrowband filter are both three.

[0006] According to some embodiments of the present invention, a first radio frequency microstrip transmission line is connected between the polarized antenna and the first-stage cascade amplifier circuit.

[0007] According to some embodiments of the present invention, the single local oscillator frequency reduction circuit further includes a signal source circuit, and the signal source circuit is connected to at least the first stage of the cascade amplifier circuit.

[0008] According to some embodiments of the present invention, the cascade amplifier circuit includes first to third amplifier tubes, each amplifier tube has a control terminal, a ground terminal and an output terminal, and the radio frequency narrowband filter includes first to third microstrip filters;

[0009] The control end of the first amplifier tube is connected to the first RF microstrip transmission line, and is connected to the polarized antenna through the first RF microstrip transmission line. The control end of the first amplifier tube is also connected to the first voltage-dividing filter circuit, and is connected to the output end G1 of the signal source circuit through the first voltage-dividing filter circuit. The grounding end of the first amplifier tube is grounded, and the output end of the first amplifier tube is connected to the output end D1 of the signal source circuit. The output end D1 of the signal source circuit is also connected to a capacitor C5 and is grounded through the capacitor C5. The output end of the first amplifier tube is also connected to a capacitor C1, and is connected to the input end of the first microstrip filter through the capacitor C1. The output end of the first microstrip filter is connected to the control end of the second amplifier tube;

[0010] The control end of the second amplifier tube is also connected to a second voltage-dividing filter circuit, and is connected to the output end G2 of the signal source circuit through the second voltage-dividing filter circuit. The ground end of the second amplifier tube is grounded. The output end of the second amplifier tube is connected to the output end D2 of the signal source circuit. The output end D2 of the signal source circuit is also connected to a capacitor C9 and is grounded through the capacitor C9. The output end of the second amplifier tube is also connected to a capacitor C6 and is connected to the input end of the second microstrip filter through the capacitor C6. The output end of the second microstrip filter is connected to a capacitor C2 and is connected to the control end of the third amplifier tube through the capacitor C2.

[0011] The control end of the third amplifier tube is connected to the third voltage-dividing filter circuit, and is connected to the working power supply through the third voltage-dividing filter circuit. The grounding end of the third amplifier tube is grounded. The output end of the third amplifier tube is connected to the first filter circuit, and is connected to the working power supply through the first filter circuit. The output end of the third amplifier tube is also connected to the capacitor C7, and is connected to the input end of the third microstrip filter through the capacitor C7. The output end of the third microstrip filter is connected to the input end of the phase-locked loop integrated circuit.

[0012] According to some embodiments of the present invention, the first voltage-divider filter circuit and / or the second voltage-divider filter circuit includes a first microstrip inductor, a voltage-divider resistor and a filter capacitor, the first end of the first microstrip inductor is connected to the corresponding amplifier tube, the second end of the first microstrip inductor is connected to the voltage-divider resistor and is connected to the signal source circuit through the voltage-divider resistor, the first end of the filter capacitor is connected to one end of the voltage-divider resistor, and the second end of the filter capacitor is grounded.

[0013] According to some embodiments of the present invention, the output filter circuit includes a plurality of output filter capacitors and a plurality of second microstrip inductors, and the plurality of output filter capacitors and the plurality of second microstrip inductors form an LC filter circuit.

[0014] According to some embodiments of the present invention, the single local oscillator frequency reduction circuit also includes a voltage stabilizing circuit, the input end of the voltage stabilizing circuit is connected to the external interface, the output end of the voltage stabilizing circuit is used to provide a working power supply, and the input end of the voltage stabilizing circuit is also connected to an overvoltage protection circuit.

[0015] In a second aspect, a frequency reducer according to an embodiment of the present invention comprises an I-shaped narrowband filter housing and the above-mentioned single local oscillator frequency reduction circuit, wherein the single local oscillator frequency reduction circuit is installed in the narrowband filter housing.

[0016] One or more technical solutions according to the embodiments of the present invention have at least the following beneficial effects:

[0017] The multi-stage cascade amplifier circuit can enhance the reception of RF signals. The multi-stage RF narrowband filter can effectively suppress the signals in the 3.4GHz to 3.7GHz band during the transmission of RF signals, thereby achieving anti-interference. After the RF signal is processed by the phase-locked loop integrated circuit, it enters the dielectric filter, which can further suppress the out-of-frequency signal and further filter out the interference signal through the output filter circuit to obtain a high narrowband intermediate frequency bandwidth, which is beneficial to improve the anti-interference ability of the downconverter.

[0018] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0020] Figure 1 1 is a circuit principle block diagram of a single local oscillator frequency reduction circuit according to an embodiment of the present invention;

[0021] Figure 2 1 is a circuit schematic diagram of a single local oscillator frequency reduction circuit according to an embodiment of the present invention;

[0022] Figure 3 Schematic diagram of the structure of a frequency converter according to an embodiment of the present invention. DETAILED DESCRIPTION

[0023] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0024] In the description of the present invention, "several" means one or more, "more" means more than two, "greater than", "less than", "exceed" etc. are understood as not including the number itself, and "above", "below", "within" etc. are understood as including the number itself. If there is a description of the first, second, and third, it is only used for the purpose of distinguishing the technical features, and cannot be understood as indicating or implying the relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.

[0025] In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, connecting, etc. should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention based on the specific content of the technical solution.

[0026] Please refer to Figure 1 The present embodiment discloses a single local oscillator frequency reduction circuit, comprising a polarized antenna 100, a multi-stage cascade amplifier circuit 200, a multi-stage radio frequency narrowband filter 300, a phase-locked loop integrated circuit 400, a dielectric filter 500 and an output filter circuit 600, wherein the input end of the first-stage cascade amplifier circuit 200 is connected to the polarized antenna 100, the radio frequency narrowband filter 300 is connected to the cascade amplifier circuit 200 at an interval, the input end of the phase-locked loop integrated circuit 400 is connected to the last-stage radio frequency narrowband filter 300, the input end of the dielectric filter 500 is connected to the output end of the phase-locked loop integrated circuit 400, the input end of the output filter circuit 600 is connected to the output end of the dielectric filter 500, and the output end of the output filter circuit 600 is connected to an external interface 610.

[0027] In this embodiment, a first-stage RF narrowband filter 300 is connected after each stage of the cascade amplifier circuit 200, which can effectively suppress out-of-band signals with a frequency band of 3.4GHz to 3.7GHz. Among them, a first-stage RF narrowband filter 300 is connected after the first stage of the cascade amplifier circuit 200, which can suppress out-of-band signals when the out-of-band signals are the weakest, which is conducive to improving the suppression effect. The RF narrowband filter 300 of this embodiment adopts a comb-type narrowband frequency suppression microstrip filter, which can be realized by line wiring without additional circuit components, which is conducive to reducing production costs. After the RF signal is processed by the phase-locked loop integrated circuit 400, it enters the dielectric filter 500, which can further suppress the frequency signal, and further filter out the interference signal through the output filter circuit 600, to obtain a high narrowband intermediate frequency bandwidth, which is conducive to improving the anti-interference ability of the downconverter.

[0028] In some embodiments, the number of cascade amplifier circuits 200 is 3 or 4, and the number of RF narrowband filter is 3. In this embodiment, the number of cascade amplifier circuits 200 and the number of RF narrowband filter 300 are both 3, which can meet the requirements of suppressing and amplifying heterofrequency signals and save circuit costs.

[0029] Please refer to Figure 2 A first RF microstrip transmission line 101 is connected between the polarized antenna 100 and the first-stage cascade amplifier circuit 200. The first RF microstrip transmission line 101 is implemented by line wiring without the need for additional circuit components. It can suppress interference signals to a certain extent, which is beneficial to improving the anti-interference ability of the circuit.

[0030] In some embodiments, the driving signal of the cascade amplifier circuit 200 is provided by a phase-locked loop integrated circuit 400, or provided by a negative voltage generating circuit composed of discrete devices. In this embodiment, please refer to Figure 2 The single local oscillator frequency reduction circuit further includes a signal source circuit 700, which is connected to at least the first stage cascade amplifier circuit 200. The signal source circuit 700 includes a chip U1. Compared with the negative voltage generating circuit composed of discrete devices, the chip U1 of this embodiment has a higher degree of integration and a more stable output voltage, which can provide a more stable bias signal for the cascade amplifier circuit 200.

[0031] The cascade amplifier circuit 200 includes first to third amplifier tubes, each of which has a control terminal, a ground terminal and an output terminal. The radio frequency narrowband filter 300 includes first to third microstrip filters, wherein the first amplifier tube 210 uses a MOS tube Q1, the second amplifier tube 220 uses a MOS tube Q2, and the third amplifier tube 230 uses a triode Q3. The MOS tube Q1, the MOS tube Q2 and the triode Q3 are all low-noise amplifier devices, which are beneficial to improving the stability of signal amplification. It should be noted that the control terminal of the amplifier tube is equivalent to the gate of the MOS tube or the base of the triode, the ground terminal of the amplifier tube is equivalent to the source of the MOS tube or the emitter of the triode, and the output terminal of the amplifier tube is equivalent to the drain of the MOS tube or the collector of the triode.

[0032] The control end of the first amplifier tube 210 is connected to the first RF microstrip transmission line 101, and is connected to the polarized antenna 100 through the first RF microstrip transmission line 101. The control end of the first amplifier tube 210 is also connected to the first voltage-dividing filter circuit, and is connected to the output end G1 of the signal source circuit 700 through the first voltage-dividing filter circuit. The grounding end of the first amplifier tube 210 is grounded, and the output end of the first amplifier tube 210 is connected to the output end D1 of the signal source circuit 700. The output end D1 of the signal source circuit 700 is also connected to a capacitor C5 and is grounded through the capacitor C5. The output end of the first amplifier tube 210 is also connected to a capacitor C1, and is connected to the input end of the first microstrip filter 310 through the capacitor C1. The output end of the first microstrip filter 310 is connected to the control end of the second amplifier tube 220;

[0033] The control end of the second amplifier tube 220 is also connected to the second voltage-dividing filter circuit, and is connected to the output end G2 of the signal source circuit 700 through the second voltage-dividing filter circuit. The ground end of the second amplifier tube 220 is grounded. The output end of the second amplifier tube 220 is connected to the output end D2 of the signal source circuit 700. The output end D2 of the signal source circuit 700 is also connected to the capacitor C9 and is grounded through the capacitor C9. The output end of the second amplifier tube 220 is also connected to the capacitor C6 and is connected to the input end of the second microstrip filter 320 through the capacitor C6. The output end of the second microstrip filter 320 is connected to the capacitor C2 and is connected to the control end of the third amplifier tube 230 through the capacitor C2.

[0034] The control end of the third amplifier tube 230 is connected to the third voltage-dividing filter circuit, and is connected to the working power supply through the third voltage-dividing filter circuit. The ground end of the third amplifier tube 230 is grounded. The output end of the third amplifier tube 230 is connected to the first filter circuit, and is connected to the working power supply through the first filter circuit. The output end of the third amplifier tube 230 is also connected to the capacitor C7, and is connected to the input end of the third microstrip filter 330 through the capacitor C7. The output end of the third microstrip filter 330 is connected to the input end of the phase-locked loop integrated circuit 400. Among them, the third voltage-dividing filter circuit includes a resistor R4, a resistor R5, a resistor R6 and a capacitor C12, and the first filter circuit includes a microstrip inductor L13 and a capacitor C11.

[0035] The first voltage-divider filter circuit and / or the second voltage-divider filter circuit include a first microstrip inductor, a voltage-divider resistor and a filter capacitor. The first end of the first microstrip inductor is connected to the corresponding amplifier tube, the second end of the first microstrip inductor is connected to the voltage-divider resistor, and is connected to the signal source circuit 700 through the voltage-divider resistor. The first end of the filter capacitor is connected to one end of the voltage-divider resistor, and the second end of the filter capacitor is grounded. The first microstrip inductor is a microstrip inductor with a small inductance formed on the circuit board by line wiring. Compared with the chip inductor, the microstrip inductor has a better filtering effect. For details, please refer to Figure 2 The first voltage-dividing filtering circuit includes a microstrip inductor L11, a resistor R2 and a capacitor C8, and the second voltage-dividing filtering circuit includes a microstrip inductor L12, a resistor R3 and a capacitor C10.

[0036] Please continue to refer to Figure 2 The phase-locked loop integrated circuit 400 includes a phase-locked loop chip IC2 and a crystal oscillator SMD1 connected to the phase-locked loop chip IC2. The phase-locked loop chip IC2 has a high degree of integration and few peripheral circuits, which is conducive to reducing the area of ​​the circuit and realizing the miniaturization of the product. The radio frequency signal is processed by the phase-locked loop integrated circuit 400 and transmitted to the dielectric filter 500. The dielectric filter 500 uses a narrow-band ceramic dielectric low-pass filter L1 to suppress the out-of-frequency signal.

[0037] The output filter circuit 600 includes multiple output filter capacitors and multiple second microstrip inductors, which form an LC filter circuit. The output filter capacitors include capacitor C16, capacitor C17, capacitor C18 and capacitor C19, and the second microstrip inductors include microstrip inductors L14, microstrip inductors L15 and inductors L16.

[0038] Please refer to Figure 1 and Figure 2 The single local oscillator frequency reduction circuit also includes a voltage stabilizing circuit 800, which includes a voltage stabilizing chip IC1. The input end of the voltage stabilizing circuit 800 is connected to the external interface 610, and the output end of the voltage stabilizing circuit 800 is used to provide a working power supply. The input end of the voltage stabilizing circuit 800 is also connected to an overvoltage protection circuit 810. Specifically, the overvoltage protection circuit 810 uses a transient suppression diode D2. When a strong voltage pulse is input to the external interface 610, the transient suppression diode D2 can effectively protect the voltage stabilizing circuit 800, and the transient suppression diode has the advantages of fast response speed and high cost performance.

[0039] Please refer to Figure 3 The embodiment of the present invention further discloses a frequency reducer, including an I-shaped narrowband filter housing 900 and the above-mentioned single local oscillator frequency reduction circuit, and the single local oscillator frequency reduction circuit is installed in the narrowband filter housing 900.

[0040] The working principle of this embodiment is as follows:

[0041] Please refer to Figures 1 to 3 The satellite TV signal with a frequency band of 3.4 GHz to 4.2 GHz is received by the polarized antenna 100 after the heterodyne signal with a frequency band of 3.4 GHz to 3.7 GHz is initially filtered out by the I-shaped narrowband filter housing 900. The polarization mode of the polarized antenna 100 can be set to vertical polarization or horizontal polarization according to the user's choice. The radio frequency signal received by the polarized antenna 100 is transmitted to the MOS transistor Q1 through the first radio frequency microstrip transmission line 101. The MOS transistor Q1 performs low-noise amplification on the radio frequency signal. The gate-drain voltage V GSThe signal is outputted from the 3rd pin of the chip U1, filtered by the capacitor C8 and divided by the resistor R2. The drain voltage of the MOS tube Q1 is outputted from the 4th pin of the chip U1 and filtered by the capacitor C5. After the first-stage low-noise amplification of the MOS tube Q1, the RF signal is coupled to the first microstrip filter 310 through the capacitor C1 to suppress and filter the signal in the 3.4GHz to 3.7GHz frequency band of the RF signal. Then, the RF signal is amplified for the second time through the MOS tube Q2. The amplified signal is coupled to the second microstrip filter 320 through the capacitor C6 to further suppress the out-of-band signal. Then, the signal is amplified by the transistor Q3, suppressed by the third microstrip filter 330, and then transmitted to the phase-locked loop integrated circuit 400. After the phase-locked loop integrated circuit 400 performs phase detection, oscillation and operational amplification on the signal, a bandwidth signal with a frequency band of 950MHz to 1450MHz is obtained, and coupled to the narrow-band ceramic dielectric low-pass filter L1 through the capacitor C19. In order to further ensure the stability and consistency of signal characteristics and prevent interference from noise from power supply or external devices, the signal output is suppressed by narrow-band ceramic dielectric low-pass filter L1 for signals with a frequency band above 1450MHz, and the noise is suppressed and filtered out by output filter circuit 600. The voltage regulator chip IC1 provides a stable operating voltage for the circuit, and the transient suppression diode D1 protects the voltage regulator chip IC1 to prevent strong voltage pulses from damaging the circuit.

[0042] The multi-stage cascade amplifier circuit 200 can enhance the reception of radio frequency signals, and the multi-stage radio frequency narrowband filter 300 can effectively suppress signals in the 3.4GHz to 3.7GHz band during the transmission of radio frequency signals, thereby achieving anti-interference. After the radio frequency signal is processed by the phase-locked loop integrated circuit 400, it enters the dielectric filter 500, which can further suppress the out-of-frequency signal and further filter out the interference signal through the output filter circuit 600 to obtain a high narrowband intermediate frequency bandwidth, which is beneficial to improving the anti-interference ability of the downconverter.

[0043] The embodiments of the present invention are described in detail above with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge scope of ordinary technicians in the relevant technical field without departing from the purpose of the present invention.

Claims

1. A single local oscillator frequency reduction circuit, characterized in that: include: A polarized antenna (100); A multi-stage cascade amplifier circuit (200), wherein an input end of the first stage of the cascade amplifier circuit (200) is connected to the polarized antenna (100); A multi-stage radio frequency narrowband filter (300), wherein the radio frequency narrowband filter (300) is connected to the cascade amplifier circuit (200) at intervals; A phase-locked loop integrated circuit (400), the input end of which is connected to the last-stage radio frequency narrowband filter (300); A dielectric filter (500), the input end of which is connected to the output end of the phase-locked loop integrated circuit (400); An output filter circuit (600), the input end of which is connected to the output end of the dielectric filter (500), and the output end of the output filter circuit (600) is connected to an external interface (610); A signal source circuit (700), the signal source circuit (700) being connected to at least the first stage of the cascade amplifier circuit (200), the signal source circuit (700) comprising: a D2512AF chip U1; Wherein, the number of the cascade amplifier circuit (200) and the number of the radio frequency narrowband filter (300) are both three.

2. The single local oscillator frequency reduction circuit according to claim 1, characterized in that: A first radio frequency microstrip transmission line (101) is connected between the polarized antenna (100) and the first-stage cascade amplifier circuit (200).

3. The single local oscillator frequency reduction circuit according to claim 1, characterized in that: The cascade amplifier circuit (200) comprises first to third amplifier tubes, each of which has a control end, a ground end and an output end; and the radio frequency narrowband filter (300) comprises first to third microstrip filters; The control end of the first amplifier tube (210) is connected to a first radio frequency microstrip transmission line (101), and is connected to the polarized antenna (100) through the first radio frequency microstrip transmission line (101); the control end of the first amplifier tube (210) is also connected to a first voltage-dividing filter circuit, and is connected to an output end G1 of the signal source circuit (700) through the first voltage-dividing filter circuit; the grounding end of the first amplifier tube (210) is grounded; the output end of the first amplifier tube (210) is connected to an output end D1 of the signal source circuit (700); the output end D1 of the signal source circuit (700) is also connected to a capacitor C5, and is grounded through the capacitor C5; the output end of the first amplifier tube (210) is also connected to a capacitor C1, and is connected to an input end of a first microstrip filter (310) through the capacitor C1; the output end of the first microstrip filter (310) is connected to the control end of a second amplifier tube (220); The control end of the second amplifier tube (220) is also connected to a second voltage-dividing filter circuit, and is connected to the output end G2 of the signal source circuit (700) through the second voltage-dividing filter circuit; the ground end of the second amplifier tube (220) is grounded; the output end of the second amplifier tube (220) is connected to the output end D2 of the signal source circuit (700); the output end D2 of the signal source circuit (700) is also connected to a capacitor C9, and is grounded through the capacitor C9; the output end of the second amplifier tube (220) is also connected to a capacitor C6, and is connected to the input end of the second microstrip filter (320) through the capacitor C6; the output end of the second microstrip filter (320) is connected to a capacitor C2, and is connected to the control end of the third amplifier tube (230) through the capacitor C2; The control end of the third amplifier tube (230) is connected to a third voltage-dividing filter circuit, and is connected to a working power supply through the third voltage-dividing filter circuit; the ground end of the third amplifier tube (230) is grounded; the output end of the third amplifier tube (230) is connected to a first filter circuit, and is connected to the working power supply through the first filter circuit; the output end of the third amplifier tube (230) is also connected to a capacitor C7, and is connected to an input end of a third microstrip filter (330) through the capacitor C7; and the output end of the third microstrip filter (330) is connected to an input end of the phase-locked loop integrated circuit (400).

4. The single local oscillator frequency reduction circuit according to claim 3, characterized in that: The first voltage-dividing filter circuit and / or the second voltage-dividing filter circuit comprises a first microstrip inductor, a voltage-dividing resistor and a filter capacitor; the first end of the first microstrip inductor is connected to the corresponding amplifier tube; the second end of the first microstrip inductor is connected to the voltage-dividing resistor and connected to the signal source circuit (700) via the voltage-dividing resistor; the first end of the filter capacitor is connected to one end of the voltage-dividing resistor; and the second end of the filter capacitor is grounded.

5. The single local oscillator frequency reduction circuit according to claim 1, characterized in that: The output filter circuit (600) comprises a plurality of output filter capacitors and a plurality of second microstrip inductors, and the plurality of output filter capacitors and the plurality of second microstrip inductors form an LC filter circuit.

6. The single local oscillator frequency reduction circuit according to claim 1, characterized in that: It also includes a voltage stabilizing circuit (800), the input end of the voltage stabilizing circuit (800) is connected to the external interface (610), the output end of the voltage stabilizing circuit (800) is used to provide a working power supply, and the input end of the voltage stabilizing circuit (800) is also connected to an overvoltage protection circuit (810).

7. A frequency downconverter, characterized in that: It comprises an I-shaped narrowband filter housing (900) and the single local oscillator frequency reduction circuit according to any one of claims 1 to 6, wherein the single local oscillator frequency reduction circuit is installed in the narrowband filter housing (900).

Citation Information

Patent Citations

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    CN108736904A

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