A trench gate IGBT device

Abstract

The present invention discloses a trench gate IGBT device, comprising a collector metal layer, a collector region, a field stop layer, a drift region, a trench structure and an emitter metal layer stacked in sequence from bottom to top; the trench structure comprises a dummy gate structure and a gate structure, wherein the dummy gate structure is located on the upper side of the drift region, and the gate structure is located in the upper middle of the drift region; the dummy gate structure comprises a narrow portion and a wide portion, and the wide portion is located below the narrow portion; a carrier storage layer is provided above the drift region between the gate structure and the narrow portion, and a P-type base region is provided above the carrier storage layer; a P+ emitter region and an N+ emitter region are provided above the P-type base region, and the P+ emitter region and the N+ emitter region are electrically connected to the emitter metal layer respectively. The present invention effectively reduces Miller capacitance, improves IGBT switching speed, reduces IGBT switching loss and reduces device on-state voltage drop, while taking into account the improvement of various performances of the IGBT.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor power devices, and in particular to a trench gate IGBT device. Background Art

[0002] Insulated gate bipolar transistor (IGBT) is a new type of power electronic device that combines MOS field effect and bipolar transistor. It not only has the advantages of MOSFET, large input resistance, easy to drive and simple control, but also has the advantages of bipolar transistor, such as low on-state voltage drop and large on-state current. It has become one of the core components in modern power electronic circuits and is widely used in transportation, energy, industry, household appliances and other fields.

[0003] Since the invention of IGBT, people have been committed to improving the characteristics of IGBT, and the gate structure has evolved from the initial planar structure to the trench structure. In the process of improving the performance of IGBT, how to simultaneously reduce Miller capacitance, increase switching speed, reduce switching loss, and reduce on-state voltage drop are the key points of research and improvement. Summary of the invention

[0004] The purpose of the present invention is to provide a trench gate IGBT device, which effectively reduces Miller capacitance, improves IGBT switching speed, reduces IGBT switching loss and reduces device on-state voltage drop, while improving various performances of the IGBT.

[0005] In order to achieve the above purpose, the following technical solutions are adopted:

[0006] A trench gate IGBT device comprises a collector metal layer, a collector region, a field stop layer, a drift region, a trench structure and an emitter metal layer which are stacked in sequence from bottom to top; the trench structure comprises a dummy gate structure and a gate structure, wherein the dummy gate structure is located on the upper side of the drift region, and the gate structure is located in the upper middle of the drift region; the dummy gate structure is electrically connected to the emitter metal layer, and the gate structure is isolated from the emitter metal layer via a first dielectric layer; the dummy gate structure comprises a narrow portion and a wide portion, and the wide portion is located below the narrow portion; a carrier storage layer is provided above the drift region between the gate structure and the narrow portion, and a P-type base region is provided above the carrier storage layer; a P+ emitter region and an N+ emitter region are provided above the P-type base region, and the P+ emitter region and the N+ emitter region are electrically connected to the emitter metal layer respectively.

[0007] Preferably, the wide portion includes a wide portion electrode and a wide portion dielectric layer, and the wide portion electrode is isolated from the drift region by the wide portion dielectric layer; the narrow portion includes a narrow portion electrode and a narrow portion dielectric layer, and the narrow portion electrode is isolated from the drift region, the carrier storage layer, and the P-type base region respectively by the narrow portion dielectric layer; the width of the wide portion electrode is greater than the width of the narrow portion electrode, and the wide portion electrode is electrically connected to the narrow portion electrode.

[0008] Preferably, the gate structure is located between the dummy gate structures, and the gate structure includes a gate electrode and a gate dielectric layer.

[0009] Preferably, the depth of the gate electrode is not less than the depth of the narrow portion electrode and not greater than the depth of the wide portion electrode.

[0010] Preferably, the depth of the gate electrode is smaller than the depth of the narrow portion electrode.

[0011] By adopting the above scheme, the beneficial effects of the present invention are:

[0012] In this case, the wide electrode and narrow electrode of the dummy gate structure shield the gate electrode, effectively reducing the Miller capacitance, increasing the IGBT switching speed, and reducing the IGBT switching loss. At the same time, the electric field shielding effect of the wide electrode of the dummy gate structure can increase the concentration of the carrier storage layer without reducing the device withstand voltage, thereby increasing the carrier concentration on the emitter side and reducing the device conduction voltage drop. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 is a schematic cross-sectional structure diagram of the gate electrode of the present invention according to Embodiment 1;

[0014] Figure 2 is a schematic cross-sectional structure diagram of the gate electrode of the present invention according to Embodiment 2;

[0015] The accompanying drawings illustrate:

[0016] 1—Collector metal layer, 2—Collector region,

[0017] 3—field stop layer, 4—drift region,

[0018] 5—emitter metal layer, 6—dummy gate structure,

[0019] 7 / 7'—gate structure, 8—carrier storage layer,

[0020] 9—P-type base region, 10—P+ emitter region,

[0021] 11—N+ emitter region, 12—first dielectric layer,

[0022] 61 - narrow part, 62 - wide part,

[0023] 71 / 71'—gate electrode, 72 / 72'—gate dielectric layer,

[0024] 611—narrow portion electrode, 612—narrow portion dielectric layer,

[0025] 621—wide portion electrode, 622—wide portion dielectric layer. DETAILED DESCRIPTION

[0026] The present invention is described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0027] Reference Figures 1 to 2 As shown, the present invention provides a trench gate IGBT device, comprising a collector metal layer 1, a collector region 2, a field stop layer 3, a drift region 4, a trench structure and an emitter metal layer 5 which are stacked in sequence from bottom to top; the trench structure comprises a dummy gate structure 6 and a gate structure 7 / 7', wherein the dummy gate structure 6 is located on the upper side of the drift region 4, and the gate structure 7 / 7' is located in the upper middle of the drift region 4; the dummy gate structure 6 comprises a narrow portion 61 and a wide portion 62, and the wide portion 62 is located below the narrow portion 61; a carrier storage layer 8 is provided above the drift region 4 between the gate structure 6 and the narrow portion 61, and a P-type base region 9 is provided above the carrier storage layer 8; the carrier storage layer 8 is located between the narrow dielectric layer 612 and below the P-type base region 9, serving as the carrier storage layer of the IGBT.

[0028] A P+ emitter region 10 and an N+ emitter region 11 are provided above the P-type base region 9, and the P+ emitter region 10 and the N+ emitter region 11 are respectively electrically connected to the emitter metal layer 5. The N+ emitter region 11 is arranged close to the gate dielectric layer 72 / 72', and the P+ emitter region 10 is arranged close to the narrow dielectric layer 612. The gate electrode 71 / 71' is isolated from the emitter metal layer 5 by the first dielectric layer 12, and the first dielectric layer 12 extends to cover part of the N+ emitter region 11, so as to ensure the electrical connection between the N+ emitter region 11 and the emitter metal layer 5 and ensure the integrity of the device connection.

[0029] In this embodiment, an N-type IGBT device is taken as an example. Figure 1-2 As shown, the collector region 2 is a P+ collector region, the field stop layer 3 is an N-type field stop layer, and the drift region 4 is an N-type drift region.

[0030] Among them, the wide portion 62 includes a wide portion electrode 621 and a wide portion dielectric layer 622, and the wide portion electrode 621 is isolated from the drift region 4 by the wide portion dielectric layer 622; the narrow portion 61 includes a narrow portion electrode 611 and a narrow portion dielectric layer 612, and the narrow portion electrode 611 is isolated from the drift region 4, the carrier storage layer 8, and the P-type base region 9 respectively by the narrow portion dielectric layer 612.

[0031] The width of the wide electrode 621 is greater than that of the narrow electrode 611, and the wide electrode 621 is electrically connected to the narrow electrode 611, and both the wide electrode 621 and the narrow electrode 611 are electrically connected to the emitter metal layer 5. The dummy gate structure 6 has the same potential as the emitter, which effectively shields the gate signal of the gate electrode 71 / 71', thereby greatly reducing the Miller capacitance of the IGBT device, improving the device switching speed, and reducing the device switching loss.

[0032] At the same time, due to the lateral expansion of the wide electrode 621, that is, the width of the wide electrode 621 is greater than the width of the narrow electrode 611, the electric field shielding effect of the wide electrode 621 and the gate electrode 71 / 71' allows the IGBT device of this case to increase the concentration of the carrier storage layer 8 without reducing the withstand voltage, thereby increasing the carrier concentration on the emitter side and reducing the device on-state voltage drop.

[0033] The gate structure 7 is located between the dummy gate structures 6, and includes a gate electrode 71 / 71' and a gate dielectric layer 72 / 72'. The gate electrode 71 / 71' is isolated from the drift region 4, the carrier storage layer 8, the P-type base region 9, and the N+ emitter region 11 by the gate dielectric layer 72 / 72'. Specifically, the gate electrode 71 / 71' can be implemented in the following two ways:

[0034] Embodiment 1:

[0035] like Figure 1 As shown, the depth of the gate electrode 71 is not less than the depth of the narrow electrode 611, and is not greater than the depth of the wide electrode 621, that is, the bottom depth of the gate electrode 71 exceeds the bottom depth of the narrow electrode 611, and the bottom depth of the gate electrode 71 does not exceed the bottom depth of the wide electrode 621. When the bottom surface of the gate electrode 71 is flush with the bottom surface of the wide electrode 621, it is the maximum depth of the gate electrode 71. If it exceeds, the withstand voltage condition cannot be met, and the Miller capacitance will increase accordingly.

[0036] Embodiment 2:

[0037] like Figure 2 As shown, the depth of the gate electrode 71' is less than the depth of the narrow electrode 611. At this time, the gate electrode 71' is located between the narrow electrodes 611 and above the wide electrode 621. Compared with the embodiment 1, the Miller capacitance of this embodiment is smaller.

[0038] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A trench gate IGBT device, characterized in that: It comprises a collector metal layer, a collector region, a field stop layer, a drift region, a trench structure and an emitter metal layer which are stacked in sequence from bottom to top; the trench structure comprises a dummy gate structure and a gate structure, wherein the dummy gate structure is located on the upper side of the drift region, and the gate structure is located in the upper middle of the drift region; the dummy gate structure is electrically connected to the emitter metal layer, and the gate structure is isolated from the emitter metal layer via a first dielectric layer; the dummy gate structure comprises a narrow portion and a wide portion, and the wide portion is located below the narrow portion; a carrier storage layer is provided above the drift region between the gate structure and the narrow portion, and a P-type base region is provided above the carrier storage layer; a P+ emitter region and an N+ emitter region are provided above the P-type base region, and the P+ emitter region and the N+ emitter region are electrically connected to the emitter metal layer respectively; The wide portion includes a wide portion electrode and a wide portion dielectric layer, and the wide portion electrode is isolated from the drift region by the wide portion dielectric layer; the narrow portion includes a narrow portion electrode and a narrow portion dielectric layer, and the narrow portion electrode is isolated from the drift region, the carrier storage layer, and the P-type base region respectively by the narrow portion dielectric layer; the width of the wide portion electrode is greater than the width of the narrow portion electrode, and the wide portion electrode is electrically connected to the narrow portion electrode; The gate structure is located between the dummy gate structures, and the gate structure includes a gate electrode and a gate dielectric layer; The N+ emitter region is arranged close to the gate dielectric layer, and the P+ emitter region is arranged close to the narrow dielectric layer.

2. The trench gate IGBT device according to claim 1, characterized in that: The depth of the gate electrode is not less than the depth of the narrow portion electrode and not greater than the depth of the wide portion electrode.

3. The trench gate IGBT device according to claim 1, characterized in that: The gate electrode has a depth smaller than that of the narrow portion electrode.

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