Semiconductor packaging structure with straight metal bonding wire and preparation method thereof

Abstract

The present invention provides a semiconductor packaging structure with linear metal welding wires and a preparation method thereof, wherein the semiconductor packaging structure comprises a chip, a linear metal welding wire and a packaging layer. The chip surface comprises a welding pad; the linear metal welding wire contacts the welding pad to form a welding point, and the linear metal welding wire comprises one or a combination of a vertical linear metal welding wire and an inclined linear metal welding wire; the packaging layer covers the chip surface and the linear metal welding wire, and the packaging layer exposes the linear metal welding wire. The present invention forms the linear metal welding wire in the first packaging area of ​​the packaging layer, and the curved metal welding wire in the second packaging area of ​​the packaging layer, and forms a semiconductor packaging structure with linear metal welding wires by thinning the packaging layer and wafer cutting without adding process steps. There is no special restriction on the welding wire model, which can expand the selection of welding wire models, reduce the difficulty of process control, reduce manufacturing costs, reduce damage to chips, and improve product quality.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor packaging, and in particular to a semiconductor packaging structure with a linear metal bonding wire and a preparation method thereof. Background Art

[0002] As integrated circuits become more powerful, more performant, and more integrated, packaging technology plays an increasingly important role in integrated circuit products. Lower cost, more reliable, faster, and higher density circuits are the goals pursued by integrated circuit packaging. In the future, integrated circuit packaging will increase the integration density of various electronic components by continuously reducing the minimum feature size.

[0003] Wafer-level packaging (WLP) technology has become an important packaging method for high-demand mobile / wireless network and other electronic devices due to its advantages of miniaturization, low cost, high integration, good performance and high energy efficiency. It is one of the most promising packaging technologies. Among them, WLP technology is based on BGA technology and is an improved and enhanced CSP. It uses wafers as processing objects, packages, ages and tests many chips on the wafer at the same time, and finally cuts them into single chips, which can then be directly mounted on substrates or printed circuit boards. It reduces the package size to the chip size and significantly reduces the production cost.

[0004] In the existing semiconductor packaging process, considering the requirements of the special functions of the package body, it is usually necessary to design the welding wires in the package body as upright straight welding wires or inclined straight welding wires. However, the industry currently has to use the second welding point (2nd Bond) method to form the welding wires, that is, use a special wire bonding machine to cut the welding wires in half through the 2nd Bond, and then stretch and cut the welding wires to form the required line shape. However, since the welding wires are bent, they cannot form upright straight welding wires and inclined straight welding wires that meet the requirements after stretching, and the problem of welding wire cold welding is easily caused during the stretching process; during packaging, since there is only one connecting welding point, the packaging material is easy to cause the deviation of the welding wire; a special wire bonding machine is required, which limits the selection of the wire bonding machine; the process parameters are complex and the process is difficult to control; the 2nd Bond may damage the chip, and the surface of the chip needs to be specially treated, which increases the manufacturing cost.

[0005] Therefore, it is necessary to provide a semiconductor package structure with straight metal bonding wires and a preparation method thereof to prepare a semiconductor package structure with straight metal bonding wires. Summary of the invention

[0006] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a semiconductor packaging structure with linear metal bonding wires and a preparation method thereof, so as to solve the above-mentioned series of quality and cost problems caused by forming linear metal bonding wires in the prior art.

[0007] To achieve the above-mentioned object and other related objects, the present invention provides a method for preparing a semiconductor packaging structure having a linear metal bonding wire, comprising the following steps:

[0008] Providing a wafer, the wafer comprising a chip, a dicing line, a first pad located on a surface of the chip, and a second pad located on a surface of the dicing line;

[0009] Using a wire bonding process, connecting the first pad and the second pad through a metal wire bonding process, wherein the metal wire bonding process includes a straight metal wire bonding process and a curved metal wire bonding process, and the straight metal wire bonding process contacts the first pad to form a first welding point, and the curved metal wire bonding process contacts the second pad to form a second welding point;

[0010] Forming a packaging layer, the packaging layer covers the wafer surface and the metal bonding wires, wherein the packaging layer includes a first packaging area and a second packaging area, the first packaging area covers the chip surface and the straight metal bonding wires, and the second packaging area covers the first packaging area, the cutting road and the curved metal bonding wires;

[0011] Thinning the packaging layer to expose the linear metal bonding wire located in the first packaging area;

[0012] The wafer is cut along the cutting paths to obtain the independent chips.

[0013] Optionally, the angle between the linear metal bonding wire and the chip surface ranges from 45° to 90°.

[0014] Optionally, the method of thinning the encapsulation layer comprises chemical mechanical polishing.

[0015] Optionally, the method for cutting the wafer includes one or a combination of a laser cutting method and a blade cutting method.

[0016] Optionally, the metal bonding wire includes one or a combination of Cu wire, Au wire, Cu alloy wire, Au alloy wire and Cu / Au alloy wire.

[0017] Optionally, the encapsulation layer includes one of a polyimide encapsulation layer, a silicone encapsulation layer and an epoxy resin encapsulation layer.

[0018] The present invention also provides a semiconductor packaging structure having a linear metal bonding wire, the semiconductor packaging structure comprising:

[0019] A chip, wherein the surface of the chip includes a pad;

[0020] A straight metal bonding wire, wherein the straight metal bonding wire contacts the bonding pad to form a bonding point, wherein the straight metal bonding wire comprises one or a combination of a vertical linear metal bonding wire and an inclined linear metal bonding wire;

[0021] The packaging layer covers the chip surface and the linear metal bonding wires, and the packaging layer exposes the linear metal bonding wires.

[0022] Optionally, the angle between the inclined linear metal bonding wire and the chip surface ranges from 45° to 90°, including 45°.

[0023] Optionally, the linear metal bonding wire includes one or a combination of Cu wire, Au wire, Cu alloy wire, Au alloy wire and Cu / Au alloy wire.

[0024] Optionally, the encapsulation layer includes one of a polyimide encapsulation layer, a silicone encapsulation layer and an epoxy resin encapsulation layer.

[0025] As described above, the semiconductor packaging structure with straight metal bonding wires and the preparation method thereof of the present invention form a first bonding pad on the chip surface, form a second bonding pad on the cutting path surface, form the straight metal bonding wires in the first packaging area of ​​the packaging layer, form the curved metal bonding wires in the second packaging area of ​​the packaging layer, and expose the straight metal bonding wires by thinning the packaging layer, and remove the curved metal bonding wires while obtaining independent chips by wafer cutting, thereby forming a semiconductor packaging structure with straight metal bonding wires (including upright and inclined) without increasing the process steps. The present invention has no special restrictions on the bonding wire machine, thereby expanding the selection of bonding wire machines, reducing the difficulty of process control, reducing manufacturing costs, and reducing damage to chips, thereby improving product quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is a schematic diagram showing the process flow of preparing a semiconductor packaging structure with straight metal bonding wires in the present invention.

[0027] Figure 2 Shown is a schematic diagram of the top view structure of the wafer in the present invention.

[0028] Figure 3 Display as Figure 2 Schematic diagram of the structure of the enlarged area A.

[0029] Figure 4 Shown is a schematic diagram of the structure for forming metal bonding wires.

[0030] Figure 5 Display as Figure 4 Schematic diagram of the structure of the CC' section of the enlarged area B.

[0031] Figure 6 Shown is a schematic diagram of the structure for forming a packaging layer.

[0032] Figure 7 Shown is a schematic diagram of the structure after the packaging layer is thinned.

[0033] Figure 8 Shown is a schematic diagram of the structure after the wafer is cut.

[0034] Fig. 9 It is a schematic structural diagram of another semiconductor packaging structure with straight metal bonding wires in the present invention.

[0035] Component number description

[0036] 100 Wafer

[0037] 101, 1011 Chip

[0038] 102 Cutting Road

[0039] 111, 1111 first pad

[0040] 112 Second pad

[0041] 200 Metal welding wire

[0042] 201 Straight metal welding wire

[0043] 2011 Vertical linear metal welding wire

[0044] 2012 Inclined linear metal welding wire

[0045] 202 Curved metal welding wire

[0046] 301, 3011 first welding point

[0047] 302 Second welding point

[0048] 400 Encapsulation Layer

[0049] 401, 4011 First packaging area

[0050] 402 Second packaging area

[0051] A, B magnified area

[0052] θ Angle DETAILED DESCRIPTION

[0053] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0054] See also Figures 1 to 9 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0055] like Figure 1 The present invention provides a method for preparing a semiconductor packaging structure with a straight metal bonding wire, wherein a first bonding pad is formed on the surface of a chip, a second bonding pad is formed on the surface of a cutting path, and a straight metal bonding wire is formed in a first packaging area of ​​a packaging layer, and a curved metal bonding wire is formed in a second packaging area of ​​the packaging layer, and the packaging layer is thinned to expose the straight metal bonding wire, and the curved metal bonding wire is removed while obtaining an independent chip by cutting the wafer, thereby forming a semiconductor packaging structure with a straight metal bonding wire without increasing the process steps. The present invention has no special restrictions on the bonding wire machine, thereby expanding the selection of bonding wire machines, reducing the difficulty of process control, reducing manufacturing costs, and reducing damage to chips, thereby improving product quality.

[0056] like Figure 2 to Figure 8 , which illustrates a structural schematic diagram of each step of preparing a semiconductor packaging structure with straight metal bonding wires.

[0057] like Figure 2 and Figure 3 ,in, Figure 3 Display as Figure 2 Schematic diagram of the structure of the enlarged area A.

[0058] First, a wafer 100 is provided. The wafer 100 includes a chip 101 , a scribe line 102 , a first pad 111 located on a surface of the chip 101 , and a second pad 112 located on a surface of the scribe line 102 .

[0059] Specifically, the wafer 100 may further include a supporting substrate (not shown) and a separation layer (not shown) located between the wafer 100 and the supporting substrate below, so that the wafer 100 is supported by the supporting substrate, and the wafer 100 is connected to the supporting substrate by the separation layer. The supporting substrate may include a glass substrate, a metal substrate, a semiconductor substrate, a polymer substrate and a ceramic substrate, and the separation layer may include a polymer layer whose viscosity decreases under heating or light irradiation conditions, and the polymer layer may include an LTHC light-to-heat conversion layer. Since the glass substrate has a low cost, it is easy to form the separation layer on its surface, and the difficulty of the subsequent stripping process can be reduced. Therefore, the supporting substrate is preferably the glass substrate, and the separation layer is preferably coated on the surface of the supporting substrate by a spin coating process, and then the LTHC light-to-heat conversion layer is cured by an ultraviolet curing or thermal curing process, so that in the subsequent stripping process, the LTHC light-to-heat conversion layer can be heated based on a laser to separate the supporting substrate from the LTHC light-to-heat conversion layer. Of course, the wafer 100 may not include the supporting substrate and the separation layer. For example, when the wafer 100 is thicker, the subsequent process can be directly performed on the surface of the wafer 100 without damaging the wafer 100. The wafer 100 can then be thinned by a thinning process to reduce the package size. The specific process can be selected according to needs and is not limited here. The specific dimensions of the wafer 100, chip 101 and cutting path 102 are not limited here, and the dimensions, quantity and distribution of the first pad 111 and the second pad 112 are not limited here.

[0060] like Figure 4 and Figure 5 ,in, Figure 4 Shown is a schematic diagram of the structure for forming a metal bonding wire. Figure 5 Display as Figure 4 Schematic diagram of the structure of the CC' section of the enlarged area B.

[0061] A wire bonding process is adopted to connect the first pad 111 and the second pad 112 via a metal wire bonding 200, wherein the metal wire bonding 200 includes a straight metal wire bonding 201 and a curved metal wire bonding 202, and the straight metal wire bonding 201 contacts the first pad 111 to form a first welding point 301, and the curved metal wire bonding 202 contacts the second pad 112 to form a second welding point 302.

[0062] Specifically, the wire bonding process may adopt a thermal ultrasonic wire bonding process, and the number and distribution of the first pad 111, the second pad 112 and the metal wire 200 may be selected as needed, and no excessive restrictions are imposed herein. Among them, since the straight metal wire 201 is connected to the first pad 111 through the first welding point 301, and the curved metal wire 202 is connected to the second pad 112 through the second welding point 302, when performing the wire bonding process, a wire bonding machine that is more commonly used in the industry may be used, and there is no need to use a special wire bonding machine that needs to half-cut and straighten the metal wire 201, thereby expanding the selection range of wire bonding machines, reducing the difficulty of process control, and reducing manufacturing costs. In addition, since the second solder joint 302 is located at the second solder pad 302 on the surface of the cutting path 102, the wire bonding process does not require special treatment of the surface of the chip 101, thereby further reducing costs, and when welding the second solder joint 302, it can also reduce damage to the chip 101, thereby improving product quality.

[0063] As a further embodiment of this embodiment, the metal bonding wire 200 may include one or a combination of Cu wire, Au wire, Cu alloy wire, Au alloy wire and Cu / Au alloy wire. Preferably, the metal bonding wire 200 uses the inexpensive Cu wire to reduce costs.

[0064] like Figure 6 , forming a packaging layer 400, the packaging layer 400 covers the surface of the wafer 100 and the metal bonding wires 200, wherein the packaging layer 400 includes a first packaging area 401 and a second packaging area 402, the first packaging area 401 covers the surface of the chip 101 and the straight metal bonding wires 201, and the second packaging area 402 covers the first packaging area 401, the cutting road 102 and the curved metal bonding wires 202.

[0065] As a further embodiment of this embodiment, the encapsulation layer 400 may include one of a polyimide encapsulation layer, a silicone encapsulation layer and an epoxy resin encapsulation layer; the method of forming the encapsulation layer 400 may include one of compression molding, transfer molding, liquid sealing molding, vacuum lamination and spin coating.

[0066] Specifically, during the packaging process using the packaging layer 400, since the straight metal bonding wire 201 of the metal bonding wire 200 is fixed to the first bonding pad 111 of the chip 101 through the first bonding point 301, and the curved metal bonding wire 202 is fixed to the second bonding pad 112 of the cutting path 102 through the second bonding point 302. Therefore, the metal bonding wire 200 and the wafer 100 can have good bonding performance, so that during the packaging process, the metal bonding wire 200 is not likely to cause the wire to deviate, so as to further enable the straight metal bonding wire 201 to maintain its straight shape.

[0067] like Figure 7 , thinning the packaging layer 400 to expose the linear metal bonding wire 201 located in the first packaging area 401.

[0068] As a further example of this embodiment, the method of thinning the encapsulation layer 400 may include a chemical mechanical polishing method.

[0069] Specifically, while thinning the packaging layer 400, a portion of the curved metal bonding wire 202 located in the second packaging area 402 may be removed, so that the top surface of the straight metal bonding wire 201 is exposed on the top surface of the first packaging area 401, so as to facilitate subsequent electrical connection. In this embodiment, the method for thinning the packaging layer 400 is preferably a chemical mechanical polishing method that can provide a relatively flat surface, but is not limited thereto, and other thinning methods such as mechanical polishing may also be used.

[0070] like Figure 8 , the wafer 100 is cut along the cutting lanes 102 to obtain the independent chips 101 .

[0071] Specifically, while the wafer 100 is cut to obtain the independent chip 101, part of the curved metal bonding wire 202 in the second packaging area 402 can also be removed, thereby forming a semiconductor packaging structure with the straight metal bonding wire 201 without adding any process steps by thinning the packaging layer 400 and cutting the wafer 100.

[0072] As a further embodiment of this embodiment, the method for cutting the wafer 100 may include one or a combination of a laser cutting method and a blade cutting method.

[0073] Specifically, when the blade cutting method is used, the blade can be a soft blade or a hard blade, which can be selected according to needs. The cutting method can be a method of laser pre-cutting first and then blade cutting, so as to further reduce damage to the chip 101, which can be selected according to needs.

[0074] As a further embodiment of this embodiment, the angle between the linear metal bonding wire 201 and the surface of the chip 101 may range from 45° to 90°.

[0075] Specifically, Fig. 9 , illustrates a structural schematic diagram of another semiconductor packaging structure with linear metal bonding wires, wherein the linear metal bonding wires include upright linear metal bonding wires 2011 and inclined linear metal bonding wires 2012, the angle θ between the upright linear metal bonding wires 2011 and the surface of the chip 1011 is 90°, the angle θ between the inclined linear metal bonding wires 2012 and the surface of the chip 1011 is preferably in the range of 45° to 90°, including 45°, and the angle θ may also be selected to be 60°, 75°, etc., so as to facilitate the electrical lead-out of the linear metal bonding wires to be set as needed.

[0076] The present invention further provides a semiconductor package structure with linear metal bonding wires. The preparation method of the semiconductor package structure with linear metal bonding wires can refer to the above preparation process, but is not limited thereto.

[0077] like Fig. 9 , the semiconductor packaging structure includes a chip 1011, a linear metal bonding wire and a packaging layer 4011. The surface of the chip 1011 includes a pad 1111; the linear metal bonding wire contacts the pad 1111 to form a solder joint 3011, wherein the linear metal bonding wire includes one or a combination of a vertical linear metal bonding wire 2011 and an inclined linear metal bonding wire 2012; the packaging layer 4011 covers the surface of the chip 1011 and the linear metal bonding wire, and the packaging layer 4011 exposes the linear metal bonding wire. The present invention forms a semiconductor packaging structure having the linear metal bonding wire in the packaging layer, which can meet the process requirements and improve product quality.

[0078] As a further embodiment of this embodiment, the angle θ between the inclined linear metal bonding wire 2012 and the surface of the chip 1011 ranges from 45° to 90°, including 45°.

[0079] Specifically, the straight metal bonding wires may only include the upright linear metal bonding wires 2011 or the inclined linear metal bonding wires 2012 or a combination of the upright linear metal bonding wires 2011 and the inclined linear metal bonding wires 2012. The included angle θ between the upright linear metal bonding wires 2011 and the surface of the chip 1011 is 90°, and the included angle θ between the inclined linear metal bonding wires 2012 and the surface of the chip 1011 is preferably in the range of 45° to 90°, including 45°, and the included angle θ may also be selected to be 60°, 75°, etc., so as to facilitate the electrical lead-out of the straight metal bonding wires as required.

[0080] As a further embodiment of this embodiment, the linear metal bonding wire may include one or a combination of Cu wire, Au wire, Cu alloy wire, Au alloy wire and Cu / Au alloy wire.

[0081] As a further embodiment of this embodiment, the packaging layer 4011 may include one of a polyimide packaging layer, a silicone packaging layer and an epoxy resin packaging layer.

[0082] In summary, the semiconductor packaging structure with straight metal bonding wires and the preparation method thereof of the present invention form a first bonding pad on the surface of the chip, form a second bonding pad on the surface of the cutting path, and form the straight metal bonding wires in the first packaging area of ​​the packaging layer, and form the curved metal bonding wires in the second packaging area of ​​the packaging layer, and expose the straight metal bonding wires by thinning the packaging layer, and remove the curved metal bonding wires while obtaining independent chips by wafer cutting, thereby forming a semiconductor packaging structure with straight metal bonding wires (including upright and inclined) without increasing the process steps. The present invention has no special restrictions on the bonding wire machine, thereby expanding the selection of bonding wire machines, reducing the difficulty of process control, reducing manufacturing costs, and reducing damage to chips, thereby improving product quality. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.

[0083] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A method for preparing a semiconductor packaging structure having a linear metal bonding wire, characterized in that: The following steps are involved: Providing a wafer, the wafer comprising a chip, a dicing line, a first pad located on a surface of the chip, and a second pad located on a surface of the dicing line; Using a wire bonding process, connecting the first pad and the second pad through a metal wire bonding process, wherein the metal wire bonding process includes a straight metal wire bonding process and a curved metal wire bonding process, and the straight metal wire bonding process contacts the first pad to form a first welding point, and the curved metal wire bonding process contacts the second pad to form a second welding point; Forming a packaging layer, the packaging layer covers the wafer surface and the metal bonding wires, wherein the packaging layer includes a first packaging area and a second packaging area, the first packaging area covers the chip surface and the straight metal bonding wires, and the second packaging area covers the first packaging area, the cutting road and the curved metal bonding wires; Thinning the packaging layer to expose the linear metal bonding wires in the first packaging area, and after thinning, the vertical projections of the remaining curved metal bonding wires are all located within the cutting path; The wafer is cut along the cutting paths to obtain the independent chips.

2. The method for preparing a semiconductor package structure having a linear metal bonding wire according to claim 1, characterized in that: The angle between the linear metal bonding wire and the chip surface ranges from 45° to 90°.

3. The method for preparing a semiconductor package structure having a linear metal bonding wire according to claim 1, characterized in that: The method of thinning the encapsulation layer includes chemical mechanical polishing.

4. The method for preparing a semiconductor package structure having a linear metal bonding wire according to claim 1, characterized in that: The method for cutting the wafer includes one or a combination of a laser cutting method and a blade cutting method.

5. The method for preparing a semiconductor package structure having a linear metal bonding wire according to claim 1, characterized in that: The metal bonding wire includes one or a combination of Cu wire, Au wire, Cu alloy wire, Au alloy wire and Cu / Au alloy wire.

6. The method for preparing a semiconductor package structure having a linear metal bonding wire according to claim 1, characterized in that: The packaging layer includes one of a polyimide packaging layer, a silicone packaging layer and an epoxy resin packaging layer.

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