Control system and control method of double-clamped zero voltage switching converter

Abstract

The present invention discloses a control system and a control method for a double-clamped zero-voltage switching converter, the system includes a signal controller and a synchronous rectification controller, the signal controller includes a first signal generating unit and a second signal generating unit, the first signal generating unit is used to generate control signals for the first switch tube, the second switch tube and the fourth switch tube in the converter circuit, the second signal generating unit determines whether the power transformer is completely magnetically reset according to the detection signal of the primary port voltage of the power transformer in the converter circuit, and then generates a control signal for the active clamp tube in the converter circuit, and the synchronous rectification controller is used to output the control signal of the fifth switch tube in the converter circuit. The present invention does not require isolated signal transmission, can effectively improve the power density of the converter, and the controlled circuit is simple and can be fully integrated in the digital control chip, without occupying the volume of the converter.

Description

Technical Field

[0001] The present invention belongs to the technical field of converters, and in particular relates to a control system and a control method of a double-clamped zero-voltage switching converter. Background Art

[0002] The double-clamped zero-voltage switching converter is an isolated DC / DC circuit topology. It is widely used in power supply fields such as communications and military industry due to its simple structure, high efficiency, primary and secondary isolation, and wide input and output range. Figure 1 The double-clamped zero-voltage switching converter shown in the figure includes a first switch tube Q1, a second switch tube Q2, a third switch tube Q3, a fourth switch tube Q4 and a fifth switch tube Q5, wherein the third switch tube is also called an active clamp tube, and a power transformer T, D1-D5 and C1-C5 are parasitic body diodes and junction capacitances, respectively, C f is the clamping capacitor; Figure 1 As shown in the dotted box, one end of the primary side of the power transformer is connected between the first switch tube Q1 and the second switch tube Q2, and the other end is connected between the active clamp tube Q3 and the fourth switch tube Q4. One end of the secondary side of the transformer is connected to the output voltage v o One end of the positive terminal is connected to the fifth switch tube Q5. Figure 1 It also includes a main controller and a synchronous rectifier controller. The main controller is used to generate control signals S1, S2 and S4 for the first switch tube Q1, the second switch tube Q2 and the fourth switch tube Q4. The synchronous rectifier controller generates a control signal S5 for the fifth switch tube Q5 and transmits it to the primary side through isolation as a control signal S3 for the active clamp tube Q3. The input source is a voltage V in Input power to the converter, after power conversion, the output voltage v o Provides power to the load.

[0003] The double-clamped zero-voltage switching converter has a switching cycle T s There are four working stages: Figure 2 As shown, it specifically includes the input energy storage stage, the primary-secondary energy transfer stage, the resonance stage, and the freewheeling stage. In the input energy storage stage, the first switch tube Q1 and the fourth switch tube Q4 are turned on, and the input voltage V in Applied to the primary side of the transformer, due to the primary leakage inductance L r Much smaller than the magnetizing inductance L m , magnetizing inductance L m The current is approximately V in / L m The slope of the leakage inductance L r and magnetizing inductance L mEnergy storage; in the primary-to-secondary energy transfer stage, the first switch tube Q1 and the fourth switch tube Q4 are turned off, the second switch tube Q2, the active clamp tube Q3 and the fifth switch tube Q5 are turned on, and energy is transferred from the primary side of the power transformer T to the secondary side, and the magnetizing inductor L m The current is v c / L m The slope decreases, where v c is the clamping capacitor C f During this phase, the leakage inductance L r and magnetizing inductance L m Release energy; in the resonance stage, the first switch tube Q1, the active clamp tube Q3, the fourth switch tube Q4 and the fifth switch tube Q5 are turned off, and the second switch tube Q2 is turned on. At this time, the magnetizing inductor L m The parasitic capacitance resonates with the active clamp tube Q3, the fourth switch tube Q4 and the fifth switch tube Q5, and the magnetizing inductor L m The current resonance is reduced; in the freewheeling stage, the first switch tube Q1, the active clamp tube Q3 and the fifth switch tube Q5 are turned off, the second switch tube Q2 and the fourth switch tube Q4 are turned on, and the primary voltage of the power transformer T is clamped to zero. During this stage, the primary side of the power transformer T no longer transfers energy to the secondary side, and the magnetizing inductor L m The current remains approximately constant.

[0004] According to the above introduction, the control signal S3 of the active clamp tube Q3 is the same as the control signal S5 of the fifth switch tube Q5, so it can be obtained by transmitting the control signal S5 of the fifth switch tube Q5 to the primary side through isolation. However, in order to achieve isolated transmission of signals, it is necessary to use an isolation transformer or other means for transmission, and as the insulation withstand voltage of the primary and secondary sides increases, the volume of the isolation transformer will increase sharply, which will significantly reduce the power density of the converter. Summary of the invention

[0005] The purpose of the present invention is to propose a control system and a control method for a double-clamped zero-voltage switching converter, which not only effectively improves the power density and stability of the converter, but also has a simple control circuit and can be fully integrated in a digital control chip without occupying additional volume of the converter.

[0006] The solution to achieve the purpose of the present invention is:

[0007] A control system for a double-clamped zero-voltage switching converter includes a signal controller and a synchronous rectification controller. The signal controller includes a first signal generating unit and a second signal generating unit. The first signal generating unit is used to generate control signals for a first switch tube, a second switch tube and a fourth switch tube in a converter circuit. The second signal generating unit determines whether the power transformer is completely magnetically reset based on a detection signal of the primary port voltage of the power transformer in the converter circuit, and then generates a control signal for an active clamping tube in the converter circuit. The synchronous rectification controller is used to output a control signal for a fifth switch tube in the converter circuit.

[0008] A control method based on the control system of the double-clamped zero-voltage switching converter comprises the steps of:

[0009] The first signal generating unit generates control signals for the first switch tube, the second switch tube and the fourth switch tube in the converter circuit;

[0010] The second signal generating unit determines whether the power transformer is completely magnetically reset according to the detection signal of the primary terminal voltage of the power transformer in the converter circuit, and generates a control signal of the active clamping tube in the converter circuit;

[0011] The synchronous rectification controller outputs a control signal of the fifth switch tube in the converter circuit;

[0012] The control signals generated by the first signal generating unit, the second signal generating unit and the synchronous rectification controller are applied to the converter circuit to control the switching and disconnection of the first switch tube, the second switch tube, the active clamping tube, the fourth switch tube and the fifth switch tube in the input energy storage stage, the primary-secondary energy transfer stage, the resonance stage and the freewheeling stage.

[0013] Compared with the prior art, the present invention has the following significant advantages: (1) The present invention utilizes the volt-second balance characteristic of the power transformer within a cycle to generate the control signal of the active clamp tube at the primary side of the converter, without isolating and transmitting the control signal of the fifth switch tube, which can effectively improve the power density of the converter; (2) The integral sampling circuit of the present invention can ensure the accuracy of sampling, while reducing the bandwidth requirement of the differential amplifier circuit and avoiding the output signal v p and v n The amplitude of is too high, causing damage to the subsequent differential amplifier circuit; (3) The pull-up resistor R is designed in the volt-second balance detection circuit of the present invention. bias , using the flow through R bias The current compensates for the dissipated current of the sampling and holding capacitor, and at the same time slowly charges the sampling and holding capacitor, making the voltage v SH Shows rising characteristics, v SHThe rising characteristic will cause the active clamp tube to be shut down in advance to a certain extent, which can effectively improve the stability of the system; (4) The control circuit of the control system of the present invention is simple to implement and can be fully integrated in the digital control chip without occupying the additional volume of the converter. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 This is the structural diagram of the double-clamped zero-voltage switching converter.

[0015] Figure 2 This is the time domain waveform of the double-clamped zero-voltage switching converter.

[0016] Figure 3 is a structural diagram of the double-clamped zero-voltage switching converter of this embodiment.

[0017] Figure 4 4 is a structural diagram of the main controller of the double-clamped zero-voltage switching converter of this embodiment.

[0018] Figure 5 This is the integral sampling circuit diagram of this embodiment.

[0019] Figure 6 It is the key point waveform diagram of the integral sampling circuit.

[0020] Figure 7 This is the volt-second balance detection circuit diagram of this embodiment.

[0021] Figure 8 FIG. 4 is a circuit diagram of a signal generating circuit according to the present embodiment.

[0022] Fig. 9 This is a complete structural diagram of the main controller proposed in this embodiment.

[0023] Fig.10 This is a key point waveform diagram of the main controller proposed in this embodiment.

[0024] Fig.11 This is a test waveform diagram of the control circuit proposed in this embodiment. DETAILED DESCRIPTION

[0025] like Figure 3 As shown, the double-clamped zero-voltage switching converter of this embodiment includes a first switch tube Q1, a second switch tube Q2, an active clamp tube Q3, a fourth switch tube Q4 and a fifth switch tube Q5, and a power transformer T. One end of the primary side of the power transformer is connected between the first switch tube Q1 and the second switch tube Q2, and the other end is connected between the active clamp tube Q3 and the fourth switch tube Q4. One end of the secondary side of the transformer is connected to the output voltage v o One end of the positive terminal is connected to the fifth switch tube Q5. Figure 3The invention also includes a control system of a double-clamped zero-voltage switching converter, a main controller (signal controller) and a synchronous rectification controller. The main controller (signal controller) is used to generate control signals S1, S2, S3 and S4 for the first switch tube Q1, the second switch tube Q2, the active clamp tube Q3 and the fourth switch tube Q4. The synchronous rectification controller generates a control signal S5 for the fifth switch tube Q5. The input source is a voltage V in Input power to the converter, after power conversion, the output voltage v o Provides power to the load.

[0026] Figure 4 The internal block diagram of the main controller in the double-clamped zero-voltage switching converter of this embodiment is given, which has four signal input terminals, which are the input voltage V in The voltage v between the connection point of the first switch tube Q1 and the second switch tube Q2 and the ground A , the voltage between the connection point of the active clamp tube Q3 and the fourth switch tube Q4 and the ground is v B , and the clamp capacitor voltage v c In addition, it also has four signal output terminals, which are control signals S1, S2, S3 and S4 of the first switch tube Q1, the second switch tube Q2, the active clamp tube Q3 and the fourth switch tube Q4.

[0027] Figure 4 The main controller specifically includes a first signal generating unit (S1, S2 and S4 generating units) and a second signal generating unit (S3 generating unit), wherein the first signal generating unit (S1, S2 and S4 generating units) is used to generate control signals S1, S2 and S4 for the first switch tube Q1, the second switch tube Q2 and the fourth switch tube Q4, which are the same as the conventional control strategy and are not repeated here; the second signal generating unit is used to generate the control signal S3 of the active clamp tube Q3.

[0028] The second signal generating unit specifically comprises an integral sampling circuit, a differential amplifier circuit, a volt-second balance detection circuit and a signal generating circuit (S3 generating circuit). The integral sampling circuit has two signal input terminals, which are the connection point of the first switch tube Q1 and the second switch tube Q2 to the ground voltage v A , the voltage between the connection point of the active clamp tube Q3 and the fourth switch tube Q4 and the ground is v B It also has two signal output terminals v p and v nThe output of the integral sampling circuit is connected to the input of the differential amplifier circuit, the output of the differential amplifier and the control signal S1 of the first switch are connected to the input of the volt-second balance detection circuit, the output of the volt-second balance detection circuit and the control signal S2 of the second switch tube are connected to the input of the signal generating circuit (S3 generating circuit), and the output of the signal generating circuit is the control signal S3 of the active clamp tube.

[0029] The purpose of the integral sampling circuit is to integrate the primary voltage of the power transformer, obtain its volt-second information, and then realize the sampling of the excitation current. Figure 5 Three specific implementation methods of integral sampling circuits are given. Figure 5 Taking (a) as an example, its working principle is briefly introduced. Figure 5 The integral sampling circuit shown in (a) consists of a resistor R s and capacitor C s Series structure, where R s One end is connected to terminal A of power transformer T, and the other end is connected to capacitor C s , capacitor C s The other end is connected to terminal B of the power transformer T.

[0030] Flow through capacitor C s The current i CS and the capacitor voltage v CS There exists between:

[0031]

[0032] Because the capacitor C s and resistor R s series, so the current flows through capacitor C s The current i CS With the flow through the resistor R s The current is the same and can be expressed as:

[0033]

[0034] In order to ensure that the capacitor current i CS The approximate constant of the design R s and C s When the time constant is much larger than the switching period T s , that is, R s ·C s >>T s At this time, the capacitor current i CS It can be approximated as:

[0035]

[0036] Substituting formula (3) into formula (1), we can get:

[0037]

[0038] Further simplifying formula (4), we can get:

[0039]

[0040] From formula (5), we can get the capacitance C s The pulsation of the voltage and the excitation current i Lm There is a certain proportional relationship between the pulsation of s The voltage can reflect the excitation current i Lm The information can then be used to determine whether the power converter has completed magnetic reset.

[0041] Further observation Figure 5 (a) shows the integral sampling circuit v n =v B , and v B The waveform is a waveform with an amplitude equal to the clamping capacitor voltage v c The pulse wave, since the output of the integral sampling circuit is used as the input of the differential amplifier circuit, if v B The voltage amplitude is high, which may cause the risk of damaging the differential amplifier circuit; in addition, v B There are a lot of high-order harmonics in the waveform, which puts forward extremely high requirements on the bandwidth of the differential amplifier circuit at the subsequent stage. In order to overcome the above shortcomings, this embodiment further proposes Figure 5 The integral sampling circuit shown in (b) specifically comprises a first resistor R s1 , the second resistor R s2 , the first capacitor C s1 and the second capacitor C s2 Among them, the first resistor R s1 One end is connected to the input terminal A of the power transformer T, and the other end is connected to the first capacitor C s1 One end of the first capacitor C s1 The other end of the second resistor R s2 One end is connected to the output terminal B of the power transformer T, and the other end is connected to the second capacitor C s1 One end of the second capacitor C s1 The other end of the resistor R is connected to the reference ground. s1 and R s2 , capacitor C s1 and C s2 The following should be met when selecting:

[0042] R s1 =R s2 =R s C s1 =C s2 =Cs (6)

[0043] Figure 5 The typical waveform of the integral sampling circuit shown in (b) is shown in Figure (6). Its working principle is similar to Figure 5 (a) are basically the same and will not be described here.

[0044] observe Figure 6 It can be seen that v n The waveform changes from a pulse wave to a triangle wave, which greatly reduces the bandwidth requirements of the subsequent differential amplifier circuit. n The magnitude of v B It has also been significantly reduced.

[0045] It is worth noting that as the load gradually increases, v A and v B The pulse width will gradually increase, and due to v p and v n The DC current is equal to v A and v B DC flow, so as the load gradually increases, v p and v n The DC current will gradually increase. In order to avoid v p and v n The amplitude of is too high, causing damage to the subsequent differential amplifier circuit. This embodiment further proposes Figure 5 (c) shows the integral sampling circuit, which Figure 5 (b) Based on the circuit shown in Figure 2, a third resistor R is added. d1 and the fourth resistor R d2 , where the third resistor R d1 One end is connected to the first resistor R s1 and the first capacitor C s1 The other end of the fourth resistor R d2 One end is connected to the second resistor R s2 and the second capacitor C s2 The other end of the resistor is connected to the reference ground. d1 and the fourth resistor R d2 The selection must meet the following requirements:

[0046]

[0047] Among them, f s is the switching frequency of the converter, that is, the capacitor C s At the switching frequency f s The impedance at the d1 At this time, the switching frequency component still comes from capacitor C s After, vp and v n The DC current is given by R s and R d1 The voltage divider value is determined by this, which can effectively reduce v p and v n The DC flow rate can be reduced without affecting the sampling accuracy.

[0048] The differential amplifier circuit is used to perform v p -v n The amplitude modulation adopts the existing differential amplifier circuit, which will not be described here. Its output voltage v sen It can be expressed as:

[0049] v sen =k p ·(v p -v n )+v dc (8)

[0050] Among them, k p is the magnification, v dc is the added DC offset, the waveform is as follows Figure 6 shown.

[0051] The volt-second balance detection circuit is used to determine whether the power transformer has completed magnetic reset, and then determine the turn-off time of the active clamp tube Q3. From the previous analysis, it can be seen that the converter has four working stages in one switching cycle. Since the resonance stage accounts for a small proportion of the entire switching cycle; and in the freewheeling stage, the primary voltage of the power transformer is clamped at zero, it can be approximately considered that the power transformer has completed magnetic reset at the end of the primary-to-secondary energy transfer stage. In other words, the moment when the power transformer magnetic reset is completed is the turn-off time of the active clamp tube Q3.

[0052] Figure 7 The volt-second balance detection circuit proposed in this embodiment is given, which consists of a monostable trigger, a sampling switch tube, and a sampling and holding capacitor C SH , pull-up resistor R bias , and a comparator. The control signal S1 of the first switch tube Q1 is connected to the input end of the monostable trigger, and the output end of the monostable trigger is connected to the gate of the sampling switch tube; the output v of the front differential amplifier circuit sen Connected to the drain of the sampling switch tube and the inverting input of the comparator; the source of the sampling switch tube and the sampling and holding capacitor C SH One end of the sampling and holding capacitor C SH The other end of the resistor R is connected to the reference ground, and the connection point between the two is connected to the non-inverting input of the comparator; bias One end is connected to the non-inverting input of the comparator, and the other end is connected to the bias voltage source V bias.

[0053] In order to obtain the turn-off moment of the active clamp tube Q3, it is necessary to determine whether the power transformer has completed magnetic reset. When the first switch tube Q1 and the fourth switch tube Q4 are turned on, the input voltage V in The power transformer will be magnetized, and the excitation current i Lm When the second switch tube Q2, the active clamp tube Q3 and the fifth switch tube Q5 are turned on, the clamp capacitor voltage v c The power transformer will be demagnetized, and the excitation current i Lm Gradually decreases. When the excitation current i Lm When it drops to the initial value at the beginning of the switching cycle, the magnetic reset of the power transformer is completed. According to the previous analysis, the output signal v of the differential amplifier circuit is sen The shape and excitation current i Lm The shape of the excitation current i is exactly the same, which can realize Lm The sampling of v sen To determine whether the power transformer has completed magnetic reset. The specific implementation is: at the beginning of the switching cycle, that is, the opening time of the first switch tube Q1, v sen Sample and hold, the voltage value of the sample and hold is v SH , and then with the magnetization and demagnetization of the power transformer, v sen First increase and then decrease, when v sen Reduce to v SH When the power transformer is completely reset, the comparator output is set high, and a turn-off pulse for the active clamp tube Q3 is generated.

[0054] It is worth noting that since the sampling and holding capacitor has a certain leakage current and its load impedance is not infinite, the voltage v of the sampling and holding capacitor SH It will show a natural droop characteristic, and this characteristic will form a positive feedback mechanism, causing the converter to enter the continuous conduction mode when lightly loaded, seriously reducing the efficiency of the converter. In order to solve the above problem, this embodiment proposes to add a pull-up resistor R bias , using the flow through R bias The current compensates for the dissipated current of the sampling and holding capacitor, and at the same time slowly charges the sampling and holding capacitor, making the voltage v SH Shows rising characteristics, v SH The rising characteristics will cause the active clamp tube Q3 to be shut down in advance to a certain extent, which can effectively improve the stability of the system.

[0055] The signal generating circuit (S3 generating circuit) is used to generate the control signal S3 of the active clamp tube. The circuit includes a monostable trigger and an RS trigger, such as Figure 8 As shown, the output signal S of the volt-second balance detection circuit 3_offConnected to the R terminal of the RS trigger, the control signal S2 of the second switch tube is connected to the S terminal of the RS trigger through the monostable trigger.

[0056] From the above description, it can be seen that the volt-second balance detection circuit can obtain the shutdown signal S of the active clamp tube. 3_off , it is only necessary to further obtain the turn-on signal of the active clamp tube to obtain the control signal S3 of the active clamp tube.

[0057] Because the second switch tube Q2 and the active clamp tube Q3 are turned on at the same time, the rising edge of the control signal S2 of the second switch tube Q2 can be used to trigger the RS trigger to turn on the active clamp tube Q3. The specific implementation is: the control signal S2 of the second switch tube Q2 is taken out through the monostable trigger and its rising edge is connected to the S terminal of the RS trigger. At the same time, the shutdown signal S of the active clamp tube generated by the volt-second balance detection circuit is 3_off Connected to the R terminal of the RS trigger to turn off the active clamp tube Q3.

[0058] In summary, the control circuit of the active control tube of the present invention includes: an integral sampling circuit, a differential amplifier circuit, a volt-second balance detection circuit and a signal generating circuit. In order to more clearly describe the connection relationship between the functional modules, Fig. 9 The specific implementation circuit of the main controller of the double-clamped zero-voltage switching converter proposed in this embodiment is given, and its typical waveform is as follows: Fig.10 The control method based on the control system of the double-clamped zero-voltage switching converter comprises the following steps:

[0059] The first signal generating unit generates control signals for the first switch tube Q1, the second switch tube Q2 and the fourth switch tube Q4 in the converter circuit;

[0060] The second signal generating unit determines whether the power transformer is completely magnetically reset according to the detection signal of the primary terminal voltage of the power transformer in the converter circuit, and generates a control signal S3 for the active clamping tube Q3 in the converter circuit;

[0061] The synchronous rectification controller outputs a control signal S5 of the fifth switch tube Q5 in the converter circuit;

[0062] The control signals generated by the first signal generating unit, the second signal generating unit and the synchronous rectification controller are applied to the converter circuit to control the switching and disconnection of the first switch tube Q1, the second switch tube Q2, the active clamp tube Q3, the fourth switch tube Q4 and the fifth switch tube Q5 in the input energy storage stage, the primary-secondary energy transfer stage, the resonance stage and the freewheeling stage.

[0063] To further illustrate the effectiveness of the control method and control circuit, Fig.11The test waveform of the hardware circuit is given. It can be seen from the figure that the output v of the differential amplifier circuit sen and the excitation current i Lm The waveform status of the excitation current i is exactly the same, that is, the integral sampling circuit and the differential amplifier circuit proposed in the present invention can accurately realize the excitation current i Lm sampling and conditioning; the signal generating circuit can accurately generate the control signal S3 of the active clamp tube Q3 without using an isolation transformer to transmit the control signal S5 of the fifth switch tube Q5 to the primary side.

[0064] The control circuit of the present invention can be fully integrated into a digital control chip without occupying additional volume of the converter.

[0065] The technical solution of the present invention is not limited to the above-mentioned embodiments, and any technical solution obtained by modification or equivalent replacement of the technical solution of the present invention should be included in the scope of protection of the present invention.

Claims

1. A control system for a double-clamped zero-voltage switching converter, characterized in that: The invention comprises a signal controller and a synchronous rectification controller, wherein the signal controller comprises a first signal generating unit and a second signal generating unit, wherein the first signal generating unit is used to generate control signals of a first switch tube (Q1), a second switch tube (Q2) and a fourth switch tube (Q4) in a converter circuit, and the second signal generating unit determines whether the power transformer is completely magnetically reset according to a detection signal of a voltage at a primary port of a power transformer in the converter circuit, thereby generating a control signal (S3) of an active clamp tube (Q3) in the converter circuit, and the synchronous rectification controller is used to output a control signal (S5) of a fifth switch tube (Q5) in the converter circuit; The second signal generating unit comprises an integral sampling circuit, a differential amplifier circuit, a volt-second balance detection circuit and a signal generating circuit, wherein: The integral sampling circuit is used to integrate the primary voltage of the power transformer in the converter circuit to obtain its volt-second information. The integral sampling circuit has two signal input terminals, which are the voltage (v A ), the voltage between the connection point of the active clamp tube (Q3) and the fourth switch tube (Q4) to ground (v B ), which outputs two signals (v p ) and (v n ) to the input terminal of the differential amplifier circuit; The differential amplifier circuit is used to amplify the input signal, and its output signal and the control signal (S1) of the first switch tube (Q1) are connected to the input end of the volt-second balance detection circuit; The volt-second balance detection circuit is used to judge whether the magnetic reset of the power transformer (T) is completed and determine the turn-off moment of the active clamp tube (Q3). Its output and the control signal of the second switch tube are connected to the input end of the signal generating circuit. The output of the signal generating circuit is the control signal of the active clamp tube.

2. The control system of the double-clamped zero-voltage switching converter according to claim 1, characterized in that: The integral sampling circuit is composed of a resistor (R s ) and capacitance (C s ) in series, where the resistor (R s ) is connected to the input terminal (A) of the power transformer (T) in the converter circuit, and the other end is connected to the capacitor (C s ) one end, capacitor (C s ) is connected to the output terminal (B) of the power transformer (T).

3. The control system of the double-clamped zero-voltage switching converter according to claim 2, characterized in that: The resistance (R s ) and capacitance (C s ) satisfies the following formula: R s ·C s >>T s Among them, T s is the switching period of the converter.

4. The control system of the double-clamped zero-voltage switching converter according to claim 1, characterized in that: The integration sampling circuit includes a first resistor (R s1 )、Second resistor (R s2 ), the first capacitor (C s1 ) and the second capacitor (C s2 ), the first resistor (R s1 ) is connected to the input terminal (A) of the power transformer (T), and the other end is connected to the first capacitor (C s1 ) one end, the first capacitor (C s1 ) is grounded; the other end of the second resistor (R s2 ) is connected to the output terminal (B) of the power transformer (T), and the other end is connected to the second capacitor (C s1 ) and the second capacitor (C s1 ) and ground the other end.

5. The control system of the double-clamped zero-voltage switching converter according to claim 4, characterized in that: The first resistor (R s1 ) and the second resistor (R s2 ), the first capacitor (C s1 ) and the second capacitor (C s2 )satisfy: R s1 ·C s1 >>T s ,R s1 =R s2 ,C s1 =C s2。 6. The control system of the double-clamped zero-voltage switching converter according to claim 4, characterized in that: The integral sampling circuit further includes a third resistor (R d1 ) and the fourth resistor (R d2 ), the third resistor (R d1 ) and the first capacitor (C s1 ) in parallel; the fourth resistor (R d2 ) and the second capacitor (C s2 )in parallel.

7. The control system of the double-clamped zero-voltage switching converter according to claim 6, characterized in that: The third resistor (R d1 ) and the fourth resistor (R d2 ) satisfies the relationship: where f s is the switching frequency of the power converter.

8. The control system of the double-clamped zero-voltage switching converter according to claim 1, characterized in that: The volt-second balance detection circuit includes a first monostable trigger, a sampling switch tube, a sampling and holding capacitor (C SH )、Pull-up resistor (R bias ) and a comparator, wherein the control signal (S1) of the first switch tube (Q1) is connected to the input end of the first monostable trigger, and the output end of the first monostable trigger is connected to the gate of the sampling switch tube; the output of the differential amplifier circuit is connected to the drain of the sampling switch tube and the inverting input end of the comparator; the source of the sampling switch tube and the sampling holding capacitor (C SH ) is connected to one end of the sampling and holding capacitor (C SH ) is grounded, and the connection point between the two is connected to the non-inverting input terminal of the comparator; the resistor (R bias ) is connected to the non-inverting input of the comparator and the other end is connected to the bias voltage source (V bias ); The signal generating circuit includes a second monostable trigger and an RS trigger, the output of the volt-second balance detection circuit is connected to the R terminal of the RS trigger, the control signal (S2) of the second switch tube is connected to the S terminal of the RS trigger through the second monostable trigger, and the output of the RS trigger is the control signal (S3) of the active clamp tube.

9. A control method for a control system of a double-clamped zero-voltage switching converter according to any one of claims 1 to 8, characterized in that: Includes steps: The first signal generating unit generates control signals for a first switch tube (Q1), a second switch tube (Q2) and a fourth switch tube (Q4) in the converter circuit; The second signal generating unit determines whether the power transformer is completely magnetically reset according to the detection signal of the voltage at the primary port of the power transformer in the converter circuit, and generates a control signal (S3) for the active clamping tube (Q3) in the converter circuit; The synchronous rectification controller outputs a control signal (S5) of a fifth switch tube (Q5) in the converter circuit; The control signals generated by the first signal generating unit, the second signal generating unit and the synchronous rectification controller are applied to the converter circuit to control the first switch tube (Q1) and the second switch tube (Q2). 、 The active clamping tube (Q3), the fourth switch tube (Q4) and the fifth switch tube (Q5) are switched on and off in the input energy storage stage, the primary-secondary energy transfer stage, the resonance stage and the freewheeling stage.

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