A high current parallel IGBT drive device

By combining PWM interlock circuit, fault feedback circuit and delayed reset circuit, the environmental adaptability and safety issues of IGBT drive circuit in high current parallel applications are solved, achieving low cost, high integration and low power consumption IGBT drive effect.

CN114157122BActive Publication Date: 2025-01-07JIANGSU MODERN POWER CAPACITOR
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Patent Information

Application Number
CN202111384239.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-11-22
Publication Date
2025-01-07
Estimated Expiration
2041-11-22

AI Technical Summary

Technical Problem

Existing IGBT drive circuits suffer from insufficient environmental adaptability, high cost, insufficient drive power, high switching frequency, and insufficient safety in high-current parallel applications. In particular, when multiple modules are connected in parallel, the output current and power requirements of the driver are not sufficiently increased, and dynamic voltage and current sharing functions are lacking.

Method used

By combining a PWM interlock circuit, a fault feedback circuit, and a delayed reset circuit with a PWM control module, and using a circuit design consisting of an HCJ316 chip and various MOSFETs, the stable operation of the IGBT is ensured, and the operation of the parallel IGBT is stopped in time in case of a fault, thus achieving multiple safety features.

Benefits of technology

It improves the environmental adaptability and reliability of IGBT drive devices, reduces costs and power consumption, increases integration, and ensures safety and accurate fault alarms under abnormal conditions.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses a high-current parallel IGBT driving device, comprising a PWM interlocking circuit, a fault feedback circuit, a time-delay reset circuit and a PWM control module; an MCU is electrically connected to the PWM interlocking circuit, the fault feedback circuit and the time-delay reset circuit respectively, and the PWM control module is electrically connected to the PWM interlocking circuit and the IGBT module respectively, and the normal and stable operation of the parallel IGBT is ensured by the PWM control module and the PWM interlocking circuit; the time-delay reset circuit is electrically connected to the PWM control module, and the IGBT module is electrically connected to the fault feedback circuit, and the time-delay reset circuit and the fault feedback circuit are used to ensure that the parallel IGBT stops working in time when the working state is abnormal, and the fault is reported normally. Compared with other parallel drive devices, the present invention has stronger environmental adaptability.
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Description

Technical Field

[0001] The invention relates to the field of IGBT applications, and in particular to a high-current parallel-tube IGBT driving device. Background Art

[0002] As a power semiconductor, IGBT is being used more and more widely, especially in high-power converters, due to its low power consumption, high switching frequency and large current capacity.

[0003] However, the requirements for its driving circuit will become higher and higher. The main technical development directions are reflected in the following aspects: (1) Higher integration: Future drivers will use smaller and more easily integrated isolation devices. It is a trend to integrate IGBT and its driving circuit in the same module. Users only need to introduce the control signal directly into the power module to control the IGBT; (2) Lower cost: Current drivers generally use optocouplers or transformers to achieve isolation. The advantages of optocouplers are small size and low price, but they have low isolation voltage, easy aging and large delay; transformer isolation has higher isolation voltage and smaller delay, but larger size; high voltage, low cost and small size are the future development direction of IGBT driving; (3) Greater driving power: The capacity of a single IGBT module is limited. In order to increase the capacity, Usually, the parallel operation is adopted, which also puts forward higher requirements on the driving power of the driver. The maximum output current of the driver must be increased accordingly, especially when multiple modules are used in parallel, the average output power of the driver is required to reach more than 5W; (4) Higher switching frequency: In order to adapt to the increasing switching frequency of IGBT, for the driver, it means that a larger driving power must be provided, and the driver must have a shorter driving pulse delay time and rise and fall time, and provide a larger instantaneous maximum driving current, etc.; (5) More complete functions: Active gate drive technology can effectively control the higher di / dt and dv / dt caused by IGBT switching, which can make the IGBT work in a safer working area, reduce the EMI generated during its switching process, and reduce the buffer absorption circuit of the IGBT accordingly. In addition, in order to meet the needs of series and parallel IGBT applications, the driver must also have dynamic voltage and current balancing functions. Therefore, the above problems need to be solved urgently. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide a large current parallel-tube IGBT driving device, which has stronger environmental adaptability than other parallel-tube drivers, and by adopting multiple safety designs, the driving device is made more reliable.

[0005] In order to solve the above technical problems, the present invention adopts the following technical solutions: A high-current parallel-control IGBT driving device of the present invention, the innovation of which is that it includes a PWM interlocking circuit, a fault feedback circuit, a time-delay reset circuit and a PWM control module; the MCU is electrically connected to the PWM interlocking circuit, the fault feedback circuit and the time-delay reset circuit respectively, and the PWM control module is electrically connected to the PWM interlocking circuit and the IGBT module respectively, and the normal and stable operation of the parallel-control IGBT is ensured by the PWM control module and the PWM interlocking circuit; the time-delay reset circuit is electrically connected to the PWM control module, and the IGBT module is electrically connected to the fault feedback circuit, and the time-delay reset circuit and the fault feedback circuit are used to ensure that the parallel-control IGBT stops working in time when the working state is abnormal, and the fault is reported normally;

[0006] The PWM control module includes a HCJ316 chip U1; Pins 2 and 8 of the HCJ316 chip U1 are grounded respectively; Pin 3 of the HCJ316 chip U1 is connected to +5VDC; Pins 9 and 10 of the HCJ316 chip U1 are connected to -VCC and one end of capacitor C3, capacitor C4, and capacitor C6 respectively; Pin 11 of the HCJ316 chip U1 is connected to one end of resistor R7, and the other end of resistor R7 is connected to the other end of capacitor C4, the base of transistor Q11, and the base of transistor Q12 respectively; Pins 12 and 13 of the HCJ316 chip U1 are connected to one end of capacitor C5 respectively , the other end of capacitor C6 and VCC; the other end of capacitor C3 is connected to the positive electrode of voltage zener diode D1, and pin 14 of the HCJ316 chip U1 is respectively connected to the negative electrode of voltage zener diode D1, one end of capacitor C7 and one end of resistor R8, and the other end of resistor R8 is connected to DESAT1; pin 16 of the HCJ316 chip U1 is respectively connected to Ve1, GND1, the positive electrode of voltage zener diode D1 and the other end of capacitor C5 and capacitor C7; the collector of transistor Q11 is connected to VCC, and the collector of transistor Q12 is connected to -VCC; the emitter of transistor Q11 and the emitter of transistor Q12 are respectively connected to resistor R2 8. One end of the resistor R30, the resistor R32, and the resistor R34, and the other end of the resistor R28 are connected to one end of the resistor R29, and the other end of the resistor R30 is connected to one end of the resistor R31. The other ends of the resistors R29 and R31 are respectively connected to the anode of the diode D16, the cathode of the diode D17, the cathode of the voltage-stabilizing diode D6, the resistor R9, one end of the resistor R10, one end of the capacitor C8, and the gate of the MOS tube Q3; the cathode of the diode D16 is connected to VCC; the anode of the voltage-stabilizing diode D6 is connected to the anode of the voltage-stabilizing diode D7, and the other end of the resistor R9 is connected to the anode of the light-emitting diode LED1, the cathode of the voltage-stabilizing diode D7, and the gate of the light-emitting diode Q3. The cathode of LED1, the other end of capacitor C8, the other end of resistor R10 and the source of MOS tube Q3 are connected to GND1 respectively; the anode of diode D17 is connected to the anode of zener diode D5, the cathode of zener diode D5 is connected to the anode of zener diode D4, the cathode of zener diode D4 is connected to the anode of zener diode D3, the cathode of zener diode D3 is connected to the anode of zener diode D2; the cathode of zener diode D2, the cathode of diode D15 and the drain of MOS tube Q3 are connected to 350V-400V respectively; the anode of diode D15 is connected to the cathode of diode D14, the anode of diode D14 is connected to DESAT1_1;The other end of the resistor R32 is connected to one end of the resistor R33, the other end of the resistor R34 is connected to one end of the resistor R35, the other ends of the resistor R33 and the resistor R35 are respectively connected to the anode of the diode D20, the cathode of the diode D21, the cathode of the voltage zener diode D9, the resistor R11, one end of the resistor R12, one end of the capacitor C9 and the gate of the MOS tube Q4; the cathode of the diode D20 is connected to VCC; the anode of the voltage zener diode D9 is connected to the anode of the voltage zener diode D8, the other end of the resistor R11 is connected to the anode of the light emitting diode LED2, the cathode of the voltage zener diode D8, the cathode of the light emitting diode LED2, the other end of the capacitor C9 One end, the other end of the resistor R12 and the source of the MOS tube Q4 are connected to GND1 respectively; the anode of the diode D21 is connected to the anode of the Zener diode D13, the cathode of the Zener diode D13 is connected to the anode of the Zener diode D12, the cathode of the Zener diode D12 is connected to the anode of the Zener diode D11, and the cathode of the Zener diode D11 is connected to the anode of the Zener diode D10; the cathode of the Zener diode D10, the cathode of the diode D19 and the drain of the MOS tube Q4 are connected to 350V-400V respectively; the anode of the diode D19 is connected to the cathode of the diode D18, and the anode of the diode D18 is connected to DESAT1_2;

[0007] The PWM interlocking circuit includes a MOS tube Q1 and a MOS tube Q2; EPWM_A is connected to one end of the resistor R1, the other end of the resistor R1 is respectively connected to one end of the resistors R2 and R3, one end of the capacitor C1 and the gate of the MOS tube Q2, and the other end of the resistor R2 and the other end of the capacitor C1 are respectively grounded; EPWM_B is connected to one end of the resistor R4, the other end of the resistor R4 is respectively connected to one end of the resistors R5 and R6, one end of the capacitor C2 and the gate of the MOS tube Q1, and the other end of the resistor R5 and the other end of the capacitor C2 are respectively grounded; the source of the MOS tube Q2 and the source of the MOS tube Q1 are respectively grounded; the other end of the resistor R3, the drain of the MOS tube Q1, the other end of the resistor R6 and the drain of the MOS tube Q2 are respectively connected to the pin 1 of the HCJ316 chip U1;

[0008] The time-delay reset circuit comprises a MOS tube Q5, a MOS tube Q6 and a light-emitting diode LED3; the positive electrode of the light-emitting diode LED3 is respectively connected to the gate of the MOS tube Q5 and one end of the resistor R19, and the other end of the resistor R19, the drain of the MOS tube Q5 and one end of the resistor R20 are respectively connected to +5VDC; the other end of the resistor R20 and the drain of the MOS tube Q6 are respectively connected to pin 5 of the HCJ316 chip U1; the source of the MOS tube Q5 is connected to one end of the resistor R22, and the other end of the resistor R22 is respectively connected to one end of the capacitor C10, one end of the resistor R21 and the gate of the MOS tube Q6; the other end of the capacitor C10, the other end of the resistor R21 and the source of the MOS tube Q6 are respectively grounded; one end of the capacitor C11 is connected to pin 6 of the HCJ316 chip U1, and the other end of the capacitor C11 is grounded;

[0009] The fault feedback circuit comprises a fault feedback circuit front end and a fault feedback circuit back end, and the fault feedback circuit front end comprises a MOS tube Q9 and a MOS tube Q10; the FAULT signal is respectively connected to one end of the resistor R23 and the drain of the MOS tube Q9, and the other end of the resistor R23 and one end of the resistor R24 ​​are respectively connected to DP15V; the gate of the MOS tube Q9 is respectively connected to one end of the resistor R27, the other end of the resistor R24 ​​and the drain of the MOS tube Q10; the gate of the MOS tube Q10 is respectively connected to one end of the resistor R25, one end of the resistor R26 and one end of the capacitor C13, the other end of the resistor R25 and one end of the capacitor C12 are respectively connected to +5VDC, and the other end of the capacitor C12 is grounded; the source of the MOS tube Q9, the source of the MOS tube Q10, the other end of the capacitor C13 and the other ends of the resistor R27 and the resistor R26 are respectively grounded; the source of the MOS tube Q9 and the source of the MOS tube Q10 are respectively connected to the negative electrode of the light-emitting diode LED3 and one end of the capacitor C11;

[0010] The back end of the fault feedback circuit includes a MOS transistor Q7 and a MOS transistor Q8; the drain of the MOS transistor Q7 and the drain of the MOS transistor Q8 are connected to DESAT1 respectively; DESAT1_1 is connected to the cathode of the diode D22 and the cathode of the diode D24 respectively; DESAT1_2 is connected to the cathode of the diode D23 and the cathode of the diode D25 respectively; the anode of the diode D22 is connected to the source of the MOS transistor Q7, and the gate of the MOS transistor Q7 is connected to the anode of the diode D23 and one end of the resistor R13 and the resistor R14 respectively; the anode of the diode D25 is connected to the source of the MOS transistor Q8, and the gate of the MOS transistor Q8 is connected to the anode of the diode D24 and one end of the resistor R17 and the resistor R18 respectively; the other ends of the resistor R13 and the resistor R18 are connected to +16.7v_1 respectively; the other end of the resistor R14 is connected to one end of the resistor R15, the other end of the resistor R17 is connected to one end of the resistor R16, and the other ends of the resistor R15 and the resistor R16 are connected to Ve1.

[0011] Beneficial effects of the present invention:

[0012] (1) Compared with other parallel-pipe drives, the present invention has stronger environmental adaptability and adopts multiple safety designs, making the drive device more reliable;

[0013] (2) The present invention adopts a low-cost design. On the basis of ensuring safety and reliability, it reduces redundant components and optimizes the circuit board design through repeated circuit optimization, thereby increasing the integration level;

[0014] (3) The present invention reduces the driving power consumption by optimizing the design. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0016] Figure 1 The present invention is a driving block diagram of a high-current parallel-tube IGBT driving device.

[0017] Figure 2 for Figure 1 Circuit diagram of the PWM control module.

[0018] Figure 3 for Figure 1 Circuit diagram of the PWM interlock circuit.

[0019] Figure 4 for Figure 1 Front-end circuit diagram of the fault feedback circuit.

[0020] Figure 5 for Figure 1 Circuit diagram of the medium delay reset circuit.

[0021] Figure 6 for Figure 1 Back-end circuit diagram of the fault feedback circuit.

[0022] Figure 7 This is a rising edge waveform diagram of the IGBT driving signal of the present invention.

[0023] Figure 8 This is a falling edge waveform diagram of the IGBT driving signal of the present invention.

[0024] Fig. 9 It is a schematic diagram of the IGBT driving signal board of the present invention.

[0025] Fig.10 It is a schematic diagram of an IGBT driving isolation power supply of the present invention.

[0026] Fig.11 This is a state diagram of the IGBT driver in use on site according to the present invention. DETAILED DESCRIPTION

[0027] The technical solution of the present invention will be clearly and completely described below through specific implementation methods.

[0028] A high current parallel IGBT driving device of the present invention comprises a PWM interlocking circuit, a fault feedback circuit, a time delay reset circuit and a PWM control module; Figure 1 As shown, the MCU is electrically connected to the PWM interlock circuit, the fault feedback circuit and the time-delay reset circuit respectively, and the PWM control module is electrically connected to the PWM interlock circuit and the IGBT module respectively, and the PWM control module and the PWM interlock circuit are used to ensure that the parallel-controlled IGBT can work normally and stably; the time-delay reset circuit is electrically connected to the PWM control module, and the IGBT module is electrically connected to the fault feedback circuit, and the time-delay reset circuit and the fault feedback circuit are used to ensure that the parallel-controlled IGBT can stop working in time when it is in an abnormal working state, and the fault is reported normally, thereby ensuring the safe operation of the circuit.

[0029] The PWM control module in the present invention includes a HCJ316 chip U1; Figure 2As shown, pin 2 and pin 8 of HCJ316 chip U1 are grounded respectively; pin 3 of HCJ316 chip U1 is connected to +5VDC; pin 9 and pin 10 of HCJ316 chip U1 are connected to -VCC and one end of capacitor C3, capacitor C4 and capacitor C6 respectively; pin 11 of HCJ316 chip U1 is connected to one end of resistor R7, and the other end of resistor R7 is connected to the other end of capacitor C4, the base of transistor Q11 and the base of transistor Q12 respectively; pin 12 and pin 13 of HCJ316 chip U1 are connected to one end of capacitor C5, the other end of capacitor C6 and VCC respectively; the other end of capacitor C3 is connected to Connect to the positive electrode of the voltage zener diode D1, and the pin 14 of the HCJ316 chip U1 is respectively connected to the negative electrode of the voltage zener diode D1, one end of the capacitor C7 and one end of the resistor R8, and the other end of the resistor R8 is connected to DESAT1; the pin 16 of the HCJ316 chip U1 is respectively connected to Ve1, GND1, the positive electrode of the voltage zener diode D1 and the other end of the capacitor C5 and the capacitor C7; the collector of the transistor Q11 is connected to VCC, and the collector of the transistor Q12 is connected to -VCC; the emitter of the transistor Q11 and the emitter of the transistor Q12 are respectively connected to one end of the resistor R28, the resistor R30, the resistor R32, and the resistor R34;

[0030] like Figure 2 As shown, the other end of the resistor R28 is connected to one end of the resistor R29, the other end of the resistor R30 is connected to one end of the resistor R31, the other ends of the resistors R29 and R31 are respectively connected to the anode of the diode D16, the cathode of the diode D17, the cathode of the voltage zener diode D6, the resistor R9, one end of the resistor R10, one end of the capacitor C8 and the gate of the MOS tube Q3; the cathode of the diode D16 is connected to VCC; the anode of the voltage zener diode D6 is connected to the anode of the voltage zener diode D7, the other end of the resistor R9 is connected to the anode of the light emitting diode LED1, the cathode of the voltage zener diode D7, the cathode of the light emitting diode LED1, ... cathode of the light emitting diode LED1, the capacitor C8 and the gate of the MOS tube Q3; the cathode of the diode D16 is connected to VCC; the anode of the voltage zener diode D6 is connected to the anode of the voltage zener diode D7, the cathode of the light emitting diode LED1, the capacitor C8 and the gate of the MOS tube Q3; the cathode of the diode D16 is connected to VCC; the cathode of the diode D17 is connected to the anode of the diode D17, the cathode of the light emitting diode The other end of C8, the other end of the resistor R10 and the source of the MOS tube Q3 are connected to GND1 respectively; the anode of the diode D17 is connected to the anode of the Zener diode D5, the cathode of the Zener diode D5 is connected to the anode of the Zener diode D4, the cathode of the Zener diode D4 is connected to the anode of the Zener diode D3, and the cathode of the Zener diode D3 is connected to the anode of the Zener diode D2; the cathode of the Zener diode D2, the cathode of the diode D15 and the drain of the MOS tube Q3 are connected to 350V-400V respectively; the anode of the diode D15 is connected to the cathode of the diode D14, and the anode of the diode D14 is connected to DESAT1_1;

[0031] like Figure 2As shown, the other end of the resistor R32 is connected to one end of the resistor R33, the other end of the resistor R34 is connected to one end of the resistor R35, the other ends of the resistors R33 and R35 are respectively connected to the anode of the diode D20, the cathode of the diode D21, the cathode of the voltage stabilizing diode D9, the resistor R11, one end of the resistor R12, one end of the capacitor C9 and the gate of the MOS tube Q4; the cathode of the diode D20 is connected to VCC; the anode of the voltage stabilizing diode D9 is connected to the anode of the voltage stabilizing diode D8, the other end of the resistor R11 is connected to the anode of the light emitting diode LED2, the cathode of the voltage stabilizing diode D8, the cathode of the light emitting diode LED2, the cathode of the capacitor C9 The other end, the other end of the resistor R12 and the source of the MOS tube Q4 are connected to GND1 respectively; the positive electrode of the diode D21 is connected to the positive electrode of the voltage regulator diode D13, the negative electrode of the voltage regulator diode D13 is connected to the positive electrode of the voltage regulator diode D12, the negative electrode of the voltage regulator diode D12 is connected to the positive electrode of the voltage regulator diode D11, and the negative electrode of the voltage regulator diode D11 is connected to the positive electrode of the voltage regulator diode D10; the negative electrode of the voltage regulator diode D10, the negative electrode of the diode D19 and the drain of the MOS tube Q4 are connected to 350V-400V respectively; the positive electrode of the diode D19 is connected to the negative electrode of the diode D18, and the positive electrode of the diode D18 is connected to DESAT1_2. Among them, the MOS tube Q3 and the MOS tube Q4 are both N-type MOSFETs. The present invention adopts the HCJ316 chip U1 as the parallel tube IGBT driving core, and uses a pair of triodes to form a push-pull circuit to amplify the driving signal of the IGBT, thereby increasing the driving ability of the circuit and ensuring the stable operation of the circuit.

[0032] The PWM interlocking circuit of the present invention comprises a MOS tube Q1 and a MOS tube Q2; Figure 3 As shown, EPWM_A is connected to one end of resistor R1, and the other end of resistor R1 is respectively connected to one end of resistor R2, R3, one end of capacitor C1 and the gate of MOS tube Q2, and the other end of resistor R2 and the other end of capacitor C1 are grounded respectively; EPWM_B is connected to one end of resistor R4, and the other end of resistor R4 is respectively connected to one end of resistor R5, R6, one end of capacitor C2 and the gate of MOS tube Q1, and the other end of resistor R5 and the other end of capacitor C2 are grounded respectively; the source of MOS tube Q2 and the source of MOS tube Q1 are grounded respectively; the other end of resistor R3, the drain of MOS tube Q1, the other end of resistor R6 and the drain of MOS tube Q2 are respectively connected to pin 1 of HCJ316 chip U1. Among them, MOS tube Q1 and MOS tube Q2 are both N-type MOSFETs. The PWM interlocking circuit in the present invention can avoid the situation where the upper and lower tubes of IGBT are turned on at the same time. Although there is dead zone control when MCU sends waves, for safety reasons, it is still necessary to design a PWM interlocking circuit in the circuit.

[0033] The time-delay reset circuit of the present invention comprises a MOS tube Q5, a MOS tube Q6 and a light-emitting diode LED3; Figure 5 As shown, the positive electrode of the light emitting diode LED3 is respectively connected to the gate of the MOS tube Q5 and one end of the resistor R19, and the other end of the resistor R19, the drain of the MOS tube Q5 and one end of the resistor R20 are respectively connected to +5VDC; the other end of the resistor R20 and the drain of the MOS tube Q6 are respectively connected to the pin 5 of the HCJ316 chip U1; the source of the MOS tube Q5 is connected to one end of the resistor R22, and the other end of the resistor R22 is respectively connected to one end of the capacitor C10, one end of the resistor R21 and the gate of the MOS tube Q6; the other end of the capacitor C10, the other end of the resistor R21 and the source of the MOS tube Q6 are respectively grounded; one end of the capacitor C11 is connected to the pin 6 of the HCJ316 chip U1, and the other end of the capacitor C11 is grounded. Among them, the MOS tube Q5 and the MOS tube Q6 are both N-type MOSFETs. The fault feedback delayed reset in the present invention means that when a fault occurs, the HCJ316 chip U1 will stop emitting waves and turn off the IGBT. When the RESETAT pin receives 0, the HCJ316 chip U1 can emit waves normally. The design of the delayed reset circuit is to delay the HCJ316 chip U1 for a certain period of time after a fault occurs and then restore its normal wave-emitting function, and the delay of this circuit design is 1 second.

[0034] The fault feedback circuit in the present invention comprises a fault feedback circuit front end and a fault feedback circuit back end, and the fault feedback circuit front end comprises a MOS tube Q9 and a MOS tube Q10; Figure 4 As shown, the FAULT signal is connected to one end of the resistor R23 and the drain of the MOS transistor Q9, and the other end of the resistor R23 and one end of the resistor R24 ​​are connected to DP15V respectively; the gate of the MOS transistor Q9 is connected to one end of the resistor R27, the other end of the resistor R24 ​​and the drain of the MOS transistor Q10; the gate of the MOS transistor Q10 is connected to one end of the resistor R25, one end of the resistor R26 and one end of the capacitor C13, and the other end of the resistor R25 and one end of the capacitor C12 are connected to +5VDC respectively, and the other end of the capacitor C12 is grounded; the source of the MOS transistor Q9, the source of the MOS transistor Q10, the other end of the capacitor C13, and the other ends of the resistor R27 and the resistor R26 are grounded respectively; the source of the MOS transistor Q9 and the source of the MOS transistor Q10 are connected to the cathode of the light-emitting diode LED3 and one end of the capacitor C11 respectively. Among them, the MOS transistor Q9 and the MOS transistor Q10 are both N-type MOSFETs. The front end of the fault feedback circuit of the present invention integrates multiple fault conditions. Any fault in any path will be reported to the MCU, and the HCJ316 chip U1 stops emitting waves. This circuit comprehensively considers the different levels of the control board and the power board, and ensures that the fault signal is accurately reported to avoid false alarms.

[0035] like Figure 6 As shown, the back end of the fault feedback circuit includes a MOS transistor Q7 and a MOS transistor Q8; the drain of the MOS transistor Q7 and the drain of the MOS transistor Q8 are connected to DESAT1 respectively; DESAT1_1 is connected to the cathode of the diode D22 and the cathode of the diode D24 respectively; DESAT1_2 is connected to the cathode of the diode D23 and the cathode of the diode D25 respectively; the anode of the diode D22 is connected to the source of the MOS transistor Q7, and the gate of the MOS transistor Q7 is connected to the anode of the diode D23 and one end of the resistor R13 and the resistor R14 respectively; the anode of the diode D25 is connected to the source of the MOS transistor Q8, and the gate of the MOS transistor Q8 is connected to the anode of the diode D24 and one end of the resistor R17 and the resistor R18 respectively; the other ends of the resistor R13 and the resistor R18 are connected to +16.7v_1 respectively; the other end of the resistor R14 is connected to one end of the resistor R15, the other end of the resistor R17 is connected to one end of the resistor R16, and the other ends of the resistor R15 and the resistor R16 are connected to Ve1. Among them, MOS tube Q7 and MOS tube Q8 are both N-type MOSFET. Since the present invention is a parallel tube drive, any tube overvoltage must be reported to the HCJ316 chip U1 in time, which requires this circuit to ensure stable fault feedback.

[0036] like Figures 7 to 11 As shown, the present invention has achieved various design requirements and has been put into production and applied in 200kvar active filter products.

[0037] Beneficial effects of the present invention:

[0038] (1) Compared with other parallel-pipe drives, the present invention has stronger environmental adaptability and adopts multiple safety designs, making the drive device more reliable;

[0039] (2) The present invention adopts a low-cost design. On the basis of ensuring safety and reliability, it reduces redundant components and optimizes the circuit board design through repeated circuit optimization, thereby increasing the integration level;

[0040] (3) The present invention reduces the driving power consumption by optimizing the design.

[0041] The embodiments described above are merely descriptions of preferred implementation modes of the present invention, and are not intended to limit the concept and scope of the present invention. Without departing from the design concept of the present invention, various modifications and improvements made to the technical solutions of the present invention by ordinary engineering technicians in the field should fall within the protection scope of the present invention. The technical contents for which protection is sought in the present invention have been fully recorded in the technical requirements.

Claims

1. A high current parallel IGBT driving device, characterized in that: It includes a PWM interlocking circuit, a fault feedback circuit, a time-delay reset circuit and a PWM control module; the MCU is electrically connected to the PWM interlocking circuit, the fault feedback circuit and the time-delay reset circuit respectively, and the PWM control module is electrically connected to the PWM interlocking circuit and the IGBT module respectively, and the PWM control module and the PWM interlocking circuit are used to ensure that the parallel-controlled IGBT works normally and stably; the time-delay reset circuit is electrically connected to the PWM control module, and the IGBT module is electrically connected to the fault feedback circuit, and the time-delay reset circuit and the fault feedback circuit are used to ensure that the parallel-controlled IGBT stops working in time when the working state is abnormal, and the fault is reported normally; The PWM control module includes a HCJ316 chip U1; Pins 2 and 8 of the HCJ316 chip U1 are grounded respectively; Pin 3 of the HCJ316 chip U1 is connected to +5VDC; Pins 9 and 10 of the HCJ316 chip U1 are connected to -VCC and one end of capacitor C3, capacitor C4, and capacitor C6 respectively; Pin 11 of the HCJ316 chip U1 is connected to one end of resistor R7, and the other end of resistor R7 is connected to the other end of capacitor C4, the base of transistor Q11, and the base of transistor Q12 respectively; Pins 12 and 13 of the HCJ316 chip U1 are connected to one end of capacitor C5 respectively , the other end of capacitor C6 and VCC; the other end of capacitor C3 is connected to the positive electrode of voltage zener diode D1, and pin 14 of the HCJ316 chip U1 is respectively connected to the negative electrode of voltage zener diode D1, one end of capacitor C7 and one end of resistor R8, and the other end of resistor R8 is connected to DESAT1; pin 16 of the HCJ316 chip U1 is respectively connected to Ve1, GND1, the positive electrode of voltage zener diode D1 and the other end of capacitor C5 and capacitor C7; the collector of transistor Q11 is connected to VCC, and the collector of transistor Q12 is connected to -VCC; the emitter of transistor Q11 and the emitter of transistor Q12 are respectively connected to resistor R2 8. One end of the resistor R30, the resistor R32, and the resistor R34, and the other end of the resistor R28 are connected to one end of the resistor R29, and the other end of the resistor R30 is connected to one end of the resistor R31. The other ends of the resistors R29 and R31 are respectively connected to the anode of the diode D16, the cathode of the diode D17, the cathode of the voltage-stabilizing diode D6, the resistor R9, one end of the resistor R10, one end of the capacitor C8, and the gate of the MOS tube Q3; the cathode of the diode D16 is connected to VCC; the anode of the voltage-stabilizing diode D6 is connected to the anode of the voltage-stabilizing diode D7, and the other end of the resistor R9 is connected to the anode of the light-emitting diode LED1, the cathode of the voltage-stabilizing diode D7, and the gate of the light-emitting diode Q3. The cathode of LED1, the other end of capacitor C8, the other end of resistor R10 and the source of MOS tube Q3 are connected to GND1 respectively; the anode of diode D17 is connected to the anode of zener diode D5, the cathode of zener diode D5 is connected to the anode of zener diode D4, the cathode of zener diode D4 is connected to the anode of zener diode D3, the cathode of zener diode D3 is connected to the anode of zener diode D2; the cathode of zener diode D2, the cathode of diode D15 and the drain of MOS tube Q3 are connected to 350V-400V respectively; the anode of diode D15 is connected to the cathode of diode D14, the anode of diode D14 is connected to DESAT1_1;The other end of the resistor R32 is connected to one end of the resistor R33, the other end of the resistor R34 is connected to one end of the resistor R35, the other ends of the resistor R33 and the resistor R35 are respectively connected to the anode of the diode D20, the cathode of the diode D21, the cathode of the voltage zener diode D9, the resistor R11, one end of the resistor R12, one end of the capacitor C9 and the gate of the MOS tube Q4; the cathode of the diode D20 is connected to VCC; the anode of the voltage zener diode D9 is connected to the anode of the voltage zener diode D8, the other end of the resistor R11 is connected to the anode of the light emitting diode LED2, the cathode of the voltage zener diode D8, the cathode of the light emitting diode LED2, the other end of the capacitor C9 One end, the other end of the resistor R12 and the source of the MOS tube Q4 are connected to GND1 respectively; the anode of the diode D21 is connected to the anode of the Zener diode D13, the cathode of the Zener diode D13 is connected to the anode of the Zener diode D12, the cathode of the Zener diode D12 is connected to the anode of the Zener diode D11, and the cathode of the Zener diode D11 is connected to the anode of the Zener diode D10; the cathode of the Zener diode D10, the cathode of the diode D19 and the drain of the MOS tube Q4 are connected to 350V-400V respectively; the anode of the diode D19 is connected to the cathode of the diode D18, and the anode of the diode D18 is connected to DESAT1_2; The PWM interlocking circuit includes a MOS tube Q1 and a MOS tube Q2; EPWM_A is connected to one end of the resistor R1, the other end of the resistor R1 is respectively connected to one end of the resistors R2 and R3, one end of the capacitor C1 and the gate of the MOS tube Q2, and the other end of the resistor R2 and the other end of the capacitor C1 are respectively grounded; EPWM_B is connected to one end of the resistor R4, the other end of the resistor R4 is respectively connected to one end of the resistors R5 and R6, one end of the capacitor C2 and the gate of the MOS tube Q1, and the other end of the resistor R5 and the other end of the capacitor C2 are respectively grounded; the source of the MOS tube Q2 and the source of the MOS tube Q1 are respectively grounded; the other end of the resistor R3, the drain of the MOS tube Q1, the other end of the resistor R6 and the drain of the MOS tube Q2 are respectively connected to the pin 1 of the HCJ316 chip U1; The time-delay reset circuit comprises a MOS tube Q5, a MOS tube Q6 and a light-emitting diode LED3; the positive electrode of the light-emitting diode LED3 is respectively connected to the gate of the MOS tube Q5 and one end of the resistor R19, and the other end of the resistor R19, the drain of the MOS tube Q5 and one end of the resistor R20 are respectively connected to +5VDC; the other end of the resistor R20 and the drain of the MOS tube Q6 are respectively connected to pin 5 of the HCJ316 chip U1; the source of the MOS tube Q5 is connected to one end of the resistor R22, and the other end of the resistor R22 is respectively connected to one end of the capacitor C10, one end of the resistor R21 and the gate of the MOS tube Q6; the other end of the capacitor C10, the other end of the resistor R21 and the source of the MOS tube Q6 are respectively grounded; one end of the capacitor C11 is connected to pin 6 of the HCJ316 chip U1, and the other end of the capacitor C11 is grounded; The fault feedback circuit comprises a fault feedback circuit front end and a fault feedback circuit back end, and the fault feedback circuit front end comprises a MOS tube Q9 and a MOS tube Q10; the FAULT signal is respectively connected to one end of the resistor R23 and the drain of the MOS tube Q9, and the other end of the resistor R23 and one end of the resistor R24 ​​are respectively connected to DP15V; the gate of the MOS tube Q9 is respectively connected to one end of the resistor R27, the other end of the resistor R24 ​​and the drain of the MOS tube Q10; the gate of the MOS tube Q10 is respectively connected to one end of the resistor R25, one end of the resistor R26 and one end of the capacitor C13, the other end of the resistor R25 and one end of the capacitor C12 are respectively connected to +5VDC, and the other end of the capacitor C12 is grounded; the source of the MOS tube Q9, the source of the MOS tube Q10, the other end of the capacitor C13 and the other ends of the resistor R27 and the resistor R26 are respectively grounded; the source of the MOS tube Q9 and the source of the MOS tube Q10 are respectively connected to the negative electrode of the light-emitting diode LED3 and one end of the capacitor C11; The back end of the fault feedback circuit includes a MOS transistor Q7 and a MOS transistor Q8; the drain of the MOS transistor Q7 and the drain of the MOS transistor Q8 are connected to DESAT1 respectively; DESAT1_1 is connected to the cathode of the diode D22 and the cathode of the diode D24 respectively; DESAT1_2 is connected to the cathode of the diode D23 and the cathode of the diode D25 respectively; the anode of the diode D22 is connected to the source of the MOS transistor Q7, and the gate of the MOS transistor Q7 is connected to the anode of the diode D23 and one end of the resistor R13 and the resistor R14 respectively; the anode of the diode D25 is connected to the source of the MOS transistor Q8, and the gate of the MOS transistor Q8 is connected to the anode of the diode D24 and one end of the resistor R17 and the resistor R18 respectively; the other ends of the resistor R13 and the resistor R18 are connected to +16.7v_1 respectively; the other end of the resistor R14 is connected to one end of the resistor R15, the other end of the resistor R17 is connected to one end of the resistor R16, and the other ends of the resistor R15 and the resistor R16 are connected to Ve1.

Citation Information

Patent Citations

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