Photovoltaic inverter system

By employing a non-isolated dual buck inverter circuit and a voltage vector modulation method that eliminates the need for dead-zone vector modulation in the photovoltaic inverter system, the leakage current and electromagnetic interference problems of traditional photovoltaic grid-connected inverters are solved, achieving a high-efficiency, low-cost, and high-power-density inverter design.

CN114421520BActive Publication Date: 2026-04-10SHENZHEN POWER SUPPLY BUREAU
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-12-17
Publication Date
2026-04-10

AI Technical Summary

Technical Problem

Traditional grid-connected photovoltaic inverters suffer from poor reliability, especially non-isolated inverters, which form a common-mode loop between the photovoltaic array and the AC grid, resulting in high-frequency common-mode leakage current and electromagnetic interference, affecting the quality of output power and posing safety hazards.

Method used

The photovoltaic inverter system is controlled to maintain low leakage current operation by employing a first single-phase non-isolated dual buck inverter circuit and a second single-phase non-isolated dual buck inverter circuit, combined with a voltage vector modulation method that does not require dead zone vector, and the generation of common-mode current is suppressed by an independent photovoltaic DC power supply and filter capacitor.

Benefits of technology

It achieves high efficiency, low cost and high power density of non-isolated inverters, effectively suppresses common-mode current, ensures output power quality and reduces electromagnetic interference, and improves the reliability of the system.

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Patent Text Reader

Abstract

The application relates to a photovoltaic inversion system, which adopts an independent photovoltaic direct-current power supply as the input of the photovoltaic inversion system, and a first single-phase non-isolated double-buck inversion circuit and a second single-phase non-isolated double-buck inversion circuit are respectively connected with a photovoltaic direct-current power supply, forming a non-isolated photovoltaic inversion system. No additional switching device needs to be connected between the input end of the single-phase non-isolated double-buck inversion circuit and the photovoltaic direct-current power supply, and a voltage vector modulation strategy without a dead zone vector can be combined with a controller to maintain a low leakage current operation state of the photovoltaic inversion system and effectively inhibit the generation of common-mode current. The photovoltaic inversion system obtained through the above scheme not only has the advantages of small weight and volume, high power density and efficiency and low cost of the non-isolated inversion system, but also can effectively inhibit the generation of common-mode current, guarantee the quality of output electric energy and reduce the generation of electromagnetic interference, and has strong working reliability.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power grid power supply, in particular to a photovoltaic inverter system. BACKGROUND

[0002] Photovoltaic power generation refers to a new type of power generation system that directly converts solar radiation energy into electric energy by using the photovoltaic effect of solar cell semiconductor materials, and has independent operation and grid-connected operation. Due to its cleanliness, non-pollution and other advantages, it becomes an important part of realizing the "double carbon" goal. Among them, the photovoltaic grid-connected inverter as the core component of the photovoltaic power generation system can convert the direct current power generated by photovoltaic power generation into appropriate alternating current power to supply power to electrical devices. At present, according to whether there is a power frequency isolation transformer, the photovoltaic grid-connected inverter is mainly divided into isolated inverters and non-isolated inverters.

[0003] The use of power frequency isolation in isolated inverters can reduce the direct current component injected into the power grid and increase the output voltage, but the power frequency transformer increases the volume, weight, cost and system loss of the system, resulting in low efficiency and small power density of the photovoltaic power generation system. Although the non-isolated inverter can reduce the weight and volume of the system, increase the power density, and has the advantages of high efficiency and low cost. However, the non-isolated inverter lacks the power frequency isolation transformer to isolate the photovoltaic array from the alternating current grid, and the photovoltaic array, the alternating current grid, the ground and the parasitic capacitance of the photovoltaic array and the ground will form a common-mode loop. When the voltage across the parasitic capacitance changes at high frequency, the system will generate high-frequency common-mode leakage current, reduce the output power quality, and at the same time produce electromagnetic interference, and even endanger personal safety. Therefore, the traditional photovoltaic grid-connected inverter still has the shortcomings of poor working reliability. SUMMARY

[0004] Therefore, it is necessary to provide a photovoltaic inverter system in view of the poor working reliability of the traditional photovoltaic grid-connected inverter.

[0005] A photovoltaic inverter system, comprising: a first photovoltaic DC power supply; a second photovoltaic DC power supply; a first single-phase non-isolated dual-buck inverter circuit, a first input end and a second input end of the first single-phase non-isolated dual-buck inverter circuit are connected to the first photovoltaic DC power supply respectively, a first output end and a second output end of the first single-phase non-isolated dual-buck inverter circuit are connected to a grid-connected circuit respectively; a second single-phase non-isolated dual-buck inverter circuit, a first input end and a second input end of the second single-phase non-isolated dual-buck inverter circuit are connected to the second photovoltaic DC power supply respectively, a first output end of the second single-phase non-isolated dual-buck inverter circuit is connected to the second output end of the first single-phase non-isolated dual-buck inverter circuit and the grid-connected circuit, a second output end of the second single-phase non-isolated dual-buck inverter circuit is connected to the grid-connected circuit; a controller, control ends of the first single-phase non-isolated dual-buck inverter circuit and the second single-phase non-isolated dual-buck inverter circuit are connected to the controller respectively, the controller is used for controlling the first single-phase non-isolated dual-buck inverter circuit and the second single-phase non-isolated dual-buck inverter circuit to operate by a voltage vector modulation method without dead-zone vector, so that the photovoltaic inverter system maintains low leakage current operation; and a grid-connected circuit, used for connecting an external AC load and providing AC power for the external AC load.

[0006] In one embodiment, the photovoltaic inverter system further comprises a first capacitor and a second capacitor, a first end of the first capacitor is connected to the first input end of the first single-phase non-isolated dual-buck inverter circuit and the first photovoltaic DC power supply, a second end of the first capacitor is connected to the second input end of the first single-phase non-isolated dual-buck inverter circuit and the first photovoltaic DC power supply, a first end of the second capacitor is connected to the first input end of the second single-phase non-isolated dual-buck inverter circuit and the second photovoltaic DC power supply, and a second end of the second capacitor is connected to the second input end of the second single-phase non-isolated dual-buck inverter circuit and the second photovoltaic DC power supply.

[0007] In one embodiment, the grid-connected circuit comprises a first filter capacitor and a second filter capacitor, a first end of the first filter capacitor is connected to the first output end of the first single-phase non-isolated dual-buck inverter circuit and an external AC load, a second end of the first filter capacitor is connected to a first end of the second filter capacitor, a common end is connected to the second output end of the first single-phase non-isolated dual-buck inverter circuit and the first output end of the second single-phase non-isolated dual-buck inverter circuit, a second end of the second filter capacitor is connected to the second output end of the second single-phase non-isolated dual-buck inverter circuit and the external AC load, and a second end of the second filter capacitor is grounded.

[0008] In one embodiment, the first single-phase non-isolated dual-buck inversion circuit comprises a first diode, a second diode, a third diode, a fourth diode, a first switch device, a second switch device, a third switch device, a fourth switch device, a first bridge arm inductor and a second bridge arm inductor; control terminals of the first switch device, the second switch device, the third switch device and the fourth switch device are connected to the controller respectively, a first terminal of the first switch device is used as a first input terminal of the first single-phase non-isolated dual-buck inversion circuit, a second terminal of the first switch device is connected to a first terminal of the first bridge arm inductor and a cathode of the first diode, an anode of the first diode is used as a second input terminal of the first single-phase non-isolated dual-buck inversion circuit, a second terminal of the first bridge arm inductor is used as a first output terminal of the first single-phase non-isolated dual-buck inversion circuit, a first terminal of the second switch device is connected to the anode of the first diode, a second terminal of the second switch device is connected to a cathode of the second diode, an anode of the second diode is connected to the second terminal of the first bridge arm inductor, a first terminal of the third switch device is connected to the first terminal of the first switch device, a second terminal of the third switch device is connected to a first terminal of the second bridge arm inductor and a cathode of the third diode, a second terminal of the second bridge arm inductor is used as a second output terminal of the first single-phase non-isolated dual-buck inversion circuit, an anode of the third diode is connected to the first terminal of the second switch device and a first terminal of the fourth switch device, a second terminal of the fourth switch device is connected to a cathode of the fourth diode, an anode of the fourth diode is connected to the second terminal of the second bridge arm inductor.

[0009] In one embodiment, the second single-phase non-isolated dual-buck inversion circuit comprises a fifth diode, a sixth diode, a seventh diode, an eighth diode, a fifth switch device, a sixth switch device, a seventh switch device, an eighth switch device, a third bridge arm inductor and a fourth bridge arm inductor; the control terminals of the fifth switch device, the sixth switch device, the seventh switch device and the eighth switch device are respectively connected to the controller, the first terminal of the fifth switch device serves as the first input terminal of the second single-phase non-isolated dual-buck inversion circuit, the second terminal of the fifth switch device is connected to the first terminal of the third bridge arm inductor and the cathode of the fifth diode, the anode of the fifth diode serves as the second input terminal of the second single-phase non-isolated dual-buck inversion circuit, the second terminal of the third bridge arm inductor serves as the first output terminal of the second single-phase non-isolated dual-buck inversion circuit, the first terminal of the sixth switch device is connected to the anode of the fifth diode, the second terminal of the sixth switch device is connected to the cathode of the sixth diode, the anode of the sixth diode is connected to the second terminal of the third bridge arm inductor, the first terminal of the seventh switch device is connected to the first terminal of the fifth switch device, the second terminal of the seventh switch device is connected to the first terminal of the fourth bridge arm inductor and the cathode of the seventh diode, the second terminal of the fourth bridge arm inductor serves as the second output terminal of the second single-phase non-isolated dual-buck inversion circuit, the anode of the seventh diode is connected to the first terminal of the sixth switch device and the first terminal of the eighth switch device, the second terminal of the eighth switch device is connected to the cathode of the eighth diode, and the anode of the eighth diode is connected to the second terminal of the fourth bridge arm inductor.

[0010] In one embodiment, the number of the first photovoltaic DC power supply is the same as that of the first single-phase non-isolated dual-buck inversion circuit, and is two or more, and / or the number of the second photovoltaic DC power supply is the same as that of the second single-phase non-isolated dual-buck inversion circuit, and is two or more.

[0011] A method for operating and controlling the photovoltaic inversion system as described above, comprising: obtaining voltage vectors required for the operation of the first single-phase non-isolated dual-buck inversion circuit and the second single-phase non-isolated dual-buck inversion circuit respectively according to the expected voltage output value of the photovoltaic inversion system and a preset voltage vector model; obtaining the time for the action of each voltage vector according to a sampling period and a preset vector action time model; and controlling the operation of the first single-phase non-isolated dual-buck inversion circuit and the second single-phase non-isolated dual-buck inversion circuit according to the voltage vectors and the time for the action of the vectors.

[0012] In one embodiment, the step of obtaining the voltage vectors required for the first single-phase non-isolated dual-buck inverter circuit and the second single-phase non-isolated dual-buck inverter circuit to operate according to the expected voltage output value of the photovoltaic inverter system and the preset voltage vector model comprises: obtaining a first dynamic modulation ratio and a second dynamic modulation ratio according to the expected voltage output value of the first single-phase non-isolated dual-buck inverter circuit, the expected voltage output value of the second single-phase non-isolated dual-buck inverter circuit and the output level of the photovoltaic inverter system; obtaining a first voltage vector required for the first single-phase non-isolated dual-buck inverter circuit to operate according to the first dynamic modulation ratio and the preset voltage vector model, and obtaining a second voltage vector required for the second single-phase non-isolated dual-buck inverter circuit to operate according to the second dynamic modulation ratio and the preset voltage vector model.

[0013] In one embodiment, the voltage vector action time of the second single-phase non-isolated dual-buck inverter circuit is separated from the voltage vector action time of the first single-phase non-isolated dual-buck inverter circuit by a quarter of a sampling period.

[0014] In one embodiment, before the step of obtaining the voltage vectors required for the first single-phase non-isolated dual-buck inverter circuit and the second single-phase non-isolated dual-buck inverter circuit to operate according to the expected voltage output value of the photovoltaic inverter system and the preset voltage vector model, the method further comprises: determining and storing a basic voltage vector according to the on-off states of the first, second, third and fourth switching devices in the first single-phase non-isolated dual-buck inverter circuit and the on-off states of the fifth, sixth, seventh and eighth switching devices in the second single-phase non-isolated dual-buck inverter circuit, to obtain the preset voltage vector model.

[0015] The photovoltaic inverter system and the operation control method thereof adopt independent photovoltaic direct-current power sources as inputs of the photovoltaic inverter system, and the first single-phase non-isolated dual-buck inverter circuit and the second single-phase non-isolated dual-buck inverter circuit are respectively connected to a photovoltaic direct-current power source, forming a non-isolated photovoltaic inverter system. No additional switching devices are needed between the input end of the single-phase non-isolated dual-buck inverter circuit and the photovoltaic direct-current power source, and the controller combines the voltage vector modulation strategy without dead zone vectors, so that the photovoltaic inverter system can maintain a low leakage current operating state and effectively suppress the generation of common-mode current. The photovoltaic inverter system obtained by the above scheme not only has the advantages of small weight and volume, high power density and efficiency and low cost of a non-isolated inverter system, but also can effectively suppress the generation of common-mode current, ensure the quality of output power and reduce the generation of electromagnetic interference, and has strong working reliability. BRIEF DESCRIPTION OF DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the accompanying drawings needed to be used in the embodiments or the prior art description will be briefly introduced as follows. Obviously, the accompanying drawings in the following description only only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor on the basis of these drawings.

[0017] Figure 1 The structure schematic diagram of a photovoltaic inverter system in an embodiment is shown in the figure.

[0018] Figure 2 The structure schematic diagram of a photovoltaic inverter system in another embodiment is shown in the figure.

[0019] Figure 3 The common-mode equivalent model schematic diagram of a photovoltaic inverter system in an embodiment is shown in the figure.

[0020] Figure 4 The operation control method flowchart of a photovoltaic inverter system in an embodiment is shown in the figure.

[0021] Figure 5 The operation control method flowchart of a photovoltaic inverter system in another embodiment is shown in the figure.

[0022] Figure 6 The voltage vector and distribution schematic diagram of an upper unit in an embodiment is shown in the figure.

[0023] Figure 7 The measure sampling schematic diagram in an embodiment is shown in the figure.

[0024] Figure 8 The voltage vector modulation rule schematic diagram in an embodiment is shown in the figure.

[0025] Figure 9 The operation control method flowchart of a photovoltaic inverter system in still another embodiment is shown in the figure.

[0026] Figure 10 The voltage vector switch state and synthesis schematic diagram of a photovoltaic inverter system in an embodiment is shown in the figure.

[0027] Figure 11 The bridge arm output voltage waveform schematic diagram of a photovoltaic inverter system is shown in the figure.

[0028] Figure 12 The AC output voltage and grid-connected current waveform schematic diagram of a photovoltaic inverter system in an embodiment is shown in the figure.

[0029] Figure 13 The voltage waveform schematic diagram of each bridge arm of an upper unit of a photovoltaic inverter system in an embodiment is shown in the figure.

[0030] Figure 14 The voltage waveform schematic diagram of each bridge arm of a lower unit of a photovoltaic inverter system in an embodiment is shown in the figure.

[0031] Figure 15 Fig. 2 is a schematic diagram of the parasitic capacitance voltage and leakage current waveforms of the upper cell in one embodiment.

[0032] Figure 16 Fig. 3 is a schematic diagram of the parasitic capacitance voltage and leakage current waveforms of the lower cell in one embodiment. DETAILED DESCRIPTION

[0033] For the purpose of promoting an understanding of the application, the application will be described in greater detail below with reference to the drawings. The preferred embodiments of the application are illustrated in the drawings. However, the application can be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the application to those skilled in the art.

[0034] Referring to Figure 1 A photovoltaic inverter system, comprising: a first photovoltaic DC power supply 10; a second photovoltaic DC power supply 20; a first single-phase non-isolated double-buck inverter circuit 30, the first input end and the second input end of the first single-phase non-isolated double-buck inverter circuit 30 are connected to the first photovoltaic DC power supply 10, the first output end and the second output end of the first single-phase non-isolated double-buck inverter circuit 30 are connected to a grid-connected circuit 50; a second single-phase non-isolated double-buck inverter circuit 40, the first input end and the second input end of the second single-phase non-isolated double-buck inverter circuit 40 are connected to the second photovoltaic DC power supply 20, the first output end of the second single-phase non-isolated double-buck inverter circuit 40 is connected to the second output end of the first single-phase non-isolated double-buck inverter circuit 30 and the grid-connected circuit 50, and the second output end of the second single-phase non-isolated double-buck inverter circuit 40 is connected to the grid-connected circuit 50; a controller 60, the control ends of the first single-phase non-isolated double-buck inverter circuit 30 and the second single-phase non-isolated double-buck inverter circuit 40 are connected to the controller 60, and the controller 60 is used to control the first single-phase non-isolated double-buck inverter circuit 30 and the second single-phase non-isolated double-buck inverter circuit 40 to operate by a voltage vector modulation method without dead zone vectors, so that the photovoltaic inverter system maintains low leakage current operation; and the grid-connected circuit 50 is used to connect an external AC load and provide AC power for the external AC load.

[0035] Specifically, the photovoltaic direct-current power supply is a device for generating direct-current power by using solar photovoltaic power generation, and can be a solar cell or a photovoltaic module composed of a plurality of solar cells. To meet the requirements of the system for power level and grid-connected power quality, single-phase multi-level inverters are increasingly used in photovoltaic power generation. Compared with traditional three-level inverters, multi-level inverters have many advantages, such as reducing power device voltage stress, improving output waveform quality, and reducing electromagnetic interference. Compared with diode clamped type and flying capacitor type inverters, the cascaded type inverter uses independent direct-current power supply, and does not need to consider the problems of direct-current capacitor voltage balancing and flying capacitor voltage balance control, and has a simple structure and is easy to modularize. However, there are many complex common-mode paths and loops, making it difficult to analyze and suppress the leakage current.

[0036] The cascaded inverter structure provided by the present application includes a first single-phase non-isolated double-buck inverter circuit 30 and a second single-phase non-isolated double-buck inverter circuit 40, and together with a first photovoltaic direct-current power supply 10 and a second photovoltaic direct-current power supply 20 forms a non-isolated inverter structure. Compared with an isolated inverter structure, it has higher operating efficiency and power density, and has a more broad application prospect. At the same time, no additional switching devices are needed between the single-phase non-isolated double-buck inverter circuit of each stage and the corresponding photovoltaic direct-current power supply. The input end of the first single-phase non-isolated double-buck inverter circuit 30 is directly connected to the first photovoltaic direct-current power supply 10, and the input end of the second single-phase non-isolated double-buck inverter circuit 40 is directly connected to the second photovoltaic direct-current power supply 20, further reducing the circuit volume and circuit cost of the photovoltaic inverter system. Further, in order to solve the problem of easy generation of high-frequency common-mode current introduced in the non-isolated inverter structure, a voltage vector modulation strategy without dead zone vector is adopted, which realizes high-quality waveform output of the cascaded inverter and guarantees low leakage current characteristics and high direct-current voltage utilization rate of the system.

[0037] It can be understood that the specific number of the first photovoltaic direct-current power supply 10, the second photovoltaic direct-current power supply 20, the first single-phase non-isolated double-buck inverter circuit 30 and the second single-phase non-isolated double-buck inverter circuit 40 is not unique, and can be set differently according to actual scenarios. For example, in a more detailed embodiment, the number of the first photovoltaic direct-current power supply 10 and the first single-phase non-isolated double-buck inverter circuit 30 is the same and is two or more, and / or the number of the second photovoltaic direct-current power supply 20 and the second single-phase non-isolated double-buck inverter circuit 40 is the same and is two or more. In order to facilitate understanding of the technical solutions of the present application, the first photovoltaic direct-current power supply 10, the second photovoltaic direct-current power supply 20, the first single-phase non-isolated double-buck inverter circuit 30 and the second single-phase non-isolated double-buck inverter circuit 40 are all one in the following embodiments, and a two-stage photovoltaic inverter system is taken as an example for explanation and description.

[0038] The above photovoltaic inverter system uses an independent photovoltaic DC power supply as the input of the photovoltaic inverter system, and the first single-phase non-isolated double-buck inverter circuit 30 and the second single-phase non-isolated double-buck inverter circuit 40 are respectively connected with a photovoltaic DC power supply, forming a non-isolated photovoltaic inverter system. No additional switching device needs to be connected between the input end of the single-phase non-isolated double-buck inverter circuit and the photovoltaic DC power supply. The controller 60 combines the voltage vector modulation strategy without dead zone vector, so that the photovoltaic inverter system can maintain a low leakage current operating state and effectively suppress the generation of common-mode current. The photovoltaic inverter system obtained by the above scheme not only has the advantages of small weight and volume, high power density and efficiency, and low cost of the non-isolated inverter system, but also can effectively suppress the generation of common-mode current, ensure the quality of output power and reduce the generation of electromagnetic interference, and has strong working reliability.

[0039] Please refer to Figure 2 In one embodiment, the photovoltaic inverter system further comprises a first capacitor C1 and a second capacitor C2, a first end of the first capacitor C1 is connected to the first input end of the first single-phase non-isolated double-buck inverter circuit 30 and the first photovoltaic DC power supply 10, a second end of the first capacitor C1 is connected to the second input end of the first single-phase non-isolated double-buck inverter circuit 30 and the first photovoltaic DC power supply 10, a first end of the second capacitor C2 is connected to the first input end of the second single-phase non-isolated double-buck inverter circuit 40 and the second photovoltaic DC power supply 20, and a second end of the second capacitor C2 is connected to the second input end of the second single-phase non-isolated double-buck inverter circuit 40 and the second photovoltaic DC power supply 20.

[0040] Specifically, although no switching device is connected between the first single-phase non-isolated double-buck inverter circuit 30 and the first photovoltaic DC power supply 10, and no switching device is connected between the second single-phase non-isolated double-buck inverter circuit and the second photovoltaic DC power supply 20. However, in order to ensure the stability of the power transmitted from the photovoltaic DC power supply to the inverter circuit and ensure the stable and reliable operation of the photovoltaic inverter system, a first capacitor C1 is arranged between the input end of the first single-phase non-isolated double-buck inverter circuit 30 and the first photovoltaic DC power supply 10 to filter out the interference components of the DC power output from the first photovoltaic DC power supply 10 to the first single-phase non-isolated double-buck inverter circuit 30. A second capacitor C2 is arranged between the input end of the second single-phase non-isolated double-buck inverter circuit 40 and the second photovoltaic DC power supply 20 to filter out the interference components of the DC power output from the second photovoltaic DC power supply 20 to the second single-phase non-isolated double-buck inverter circuit 40.

[0041] The specific structure of the grid-connected circuit 50 is not unique. In a more detailed embodiment, please refer to Figure 2 The grid-connected circuit 50 includes a first filter capacitor C fa and a second filter capacitor C fb, the first end of the first filter capacitor C fa connects the first output end of the first single-phase non-isolated double-buck inverter circuit 30 and the external AC load, the second end of the first filter capacitor C fa connects the first end of the second filter capacitor C fb , and the common end connects the second output end of the first single-phase non-isolated double-buck inverter circuit 30 and the first output end of the second single-phase non-isolated double-buck inverter circuit 40, the second end of the second filter capacitor C fb connects the second output end of the second single-phase non-isolated double-buck inverter circuit 40 and the external AC load, and the second end of the second filter capacitor C fb is grounded.

[0042] Specifically, in the grid-connected circuit 50, the second end of the first filter capacitor C fa is commonly connected to the second output end of the first single-phase non-isolated double-buck inverter circuit 30 and the first output end of the second single-phase non-isolated double-buck inverter circuit 40 together with the first end of the second filter capacitor C fb . That is, the connection of points M and M' as shown in Figure 2 is realized, thereby realizing independent filtering of the first single-phase non-isolated double-buck inverter circuit 30 and the second single-phase non-isolated double-buck inverter circuit 40.

[0043] In the scheme of this embodiment, the grid-connected circuit 50 omits the AC side filter inductance in the general grid-connected circuit 50, and in the operation process, the filter inductance in the grid-connected circuit 50 directly matches the bridge arm inductance in the first single-phase non-isolated double-buck inverter circuit 30 or the second single-phase non-isolated double-buck inverter circuit 40 to perform filtering, which can effectively reduce the system volume and cost while effectively improving the power density of the photovoltaic inverter system.

[0044] Similarly, the specific structures of the first single-phase non-isolated double-buck inverter circuit 30 and the second single-phase non-isolated double-buck inverter circuit 40 are not unique, please refer to Figure 2 for details. In a more detailed embodiment, the first single-phase non-isolated double-buck inverter circuit 30 includes a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a first switching device S1, a second switching device S2, a third switching device S3, a fourth switching device S4, a first bridge arm inductance L a1 and a second bridge arm inductance L a2 ; the control ends of the first switching device S1, the second switching device S2, the third switching device S3, and the fourth switching device S4 are respectively connected to the controller 60, the first end of the first switching device S1 serves as the first input end of the first single-phase non-isolated double-buck inverter circuit 30, and the second end of the first switching device S1 is connected to the first bridge arm inductance L a1the first end of the first bridge arm inductor L a1 the second end of the first bridge arm inductor L a1 the first end of the third bridge arm inductor L a2 the first end of the second bridge arm inductor L a2 the second end of the second bridge arm inductor L a2 the second end of the second bridge arm inductor L

[0045] Please refer to Figure 2 In a more preferred embodiment, the second single-phase non-isolated dual buck inverter circuit 40 comprises a fifth diode D5, a sixth diode D6, a seventh diode D7, an eighth diode D8, a fifth switch device S5, a sixth switch device S6, a seventh switch device S7, an eighth switch device S8, a third bridge arm inductor L b1 and a fourth bridge arm inductor L b2 The control terminals of the fifth switch device S5, the sixth switch device S6, the seventh switch device S7 and the eighth switch device S8 are respectively connected to the controller 60. The first end of the fifth switch device S5 is the first input terminal of the second single-phase non-isolated dual buck inverter circuit 40. The second end of the fifth switch device S5 is connected to the first end of the third bridge arm inductor L b1 the first end of the third bridge arm inductor L b1 the second end of the third bridge arm inductor L b1 the first end of the fourth bridge arm inductor L b2 the first end of the fourth bridge arm inductor L b2the second end of the second single-phase non-isolated double-buck inverter circuit 40 as a second output end, the anode of the seventh diode D7 connected to the first end of the sixth switch device S6 and the first end of the eighth switch device S8, the second end of the eighth switch device S8 connected to the cathode of the eighth diode D8, and the anode of the eighth diode D8 connected to the fourth bridge arm inductor L b2 the second end of the second single-phase non-isolated double-buck inverter circuit 40 as a second output end, the anode of the seventh diode D7 connected to the first end of the sixth switch device S6 and the first end of the eighth switch device S8, the second end of the eighth switch device S8 connected to the cathode of the eighth diode D8, and the anode of the eighth diode D8 connected to the fourth bridge arm inductor L

[0046] Specifically, the embodiment provides a photovoltaic system composed of a two-stage single-phase double-buck inverter circuit, and the grid-connected circuit 50 is specifically exemplified by the above-mentioned embodiment, wherein the first switch device S1 to the eighth switch device S8 are all power switch devices, the first photovoltaic DC power supply 10 and the first single-phase non-isolated double-buck inverter circuit 30 constitute an upper unit of the inverter, and the second photovoltaic DC power supply 20 and the second single-phase non-isolated double-buck inverter circuit 40 constitute a lower unit of the inverter. In the upper unit, the first bridge arm inductor L a1 and the first filter capacitor C fa constitute LC filtering of a positive half cycle, the second bridge arm inductor L a2 and the second filter capacitor C fb constitute LC filtering of a negative half cycle. Each switch device comprises a power switch device and a freewheeling diode, the cathode and the anode of the freewheeling diode connected to the first end and the second end of the power switch device respectively, and the first end and the second end of the power switch device serving as the first end and the second end of the switch device respectively. The first diode D1 to the eighth diode D8 are all independent high-performance diodes, which are used for freewheeling in the freewheeling stage and do not pass through the freewheeling diode in the switch device with poor performance, so as to reduce reverse recovery loss and improve working reliability of the inverter system.

[0047] Figure 2 In the photovoltaic inverter system shown in the figure, C ga1 and C ga2 are parasitic capacitances of the DC side of the upper unit to ground, and C gb1 and C gb2 are parasitic capacitances of the DC side of the lower unit to ground. Further analysis of the leakage current characteristics of the novel cascaded photovoltaic inverter system (NCPI) provided in the application establishes a corresponding common-mode equivalent model. First, the common-mode voltage (CMV) and the difference-mode voltage (DMV) are defined as follows:

[0048]

[0049] In the photovoltaic inverter system, the bridge arm voltages u AN , u BN , u A´N´ and u B´N´The CMV and DMV can be expressed as:

[0050]

[0051] Generally, the first filter capacitor C fa in the grid-connected circuit 50 has the same capacitance value as the second filter capacitor C fb , i.e. C fa = C fb . Since the filter capacitors have a voltage dividing effect, the input external AC load AC voltage can be equivalent to two identical sinusoidal AC voltage sources u g / 2. The common-mode equivalent model of the system is shown in Figure 3 .

[0052] wherein Z cga = 1 / s(C ga1 +C ga2 ); Z cgb = 1 / s(C gb1 + C gb2 ); Z Lni = sL ni (n = a, b; i = 1, 2). According to the common-mode equivalent model, the Kirchhoff law can be obtained as follows:

[0053]

[0054] wherein u ga and u gb are the upper and lower unit DC side parasitic capacitance voltages, respectively. Further solving can obtain the parasitic capacitance voltage as:

[0055]

[0056] It can be seen that the system parasitic capacitance voltage is affected by the topology parameters, CMV and DMV. The topology parameters change with different filter modes. Therefore, the influence of different filter modes on the system parasitic capacitance voltage is discussed in the following. When the LCL type symmetrical inductor filter is adopted, it is assumed that L ni = L and Z Lni = Z L . From the above formula, u NG and u N´G under this condition can be obtained as:

[0057]

[0058] wherein u ga and u gb have no differential-mode voltage component and only contain low-frequency grid voltage and CMV component. The upper and lower unit leakage currents i cma and i cmb have no differential-mode current component and only contain low-frequency grid current and DMV component. The upper and lower unit leakage currents i gx(x = a, b) and the parasitic capacitance voltage rate of change is proportional to: i cma = C ga ·du ga / dt; i cmb = C gb ·du gb / dt. The grid voltage component has little effect on the system leakage current, so when using symmetric inductive filtering, keeping the CMV constant can effectively suppress the system leakage current. However, due to various factors, the inductance value cannot meet the requirement of complete matching, so the DMV cannot be completely eliminated, and high-frequency leakage current is still generated.

[0059] Therefore, the NCPI provided in the present application adopts LC type asymmetric inductive filtering, assuming that L ni = L; Z Lni = Z L . When working in the positive half cycle, Figure 3 Z La2 , Z Lb2 can be regarded as 0; in the negative half cycle, Z La1 , Z Lb1 are 0. According to the above formula, the system parasitic capacitance voltage is:

[0060]

[0061] In the formula, u NG+ , u N´G+ are the system parasitic capacitance voltages when the NCPI works in the positive half cycle, u NG- , u N´G- are the negative half cycle parasitic capacitance voltages. As can be seen, when using LC type asymmetric inductive filtering, the parasitic capacitance voltage is independent of the CMV and DMV, and is not subject to the matching condition of the inductance value. Ignoring the effect of the low-frequency grid voltage, respectively ensuring that the positive half cycle bridge arm voltages u BN , u B´N´ , and the negative half cycle u AN , u A´N´ are constant can suppress the system leakage current. Therefore, in the technical solution of the present application, the voltage vector modulation strategy without dead zone vector is used to respectively ensure that the positive half cycle bridge arm voltages u BN , u B´N´ , and the negative half cycle u AN , u A´N´ are constant, and then the photovoltaic inverter system maintains low leakage current operation, thereby suppressing the leakage current.

[0062] The present application also provides a running control method of the photovoltaic inverter system as described above, please refer to Figure 4 , which comprises steps S200, S300 and S400.

[0063] Step S200, according to the expected voltage output value of the photovoltaic inverter system and the preset voltage vector model, the first single-phase non-isolated double-buck inverter circuit 30 and the second single-phase non-isolated double-buck inverter circuit 40 are obtained respectively; Step S300, according to the sampling period and the preset vector action time model, the vector time of each voltage vector is obtained respectively; Step S400, according to the voltage vector and the vector action time, the first single-phase non-isolated double-buck inverter circuit 30 and the second single-phase non-isolated double-buck inverter circuit 40 are controlled to operate.

[0064] Specifically, the voltage vector is the space voltage vector (SVPWM), which uses the voltage average value equivalent principle. In each cycle, according to the sector where the given voltage vector is located, the length of the action time of the two effective voltage vectors in the sector is controlled to synthesize the given voltage vector, and the remaining time is processed by the zero voltage vector. The voltage vector modulation method of the controller 60 for each unit in the photovoltaic inverter system is consistent, and the controller 60 uses the same voltage vector modulation method without dead zone, and controls the on-off of the switching device in each unit reasonably, so that the photovoltaic inverter system can maintain low leakage current operation. The number of units in the photovoltaic inverter system is not unique, and is not limited to the upper and lower two units in the above embodiment. More extensions can be made according to actual use scenarios.

[0065] The modulation algorithm of the voltage vector NCPI of each unit includes three steps of interval judgment, vector action time calculation and vector action sequence distribution. First, the controller 60 matches and analyzes the expected voltage output value of the photovoltaic inverter system (specifically, the expected voltage output value of each unit, which can be the same or not completely the same) and the preset voltage vector model to obtain the required voltage vector of each unit in the current state, that is, to realize the interval judgment operation. Then, the sampling period of the photovoltaic inverter system and the preset vector action time model are combined to obtain the required action duration of each vector, and the vector action time calculation is completed. Finally, in each unit, the required voltage vector and the corresponding action time are combined to output SVPWM to control the on-off of the switching device of each unit, and the corresponding circuit function is realized.

[0066] It can be understood that, in an embodiment, in order to reduce the harmonic content and switching loss of the system, a three-section vector action sequence can be used, in which the zero vector is used as the starting vector and the terminal vector, and the non-zero vector is used as the intermediate vector, which can ensure that each basic vector conversion only has one switching tube action, and the switching frequency is low.

[0067] Please refer to Figure 5 In an embodiment, step S200 includes step S210 and step S220.

[0068] Step S210, obtaining the first dynamic modulation ratio and the second dynamic modulation ratio according to the expected voltage output value of the first single-phase non-isolated dual-buck inverter circuit 30, the expected voltage output value of the second single-phase non-isolated dual-buck inverter circuit 40, and the output level of the photovoltaic inverter system; step S220, obtaining the first voltage vector required for the first single-phase non-isolated dual-buck inverter circuit 30 to operate according to the first dynamic modulation ratio and a preset voltage vector model, and obtaining the second voltage vector required for the second single-phase non-isolated dual-buck inverter circuit 40 to operate according to the second dynamic modulation ratio and the preset voltage vector model.

[0069] Specifically, in the scheme of the embodiment, the photovoltaic inverter system only includes the upper and lower two inverter units, that is, only includes the first single-phase non-isolated dual-buck inverter circuit 30 and the second single-phase non-isolated dual-buck inverter circuit 40, and the voltage vector includes the first voltage vector and the second voltage vector. Further, taking the above unit as an example, the voltage vector of the upper unit is shown in the following table:

[0070]

[0071] Accordingly, the voltage vector distribution diagram of the upper unit is shown in Figure 6 The upper unit only contains 2 linear synthesis intervals, and only V1 and V2 are synthesized in the positive half cycle, and only V3 and V4 are synthesized in the negative half cycle. Therefore, the basic vector is unique in the positive and negative half cycles, and there is no need to select the complex action vector, which can greatly simplify the vector control algorithm.

[0072] In this embodiment, the interval is distinguished according to the dynamic modulation ratio m of the system, and the dynamic modulation ratio is defined as:

[0073]

[0074] Wherein, U ref is the expected output voltage of the inverter upper unit, n is the number of cascaded inverters (specifically two in a more detailed embodiment, including the first single-phase non-isolated dual-buck inverter circuit 30 and the second single-phase non-isolated dual-buck inverter circuit 40), and the value range of m is [-1, 1]. When m>0, the system works in the positive half cycle, and the target vector V ref falls in the II interval; when m<0, the system works in the negative half cycle, and V ref falls in the I interval. Whether the target vector falls in the I interval or the II interval, V ref is synthesized by a non-zero vector and a zero vector. According to the volt-second balance principle, it can be obtained that:

[0075]

[0076] The voltage vector corresponding to the lower unit can be further obtained by using the similar method.

[0077] The voltage vector action time is analyzed. Since V2 and V3 are zero vectors, the action time T n The following can be further calculated:

[0078]

[0079] The zero vector action time T o can be expressed as:

[0080]

[0081] where T s is the sampling period. In order to reduce the harmonic content and switching loss of the system, a three-stage vector action sequence is used in this paper. In a sampling period T s , the zero vector is used as the starting vector and the ending vector, and the non-zero vector is used as the intermediate vector, which can ensure that only one switch tube is in action during the basic vector conversion, and the switching frequency is low. When the dynamic modulation ratio m>0, the system vector action sequence is: V2→V1→V2; when m<0, the vector action sequence is: V3→V4→V3.

[0082] It should be pointed out that in one embodiment, the voltage vector action time of the second single-phase non-isolated dual-buck inverter circuit 40 is staggered by one fourth of the sampling period from the voltage vector action time of the first single-phase non-isolated dual-buck inverter circuit 30.

[0083] Specifically, in the embodiment, the voltage vector modulation is performed based on the rule for sampling time staggered (RSTS). For specific sampling rules, please refer to Figure 7 , V m is the modulation wave, V c1+ and V c2+ are the triangular carriers in the positive half cycle, and V c1- and V c2- are the triangular carriers in the negative half cycle. The sampling times of the upper unit and the lower unit are staggered by T s / 4 (T s is the sampling period), and the control rules of each unit are completely the same. If the regular sampling method is used, the sampling time of the upper unit is t 11 and t 12 , and the sampling time of the lower unit is t 21 and t 22Compared with the traditional one-dimensional space vector, with the increase of the number of cascaded units, each unit implements individual modulation and fixed algorithm according to the principle of staggered sampling, and has the advantages of simple algorithm and strong expansibility. Since the bridge arm inductance has the function of instantaneous large current suppression, it is not necessary to insert a dead zone vector to avoid the occurrence of bridge arm shoot-through, which can further improve the power quality and reliability of the system. The SVPWM switching states of the two units in the NCPI arbitrary switching period are shown in Figure 8 . s The upper and lower units are staggered by T s / 4, and the modulation mode is completely the same.

[0084] Further, in one embodiment, referring to Figure 9 , before step S200, the method further comprises step S100.

[0085] In step S100, the basic voltage vectors are determined and stored according to the on-off states of the first switching device S1, the second switching device S2, the third switching device S3 and the fourth switching device S4 in the first single-phase non-isolated double-buck inverter circuit 30, and the on-off states of the fifth switching device S5, the sixth switching device S6, the seventh switching device S7 and the eighth switching device S8 in the second single-phase non-isolated double-buck inverter circuit 40, to obtain a preset voltage vector model.

[0086] Specifically, as shown in Figure 2 , the NCPI is composed of A, B, A', and B' four buck bridge arms. Taking the A bridge arm as an example, only the first switching device S1 is turned on to define as state P, only the second switching device S2 is turned on to define as state N, and the first switching device S1 and the second switching device S2 are both turned off to define as state O. The system has 15 basic voltage vectors, and the following table lists the basic vectors of the output 2U dc , U dc , 0, -U dc , -2U dc five-level basic vectors and the bridge arm voltage under different switching states. It should be noted that, due to the unidirectional conduction characteristic of the diode, 0 + and 0 - in the table are two basic zero vector families that only work in the positive half cycle and the negative half cycle respectively.

[0087]

[0088] The selection of the basic vectors should follow the following three points: ① meet the leakage current suppression condition when the system adopts LC filtering; ② avoid jumping from P state to N state in the same bridge arm; ③ the voltage difference between the two inverter units should not be too large. As can be seen from the analysis of Table 1, the basic vectors containing PP state and [PNNP], [NPPN] in each inverter unit should be discarded. The following table lists the remaining 8 effective voltage vectors after screening:

[0089]

[0090] As shown in the table above, the selected basic vector can maintain the positive half-cycle bridge arm voltage u. BN u B´N´ The voltage u of the bridge arm is always 0 during the negative half-cycle. AN u A´N´ The value is always 0. NCPI only contains low-frequency grid voltage components, satisfying the system leakage current suppression condition. The traditional one-dimensional voltage space vector algorithm divides the vector plane into four linear intervals, selects adjacent vectors based on the region where the target vector falls, and synthesizes them to finally construct a preset voltage vector model. The combination of each vector switching state is as follows: Figure 10 As shown, from Figure 10 As can be seen from this, the NCPI output level is U dc -U dc There are two different states, and the system has redundant vectors. As the number of cascaded inverters increases, the redundant vectors also increase, which complicates the selection of vectors and the calculation of their effective time.

[0091] Furthermore, in one embodiment, the NCPI was tested using a MATLAB / Simulink simulation platform. The DC input voltage U of each unit... d The voltage is 150V, the cascaded equivalent DC input voltage is 300V, and the AC side voltage is u. g 220V / 50Hz, parasitic capacitance C ga =C gb =150nF. Figure 11 The output voltage waveform of the NCPI bridge arm shows that it has five levels: 300V, 150V, 0, −150V, and −300V. Figure 12 AC output voltage u g and grid-connected current waveform i g The voltage and current remain in phase.

[0092] Figure 13 The upper unit bridge arm voltage u AN u BN The simulated waveform. During the positive half-cycle, u AN The voltage fluctuates frequently between 0V and 150V. BN It is always 0; during the negative half-cycle, u AN u is always 0 BN It varies at high frequency between 0V and 150V. Figure 14 The lower unit bridge arm voltage u A´N u B´N The simulated waveform. During the positive half-cycle, u A´N The voltage fluctuates frequently between 0V and 150V.B´N It is always 0; during the negative half-cycle, u A´N u is always 0 B´N It varies at high frequency between 0V and 150V. This satisfies the system leakage current suppression condition.

[0093] Figure 15 The parasitic capacitance voltage u of the upper unit ga The leakage current i flowing through the parasitic capacitance cma Simulated waveform. (From...) Figure 15 It can be seen that during the positive half-cycle operation, the parasitic capacitance voltage of the upper unit is approximately 110V (0.5u). g During the negative half-cycle operation, the parasitic capacitance voltage is approximately 220V (u). g ). Figure 16 The parasitic capacitance voltage u of the lower unit gb The leakage current i flowing through the parasitic capacitance cmb Simulated waveform. (From...) Figure 16 It can be seen that during the positive half-cycle, the parasitic capacitance voltage of the lower unit is approximately 0V; during the negative half-cycle, the parasitic capacitance voltage is approximately 110V (0.5u). g The simulation results are consistent with the theoretical analysis. Figure 15 as well as Figure 16 The leakage current amplitude of both units is less than 10mA, meeting the European VDE 0126-1-1 standard requirement of a maximum effective value of 30mA for leakage current. Therefore, the topology and modulation strategy proposed in this paper suppress leakage current present in non-isolated systems while achieving five-level output.

[0094] The above-described photovoltaic inverter system operation control method uses an independent photovoltaic DC power supply as the input to the photovoltaic inverter system. The first single-phase non-isolated dual buck inverter circuit 30 and the second single-phase non-isolated dual buck inverter circuit 40 are respectively connected to a photovoltaic DC power supply, forming a non-isolated photovoltaic inverter system. No additional switching devices are required between the input terminals of the single-phase non-isolated dual buck inverter circuits and the photovoltaic DC power supply. The controller 60, combined with a voltage vector modulation strategy that eliminates dead-time vectors, can maintain the photovoltaic inverter system in a low leakage current operating state, effectively suppressing the generation of common-mode current. The photovoltaic inverter system obtained through this scheme not only possesses the advantages of non-isolated inverter systems—small weight and size, high power density and efficiency, and low cost—but also effectively suppresses the generation of common-mode current, ensures the quality of output power, and reduces electromagnetic interference, exhibiting strong operational reliability.

[0095] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0096] The above-described embodiments are merely illustrative of several embodiments of the present application, which are described in more detail and in a specific manner, but should not be construed as limiting the scope of the patent application. It should be noted that for those of ordinary skill in the art, several modifications and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A photovoltaic inverter system, characterized by, include: First photovoltaic DC power supply; Second photovoltaic DC power supply; The first single-phase non-isolated dual buck inverter circuit has its first input terminal and second input terminal connected to the first photovoltaic DC power supply, and its first output terminal and second output terminal connected to the grid-connected circuit. The second single-phase non-isolated dual buck inverter circuit has its first input terminal and second input terminal connected to the second photovoltaic DC power supply, respectively. The first output terminal of the second single-phase non-isolated dual buck inverter circuit is connected to the second output terminal of the first single-phase non-isolated dual buck inverter circuit and the grid-connected circuit. The second output terminal of the second single-phase non-isolated dual buck inverter circuit is connected to the grid-connected circuit. The controller is connected to the control terminals of the first single-phase non-isolated dual buck inverter circuit and the second single-phase non-isolated dual buck inverter circuit respectively. The controller is used to control the operation of the first single-phase non-isolated dual buck inverter circuit and the second single-phase non-isolated dual buck inverter circuit through a voltage vector modulation method without dead zone vector, so as to maintain the photovoltaic inverter system in low leakage current operation. A grid-connected circuit is used to connect to an external AC load and provide AC power to the external AC load. The method of controlling the operation of the first single-phase non-isolated dual buck inverter circuit and the second single-phase non-isolated dual buck inverter circuit using a voltage vector modulation method without dead-time vectors includes: determining and storing a basic voltage vector based on the on / off states of the first, second, third, and fourth switching devices in the first single-phase non-isolated dual buck inverter circuit, and the on / off states of the fifth, sixth, seventh, and eighth switching devices in the second single-phase non-isolated dual buck inverter circuit, to obtain a preset voltage vector model; obtaining the voltage vectors required for the operation of the first and second single-phase non-isolated dual buck inverter circuits based on the desired voltage output value of the photovoltaic inverter system and the preset voltage vector model; obtaining the vector time used for each voltage vector based on the sampling period and the preset vector action time model; and controlling the operation of the first and second single-phase non-isolated dual buck inverter circuits based on the voltage vectors and the vector action time. The step of obtaining the voltage vectors required for the operation of the first single-phase non-isolated dual buck inverter circuit and the second single-phase non-isolated dual buck inverter circuit based on the expected voltage output value of the photovoltaic inverter system and a preset voltage vector model includes: obtaining a first dynamic modulation ratio and a second dynamic modulation ratio based on the expected voltage output value of the first single-phase non-isolated dual buck inverter circuit, the expected voltage output value of the second single-phase non-isolated dual buck inverter circuit, and the output level of the photovoltaic inverter system; obtaining the first voltage vector required for the operation of the first single-phase non-isolated dual buck inverter circuit based on the first dynamic modulation ratio and the preset voltage vector model; and obtaining the second voltage vector required for the operation of the second single-phase non-isolated dual buck inverter circuit based on the second dynamic modulation ratio and the preset voltage vector model.

2. The photovoltaic inverter system of claim 1, wherein, It also includes a first capacitor and a second capacitor. The first terminal of the first capacitor is connected to the first input terminal of the first single-phase non-isolated dual buck inverter circuit and the first photovoltaic DC power supply. The second terminal of the first capacitor is connected to the second input terminal of the first single-phase non-isolated dual buck inverter circuit and the first photovoltaic DC power supply. The first terminal of the second capacitor is connected to the first input terminal of the second single-phase non-isolated dual buck inverter circuit and the second photovoltaic DC power supply. The second terminal of the second capacitor is connected to the second input terminal of the second single-phase non-isolated dual buck inverter circuit and the second photovoltaic DC power supply.

3. The photovoltaic inverter system of claim 1, wherein, The grid-connected circuit includes a first filter capacitor and a second filter capacitor. The first end of the first filter capacitor is connected to the first output terminal of the first single-phase non-isolated dual buck inverter circuit and an external AC load. The second end of the first filter capacitor is connected to the first end of the second filter capacitor, and the common terminal is connected to the second output terminal of the first single-phase non-isolated dual buck inverter circuit and the first output terminal of the second single-phase non-isolated dual buck inverter circuit. The second end of the second filter capacitor is connected to the second output terminal of the second single-phase non-isolated dual buck inverter circuit and an external AC load. The second end of the second filter capacitor is grounded.

4. The photovoltaic inverter system according to any one of claims 1-3, characterized in that, The first single-phase non-isolated dual buck inverter circuit includes a first diode, a second diode, a third diode, a fourth diode, a first switching device, a second switching device, a third switching device, a fourth switching device, a first bridge arm inductor, and a second bridge arm inductor. The control terminals of the first, second, third, and fourth switching devices are respectively connected to the controller. The first terminal of the first switching device serves as the first input terminal of the first single-phase non-isolated dual buck inverter circuit. The second terminal of the first switching device is connected to the first terminal of the first bridge arm inductor and the cathode of the first diode. The anode of the first diode serves as the second input terminal of the first single-phase non-isolated dual buck inverter circuit. The second terminal of the first bridge arm inductor serves as the first output terminal of the first single-phase non-isolated dual buck inverter circuit. The first terminal of the second switching device is connected to the anode of the first diode. The second terminal of the second switching device is connected to the cathode of the second diode. The anode of the second diode is connected to the second terminal of the first bridge arm inductor. The first terminal of the third switching device is connected to the first terminal of the first switching device. The second terminal of the third switching device is connected to the first terminal of the second bridge arm inductor and the cathode of the third diode. The second terminal of the second bridge arm inductor serves as the second output terminal of the first single-phase non-isolated dual buck inverter circuit. The anode of the third diode is connected to the first terminal of the second switching device and the first terminal of the fourth switching device. The second terminal of the fourth switching device is connected to the cathode of the fourth diode. The anode of the fourth diode is connected to the second terminal of the second bridge arm inductor.

5. The photovoltaic inverter system according to claim 4, characterized in that, The second single-phase non-isolated dual buck inverter circuit includes a fifth diode, a sixth diode, a seventh diode, an eighth diode, a fifth switching device, a sixth switching device, a seventh switching device, an eighth switching device, a third bridge arm inductor, and a fourth bridge arm inductor. The control terminals of the fifth, sixth, seventh, and eighth switching devices are respectively connected to the controller. The first terminal of the fifth switching device serves as the first input terminal of the second single-phase non-isolated dual buck inverter circuit. The second terminal of the fifth switching device is connected to the first terminal of the third bridge arm inductor and the cathode of the fifth diode. The anode of the fifth diode serves as the second input terminal of the second single-phase non-isolated dual buck inverter circuit. The second terminal of the third bridge arm inductor serves as the first output terminal of the second single-phase non-isolated dual buck inverter circuit. The first terminal of the sixth switching device is connected to the anode of the fifth diode. The second terminal is connected to the cathode of the sixth diode, the anode of the sixth diode is connected to the second terminal of the third bridge arm inductor, the first terminal of the seventh switching device is connected to the first terminal of the fifth switching device, the second terminal of the seventh switching device is connected to the first terminal of the fourth bridge arm inductor and the cathode of the seventh diode, the second terminal of the fourth bridge arm inductor serves as the second output terminal of the second single-phase non-isolated dual buck inverter circuit, the anode of the seventh diode is connected to the first terminal of the sixth switching device and the first terminal of the eighth switching device, the second terminal of the eighth switching device is connected to the cathode of the eighth diode, and the anode of the eighth diode is connected to the second terminal of the fourth bridge arm inductor.

6. The photovoltaic inverter system according to claim 1, characterized in that, The number of the first photovoltaic DC power supply and the first single-phase non-isolated dual buck inverter circuit are the same and there are two or more of each, and / or the number of the second photovoltaic DC power supply and the second single-phase non-isolated dual buck inverter circuit are the same and there are two or more of each.

7. The photovoltaic inverter system according to claim 1, characterized in that, The voltage vector action time of the second single-phase non-isolated dual buck inverter circuit is one-quarter of the sampling period of the voltage vector action time interval of the first single-phase non-isolated dual buck inverter circuit.

Citation Information

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