A method for testing offset and gain errors of analog-to-digital converters

Abstract

The present invention discloses a method for testing the offset and gain error of an analog-to-digital converter, comprising: collecting a voltage signal emitted by a signal generator, respectively generating a first external voltage value when the acquisition result of the analog-to-digital converter under test jumps from 0 to 1, and a second external voltage value when the acquisition result of the analog-to-digital converter under test jumps from N‑1 to N; N is the maximum value of the conversion result of the analog-to-digital converter under test. According to the first external voltage value, and the resolution and reference voltage of the analog-to-digital converter under test, the offset error of the analog-to-digital converter under test is calculated. According to the first external voltage value and the second external voltage value, and the resolution and reference voltage of the analog-to-digital converter under test, the gain error of the analog-to-digital converter under test is calculated. The existing test data can be processed without changing the original analog-to-digital converter test system, reducing the test cost, and accurately testing the offset error and gain error of the analog-to-digital converter.

Description

Technical Field

[0001] The invention relates to the technical field of analog-to-digital converter testing, and in particular to a method for testing offset and gain errors of an analog-to-digital converter. Background Art

[0002] Mixed signal circuits are an important bridge between the analog domain and the digital domain. ADC (analog-to-digital converter) and DAC (digital-to-analog converter) are the most typical representatives in the mixed signal field. At present, the accurate and efficient test and evaluation of high-precision ADCs has become a bottleneck for the reliability application of chips and corresponding mixed signal systems. The proportion of ADC test costs in chip manufacturing costs has even exceeded the total cost of ADC design and process. Therefore, how to achieve fast and accurate testing of ADCs, especially high-precision ADCs, while reducing the required test costs as much as possible has become a hot topic of research at home and abroad.

[0003] ADC is a type of device used to convert continuous signals in analog form into discrete signals in digital form. Offset and gain errors are two test parameters of ADC. The smaller the absolute values ​​of these two parameters, the better the performance of the ADC. Conventional methods for testing the offset error and gain error of ADC (English: Analog-to-digital converter) are accidental and have large errors. Due to the small swing of the ADC conversion result, conventional data processing is accidental and has large errors, and the true performance of the ADC cannot be tested.

[0004] Patent (CN103475369B), Patent (CN11286792A) and Patent (CN113655306A) all require rebuilding a complex test system to make the test result of the analog-to-digital converter more accurate, which will change the original test system and increase the test cost.

[0005] Therefore, based on the existing analog-to-digital converter test system, how to reduce the test cost required for the analog-to-digital converter and accurately test its offset and gain errors has become an urgent problem that technical personnel in this field need to solve. Summary of the invention

[0006] In view of the above problems, the present invention proposes a method for testing the offset and gain errors of an analog-to-digital converter which at least solves some of the above technical problems. The method can effectively reduce the testing cost required for the analog-to-digital converter and reliably and relatively accurately test the offset and gain errors of the analog-to-digital converter.

[0007] An embodiment of the present invention provides a method for testing an analog-to-digital converter offset and gain error, comprising the following steps:

[0008] S1, collecting the voltage signal emitted by the signal generator, respectively generating a first external voltage value when the acquisition result of the measured analog-to-digital converter jumps from 0 to 1, and a second external voltage value when the acquisition result of the measured analog-to-digital converter jumps from N-1 to N; N is the maximum value of the conversion result of the measured analog-to-digital converter;

[0009] S2. Calculating an offset error of the analog-to-digital converter under test according to the first external voltage value, and a resolution and a reference voltage of the analog-to-digital converter under test;

[0010] S3. Calculate the gain error of the measured analog-to-digital converter according to the first external voltage value and the second external voltage value, and the resolution and reference voltage of the measured analog-to-digital converter.

[0011] Furthermore, in step S1, the voltage signal emitted by the signal generator is collected to generate a first external voltage value when the collected result of the analog-to-digital converter under test jumps from 0 to 1, including:

[0012] A first voltage signal emitted by a signal generator is collected; the first voltage signal is generated based on an external voltage emitted by the signal generator; the external voltage gradually increases from 0V in steps of a preset unit;

[0013] For each of the first voltage signals, the analog-to-digital converter under test collects a preset number of times to generate a first external voltage value sequence;

[0014] Calculating an average value of the first external voltage value sequence, and stopping collecting the first voltage signal when the average value is greater than 0.5;

[0015] The average values ​​of the two first external voltage value sequences whose absolute differences from 0.5 are the smallest are selected, and the first external voltage value is calculated and output; among the two average values, one is greater than 0.5 and the other is less than 0.5.

[0016] Furthermore, it also includes: collecting a preset number of times through the measured analog-to-digital converter, when the collection result is 0, the value is 0; when the collection result is greater than 0, the value is 1.

[0017] Further, selecting the average of two first external voltage value sequences whose absolute value of the difference from 0.5 is the smallest, and calculating and outputting the first external voltage value, comprises:

[0018] Respectively obtaining the external voltage values ​​emitted by the signal generator corresponding to the two average values ​​to generate two sets of data; each set of data includes: the external voltage value and the corresponding average value of the first external voltage value sequence;

[0019] Substitute the two sets of data into the following formula to obtain the slope parameter and the intercept parameter respectively:

[0020] Y=K*X+B

[0021] In the above formula, Y represents the external voltage value; X represents the average value of the corresponding first external voltage value sequence; K represents the slope parameter; B represents the intercept parameter;

[0022] According to the slope parameter and the intercept parameter, the value of Y when X is 0.5 is calculated, and the value of Y is the first external voltage value.

[0023] Furthermore, in step S1, the voltage signal emitted by the signal generator is collected to generate a second external voltage value when the collected result of the analog-to-digital converter under test jumps from N-1 to N, including:

[0024] A second voltage signal emitted by a signal generator is collected; the second voltage signal is generated based on an external voltage emitted by the signal generator; the external voltage gradually increases from a preset voltage value in steps of preset units;

[0025] For each of the second voltage signals, the analog-to-digital converter under test collects a preset number of times to generate a second external voltage value sequence;

[0026] Calculate the average value of the second external voltage value sequence, and stop collecting the second voltage signal when the average value is greater than N-0.5;

[0027] The average values ​​of the two second external voltage value sequences whose absolute differences from N-0.5 are the smallest are selected to calculate and output the second external voltage value; among the two average values, one is greater than N-0.5 and the other is less than N-0.5.

[0028] Furthermore, it also includes: collecting a preset number of times through the measured analog-to-digital converter, when the collection result is N-1, the value is N-1; when the collection result is greater than N-1, the value is N.

[0029] Further, selecting the average of the two second external voltage value sequences whose absolute value of the difference with N-0.5 is the smallest, and calculating and outputting the second external voltage value, comprises:

[0030] Respectively obtaining the external voltage values ​​emitted by the signal generator corresponding to the two average values ​​to generate two sets of data; each set of data includes: the external voltage value and the corresponding average value of the second external voltage value sequence;

[0031] Substitute the two sets of data into the following formula to obtain the slope parameter and the intercept parameter respectively:

[0032] Y=K*X+B

[0033] In the above formula, Y represents the external voltage value; X represents the average value of the corresponding second external voltage value sequence; K represents the slope parameter; B represents the intercept parameter;

[0034] According to the slope parameter and the intercept parameter, the value of Y when X is N-0.5 is calculated, and the value of Y is the second external voltage value.

[0035] Further, in step S2, the offset error calculation formula of the analog-to-digital converter under test is:

[0036] offset error = ZST*I / Vref-1

[0037] In the above formula, offset error represents the offset error of the measured analog-to-digital converter; ZST represents the first external voltage value; I represents 2 t , t represents the resolution of the analog-to-digital converter under test; Vref represents the reference voltage of the analog-to-digital converter under test.

[0038] Further, in step S3, the gain error calculation formula of the measured analog-to-digital converter is:

[0039] gain error=(FST-ZST)*I / Vref-(I-2)

[0040] In the above formula, gain error represents the gain error of the measured analog-to-digital converter; ZST represents the first external voltage value; FST represents the second external voltage value; I represents 2 t , t represents the resolution of the analog-to-digital converter under test; Vref represents the reference voltage of the analog-to-digital converter under test.

[0041] The beneficial effects of the above technical solution provided by the embodiment of the present invention include at least:

[0042] A method for testing the offset and gain error of an analog-to-digital converter provided by an embodiment of the present invention includes: collecting a voltage signal emitted by a signal generator, respectively generating a first external voltage value when the acquisition result of the analog-to-digital converter under test jumps from 0 to 1, and a second external voltage value when the acquisition result of the analog-to-digital converter under test jumps from N-1 to N; N is the maximum value of the conversion result of the analog-to-digital converter under test; calculating the offset error of the analog-to-digital converter under test according to the first external voltage value, and the resolution and reference voltage of the analog-to-digital converter under test; calculating the gain error of the analog-to-digital converter under test according to the first external voltage value and the second external voltage value, and the resolution and reference voltage of the analog-to-digital converter under test. The method can process the existing test data without changing the original analog-to-digital converter test system, reduce the test cost, and accurately test the offset and gain errors of the analog-to-digital converter.

[0043] Other features and advantages of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the structures particularly pointed out in the written description, claims, and drawings.

[0044] The technical solution of the present invention is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:

[0046] Figure 1 A flow chart of a method for testing offset and gain errors of an analog-to-digital converter provided in an embodiment of the present invention;

[0047] Figure 2 A schematic diagram of testing the offset and gain errors of an analog-to-digital converter under test provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0048] The exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided to enable a more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0049] The embodiment of the present invention provides a method for testing the offset and gain error of an analog-to-digital converter, referring to Figure 1 As shown, the following steps are included:

[0050] S1, collecting the voltage signal emitted by the signal generator, respectively generating a first external voltage value when the acquisition result of the measured analog-to-digital converter jumps from 0 to 1, and a second external voltage value when the acquisition result of the measured analog-to-digital converter jumps from N-1 to N; N is the maximum value of the conversion result of the measured analog-to-digital converter;

[0051] S2, calculating the offset error of the analog-to-digital converter under test according to the first external voltage value, and the resolution and reference voltage of the analog-to-digital converter under test;

[0052] S3. Calculate the gain error of the analog-to-digital converter under test according to the first external voltage value and the second external voltage value, as well as the resolution and reference voltage of the analog-to-digital converter under test.

[0053] The method for testing the offset and gain error of the analog-to-digital converter provided in this embodiment can process the existing test data without changing the original analog-to-digital converter test system, thereby reducing the test cost. It can also effectively avoid the problem that the voltage value collected at this time is not the real voltage value of the external signal generating device at this time due to the small swing of the analog-to-digital converter acquisition result, thereby causing the subsequent data processing results to be accidental and have large errors. The real performance of the analog-to-digital converter can be effectively tested, providing a reliable and relatively accurate method for testing the offset and gain errors of the analog-to-digital converter (ADC).

[0054] The following is a detailed description of the test method provided in this embodiment:

[0055] Reference Figure 2 As shown, first, the signal generator transmits a first voltage signal to the analog-to-digital converter under test, and the analog-to-digital converter under test collects the external voltage. The external voltage emitted by the signal generator is gradually increased from 0V in a preset unit (for example, 0.1mV) step, and each external voltage value V1 is collected by the analog-to-digital converter for multiple times (preset times, which can be set according to actual conditions. For example, 1000 times). When the collected result is 0, it is treated as 0 (the value is 0), and when the collected result is greater than 0, it is treated as 1 (the value is 1).

[0056] Secondly, find the average value P of the analog-to-digital converter acquisition result under each external voltage value V1. As V1 increases, P also increases a little bit. When P is greater than 0.5, stop the acquisition. According to the two values ​​of P closest to 0.5 (one is less than 0.5, and the other is greater than 0.5), calculate the external voltage value when P is exactly 0.5 (that is, the first external voltage value when the acquisition result jumps from 0 to 1). When the number of 0 and 1 in the acquisition result is almost the same (that is, the average value is 0.5), it is considered that the jump point of the analog-to-digital converter has been reached. If it is found during the acquisition process that V1 is a certain voltage, and the calculated P is exactly 0.5, then the corresponding V1 is the first external voltage value, and there is no need to calculate the first external voltage value according to the subsequent formula.

[0057] Here are some examples:

[0058] When the external voltage value V1 is 0.2mV (millivolt, 1V = 1000mV), the value collected by the digital-to-analog converter is:

[0059] Original data: 0 0 1 0 0 0 0 2 0 0

[0060] Processing result: 0 0 1 0 0 0 0 1 0 0

[0061] Average value P before treatment: (0+0+1+0+0+0+0+2+0+0) / 10=0.3 (less than 0.5)

[0062] Average value P after treatment: (0+0+1+0+0+0+0+1+0+0) / 10=0.2 (less than 0.5)

[0063] When the external voltage value V1 is 0.3mV (millivolt, 1V = 1000mV), the value collected by the digital-to-analog converter is:

[0064] Original data: 0 0 1 0 3 0 0 2 0 0

[0065] Processing result: 0 0 1 0 1 0 0 1 0 0

[0066] Average value P before treatment: (0+0+1+0+3+0+0+2+0+0) / 10=0.6 (greater than 0.5)

[0067] Average value after treatment P: (0+0+1+0+1+0+0+1+0+0) / 10=0.3 (less than 0.5)

[0068] When the external voltage value V1 is 0.4mV (millivolt, 1V = 1000mV), the value collected by the digital-to-analog converter is:

[0069] Original data: 0 1 1 0 3 0 1 2 4 1

[0070] Processing result: 0 1 1 0 1 0 1 1 1 1

[0071] Average value P before treatment: (0+1+1+0+3+0+1+2+4+1) / 10=1.3 (greater than 0.5)

[0072] Average value P after treatment: (0+1+1+0+1+0+1+1+1+1) / 10=0.7 (greater than 0.5)

[0073] By observing the three sets of data above, although the results collected by the DAC fluctuate, after processing, P will become more stable. Correspondingly, the collection results of the DAC will be more accurate. After P is stable, the offset error will be stable, and the corresponding gain error will also be more stable.

[0074] Furthermore, the first external voltage value obtained at this time is substituted into the following formula for calculation to obtain the offset error of the analog-to-digital converter under test at this time:

[0075] offset error = ZST*I / Vref-1

[0076] In the above formula, offset error represents the offset error of the measured analog-to-digital converter; ZST represents the first external voltage value (the external voltage value when the measured analog-to-digital converter acquires the external voltage and the acquisition result jumps from 0 to 1, in millivolts); I represents 2 t , t represents the resolution of the measured analog-to-digital converter; Vref represents the reference voltage of the measured analog-to-digital converter.

[0077] The following is the detailed calculation process of the offset error:

[0078] According to the above two sets of data (P is 0.3, V1 is 0.3mV), (P is 0.7, V1 is 0.4mV), the two parameters K and B in Y=K*X+B are calculated:

[0079] K (first parameter, slope) = (0.4-0.3) / (0.7-0.3) = 0.25

[0080] B (second parameter, intercept) = 0.3-K*0.3 = 0.225

[0081] Then ZST (first external voltage value) is Y=K*0.5+B=0.35mV

[0082] offset error=ZST*I / Vref-1=0.35*2 12 / 3300-1=-0.57 (assuming the resolution of the analog-to-digital converter is 12 bits and Vref is 3300mV)

[0083] Taking the above data as an example, the error after processing is reduced by 14% compared with the calculation results of the data before processing.

[0084] Furthermore, the signal generator transmits a second voltage signal to the analog-to-digital converter under test, and the analog-to-digital converter under test collects the external voltage. The external voltage emitted by the signal generator is adjusted to gradually increase from a preset voltage value (at this time, the average value of the collection result of the analog-to-digital converter is N-1) in a preset unit (for example: 0.1mV, the smaller the better) as a step, and each external voltage value V1 is collected by the analog-to-digital converter multiple times (the preset number of times can be set according to actual conditions. For example: take 1000 times). And when the collection result is N-1, it is treated as N-1 (the value is N-1), and when the collection result is greater than N-1, it is treated as N (the value is N). Here 1 means that the two values ​​of the collection result of the analog-to-digital converter differ by 1, and the collection result of the analog-to-digital converter has no unit.

[0085] Calculate the average value P of the analog-to-digital converter acquisition result under each external voltage value V1. As V1 increases, P also increases a little bit. When P is greater than N-0.5, stop acquiring. According to the two values ​​of P closest to N-0.5 (one is less than N-0.5, and the other is greater than N-0.5), calculate the external voltage value when P is exactly N-0.5 (that is, the second external voltage value when the acquisition result jumps from N-1 to N); if it is found during the acquisition process that V1 is a certain voltage, and the calculated P is exactly N-0.5, then the corresponding V1 is the second external voltage value, and there is no need to calculate the second external voltage value according to the formula. The calculation method can refer to the calculation method of the first external voltage value mentioned above, and it is the same.

[0086] Substitute the second external voltage value obtained at this time and the first external voltage value obtained previously into the following formula for calculation to obtain the gain error of the analog-to-digital converter under test at this time:

[0087] gain error=(FST-ZST)*I / Vref-(I-2)

[0088] In the above formula, gain error represents the gain error of the measured analog-to-digital converter; ZST represents the first external voltage value; FST represents the second external voltage value; I represents 2 t , t represents the resolution of the measured analog-to-digital converter; Vref represents the reference voltage of the measured analog-to-digital converter.

[0089] The method for testing the offset and gain errors of the analog-to-digital converter provided in this embodiment can significantly avoid the problem that even if the external voltage value remains unchanged, the acquisition result of the analog-to-digital converter will fluctuate within a very small range. By adjusting the conversion rate of the analog-to-digital converter (i.e., the speed at which the analog-to-digital converter converts an external voltage value into a result) to the minimum, this fluctuation range can be effectively reduced. Therefore, the offset and gain errors of the analog-to-digital converter can be tested more accurately.

[0090] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A method for testing offset and gain errors of an analog-to-digital converter, characterized in that: The steps include: S1, collecting the voltage signal emitted by the signal generator, respectively generating a first external voltage value when the acquisition result of the measured analog-to-digital converter jumps from 0 to 1, and a second external voltage value when the acquisition result of the measured analog-to-digital converter jumps from N-1 to N; N is the maximum value of the conversion result of the analog-to-digital converter under test; S2. Calculating an offset error of the analog-to-digital converter under test according to the first external voltage value, and a resolution and a reference voltage of the analog-to-digital converter under test; S3, calculating the gain error of the measured analog-to-digital converter according to the first external voltage value and the second external voltage value, and the resolution and reference voltage of the measured analog-to-digital converter; In the step S1, the voltage signal emitted by the signal generator is collected to generate a first external voltage value when the collected result of the analog-to-digital converter under test jumps from 0 to 1, including: A first voltage signal emitted by a signal generator is collected; the first voltage signal is generated based on an external voltage emitted by the signal generator; the external voltage gradually increases from 0V in steps of a preset unit; For each of the first voltage signals, the analog-to-digital converter under test collects a preset number of times to generate a first external voltage value sequence; Calculating an average value of the first external voltage value sequence, and stopping collecting the first voltage signal when the average value is greater than 0.5; Select the average values ​​of the two first external voltage value sequences whose absolute values ​​of the differences from 0.5 are the smallest, and calculate and output the first external voltage value; of the two average values, one is greater than 0.5 and the other is less than 0.5; The method further comprises: selecting an average value of two first external voltage value sequences whose absolute value of difference from 0.5 is the smallest, and calculating and outputting the first external voltage value, including: Respectively obtaining the external voltage values ​​emitted by the signal generator corresponding to the two average values ​​to generate two sets of data; each set of data includes: the external voltage value and the corresponding average value of the first external voltage value sequence; Substitute the two sets of data into the following formula to obtain the slope parameter and the intercept parameter respectively: Y=K*X+B In the above formula, Y represents the external voltage value; X represents the average value of the corresponding first external voltage value sequence; K represents the slope parameter; B represents the intercept parameter; According to the slope parameter and the intercept parameter, the value of Y when X is 0.5 is calculated, and the value of Y is the first external voltage value; In step S2, the offset error calculation formula of the measured analog-to-digital converter is: offset error = ZST*I / Vref-1 In the above formula, offset error represents the offset error of the measured analog-to-digital converter; ZST represents the first external voltage value; I represents 2t, t represents the resolution of the measured analog-to-digital converter; Vref represents the reference voltage of the measured analog-to-digital converter; In step S3, the gain error calculation formula of the measured analog-to-digital converter is: gain error=(FST-ZST)*I / Vref-(I-2) In the above formula, gain error represents the gain error of the measured analog-to-digital converter; ZST represents the first external voltage value; FST represents the second external voltage value; I represents 2 t , t represents the resolution of the analog-to-digital converter under test; Vref represents the reference voltage of the analog-to-digital converter under test.

2. A method for testing offset and gain errors of an analog-to-digital converter as claimed in claim 1, characterized in that: Also includes: The analog-to-digital converter under test collects data for a preset number of times, and when the collected data result is 0, the value is 0; When the collection result is greater than 0, the value is 1.

3. A method for testing offset and gain errors of an analog-to-digital converter as claimed in claim 1, characterized in that: In the step S1, the voltage signal emitted by the signal generator is collected to generate a second external voltage value when the collected result of the analog-to-digital converter under test jumps from N-1 to N, including: A second voltage signal emitted by a signal generator is collected; the second voltage signal is generated based on an external voltage emitted by the signal generator; the external voltage gradually increases from a preset voltage value in preset units; For each of the second voltage signals, the analog-to-digital converter under test collects a preset number of times to generate a second external voltage value sequence; Calculate the average value of the second external voltage value sequence, and stop collecting the second voltage signal when the average value is greater than N-0.5; The average values ​​of the two second external voltage value sequences whose absolute differences from N-0.5 are the smallest are selected to calculate and output the second external voltage value; among the two average values, one is greater than N-0.5 and the other is less than N-0.

5.

4. A method for testing offset and gain errors of an analog-to-digital converter as claimed in claim 3, characterized in that: Also includes: The analog-to-digital converter under test collects data for a preset number of times. When the collection result is N-1, the value is N-1; when the collection result is greater than N-1, the value is N.

5. A method for testing offset and gain errors of an analog-to-digital converter as claimed in claim 3, characterized in that: Selecting the average values ​​of the two second external voltage value sequences whose absolute values ​​of the differences from N-0.5 are the smallest, and calculating and outputting the second external voltage value, comprises: Respectively obtaining the external voltage values ​​emitted by the signal generator corresponding to the two average values ​​to generate two sets of data; each set of data includes: the external voltage value and the corresponding average value of the second external voltage value sequence; Substitute the two sets of data into the following formula to obtain the slope parameter and the intercept parameter respectively: Y=K*X´+B In the above formula, Y represents the external voltage value; X' represents the average value of the corresponding second external voltage value sequence; K represents the slope parameter; B represents the intercept parameter; According to the slope parameter and the intercept parameter, the value of Y is calculated when X' is N-0.5, and the value of Y is the second external voltage value.

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