NUMA system performance tuning method, device and computer equipment

Abstract

The present invention discloses a performance tuning method, system and computer equipment of a NUMA system, the method comprising: obtaining node information in a NUMA system to be tuned; obtaining the amount of memory and the amount of NUMA nodes required for the current test requirement; calling the NUMA node according to the obtained node information and the amount of memory and the amount of NUMA nodes, and binding the called NUMA node to the corresponding local memory. The present invention has the advantages of simple implementation method, high execution efficiency, good effect, strong compatibility, etc., and can fully combine the architectural characteristics of the NUMA system to achieve efficient performance tuning.

Description

Technical Field

[0001] The present invention relates to a NUMA (Non-Uniform Memory Access) system, and in particular to a performance tuning method, device and computer equipment for a NUMA system. Background Art

[0002] The mainstream and commonly used CPU system is the X86 CPU architecture, and most of them are SMP (Symmetric Multi-Processor) structures, but the number of cores in the SMP structure is relatively small, such as Figure 1 As shown in the figure, in the SMP structure, multiple CPUs work symmetrically, there is no master-slave or subordinate relationship between the CPUs, and each CPU shares the same physical memory. The time required for each CPU to access any address in the memory is the same, and various test programs and applications only need to run directly. However, with the continuous improvement of current requirements for computing performance, storage performance, etc., the number of CPUs required to be used is increasing, and at the same time, memory access conflicts will also increase rapidly, which will eventually cause a waste of CPU resources and greatly reduce the effectiveness of CPU performance.

[0003] The NUMA system based on the NUMA architecture can solve the above problems of the traditional SMP system. NUMA is a non-uniform memory access architecture, which is a distributed memory access method. The processor can access different memory addresses at the same time, thereby greatly improving parallelism. Figure 2 As shown in the figure, the nodes of a NUMA system are usually composed of a group of CPUs and local memory. Since each node has its own local memory, the latency of each node accessing local memory and accessing remote memory of other nodes is different. The time it takes for each core to access memory depends on the location of the memory relative to the processor. Accessing local memory (within this node) will be faster. Although the NUMA architecture can greatly improve parallelism based on the ability to access different memory addresses at the same time, the states of each node in the system are different, such as the busyness of different CPU nodes and the waiting time of IO interfaces. The performance of the system in various aspects may not meet the required requirements, such as CPU performance, bandwidth performance, network performance, etc. Therefore, system performance optimization is required during the actual use of the NUMA system.

[0004] There are many ways to achieve performance optimization for NUMA architecture in the prior art, but all of them have the following problems:

[0005] 1. Complex implementation. New software functions need to be rewritten to perform various judgments and operations. The functions are relatively complex and require calling various underlying interfaces and library files. The workload is large and the implementation is complex, and the operability is not strong.

[0006] 2. High cost. It is necessary to use low-speed interfaces to determine and operate NUMA nodes to achieve optimization, and occupying low-speed interfaces will cause a certain degree of waste and increase the overall system cost.

[0007] 3. Poor compatibility. Since functions usually need to be written under one or a type of operating system, there will be migration problems after updating the system or platform, so the compatibility is not strong.

[0008] For example, for the performance optimization of the NUMA architecture, a commonly used method in the prior art is to test the nodes with performance bottlenecks and perform optimization on the nodes with performance bottlenecks. However, this method not only has the problems of complex optimization implementation, high cost and poor compatibility, but also the system performance is prone to fluctuations, and the system cannot maintain stable performance. Summary of the invention

[0009] The technical problem to be solved by the present invention is: in response to the technical problems existing in the prior art, the present invention provides a performance tuning method, device and computer equipment for a NUMA system with a simple implementation method, high execution efficiency, good effect and strong compatibility, which can fully combine the architectural characteristics of the NUMA system to achieve efficient performance tuning.

[0010] In order to solve the above technical problems, the technical solution proposed by the present invention is:

[0011] A performance tuning method for a NUMA system, comprising:

[0012] Get the node information in the NUMA system to be adjusted;

[0013] Get the amount of memory and NUMA nodes required for the current test requirements;

[0014] The NUMA node is called according to the acquired node information, the memory amount, and the NUMA node amount, and the called NUMA node is bound to the corresponding local memory.

[0015] Furthermore, the node information is information about a specified portion of nodes in the NUMA system to be adjusted.

[0016] Furthermore, the obtaining of node information in the NUMA system to be adjusted also includes: determining a CPU node division state and / or a local memory usage state in the NUMA system to be adjusted according to the obtained node information.

[0017] Furthermore, when performing a CPU computing performance test, all NUMA nodes are called and bound to the corresponding local memory; when performing a memory bandwidth test, the required NUMA nodes are determined according to the number of threads and / or cores and bound to the corresponding local memory.

[0018] Furthermore, when performing the PCIE / IO test, the NUMA node close to the IO / PCIE is called and the corresponding local memory is bound.

[0019] Furthermore, it also includes real-time monitoring of the operating status of the NUMA system to be adjusted, and adjusting the NUMA node bound to the local memory according to the monitoring result.

[0020] Furthermore, adjusting the node bound to the local memory according to the monitoring result includes: continuously adjusting the NUMA node bound to the local memory until the running state of the NUMA system to be adjusted reaches an expected state.

[0021] A performance tuning device for a NUMA system, comprising:

[0022] A first acquisition module is used to acquire node information in the NUMA system to be adjusted;

[0023] The second acquisition module is used to obtain the amount of memory and NUMA nodes required for the current test requirements;

[0024] The tuning module is used to call the NUMA node according to the acquired node information, memory amount, and NUMA node amount, and bind the called NUMA node to the corresponding local memory.

[0025] Furthermore, it also includes a real-time adjustment module, which is used to monitor the operating status of the NUMA system to be adjusted in real time, and adjust the NUMA node bound to the local memory according to the monitoring result.

[0026] A computer device comprises a processor and a memory, wherein the memory is used to store a computer program, the processor is used to execute the computer program, and the processor is used to execute the computer program to perform the above method.

[0027] Compared with the prior art, the advantages of the present invention are:

[0028] 1. The present invention obtains node information and the required amount of memory and NUMA node quantity, determines the call of the NUMA node according to the node information and the required amount of memory and NUMA node quantity, and binds the required NUMA node to the corresponding local memory. It can combine the characteristics of the NUAM architecture and flexibly bind the CPU core and local memory in the NUMA system according to different test requirements. It can meet different test requirements while preventing cross-node access and avoiding dynamic migration between cores that causes performance degradation of the application, thereby improving the performance stability of the system, reducing system fluctuations, and achieving performance optimization of the NUMA system.

[0029] 2. The present invention is not only simple to operate, but also has low cost and small workload. It does not need to call or enable other low-speed interfaces, nor does it need to rebuild functions, so it does not increase new workload. At the same time, it has strong compatibility and can be compatible with various operating systems. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 It is a schematic diagram of the structural principle of the traditional SMP architecture.

[0031] Figure 2 This is a schematic diagram of the structural principle of the NUMA structure.

[0032] Figure 3 It is a schematic diagram of the implementation process of the performance tuning method of the NUMA system according to embodiment 1 of the present invention.

[0033] Figure 4 It is a structural diagram of the NUMA architecture in a specific application embodiment.

[0034] Figure 5 It is a structural schematic diagram of a performance tuning device for a NUMA system according to embodiment 1 of the present invention.

[0035] Figure 6 It is a schematic diagram of the implementation process of the performance tuning method of the NUMA system according to embodiment 2 of the present invention.

[0036] Figure 7 It is a schematic diagram of the implementation process of performance tuning of Example 2 of the present invention in a specific application embodiment.

[0037] Figure 8 It is a structural diagram of a performance tuning device for a NUMA system according to embodiment 2 of the present invention. DETAILED DESCRIPTION

[0038] The present invention is further described below in conjunction with the accompanying drawings and specific preferred embodiments, but the protection scope of the present invention is not limited thereby.

[0039] Embodiment 1:

[0040] like Figure 3 As shown, the performance tuning method of the NUMA system in this embodiment includes the following steps:

[0041] S01. Receive a test request for the NUMA system to be adjusted;

[0042] S02. Obtain node information in the NUMA system to be adjusted;

[0043] S03. Determine the amount of NUMA nodes required for the current test requirements based on the type of test request received and the node information obtained;

[0044] S04. The control configures the NUMA nodes to be used in the test according to the acquired node information and the determined NUMA node quantity, and binds the NUMA nodes to be used to the corresponding local memory.

[0045] NUMA is a non-uniform memory access architecture, which is a distributed memory access method. In a NUMA system, all memories are divided into several blocks. At the same time, there are multiple memory buses in the system. The processor is connected to a memory block through each memory bus to form a group. Each memory bus and memory block form multiple groups, where each group is a node. The memory in the node is the local memory. Each node is usually composed of a group of CPUs and local memory, and the memory corresponding to other nodes is remote memory. In a NUMA system, the processor can access different memory addresses at the same time. The memory access time depends on the memory location of the processor. For example, the CPU is physically closer to its own memory, and the access speed is faster, while the speed of accessing remote memory is relatively slower, so the processor can quickly access the memory in the same unit.

[0046] When this embodiment performs performance tuning of the NUMA system, when a test request for the NUMA system to be tuned is received, node information is obtained by, for example, viewing through software commands or directly through product drawings, so that the CPU node division status, local memory status, etc. in the current NUMA system can be determined. At the same time, the required NUMA node quantity is obtained by analyzing the current test requirements, and the call of the NUMA node is determined according to the node information and the required NUMA node quantity, and the required NUMA node is bound to the corresponding local memory. It can combine the characteristics of the NUAM architecture and flexibly bind the CPU core and local memory in the NUMA system according to different test requirements, that is, through configuration, the current test program and application are bound to the specified core to run, which can meet different test requirements while preventing cross-node access, avoiding dynamic migration between cores that causes performance degradation of the application program, improving the performance stability of the system, reducing system fluctuations, achieving performance optimization of the NUMA system, and improving the test results. It is not only simple to implement and has strong compatibility, but also does not need to call or enable other low-speed interfaces during the tuning process.

[0047] In this embodiment, the above-mentioned performance tuning steps S01 to S04 can be specifically implemented by the processor in the NUMA system, that is, the software module capable of implementing the functions of the above-mentioned performance tuning steps S01 to S04 is embedded in the processor in the NUMA system, and the processor receives the test request of the NUMA system to be adjusted. When the test request of the NUMA system to be adjusted is received, the subsequent steps S02 to S04 are started to perform the performance tuning of the NUMA system. When no test request is received, it is in a standby state. It can be understood that in addition to using the processor in the NUMA system to implement performance tuning control, of course, other additional processors or controllers can also be used according to actual needs to implement the above-mentioned performance tuning steps.

[0048] In step S02 of this embodiment, the node information can be obtained by calling a software command, such as by using the numactl -H command in the NUMA system; or the node information can be obtained through original data such as the original design drawings of the product or product manuals and then stored. When a test request for the NUMA system to be tested is received, the required node information is directly read from the pre-stored data, and the node information can even be obtained by external data input.

[0049] In the NUMA system, each node includes a set of CPUs and local memory. The CPU node division status is the corresponding division status between each CPU and the node, that is, which nodes each CPU is divided into. After obtaining the information of each node in the NUMA system (the CPU corresponding to the node, local memory usage, etc.), the corresponding relationship between the CPU and each node, that is, the CPU node division status, can be determined through the node information. For example, through the numactl-H command in the NUMA system, you can directly view the main node information of the current NUAM operating system, including CPU node division and local memory usage information.

[0050] In this embodiment, the above-mentioned node information is specifically the information of a specified part of the nodes in the NUMA system to be adjusted, such as the main / key nodes in the NUMA system. The main / key nodes are the nodes that play a main / key role in the NUMA system. The determination of the main / key nodes can be based on the architectural characteristics of the actual NUMA system. The specific nodes to be obtained can be determined according to actual needs. It can be the main / key nodes, or other nodes that need to be paid attention to, or even directly obtain the information of all nodes in the system to obtain a comprehensive node status. The information type of the node information can be the running status of the node (such as whether it is running), the division of the node, whether the local memory is used, etc., so that by obtaining the node information, the division of the CPU nodes in the system and the usage of the local memory can be determined. In addition to the above-mentioned information types of the node information, of course, other information types can also be configured according to actual needs to obtain a more comprehensive node status and local memory usage status in the NUMA system.

[0051] In this embodiment, obtaining the node information in the NUMA system to be adjusted also includes: determining the CPU node division state and the local memory usage state in the NUMA system to be adjusted according to the obtained node information. After obtaining the node information in the NUMA system, the CPU node division state and the local memory usage state in the NUMA system to be adjusted can be analyzed by the node information. The CPU node division state is the corresponding division relationship between the NUMA node and the CPU, and the local memory usage state is which local memory has been used and which local memory has not been used. Each NUMA node can correspond to multiple CPU nodes, and the memory access efficiency obtained by different node binding methods is different. The access efficiency of different nodes can be judged by the CPU node division state. Combined with the above-mentioned CPU node division state and local memory usage state, the node binding method that meets the current test requirements can be determined to achieve the optimal performance of the system.

[0052] The amount of NUMA nodes required for different test types is different. In this embodiment, after receiving a test request, the node information is first obtained by step S02, and the required amount of NUMA nodes is determined according to the test request type and the node information in step S03. Step S04 then controls the configuration of the NUMA nodes required for the test according to the obtained node information and the determined amount of NUMA nodes, and binds the NUMA nodes to the local memory. The configuration of the NUMA node is to configure the required NUMA node as the node required for the test, so that in the subsequent test process, the configured NUMA nodes are started to execute the test processes and threads required in the test task; binding the NUMA node to the local memory is to correspond the NUMA node to the local memory, so that when the test process and thread use the node, the bound local memory will be used accordingly, so that the test process and thread are used in the calling configured node and local memory, and will not access other nodes and the memory of other nodes, effectively realizing the NUMA system performance optimization.

[0053] like Figure 4 As shown in the figure, under the NUMA architecture, multiple CPUs do not have equal access to main memory. Each CPU has its own main memory. The CPU is physically closer to its own main memory, so the access speed is faster, while the speed of accessing remote memory is relatively slow. The NUMA system uses nodes to manage CPUs and main memory. A NUMA system consists of multiple NUMA nodes, each of which can have multiple CPUs, but only one memory controller to ensure that all CPUs in this node have equal access to the main memory of this node, while the CPUs of other nodes have a greater delay in accessing the main memory of this node. Figure 4 It can be seen that the current CPU has a total of 16 cores, and every 4 cores form a node. Each node corresponds to a group of memory, from 0 to 3. Node0 corresponds to PCIE closest, so binding node0 when accessing peripherals can obtain the best performance.

[0054] This embodiment specifically uses software commands and other methods to obtain node information in the NUMA system to be adjusted, and determine the NUMA architecture information and local memory details of the current CPU. In a specific application embodiment, the numactl-H command is used to view the main node information of the current NUAM operating system to obtain the CPU node division and local memory usage. Of course, you can also directly obtain relevant information about the CPU and the overall architecture in the system through product information such as product manuals. The overall architecture is as follows Figure 4The system architecture information shown includes the location of NUMA nodes, the corresponding division relationship between NUMA nodes and CPUs, memory usage, etc.

[0055] In this embodiment, after obtaining the node information in the NUMA system to be called, the required NUMA node quantity (number of nodes) is further analyzed according to the current test case and application requirements, so as to obtain the NUMA node quantity required for the current test requirements, and then based on the NUMA node quantity required by the currently obtained node information, different NUAM nodes are called and bound to the corresponding local memory, so as to meet the current test and application requirements, while also preventing cross-path access.

[0056] Demand analysis is performed for different test cases. The test direction or test content of the test program is different, and the test requirements will also be different. For example, when testing SPEC2006 (used to test CPU computing performance), since the CPU computing performance is tested and the program requires a large memory capacity, and when testing memory bandwidth (STREAM), since the CPU bandwidth performance is tested, the NUMA architecture CPU is prone to performance fluctuations and ups and downs. This embodiment obtains the node information in the NUMA system to be adjusted, determines the CPU partition status and local memory usage status in the system, determines the called NUMA node based on the NUMA node status and memory usage status in the current system, and the memory and NUMA node quantity required for the current test requirements, and binds the corresponding local memory at the same time, so that the optimal performance can be obtained in the current state of the NUMA system to be adjusted.

[0057] For example, for the commonly used CPU test programs, when testing computing performance (SPEC2006), memory bandwidth (STREAM), network performance, read-write performance, etc., different NUAM nodes are called and node binding operations are performed according to the above different test requirements and characteristics to match the different requirements of computing performance (SPEC2006), memory bandwidth (STREAM), network performance, and read-write performance.

[0058] In this embodiment, when a CPU computing performance test request is received, it is determined that the amount of NUMA nodes required for the current test is all unused NUMA nodes in the NUMA system to be adjusted, and all unused NUMA nodes in the NUMA system to be adjusted are configured as NUMA nodes required for the test according to the node information, and all NUMA nodes required for the test are controlled to be bound to the corresponding local memory, that is, when executing the CPU computing performance test, the test is executed by calling all NUMA nodes and binding the corresponding local memory. The above-mentioned unused NUMA nodes are NUMA nodes that are currently in an idle state and can be called.

[0059] When a memory bandwidth test request is received, the target NUMA node quantity required for the current test is determined according to the number of threads and / or cores in the NUMA system to be adjusted, and the unused NUMA nodes of the target NUMA node quantity in the NUMA system to be adjusted are configured as the NUMA nodes required for the test and bound to the corresponding local memory according to the node information, that is, when the memory bandwidth test is performed, the NUMA node quantity is determined according to the number of threads, the number of cores and other information, and the corresponding local memory is bound to perform the test. The above-mentioned unused NUMA nodes are NUMA nodes that are currently in an idle state and can be called.

[0060] In this embodiment, when a PCIE / IO test request is received, it is determined that the amount of NUMA nodes required for the current test is a NUMA node that is within a preset range from the IO / PCIE and is not in use, and the control configures the unused NUMA nodes within the preset range from the IO / PCIE as the NUMA nodes required for the current test and binds the corresponding local memory according to the node information, that is, during the PCIE / IO test, the NUMA node close to the IO / PCIE is called and the corresponding local memory is bound to perform the test. The above-mentioned unused NUMA node is the NUMA node that is currently in an idle state and can be called.

[0061] In a specific application embodiment, when executing the CPU computing performance test, all NUMA nodes are called and bound to the corresponding local memory; when executing the memory bandwidth test, the required NUMA nodes are determined according to the number of threads and / or the number of cores and bound to the corresponding local memory, wherein, when executing the PCIE / IO test, the NUMA node close to the IO / PCIE is called and bound to the corresponding local memory, and in other tests such as large-capacity tests, similar nodes and local memory can be used. According to the above method, the optimal tuning plan can be formed according to different test requirements, so that the test and requirements are executed in the local memory as much as possible, so that cross-node access can be prevented under different test requirements, and the dynamic migration between cores can be avoided to avoid the performance degradation of the application program, improve the performance stability of the system, and reduce the fluctuation of the system.

[0062] In the present embodiment, when performing node binding operations, it can be implemented in the form of commands, which is simple to implement and the implementation commands are relatively common. There is no need to rebuild the functions, so there is no need to increase new workload. At the same time, it has strong compatibility because only simple binding operations are required and the binding operation commands can be directly called in operating systems such as LINUX, that is, it is compatible with various operating systems.

[0063] like Figure 5 As shown, this embodiment further includes a performance tuning device for a NUMA system, including:

[0064] A receiving module, used for receiving a test request for the NUMA system to be adjusted;

[0065] An acquisition module is used to obtain node information in the NUMA system to be adjusted;

[0066] A determination module, configured to determine the amount of NUMA nodes required for the current test requirement based on the type of the received test request and the acquired node information;

[0067] The tuning module is used to control the NUMA nodes to be used during the test according to the acquired node information and the determined NUMA node quantity configuration, and bind the NUMA nodes to be used to the corresponding local memory.

[0068] In this embodiment, the acquisition module further includes determining the CPU node division status, local memory usage status, etc. in the NUMA system to be adjusted according to the acquired node information.

[0069] The performance tuning device for the NUMA system of this embodiment corresponds one to one with the performance tuning method for the NUMA system described above, and both have the same principles and effects, which will not be described in detail here.

[0070] This embodiment also provides a computer device, including a processor and a memory, wherein the memory is used to store a computer program, and the processor is used to execute the computer program, and the processor is used to execute the computer program to execute the performance tuning method of the NUMA system.

[0071] Embodiment 2:

[0072] like Figure 6 The steps of the performance tuning method of the NUMA system in this embodiment include:

[0073] S01. Obtain node information in the NUMA system to be adjusted;

[0074] S02. Obtain the amount of memory and NUMA nodes required for the current test requirements;

[0075] S03. Calling a NUMA node according to the acquired node information, the memory amount, and the NUMA node amount, and binding the called NUMA node to the corresponding local memory;

[0076] S04. Monitor the operating status of the NUMA system to be adjusted in real time, and adjust the NUMA node bound to the local memory according to the monitoring result.

[0077] In this embodiment, when performing performance tuning of the NUMA system, node information is obtained so that the CPU node division status, local memory status, etc. in the current NUMA system can be determined. At the same time, the required memory amount and NUMA node amount are obtained by analyzing the current test requirements. The call of the NUMA node is determined according to the node information and the required memory amount and NUMA node amount, and the required NUMA node is bound to the corresponding local memory. It can combine the characteristics of the NUAM architecture and flexibly bind the CPU core and local memory in the NUMA system according to different test requirements. That is, through configuration, the current test program and application are bound to the specified core to run, which can meet different test requirements while preventing cross-node access, avoiding dynamic migration between cores that causes performance degradation of the application program, improving the performance stability of the system, reducing system fluctuations, and realizing performance optimization of the NUMA system. At the same time, by real-time monitoring of the system's operating status, the bound NUMA nodes are further adjusted according to the operating status, so that the system can reach the optimal state in real time.

[0078] In this embodiment, the above-mentioned node information is specifically the information of a specified part of the nodes in the NUMA system to be adjusted, such as the main / key nodes in the NUMA system. The main / key nodes are the nodes that play a main / key role in the NUMA system. The determination of the main / key nodes can be based on the architectural characteristics of the actual NUMA system. The specific nodes to be obtained can be determined according to actual needs. It can be the main / key nodes, or other nodes that need to be paid attention to, or even directly obtain the information of all nodes in the system to obtain a comprehensive node status. The information type of the node information can be the running status of the node (such as whether it is running), the division of the node, whether the local memory is used, etc., so that by obtaining the node information, the division of the CPU nodes in the system and the usage of the local memory can be determined. In addition to the above-mentioned information types of the node information, of course, other information types can also be configured according to actual needs to obtain a more comprehensive node status and local memory usage status in the NUMA system.

[0079] In this embodiment, obtaining the node information in the NUMA system to be adjusted also includes: determining the CPU node division status and local memory usage status in the NUMA system to be adjusted based on the obtained node information. After obtaining the node information in the NUMA system, the CPU node division status and local memory usage status in the NUMA system to be adjusted can be analyzed from the node information. The CPU node division status is the corresponding division relationship between the NUMA node and the CPU, and the local memory usage status is which local memory has been used and which local memory has not been used. Each NUMA node can correspond to multiple CPU nodes, and different node binding methods result in different memory access efficiencies, such as Figure 4As shown in the figure, the access efficiency of different nodes can be determined by the CPU node division status. Combining the above CPU node division status and local memory usage status, the node binding method that meets the current test requirements can be determined to achieve the optimal performance of the system.

[0080] This embodiment specifically uses software commands and other methods to obtain node information in the NUMA system to be adjusted, and determine the NUMA architecture information and local memory details of the current CPU. In a specific application embodiment, the numactl-H command is used to view the main node information of the current NUAM operating system to obtain the CPU node division and local memory usage. Of course, you can also directly obtain relevant information about the CPU and the overall architecture in the system through product information such as product manuals. The overall architecture is as follows Figure 4 The system architecture information shown includes the location of NUMA nodes, the corresponding division relationship between NUMA nodes and CPUs, memory usage, etc.

[0081] In this embodiment, after obtaining the node information in the NUMA system to be called, the required memory amount (memory capacity) and NUMA node amount (number of nodes) are further analyzed according to the current test case and application requirements, so as to obtain the memory amount and NUMA node amount required for the current test requirements, and then according to the memory amount and NUMA node amount required by the currently obtained node information, different NUAM nodes are called and bound to the corresponding local memory, so as to meet the current test and application requirements, and prevent cross-path access at the same time.

[0082] Demand analysis is performed for different test cases. The test direction or test content of the test program is different, and the test requirements will also be different. For example, when testing SPEC2006 (used to test CPU computing performance), since the CPU computing performance is tested and the program requires a large memory capacity, and when testing memory bandwidth (STREAM), since the CPU bandwidth performance is tested, the NUMA architecture CPU is prone to performance fluctuations and ups and downs. This embodiment obtains the node information in the NUMA system to be adjusted, determines the CPU partition status and local memory usage status in the system, determines the called NUMA node based on the NUMA node status and memory usage status in the current system, and the memory and NUMA node quantity required for the current test requirements, and binds the corresponding local memory at the same time, so that the optimal performance can be obtained in the current state of the NUMA system to be adjusted.

[0083] For example, for the commonly used CPU test programs, when testing computing performance (SPEC2006), memory bandwidth (STREAM), network performance, read-write performance, etc., different NUAM nodes are called and node binding operations are performed according to the above different test requirements and characteristics to match the different requirements of computing performance (SPEC2006), memory bandwidth (STREAM), network performance, and read-write performance.

[0084] In a specific application embodiment, when executing the CPU computing performance test, all NUMA nodes are called and bound to the corresponding local memory; when executing the memory bandwidth test, the required NUMA nodes are determined according to the number of threads and / or the number of cores and bound to the corresponding local memory, wherein, when executing the PCIE / IO test, the NUMA node close to the IO / PCIE is called and bound to the corresponding local memory, and in other tests such as large-capacity tests, similar nodes and local memory can be used. According to the above method, the optimal tuning plan can be formed according to different test requirements, so that the test and requirements are executed in the local memory as much as possible, so that cross-node access can be prevented under different test requirements, and the dynamic migration between cores can be avoided to avoid the performance degradation of the application program, improve the performance stability of the system, and reduce the fluctuation of the system.

[0085] In the present embodiment, when performing node binding operations, it can be implemented in the form of commands, which is simple to implement and the implementation commands are relatively common. There is no need to rebuild the functions, so there is no need to increase new workload. At the same time, it has strong compatibility because only simple binding operations are required and the binding operation commands can be directly called in operating systems such as LINUX, that is, it is compatible with various operating systems.

[0086] In this embodiment, the operating status monitored in step S04 can be any one or more of CPU utilization, memory usage, and thread operation mode, and can be specifically configured according to actual needs. By monitoring the operating status of the system, the usage status of the CPU, memory, etc. under the current node binding scheme can be determined, so as to determine whether the CPU, memory, etc. have reached the optimal utilization state.

[0087] In this embodiment, adjusting the node bound to the local memory according to the monitoring result in step S04 includes: continuously adjusting the NUMA node bound to the local memory until the running state of the NUMA system to be adjusted reaches the expected state, so that the test process and thread can be used as much as possible in the calling node and local memory, so that the running state of the NUMA system to be adjusted can be adjusted to the optimal state in real time, and the NUMA system to be adjusted is kept in the optimal state in real time. When monitoring the running state of the system, the CPU utilization, memory usage, thread running mode and other information can be specifically monitored.

[0088] In a specific application embodiment, the above monitoring can be performed through various monitoring plug-ins and commands to monitor CPU utilization, memory usage, thread operation mode, etc., and determine whether it meets expectations. If not, adjust the bound nodes so that the test applications are all used on the bound nodes and local memory to prevent cross-node access and avoid dynamic migration between cores that causes performance degradation of the application. The above monitoring plug-ins include but are not limited to resource managers, htop commands, etc.

[0089] In a specific application embodiment, the specific steps of step S04 are:

[0090] S401. Determine whether the running state of the current NUMA system to be adjusted reaches the expected state. If yes, proceed to step S402, otherwise exit the current tuning step;

[0091] S402. Adjust the currently called NUMA node and bind the corresponding local memory, and return to step S02.

[0092] In a specific application embodiment, the test score can be compared with the theoretical basis to analyze whether the current system has reached the theoretical value. If it has reached the theoretical value, it proves that the optimization has met the standard. If it does not meet the standard, analyze the test program, readjust the binding nodes, monitor the usage status, and repeat the above steps until the system can achieve maximum performance.

[0093] The method of this embodiment is further described below by taking the implementation of NUMA system performance tuning in a specific application embodiment as an example.

[0094] like Figure 7 As shown, the detailed steps of implementing the performance tuning of the NUMA system in this embodiment are:

[0095] Step S01: Obtain node information of the NUMA system to be adjusted through a software command (numactl -H command), and determine the current CPU node division status and local memory usage status;

[0096] Step S02: Analyze the required memory capacity and the number of NUMA nodes based on the current test case and application requirements, and obtain the memory capacity and NUMA node quantity required for the current test requirements;

[0097] Step S03: According to the current node information, the required memory capacity and the number of NUMA nodes, different NUAM nodes are called and the corresponding local memory is bound for testing and application;

[0098] The binding command for the above direct binding may be specifically implemented in the form of numactl, taskset, etc.

[0099] Step S04. Real-time monitoring of test and usage status, such as CPU utilization, memory usage, and thread operation mode, and determine whether it is effective, that is, whether it meets expectations. If not, adjust the bound nodes and return to step S03 until it is determined to be effective, so that the test applications are used optimally on the bound nodes and local memory. The current state is the optimal state of the system.

[0100] like Figure 8 As shown, this embodiment further includes a performance tuning device for a NUMA system, including:

[0101] A first acquisition module is used to acquire node information in the NUMA system to be adjusted;

[0102] The second acquisition module is used to obtain the amount of memory and NUMA nodes required for the current test requirements;

[0103] The tuning module is used to call the NUMA node according to the obtained node information, memory amount, and NUMA node amount, and bind the required NUMA node to the corresponding local memory;

[0104] The real-time adjustment module is used to monitor the running status of the NUMA system to be adjusted in real time, and adjust the NUMA node bound to the local memory according to the monitoring result.

[0105] In this embodiment, the first acquisition module further includes determining the CPU node division status, local memory usage status, etc. in the NUMA system to be adjusted according to the acquired node information.

[0106] like Figure 8 As shown, the real-time adjustment module in this embodiment includes:

[0107] A judgment unit is used to judge whether the running state of the current NUMA system to be adjusted reaches the expected state. If so, it is transferred to the adjustment unit, otherwise, the current adjustment is exited;

[0108] The adjustment unit is used to adjust the currently called NUMA node and bind the corresponding local memory, and return to execute the second acquisition module to re-execute the binding of the calling NUMA node and the local memory.

[0109] The performance tuning device for the NUMA system of this embodiment corresponds one to one with the performance tuning method for the NUMA system described above, and both have the same principles and effects, which will not be described in detail here.

[0110] This embodiment also provides a computer device, including a processor and a memory, wherein the memory is used to store a computer program, and the processor is used to execute the computer program, and the processor is used to execute the computer program to execute the performance tuning method of the NUMA system.

[0111] Those skilled in the art will appreciate that the above description of the computer device is only an example and does not constitute a limitation on the computer device. The computer device may include more or fewer components than described above, or may combine certain components, or may include different components, such as input and output devices, network access devices, buses, etc. The processor may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc. The processor is the control center of the computer device, and uses various interfaces and lines to connect the various parts of the entire computer device.

[0112] The memory can be used to store computer programs and / or modules. The processor realizes various functions of the computer device by running or executing the computer programs and / or modules stored in the memory, and calling the data stored in the memory. The memory can mainly include a program storage area and a data storage area, wherein the program storage area can store an operating system, an application required for at least one function (such as a sound playback function, an image playback function, etc.), etc.; the data storage area can store data created according to the use of the mobile phone (such as audio data, a phone book, etc.), etc. In addition, the memory can include a high-speed random access memory, and can also include a non-volatile memory, such as a hard disk, a memory, a plug-in hard disk, a smart memory card (SmartMedia Card, SMC), a secure digital (Secure Digital, SD) card, a flash card (FlashCard), at least one disk storage device, a flash memory device, or other volatile solid-state storage devices.

[0113] If the module / unit integrated in the computer device is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present invention implements all or part of the process in the above-mentioned embodiment method, and can also be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium. When the computer program is executed by the processor, the steps of the above-mentioned distributed crawler method embodiments based on template annotation can be implemented. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, U disk, mobile hard disk, disk, optical disk, computer memory, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), electrical carrier signal, electrical signal and software distribution medium, etc.

[0114] The above is only a preferred embodiment of the present invention, and does not limit the present invention in any form. Although the present invention has been disclosed as a preferred embodiment, it is not intended to limit the present invention. Therefore, any simple modification, equivalent change and modification made to the above embodiment according to the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the scope of protection of the technical solution of the present invention.

Claims

1. A performance tuning method for a NUMA system, characterized in that: include: Receive a test request for the NUMA system to be tested; Obtaining node information in the NUMA system to be adjusted, wherein the node information includes any one or more of node distribution information, CPU node partition status information, and usage status of local memory in the node; Determine the amount of NUMA nodes required for the current test requirement according to the type of the received test request and the acquired node information; The control configures the NUMA nodes to be used during the test according to the acquired node information and the determined NUMA node quantity, and binds the NUMA nodes to be used to the corresponding local memory. The binding of the NUMA nodes to be used to the corresponding local memory is to correspond the NUMA nodes to be used to the local memory, so that when the test process and thread use the node, the bound local memory will be used accordingly.

2. The performance tuning method of the NUMA system according to claim 1, characterized in that: The node information is the node information of a specified part of nodes in the NUMA system to be adjusted.

3. The performance tuning method of a NUMA system according to claim 1, characterized in that: The test request includes any one of a CPU computing performance test request, a memory bandwidth test request, a PCIE test request, and an IO test request.

4. The performance tuning method of a NUMA system according to any one of claims 1 to 3, characterized in that: When a CPU computing performance test request is received, it is determined that the amount of NUMA nodes required for the current test is all unused NUMA nodes in the NUMA system to be adjusted, and control is performed to configure all unused NUMA nodes in the NUMA system to be adjusted as NUMA nodes required for the test according to the node information, and control is performed to bind all NUMA nodes required for the test to corresponding local memories.

5. The performance tuning method of a NUMA system according to any one of claims 1 to 3, characterized in that: When a memory bandwidth test request is received, the target NUMA node quantity required for the current test is determined according to the number of threads and / or cores in the NUMA system to be adjusted, and the unused NUMA nodes of the target NUMA node quantity in the NUMA system to be adjusted are configured as the NUMA nodes required for the test and bound to the corresponding local memory according to the node information.

6. The performance tuning method of a NUMA system according to any one of claims 1 to 3, characterized in that: When a PCIE / IO test request is received, it is determined that the amount of NUMA nodes required for the current test is the NUMA nodes that are within a preset range from the IO / PCIE and are not in use, and the control configures the unused NUMA nodes that are within a preset range from the IO / PCIE as the NUMA nodes required for the current test and binds the corresponding local memory according to the node information.

7. The performance tuning method of a NUMA system according to any one of claims 1 to 3, characterized in that: It also includes real-time monitoring of the operating status of the NUMA system to be adjusted, and adjusting the NUMA node bound to the local memory according to the monitoring result.

8. The performance tuning method of the NUMA system according to claim 7, characterized in that: The adjusting of the node bound to the local memory according to the monitoring result includes: Determine whether the operating status of the NUMA system to be adjusted reaches the expected status; If it is determined that the expected state is not reached, the currently used NUMA node is adjusted, and the adjusted NUMA node is bound to the local memory. If it is determined that the expected state is reached, the adjustment is stopped.

9. A performance tuning device for a NUMA system, characterized in that: include: A receiving module, used for receiving a test request for the NUMA system to be adjusted; An acquisition module is used to acquire node information in the NUMA system to be adjusted, wherein the node information includes any one or more of node distribution information, CPU node partition status information, and usage status of local memory in the node; A determination module, used to determine the amount of NUMA nodes required for the current test requirement according to the type of the received test request and the acquired node information; An acquisition module is used to obtain node information in the NUMA system to be adjusted; A tuning module, used for allocating NUMA nodes required for testing according to the acquired node information and the determined NUMA node quantity, and binding the NUMA nodes required for use to corresponding local memories; Binding the NUMA node to be used to the corresponding local memory is to correspond the NUMA node to be used to the local memory, so that when the test process and thread use the node, the bound local memory will be used accordingly. 。 10. The performance tuning device for a NUMA system according to claim 9, characterized in that: The node information acquired by the acquisition module includes any one or more of node distribution information, CPU node division status information, and usage status of local memory in the node.

11. The performance tuning device for a NUMA system according to claim 9, characterized in that: When the receiving module receives a CPU computing performance test request, the determining module determines that the amount of NUMA nodes required for the current test is all unused NUMA nodes in the NUMA system to be adjusted; the tuning module controls the configuration of all unused NUMA nodes in the NUMA system to be adjusted as NUMA nodes required for the test according to the node information, and controls the binding of all NUMA nodes required for the test to corresponding local memories.

12. The performance tuning device for a NUMA system according to claim 9, characterized in that: When the receiving module receives a memory bandwidth test request, the determining module determines the target NUMA node quantity required for the current test according to the number of threads and / or cores in the NUMA system to be adjusted, and the tuning module controls the configuration of unused NUMA nodes of the target NUMA nodes in the NUMA system to be adjusted as NUMA nodes required for the test and binds the corresponding local memory according to the node information.

13. The performance tuning device for a NUMA system according to claim 9, characterized in that: When the receiving module receives a PCIE / IO test request, the determining module determines that the NUMA nodes required for the current test are NUMA nodes that are within a preset range from the IO / PCIE and are not in use, and the tuning module controls the configuration of the unused NUMA nodes that are within a preset range from the IO / PCIE as the NUMA nodes required for the current test and binds the corresponding local memory according to the node information.

14. The performance tuning device for a NUMA system according to any one of claims 9 to 13, characterized in that: It also includes a real-time adjustment module, which is used to monitor the running status of the NUMA system to be adjusted in real time, and adjust the NUMA node bound to the local memory according to the monitoring result.

15. The performance tuning device for a NUMA system according to claim 14, characterized in that: The real-time adjustment module comprises: A judging unit, used to judge whether the running state of the NUMA system to be adjusted reaches the expected state; The adjustment iteration unit is used to adjust the currently used NUMA node if the judgment unit judges that the expected state is not reached, and bind the adjusted NUMA node to the local memory; if the judgment unit judges that the expected state is reached, the adjustment is stopped.

16. A computer device comprising a processor and a memory, wherein the memory is used to store a computer program, and the processor is used to execute the computer program, wherein: The processor is configured to execute the computer program to perform the method according to any one of claims 1 to 8.

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