A radiation-resistant GaN / Ga2O3 cascode cascade enhanced power device and its manufacturing method

Abstract

The present invention discloses a radiation-resistant GaN / Ga2O3 cascode cascade enhanced power device and a manufacturing method thereof. The cascode structure enhanced power device of the GaN and Ga2O3 devices cascade includes a low-voltage enhanced GaN HEMT device and a high-voltage depletion Ga2O3FET device from left to right, and the low-voltage enhanced GaN HEMT device is connected to the high-voltage depletion Ga2O3FET device. The present invention adopts a radiation-resistant GaN / Ga2O3 cascode cascade enhanced power device and a manufacturing method thereof using the above structure. The Ga2O3 material has a high breakdown voltage characteristic, and GaN is a wide bandgap material, which increases the reliability of the device as a whole, improves the single-particle burnout threshold voltage of the device under aerospace radiation environment application, and reduces the weight and complexity of the aerospace system.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor devices, and in particular to a radiation-resistant GaN / Ga2O3 cascode enhanced power device and a manufacturing method thereof. Background Art

[0002] Power semiconductor devices are used in aerospace power electronics systems to convert electrical energy between different frequencies and powers. With the development of new aerospace power systems in different orbits, the development of high-efficiency, high-power-density and high-reliability semiconductor power devices is an effective solution to the harsh space environment and low energy conversion efficiency.

[0003] With the continuous development of power semiconductor device technology, the materials of semiconductor devices have been updated from the first generation of silicon-based materials to the second generation of gallium arsenide materials, which has led to fundamental changes in the basic performance of devices and materials. However, so far, the performance of semiconductor power devices made of traditional materials has been close to the theoretical limit of the material. New semiconductor wide bandgap materials represented by Ga2O3 have higher voltage resistance and electron saturation drift velocity. Gallium oxide-based power devices have smaller size, higher conversion efficiency and lower power consumption, higher breakdown voltage and faster switching frequency, better radiation resistance and wider temperature operating range, lower input capacitance and lower on-resistance, and are the preferred technical solution to replace traditional silicon devices.

[0004] There are high-energy particles in the natural radiation environment where aerospace systems operate. These particles can penetrate the system and cause serious single-particle burnouts in power devices. When the device is operating in the reverse high-voltage off state, the burnout caused by high-energy particles will cause the drain current of the device to increase sharply, and at the same time cause the temperature of the device material lattice to rise sharply, thereby burning the device and causing serious failure of the system. The burnout threshold voltage of the power device will largely determine the reliability and application scope of the system, restricting the development of the aerospace radiation resistance field. Currently, mature silicon-based devices require very complex radiation resistance reinforcement technology, which will seriously increase the complexity and weight of the system and cannot meet the development needs of miniaturization and integration of the system. The enhancement mode of the transistor device of gallium oxide Ga2O3 is achieved by non-in-situ growth of P-type NiO x These solutions use MIS structures and etching processes, which will introduce additional total dose problems and reliability problems caused by interface defects. Although the performance of the third-generation wide bandgap devices has been improved, the single-particle burnout threshold voltage of all material devices is very low and far lower than the breakdown voltage of the device itself. There is a serious single-particle burnout problem, and it is urgent to develop a new transistor structure with an enhanced high single-particle burnout threshold. Summary of the invention

[0005] The purpose of the present invention is to provide a radiation-resistant GaN / Ga2O3 cascode cascade enhanced power device and a manufacturing method thereof, so as to solve the problems in the above-mentioned background technology, realize a new type of GaN and Ga2O3 cascade enhanced device, reduce the weight and complexity of the aerospace system, increase the reliability of the device, and improve the single-particle burnout threshold voltage of the device under the application of aerospace radiation environment.

[0006] To achieve the above-mentioned object, the present invention provides a radiation-resistant GaN / Ga2O3 cascode cascade enhanced power device, wherein the cascode structure enhanced power device of the GaN and Ga2O3 devices cascade comprises, from left to right, a low-voltage enhanced GaN HEMT device and a high-voltage depletion-type Ga2O3 FET device, wherein the low-voltage enhanced GaN HEMT device is connected to the high-voltage depletion-type Ga2O3 FET device.

[0007] Preferably, the low-voltage enhancement-mode GaN HEMT device includes a gate Gate1, a source Source1 and a drain Drain1, and the high-voltage depletion-mode Ga2O3 FET device includes a gate Gate2, a source Source2 and a drain Drain2, the drain Drain1 is connected to the source Source2, and the source Source1 is connected to the gate Gate2.

[0008] Preferably, the gate Gate1 serves as the gate of the Cascode structure enhanced power device, the source Source1 serves as the source of the Cascode structure enhanced power device, and the drain Drain2 serves as the drain of the Cascode structure enhanced power device.

[0009] A method for manufacturing a radiation-resistant GaN / Ga2O3 cascode cascade enhanced power device comprises the following steps:

[0010] 1) Thinning and polishing the epitaxial wafers of the low-voltage enhancement-mode GaN HEMT device and the high-voltage depletion-mode Ga2O3 FET device respectively;

[0011] 2) Slicing the two types of epitaxial wafers that have been thinned and polished, and picking out qualified chips respectively;

[0012] 3) performing chip mounting on the qualified chips of the two structures after dicing;

[0013] 4) Wire bonding is performed on the mounted chip to interconnect the drain Drain1 of the low-voltage enhancement-mode GaN HEMT device and the source Source2 of the high-voltage depletion-mode Ga2O3 FET device, and the source Source1 of the low-voltage enhancement-mode GaN HEMT device and the gate Gate2 of the high-voltage depletion-mode Ga2O3 FET are interconnected;

[0014] 5) Encapsulating the wire-bonded chip, and then packaging the chip to complete device manufacturing.

[0015] Preferably, the method used for thinning and polishing the epitaxial wafer in step 1) is mechanical grinding and polishing.

[0016] Preferably, the chip mounting process in step 3) is to place the chips of the two structures at designated positions on the substrate and to mount them on the lead frame by using a silver paste curing method.

[0017] Preferably, in step 5), the encapsulation is performed by plastic encapsulation or metal ceramic encapsulation, and the packaging is performed by insulating plastic or ceramic material.

[0018] Therefore, the present invention adopts the above-mentioned structure to form a radiation-resistant GaN / Ga2O3 cascode cascade enhanced power device and a manufacturing method thereof. A low-voltage enhanced GaN HEMT device and a high-voltage depletion-type Ga2O3 FET device are interconnected to form a new cascode structure enhanced power device. A p-GaN enhanced GaN HEMT is used as a positive threshold device. Since the GaNHEMT device does not have a MIS structure layer corresponding to the medium, the total dose problem will not be introduced. The high breakdown voltage characteristics of the Ga2O3 material and the fact that GaN is also a wide bandgap material increase the reliability of the device as a whole, improve the single-particle burnout threshold voltage of the device under aerospace radiation environment applications, and at the same time reduce the weight and complexity of the aerospace system, thereby increasing the reliability of the device.

[0019] The technical solution of the present invention is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 It is a structural schematic diagram of an embodiment of a radiation-resistant GaN / Ga2O3 cascode cascade enhanced power device and a manufacturing method thereof of the present invention;

[0021] Figure 2 It is a production flow chart of an embodiment of a radiation-resistant GaN / Ga2O3 cascode cascade enhanced power device and a production method thereof of the present invention. DETAILED DESCRIPTION

[0022] The present invention will be further described below. It should be noted that this embodiment is based on the technical solution and provides a detailed implementation method and a specific operation process, but the present invention is not limited to this embodiment.

[0023] The following is a further description of the embodiments of the present invention in conjunction with the accompanying drawings. Figure 1 As shown, a radiation-resistant GaN / Ga2O3 cascode cascade enhanced power device, the cascode structure enhanced power device of GaN and Ga2O3 devices cascaded includes a low-voltage enhanced GaN HEMT device and a high-voltage depletion Ga2O3 FET device from left to right, and the low-voltage enhanced GaN HEMT device is connected to the high-voltage depletion Ga2O3 FET device. The low-voltage enhanced GaN HEMT device includes a gate Gate1, a source Source1 and a drain Drain1, and the high-voltage depletion Ga2O3 FET device includes a gate Gate2, a source Source2 and a drain Drain2, and the drain Drain1 is connected to the source Source2, and the source Source1 is connected to the gate Gate2. The gate Gate1 serves as the gate of the cascode structure enhanced power device, the source Source1 serves as the source of the cascode structure enhanced power device, and the drain Drain2 serves as the drain of the cascode structure enhanced power device.

[0024] like Figure 2 As shown, a method for manufacturing a radiation-resistant GaN / Ga2O3 cascode cascade enhanced power device comprises the following steps:

[0025] Step 1, thinning and polishing: The epitaxial wafers of the low-voltage enhancement-mode GaN HEMT device and the high-voltage depletion-mode Ga2O3 FET device are thinned and polished respectively, using a combination of mechanical grinding and polishing to remove the non-active area on the back of the substrate.

[0026] Step 2, slicing: Slice the two types of epitaxial wafers that have completed thinning and polishing, and pick out qualified chips respectively. It also includes steps such as back-side film lamination, diamond tool cutting, slicing, chip selection and microscopic inspection.

[0027] Step 3, mounting: Mount the qualified chips of the two structures after dicing, place the chips of the two structures at the designated positions on the substrate, and stick them on the lead frame by using the silver paste curing method.

[0028] Step 4, wire bonding: wire bonding is performed on the mounted chip to interconnect the drain Drain1 of the low-voltage enhancement-mode GaN HEMT and the source Source2 of the high-voltage depletion-mode Ga2O3 FET, and the source Source1 of the low-voltage enhancement-mode GaN HEMT and the gate Gate2 of the high-voltage depletion-mode Ga2O3 FET. The chip's soldering area is connected to the I / O lead of the electronic package shell or the metal wiring soldering area on the substrate, and each end of the lead is welded to the lead frame of the chip and the substrate by ultrasonic pressurization. The lead can be made of gold, aluminum or copper.

[0029] Step 5, packaging: plastic-encapsulating or metal-ceramic-encapsulating the chip after the wire bonding, and packaging the chip with insulating plastic or ceramic materials to complete the device manufacturing.

[0030] Therefore, the present invention adopts the above-mentioned structure to form a radiation-resistant GaN / Ga2O3 cascode cascade enhanced power device and a manufacturing method thereof. A low-voltage enhanced GaN HEMT device and a high-voltage depletion-type Ga2O3 FET device are interconnected to form a new cascode structure enhanced power device. A p-GaN enhanced GaN HEMT is used as a positive threshold device. Since the GaNHEMT device does not have a MIS structure layer corresponding to the medium, the total dose problem will not be introduced. The high breakdown voltage characteristics of the Ga2O3 material and the fact that GaN is also a wide bandgap material increase the reliability of the device as a whole, improve the single-particle burnout threshold voltage of the device under aerospace radiation environment applications, and at the same time reduce the weight and complexity of the aerospace system, thereby increasing the reliability of the device.

[0031] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that they can still modify or replace the technical solution of the present invention with equivalents, and these modifications or equivalent replacements cannot cause the modified technical solution to deviate from the spirit and scope of the technical solution of the present invention.

Claims

1. A radiation-resistant GaN / Ga2O3 cascode enhanced power device, characterized in that: The cascode structure enhanced power device of GaN and Ga2O3 devices cascaded includes a low voltage enhanced GaN HEMT device and a high voltage depletion Ga2O3 FET device from left to right, wherein the low voltage enhanced GaN HEMT device is connected to the high voltage depletion Ga2O3 FET device; The low-voltage enhancement-mode GaN HEMT device includes a gate Gate1, a source Source1 and a drain Drain1, and the high-voltage depletion-mode Ga2O3 FET device includes a gate Gate2, a source Source2 and a drain Drain2, wherein the drain Drain1 is connected to the source Source2, and the source Source1 is connected to the gate Gate2; the gate Gate1 serves as the gate of the Cascode structure enhancement-mode power device, the source Source1 serves as the source of the Cascode structure enhancement-mode power device, and the drain Drain2 serves as the drain of the Cascode structure enhancement-mode power device; The method for manufacturing the radiation-resistant GaN / Ga2O3 cascode cascade enhanced power device comprises the following steps: 1) Thinning and polishing the epitaxial wafers of the low-voltage enhancement-mode GaN HEMT device and the high-voltage depletion-mode Ga2O3 FET device respectively; 2) Slice the two types of epitaxial wafers that have been thinned and polished, and pick out qualified chips; 3) Perform chip mounting on the qualified chips of the two structures after dicing; 4) Wire bonding is performed on the mounted chip to interconnect the drain Drain1 of the low-voltage enhancement-mode GaN HEMT device and the source Source2 of the high-voltage depletion-mode Ga2O3 FET device, and the source Source1 of the low-voltage enhancement-mode GaN HEMT device and the gate Gate2 of the high-voltage depletion-mode Ga2O3 FET are interconnected; 5) The chip after the wire bonding is packaged, and then the chip is packaged to complete the device manufacturing.

2. The radiation-resistant GaN / Ga2O3 cascode enhanced power device according to claim 1, characterized in that: In step 1), the thinning and polishing of the epitaxial wafer is performed by mechanical grinding and polishing.

3. The radiation-resistant GaN / Ga2O3 cascode enhanced power device according to claim 1, characterized in that: In step 3), the chip mounting process is to place the chips of the two structures at the designated positions on the substrate and to attach them to the lead frame by curing the silver paste.

4. The radiation-resistant GaN / Ga2O3 cascode enhanced power device according to claim 1, characterized in that: In step 5), the packaging adopts plastic packaging or metal ceramic packaging, and the packaging adopts insulating plastic or ceramic materials.

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