Switched capacitor self-equalizing nine-level inverter

Abstract

Switched capacitor self-balanced nine-level inverter, V dc The positive terminal is connected to the drain of S1 and the source of S2, V dc The negative electrode of C1 is connected to the source of S4, the drain of S5 and the cathode of diode D2; the positive electrode of C1 is connected to the drain of S2, the source of S6 and the drain of S7, the negative electrode of C1 is connected to the source of S1 and the drain of S3; the positive electrode of C2 is connected to the drain of S4 and the cathode of diode D1, the negative electrode of C2 is connected to the source of S5, S 10 The source and S 12 The positive electrode of C3 is connected to the drain of S6, the drain of S9 and S 11 The drain of S7 is connected to the cathode of C3, the drain of S8 is connected to the source of S3, the source of S8 is connected to the anode of diode D2, and the source of S9 is connected to the anode of S 10 The drain and the positive electrode of the load, S 11 The source is connected to S 12 The invention has the capability of quadruple voltage boost and outputting nine-level voltage, and can be connected to a resistive load or a resistive-inductive load; the invention has a small number of components, high power density, and high system efficiency.

Description

Technical Field

[0001] The invention relates to the technical field of power electronics, in particular to a switched capacitor self-balanced nine-level inverter. Background Art

[0002] In renewable energy power generation systems, the inverter is a key link in power conversion and transmission. The usual way to achieve inversion is to use a full-bridge inverter. Due to the severe electromagnetic interference caused by the voltage jump of the full-bridge inverter level and the limitation of a small number of output levels, the switching device needs to work at a higher switching frequency or a larger filter to obtain high-quality output, resulting in higher power loss and more severe electromagnetic interference. Therefore, this topology is not suitable for applications with high power or high voltage levels.

[0003] Multilevel inverters have the advantages of low output voltage harmonic content, high output power quality, low switching device voltage stress, and smaller output filters. They overcome the shortcomings of full-bridge inverters and are widely used in medium and high voltage power transmission and distribution, active power filters, uninterruptible power supplies, AC motor speed regulation, electric vehicles, and new energy distributed power generation. Traditional multilevel inverters include diode clamped, flying capacitor, and cascaded H-bridge inverter structures. Diode clamped multilevel inverters require a large number of clamping diodes, while flying capacitor multilevel inverters require a large number of capacitors. These two topologies require additional clamping devices and voltage divider capacitors to expand the output level, and also introduce higher complexity to the control algorithm and modulation strategy. The cascaded H-bridge multilevel inverter is limited in application due to its requirement for multiple independent DC power supplies.

[0004] In recent years, switched capacitor technology has been widely used in multi-level inverters. The switched capacitor structure does not have magnetic components such as inductors and transformers, and the structure has a certain boost capability, which reduces the intermediate DC / DC boost link, can reduce the cost of the system, and improve the efficiency of the inverter. Applying the switched capacitor structure to the multi-level inverter is of great significance for improving the voltage regulation capability of the multi-level inverter, broadening the scope of application of the inverter, and realizing the miniaturization, integration and high efficiency of the inverter. However, the existing switched capacitor nine-level inverter generally has problems such as low voltage gain, large number of devices, and large capacitor volume. Summary of the invention

[0005] In view of the above problems, the present invention proposes a switched capacitor self-equalizing nine-level inverter. The output voltage of the inverter is four times the voltage of the DC voltage source, and has a high voltage gain; the capacitors can achieve charging and discharging balance of the capacitor voltage under the switching cycle, reducing the cost and volume of the inverter; it can carry resistive loads or resistive-inductive loads, and has a wide range of applications.

[0006] The technical solution for achieving the purpose of the present invention is as follows:

[0007] The first inverter: a switched capacitor self-equalizing nine-level inverter, with a DC voltage source V dc The positive electrode is connected to the switch tube S 1 The drain and diode D 3 Anode, D 3 The cathode is connected to the capacitor C 1 The positive electrode, C 1 The negative terminal is connected to S 1 The source of V dc The negative electrode is connected to the switch tube S 4 The source and diode D 4 The cathode, D 4 The anode of the capacitor is connected to C 2 The negative electrode, C 2 The positive terminal is connected to S 4 The drain of 1 The source is also connected to the switch S 3 The drain, S 3 The source is connected to the diode D 1 Anode, D 1 The cathode is connected to S 4 The drain of dc The cathode is also connected to the diode D 2 The cathode, D 2 The anode of the switch tube S 8 The source, S 8 The drain of the switch is connected to the 7 The source, S 7 The drain is connected to C 1 The positive electrode; S 7 The source is also connected to capacitor C 3 The negative electrode, S 7 The drain is also connected to diode D 5 Anode, C 3 The positive electrode, D 5 The cathodes are connected to the switch tube S 9 , switch tube S 11 The drain of 2 The negative electrode is also connected to the switch tube S 10 , switch tube S 12 The source of S 9 The source and S 10 The drain is connected to one end of the load, S 11 The source and S 12 The drain is connected to the other end of the load.

[0008] After replacing the components of the first inverter, the second inverter is obtained: 3 Replace with switch tube S2 , S 2 The source is connected to V dc The positive electrode, S 2 The drain is connected to C 1 The positive electrode of 4 Replace with switch tube S 5 , S 5 The drain is connected to V dc The negative electrode, S 5 The source is connected to C 2 The negative electrode of 5 Replace with switch tube S 6 ; S 6 The source is connected to S 7 The drain, S 6 The drain is connected to S 9 , S 11 of the drain.

[0009] The third inverter: a switched capacitor self-balanced nine-level inverter, with a DC voltage source V dc The positive electrode is connected to the switch tube S 1 The drain and diode D 3 Anode, D 3 The cathode is connected to the capacitor C 1 The positive electrode, C 1 The negative terminal is connected to S 1 The source of V dc The negative electrode is connected to the switch tube S 4 The source and diode D 4 The cathode, D 4 The anode of the capacitor is connected to C 2 The negative electrode, C 2 The positive terminal is connected to S 4 The drain of 1 The source is also connected to the switch S 3 The drain, S 3 The source is connected to the diode D 1 Anode, D 1 The cathode is connected to S 4 The drain of dc The positive electrode is also connected to the switch tube S 8 The drain, S 8 The source is connected to the diode D 2 Anode, D 2 The cathode is connected to the switch tube S 7 The drain, S 7 The source is connected to C 2 The negative electrode; S 7 The drain is also connected to capacitor C 3 The positive electrode, S 7The source is also connected to diode D 5 The cathode, C 3 The negative electrode, D 5 The anodes are connected to the switch tube S 10 , switch tube S 12 The source of C 1 The positive electrode is also connected to the switch tube S 9 , switch tube S 11 The drain of 9 The source and S 10 The drain is connected to one end of the load, S 11 The source and S 12 The drain is connected to the other end of the load.

[0010] After replacing the components of the third inverter, the fourth inverter is obtained: 3 Replace with switch tube S 2 , S 2 The source is connected to V dc The positive electrode, S 2 The drain is connected to C 1 The positive electrode of 4 Replace with switch tube S 5 , S 5 The drain is connected to V dc The negative electrode, S 5 The source is connected to C 2 The negative electrode of 5 Replace with switch tube S 6 , S 6 The drain is connected to S 7 The source, S 6 The source is connected to S 10 , S 12 The source.

[0011] The control methods of the first and third inverters are as follows:

[0012] Using the driving signal V gs1 、V gs3 、V gs4 、V gs7 -V gs12 Control the switch tube S respectively 1 , S 3 , S 4 , S 7 -S 12 ; Among them, V gs1 =(B 0 )or(B 3 ), V gs3 =(A 7 )or(B 2 ), Vgs4 =(B 1 )or(B 4 ), V gs7 =A 7 , V gs8 =(A 8 )and(A 9 ), V gs9 =not((A 1 )and(A 2 )), V gs10 =(A 1 )and(A 2 ), V gs11 =not((A 0 )and(A 2 )), V gs12 =not((A 0 )and(A 2 )); said B 0 =(A 3 )and(A 10 ), B 1 =(A 6 )and(A 10 ), B 2 =(A 3 )xor(A 6 ), B 3 =(not((A 5 )and(A 7 )))and(A 9 ), B 4 =(not((A 4 )and(A 7 )))and(A 9 ); said A 0 , A 1 , A 2 , …, A 10 They are: s >0 then A 0 True is A 0 =1, A 1 If it is false, then A 1 =0; such as abs(u s )>u 1 Then A 2 True is A 2 =1; such as abs(u s )>u 2 Then A 3 True is A 3 =1; such as u 2 >u 3 Then A 4 True is A4 =1, A 5 If it is false, then A 5 =0; such as abs(u s )>u 3 Then A 6 True is A 6 =1; such as abs(u s )>u 4 Then A 7 True is A 7 =1, A 8 If it is false, then A 8 =0; such as abs(u s )>3A c Then A 9 True is A 9 =1, A 10 If it is false, then A 10 =0; the u s is a sine wave, u 1 、u 2 、u 3 、u 4 is a triangle wave; u 1 、u 2 、u 3 、u 4 The frequency is greater than u s The frequency of u 1 with u 4 The frequency is equal; u 2 with u 3 The frequencies are equal and the phases are 180° different; u 1 with u 4 The frequency is u 2 with u 3 Twice the frequency of u 1 The maximum value of A c , the minimum value is 0; u 4 The maximum value is 4A c , minimum value is 3A c ;u 2 and u 3 The maximum value is 3A c , the minimum value is A c ;u s The amplitude is less than 4A c .

[0013] The second and fourth inverter control methods are as follows:

[0014] Using the driving signal V gs1 -V gs12 Control the switch tube S respectively 1 -S 12 ; Among them, V gs1=(B 0 ) or (B 3 ), V gs2 = not((B 0 ) or (B 3 ))), V gs3 =(A 7 ) or (B 2 ), V gs4 =(B 1 ) or (B 4 ), V gs5 = not((B 1 ) or (B 4 ))), V gs6 = A 8 , V gs7 = A 7 , V gs8 =(A 8 ) and (A 9 ), V gs9 = not((A 1 ) and (A 2 ))), V gs10 =(A 1 ) and (A 2 ), V gs11 = not((A 0 ) and (A 2 ))), V gs12 = not((A 0 ) and (A 2 )); The B 0 =(A 3 ) and (A 10 ), B 1 =(A 6 ) and (A 10 ), B 2 =(A 3 ) xor (A 6 ), B 3 =(not((A 5 ) and (A 7 ))) and (A 9 ), B 4 =(not((A 4 ) and (A 7 ))) and (A 9 ); The A 0 , A 1 , A 2 , …, A 10 are respectively: If u s > 0, then A 0 is true, that is, A 0=1, A 1 If it is false, then A 1 =0; such as abs(u s )>u 1 Then A 2 True is A 2 =1; such as abs(u s )>u 2 Then A 3 True is A 3 =1; such as u 2 >u 3 Then A 4 True is A 4 =1, A 5 If it is false, then A 5 =0; such as abs(u s )>u 3 Then A 6 True is A 6 =1; such as abs(u s )>u 4 Then A 7 True is A 7 =1, A 8 If it is false, then A 8 =0; such as abs(u s )>3A c Then A 9 True is A 9 =1, A 10 If it is false, then A 10 =0; the u s is a sine wave, u 1 、u 2 、u 3 、u 4 is a triangle wave; u 1 、u 2 、u 3 、u 4 The frequency is greater than u s The frequency of u 1 with u 4 The frequency is equal; u 2 with u 3 The frequencies are equal and the phases are 180° different; u 1 with u 4 The frequency is u 2 with u 3 Twice the frequency of u 1 The maximum value of A c , the minimum value is 0; u 4 The maximum value is 4A c , minimum value is 3A c ;u 2 and u 3 The maximum value is 3Ac , the minimum value is A c ;u s The amplitude is less than 4A c .

[0015] Compared with the prior art, the present invention has the following beneficial effects:

[0016] 1. The present invention is a boost inverter, the output voltage of which is four times the voltage of the DC voltage source and has a four-fold boost capability.

[0017] 2. Simple structure, low cost, high power density and high system efficiency.

[0018] 3. All capacitors can achieve charging and discharging balance of capacitor voltage during the switching cycle, reducing the cost and volume of switched capacitors.

[0019] 4. The first and third inverters can be connected to resistive loads; the second and fourth inverters can be connected to resistive loads or resistive-inductive loads. The inverter of the present invention has a wide range of applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 This is the schematic diagram of the first switched capacitor self-equalizing nine-level inverter.

[0021] Figure 2 This is the schematic diagram of the second switched capacitor self-equalizing nine-level inverter.

[0022] Figure 3 This is the schematic diagram of the third switched capacitor self-equalizing nine-level inverter.

[0023] Figure 4 This is the schematic diagram of the fourth switched capacitor self-equalizing nine-level inverter.

[0024] FIG5(a), FIG5(b) and FIG5(c) are diagrams of modulation signals.

[0025] FIG5( d ) is a logic diagram for generating a switch tube driving signal.

[0026] Figure 6(a) to Figure 6(m) This is the operating mode diagram of the second switched capacitor self-equalizing nine-level inverter.

[0027] Figure 7 The output voltage, output current and capacitor voltage waveforms of the second switched capacitor self-equalizing nine-level inverter.

[0028] Figure 8 The output voltage and output current waveforms of the second switched capacitor self-equalizing nine-level inverter when the load changes. DETAILED DESCRIPTION

[0029] The specific implementation of the present invention will be further described below in conjunction with the accompanying drawings.

[0030] like Figure 2 As shown, the circuit schematic diagram of the second switched capacitor self-balanced nine-level inverter includes a DC voltage source V dc , the first capacitor C 1 , the second capacitor C 2 , the third capacitor C 3 , the first diode D 1 , the second diode D 2 , the first switch tube S 1 , the second switch tube S 2 , the third switch tube S 3 , the fourth switch tube S 4 , the fifth switch tube S 5 , the sixth switch tube S 6 , the seventh switch tube S 7 , the eighth switch tube S 8 , the ninth switch tube S 9 , the ninth switch tube S 9 , the tenth switch tube S 10 , Eleventh switch tube S 11 , the twelfth switch tube S 12 and load.

[0031] DC voltage source V dc The positive electrode is connected to the first switch tube S 1 The drain of the second switch tube S 2 The source, V dc The negative electrode is connected to the fourth switch tube S 4 The source of the fifth switch tube S 5 The drain and the second diode D 2 The cathode of the first capacitor C 1 The positive electrode is connected to the second switch tube S 2 The drain of the sixth switch tube S 6 The source and the seventh switch tube S 7 The drain of the first capacitor C 1 The negative electrode is connected to the first switch tube S 1 The source and the third switch tube S 3 The drain of the second capacitor C 2 The positive electrode is connected to the fourth switch tube S 4 The drain and the first diode D 1 The cathode of the second capacitor C 2 The negative electrode is connected to the fifth switch tube S 5 The source of the tenth switch tube S 10 The source of the twelfth switch tube S 12 The source of the third capacitor C3 The positive electrode is connected to the sixth switch tube S 6 The drain of the ninth switch tube S 9 The drain and the eleventh switch tube S 11 The drain of the third capacitor C 3 The negative electrode is connected to the seventh switch tube S 7 The source of the eighth switch tube S 8 The drain of the third switch tube S 3 The source of the first diode D 1 The anode of the eighth switch tube S 8 The source of the second diode D 2 The anode of the ninth switch tube S 9 The source of the tenth switch S 10 The drain and the positive pole of the load, the eleventh switch tube S 11 The source of the twelfth switch S 12 of the drain and the negative terminal of the load.

[0032] The second inverter can be connected to resistive loads or inductive loads. When the application scenario only needs to connect to resistive loads, S 2 , S 5 and S 6 By replacing the diode, we get the first inverter, such as Figure 1 shown.

[0033] like Figure 4 As shown, the circuit schematic diagram of the fourth switched capacitor self-balanced nine-level inverter includes a DC voltage source V dc , the first capacitor C 1 , the second capacitor C 2 , the third capacitor C 3 , the first diode D 1 , the second diode D 2 , the first switch tube S 1 , the second switch tube S 2 , the third switch tube S 3 , the fourth switch tube S 4 , the fifth switch tube S 5 , the sixth switch tube S 6 , the seventh switch tube S 7 , the eighth switch tube S 8 , the ninth switch tube S 9 , the ninth switch tube S 9 , the tenth switch tube S 10 , Eleventh switch tube S 11 , the twelfth switch tube S 12 and load.

[0034] DC voltage source V dcThe positive electrode is connected to the first switch tube S 1 The drain of the second switch tube S 2 The source of the eighth switch tube S 8 The drain, V dc The negative electrode is connected to the fourth switch tube S 4 The source and the fifth switch tube S 5 The drain of the first capacitor C 1 The positive electrode is connected to the second switch tube S 2 The drain of the ninth switch tube S 9 The drain and the eleventh switch tube S 11 The drain of the first capacitor C 1 The negative electrode is connected to the first switch tube S 1 The source and the third switch tube S 3 The drain of the second capacitor C 2 The positive electrode is connected to the fourth switch tube S 4 The drain and the first diode D 1 The cathode of the second capacitor C 2 The negative electrode is connected to the fifth switch tube S 5 The source of the sixth switch tube S 6 The drain and the seventh switch tube S 7 The source of the third capacitor C 3 The positive electrode is connected to the seventh switch tube S 7 The drain of the second diode D 2 The cathode of the third capacitor C 3 The negative electrode is connected to the sixth switch tube S 6 The source of the tenth switch tube S 10 The source of the twelfth switch tube S 12 The source of the third switch tube S 3 The source of the first diode D 1 The anode of the eighth switch tube S 8 The source of the second diode D 2 The anode of the ninth switch tube S 9 The source of the tenth switch tube S 10 The drain and the positive pole of the load, the eleventh switch tube S 11 The source of the twelfth switch S 12 of the drain and the negative terminal of the load.

[0035] The fourth inverter can be connected to resistive loads or inductive loads. When the application scenario only needs to connect to resistive loads, S 2 , S 5 and S 6 By replacing the diode, we get the third inverter, such as Figure 3 shown.

[0036] Compared with the second and fourth inverters, the first and third inverters reduce control signals after replacing components.

[0037] Figure 5(a), Figure 5(b) and Figure 5(c) show the modulation signals of the switched capacitor self-balanced nine-level inverter. s is a sine wave, u 1 、u 2 、u 3 、u 4 is a triangular wave. As shown in Figure 5(a) and Figure 5(b), u 1 、u 2 、u 3 、u 4 The frequency is greater than u s The frequency of u 1 with u 4 The frequency is equal; u 2 with u 3 The frequencies are equal and the phases are 180° apart; u 1 with u 4 The frequency is u 2 with u 3 Twice the frequency; u 1 The size is 0~A c ,u 4 The size is 3A c ~4A c ,u 2 and u 3 The size is A c ~3A c ,u s The amplitude is less than 4Ac. Figure 5(d) is a logic diagram of using sine wave and triangle wave to generate switch tube drive signal. As shown in Figure 5(d), the sine wave and triangle wave signals are logically operated to generate intermediate signal A 0 -A 10 , A 0 -A 10 Regenerate intermediate signal B 0 -B 4 These intermediate signals are then logically operated to obtain the switch tube drive signal V gs1 -V gs12 .

[0038] The second and fourth inverters, under the control of the switch tube drive signal generated in FIG5(d), can obtain: 1 and the second capacitor C 2 The voltages of the third capacitor C 3 The voltage is twice the voltage of the DC voltage source.

[0039] The first capacitor C1 , the second capacitor C 2 And the third capacitor C 3 The charging and discharging balance of the capacitor voltage can be achieved under the switching cycle; the output voltage amplitude of the inverter is four times the DC voltage source voltage, and a resistive load or a resistive-inductive load can be connected.

[0040] The first and third inverters do not require a control signal V gs2 、V gs5 and V gs6 , can also achieve similar technical effects. However, only resistive loads can be connected.

[0041] The following takes the second type of switched capacitor self-balanced nine-level inverter as an example to illustrate the working state after the driving signal generated by FIG. 5( d ) is used to control the switch tube.

[0042] In one output voltage cycle, the inverter has 13 working states.

[0043] 1)v o =0: As shown in Figure 6(a), the switch tube S 9 , S 11 The diode D is turned on, and the other switches are turned off. 1 , D 2 The inverter output voltage is zero.

[0044] 2)v o =+V dc : As shown in Figure 6(b), the switch tube S 2 , S 5 , S 6 , S 9 , S 12 The diode D is turned on, and the other switches are turned off. 1 , D 2 are all cut off; the DC voltage source passes through the switch tube S 2 , S 5 , S 6 , S 9 , S 12 Directly supply power to the load. The inverter output voltage is +V dc .

[0045] 3)v o =+2V dc : As shown in Figure 6(c), the switch tube S 1 , S 3 , S 5 , S 6 , S 9 , S 12 The diode D is turned on, and the other switches are turned off. 1 Forward conduction, diode D2 Cut-off; Capacitor C 2 Connect in parallel with a DC voltage source to charge to V dc At the same time, the capacitor C 1 Connect in series with the DC voltage source through S 1 , S 5 , S 6 , S 9 , S 12 Supply power to the load. The inverter output voltage is +2V dc .

[0046] 4)v o =+2V dc : As shown in Figure 6(d), the switch tube S 2 , S 3 , S 4 , S 6 , S 9 , S 12 The diode D is turned on, and the other switches are turned off. 1 Forward conduction, diode D 2 Cut-off; Capacitor C 1 Connect in parallel with a DC voltage source to charge to V dc At the same time, the capacitor C 2 Connect in series with the DC voltage source through S 2 , S 4 , S 6 , S 9 , S 12 Supply power to the load. The inverter output voltage is +2V dc .

[0047] 5)v o =+3V dc : As shown in Figure 6(e), the switch tube S 1 , S 4 , S 6 , S 8 , S 9 , S 12 The diode D is turned on, and the other switches are turned off. 2 Forward conduction, diode D 1 Cut-off; Capacitor C 1 Connect the capacitor C in series with the DC voltage source 3 At the same time, the capacitor C 1 , C 2 Connect in series with the DC voltage source through S 1 , S 4 , S 6 , S 9 , S 12 Supply power to the load. The inverter output voltage is +3V dc .

[0048] 6)v o =+4V dc : As shown in Figure 6(f), the switch tube S 1 , S 3 , S 5 , S 7 , S 9 , S 12 The diode D is turned on, and the other switches are turned off. 1 Forward conduction, diode D 2 Cut-off; Capacitor C 2 Connect in parallel with a DC voltage source to charge to V dc At the same time, the capacitor C 1 , C 3 Connect in series with the DC voltage source through S 1 , S 5 , S 7 , S 9 , S 12 Supply power to the load. The inverter output voltage is +4V dc .

[0049] 7)v o =+4V dc : As shown in Figure 6(g), the switch tube S 2 , S 3 , S 4 , S 7 , S 9 , S 12 The diode D is turned on, and the other switches are turned off. 1 Forward conduction, diode D 2 Cut-off; Capacitor C 1 Connect in parallel with a DC voltage source to charge to V dc At the same time, the capacitor C 2 , C 3 Connect in series with the DC voltage source through S 2 , S 4 , S 7 , S 9 , S 12 Supply power to the load. The inverter output voltage is +4V dc .

[0050] 8)v o =-V dc : As shown in Figure 6(h), the switch tube S 2 , S 5 , S 6 , S 10 , S 11 The diode D is turned on, and the other switches are turned off. 1 , D 2are all cut off; the DC voltage source passes through the switch tube S 2 , S 5 , S 6 , S 10 , S 11 Directly supply power to the load. The inverter output voltage is -V dc .

[0051] 9)v o =-2V dc : As shown in Figure 6(i), the switch tube S 1 , S 3 , S 5 , S 6 , S 10 , S 11 The diode D is turned on, and the other switches are turned off. 1 Forward conduction, diode D 2 Cut-off; Capacitor C 2 Connect in parallel with a DC voltage source to charge to V dc At the same time, the capacitor C 1 Connect in series with the DC voltage source through S 1 , S 5 , S 6 , S 10 , S 11 Supply power to the load. The inverter output voltage is -2V dc .

[0052] 10)v o =-2V dc : As shown in Figure 6(j), the switch tube S 2 , S 3 , S 4 , S 6 , S 10 , S 11 The diode D is turned on, and the other switches are turned off. 1 Forward conduction, diode D 2 Cut-off; Capacitor C 1 Connect in parallel with a DC voltage source to charge to V dc At the same time, the capacitor C 2 Connect in series with the DC voltage source through S 2 , S 4 , S 6 , S 10 , S 11 Supply power to the load. The inverter output voltage is -2V dc .

[0053] 11)v o =-3V dc : As shown in Figure 6(k), the switch tube S 1 , S4 , S 6 , S 8 , S 10 , S 11 The diode D is turned on, and the other switches are turned off. 2 Forward conduction, diode D 1 Cut-off; Capacitor C 1 Connect the capacitor C in series with the DC voltage source 3 At the same time, the capacitor C 1 , C 2 Connect in series with the DC voltage source through S 1 , S 4 , S 6 , S 10 , S 11 Supply power to the load. The inverter output voltage is -3V dc .

[0054] 12)v o =-4V dc : As shown in Figure 6(l), the switch tube S 1 , S 3 , S 5 , S 7 , S 10 , S 11 The diode D is turned on, and the other switches are turned off. 1 Forward conduction, diode D 2 Cut-off; Capacitor C 2 Connect in parallel with a DC voltage source to charge to V dc At the same time, the capacitor C 1 , C 3 Connect in series with the DC voltage source through S 1 , S 5 , S 7 , S 10 , S 11 Supply power to the load. The inverter output voltage is -4V dc .

[0055] 13)v o =-4V dc : As shown in Figure 6(m), the switch tube S 2 , S 3 , S 4 , S 7 , S 10 , S 11 The diode D is turned on, and the other switches are turned off. 1 Forward conduction, diode D 2 Cut-off; Capacitor C 1 Connect in parallel with a DC voltage source to charge to V dc At the same time, the capacitor C 2, C 3 Connect in series with the DC voltage source through S 2 , S 4 , S 7 , S 10 , S 11 Supply power to the load. The inverter output voltage is -4V dc .

[0056] The second switched capacitor self-balanced nine-level inverter is simulated and analyzed in the time domain using Simulink simulation software. The voltage of the DC voltage source is 100V, C 1 =680μF, C 2 =680μF, C 3 =22μF, load is 80Ω+50mH, switching frequency is 20kHz, and the output voltage is 220V. The simulation results are as follows Figure 7 As shown in the figure, it can be seen that the simulation results are consistent with the theoretical analysis.

[0057] Figure 8 This is the transient response waveform of the second type of switched capacitor self-equalizing nine-level inverter load jump. At the initial moment, the load is 100Ω; at 0.06s, the load changes from 100Ω to 50Ω; at 0.18s, the load changes back from 50Ω to 100Ω, and the system operation is consistent with the initial state. It can be seen from the figure that when the load changes, the output voltage remains constant.

[0058] The first, third and fourth switched capacitor self-balanced nine-level inverters can also use the control logic of generating switch tube drive signals by using sine waves and triangle waves as shown in FIG. 5( d ), and their working states will not be described in detail.

[0059] According to the above theoretical analysis and simulation, it can be seen that the switched capacitor self-equalizing nine-level inverter proposed in the present invention has the advantages of simple structure, low cost, high power density, and high system efficiency; it has high voltage gain, the output voltage is four times the input voltage, can be connected to resistive and inductive loads, has a wide range of applications, and has high reliability. The three capacitors can achieve charging and discharging balance of the capacitor voltage under the switching cycle, and the capacitor voltage and capacitance value are small. Therefore, the switched capacitor self-equalizing nine-level inverter proposed in the present invention has obvious advantages over the prior art.

Claims

1. A switched capacitor self-balanced nine-level inverter, characterized in that: DC voltage source V dc The positive electrode of is connected to the drain of the switch tube S1 and the anode of the diode D3, the cathode of D3 is connected to the positive electrode of the capacitor C1, and the negative electrode of C1 is connected to the source of S1; V dc The negative electrode of S1 is connected to the source of the switch tube S4 and the cathode of the diode D4, the anode of D4 is connected to the negative electrode of the capacitor C2, and the positive electrode of C2 is connected to the drain of S4; the source of S1 is also connected to the drain of the switch tube S3, the source of S3 is connected to the anode of the diode D1, and the cathode of D1 is connected to the drain of S4; V dc The negative electrode of is also connected to the cathode of diode D2, the anode of D2 is connected to the source of switch tube S8, the drain of S8 is connected to the source of switch tube S7, the drain of S7 is connected to the positive electrode of C1; the source of S7 is also connected to the negative electrode of capacitor C3, the drain of S7 is also connected to the anode of diode D5, the positive electrode of C3 and the cathode of D5 are both connected to switch tube S9 and switch tube S 11 The negative electrode of C2 is also connected to the switch tube S 10 , switch tube S 12 The source of S9 and S 10 The drain is connected to one end of the load, S 11 The source and S 12 The drain is connected to the other end of the load.

2. The switched capacitor self-balanced nine-level inverter according to claim 1, characterized in that: D3 is replaced by switch S2, and the source of S2 is connected to V dc The positive electrode of S2 is connected to the positive electrode of C1; D4 is replaced by switch tube S5, and the drain of S5 is connected to V dc The negative electrode of S5 is connected to the negative electrode of C2; D5 is replaced by switch tube S6; the source of S6 is connected to the drain of S7, and the drain of S6 is connected to S9, S 11 of the drain.

3. A switched capacitor self-balanced nine-level inverter, characterized in that: DC voltage source V dc The positive electrode of is connected to the drain of the switch tube S1 and the anode of the diode D3, the cathode of D3 is connected to the positive electrode of the capacitor C1, and the negative electrode of C1 is connected to the source of S1; V dc The negative electrode of S1 is connected to the source of the switch tube S4 and the cathode of the diode D4, the anode of D4 is connected to the negative electrode of the capacitor C2, and the positive electrode of C2 is connected to the drain of S4; the source of S1 is also connected to the drain of the switch tube S3, the source of S3 is connected to the anode of the diode D1, and the cathode of D1 is connected to the drain of S4; V dc The positive electrode of is also connected to the drain of the switch tube S8, the source of S8 is connected to the anode of the diode D2, the cathode of D2 is connected to the drain of the switch tube S7, the source of S7 is connected to the negative electrode of C2; the drain of S7 is also connected to the positive electrode of the capacitor C3, the source of S7 is also connected to the cathode of the diode D5, the negative electrode of C3 and the anode of D5 are both connected to the switch tube S 10 , switch tube S 12 The positive electrode of C1 is also connected to the switch tube S9 and the switch tube S 11 The drain of S9 and the source of S 10 The drain is connected to one end of the load, S 11 The source and S 12 The drain is connected to the other end of the load.

4. The switched capacitor self-balanced nine-level inverter according to claim 3, characterized in that: D3 is replaced by switch S2, and the source of S2 is connected to V dc The positive electrode of S2 is connected to the positive electrode of C1; D4 is replaced by switch tube S5, and the drain of S5 is connected to V dc The negative electrode of S5 is connected to the negative electrode of C2; D5 is replaced by switch tube S6, the drain of S6 is connected to the source of S7, and the source of S6 is connected to S 10 , S 12 The source.

5. The control method of the switched capacitor self-balanced nine-level inverter according to claim 1, characterized in that: Using the driving signal V gs1 、V gs3 、V gs4 、V gs7 -V gs12 Control switch tubes S1, S3, S4, S7-S respectively 12 ; where, V gs1 = (B0) or (B3), V gs3 = (A7) or (B2), V gs4 = (B1) or (B4), V gs7 = A7, V gs8 = (A8) and (A9), V gs9 = not((A1) and (A2)), V gs10 = (A1) and (A2), V gs11 = not((A0) and (A2)), V gs12 = not((A0) and (A2)); where B0 = (A3) and (A 10 ), B1 = (A6) and (A 10 ), B2 = (A3) xor (A6), B3 = (not((A5) and (A7))) and (A9), B4=(not((A4)and(A7)))and(A9); A0, A1, A2, ..., A 10 They are: Such as u s >0, A0 is true, i.e. A0=1, and A1 is false, i.e. A1=0; if abs(u s )>u1, then A2 is true, that is, A2=1; if abs(u s )>u2, then A3 is true, that is, A3=1; if u2>u3, then A4 is true, that is, A4=1, and A5 is false, that is, A5=0; if abs(u s )>u3, then A6 is true, that is, A6=1; if abs(u s )>u4, then A7 is true, i.e. A7=1, and A8 is false, i.e. A8=0; if abs(u s )>3A c Then A9 is true, that is, A9=1, A 10 If it is false, then A 10 =0; The u s is a sine wave, u1, u2, u3, u4 are triangular waves; the frequency of u1, u2, u3, u4 is greater than u s The frequency of u1 and u4 is equal; the frequency of u2 and u3 is equal and the phase difference is 180°; the frequency of u1 and u4 is twice the frequency of u2 and u3; the maximum value of u1 is A c , the minimum value is 0; the maximum value of u4 is 4A c , minimum value is 3A c ; The maximum value of u2 and u3 is 3A c , the minimum value is A c ;u s The amplitude is less than 4A c .

6. The control method of the switched capacitor self-balanced nine-level inverter according to claim 2, characterized in that: Using the driving signal V gs1 -V gs12 Control switch tubes S1-S respectively 12 ; where, V gs1 = (B0) or (B3), V gs2 = not((B0) or (B3)), V gs3 = (A7) or (B2), V gs4 = (B1) or (B4), V gs5 = not((B1) or (B4)), V gs6 = A8, V gs7 = A7, V gs8 = (A8) and (A9), V gs9 = not((A1) and (A2)), V gs10 = (A1) and (A2), V gs11 = not((A0) and (A2)), V gs12 = not((A0) and (A2)); where B0 = (A3) and (A 10 ), B1 = (A6) and (A 10 ), B2 = (A3) xor (A6), B3 = (not ((A5) and (A7))) and (A9), B4=(not((A4)and(A7)))and(A9); A0, A1, A2, ..., A 10 They are: Such as u s >0, A0 is true, i.e. A0=1, and A1 is false, i.e. A1=0; if abs(u s )>u1, then A2 is true, that is, A2=1; if abs(u s )>u2, then A3 is true, that is, A3=1; if u2>u3, then A4 is true, that is, A4=1, and A5 is false, that is, A5=0; if abs(u s )>u3, then A6 is true, that is, A6=1; if abs(u s )>u4, then A7 is true, i.e. A7=1, and A8 is false, i.e. A8=0; if abs(u s )>3A c Then A9 is true, that is, A9=1, A 10 If it is false, then A 10 =0; The u s is a sine wave, u1, u2, u3, u4 are triangular waves; the frequency of u1, u2, u3, u4 is greater than u s The frequency of u1 and u4 is equal; the frequency of u2 and u3 is equal and the phase difference is 180°; the frequency of u1 and u4 is twice the frequency of u2 and u3; the maximum value of u1 is A c , the minimum value is 0; the maximum value of u4 is 4A c , minimum value is 3A c ; The maximum value of u2 and u3 is 3A c , the minimum value is A c ;u s The amplitude is less than 4A c .

7. The control method of the switched capacitor self-balanced nine-level inverter according to claim 3, characterized in that: Using the driving signal V gs1 、V gs3 、V gs4 、V gs7 -V gs12 Control switch tubes S1, S3, S4, S7-S respectively 12 ; where, V gs1 = (B0) or (B3), V gs3 = (A7) or (B2), V gs4 = (B1) or (B4), V gs7 = A7, V gs8 = (A8) and (A9), V gs9 = not((A1) and (A2)), V gs10 = (A1) and (A2), V gs11 = not((A0) and (A2)), V gs12 = not((A0) and (A2)); where B0 = (A3) and (A 10 ), B1 = (A6) and (A 10 ), B2 = (A3) xor (A6), B3 = (not ((A5) and (A7))) and (A9), B4=(not((A4)and(A7)))and(A9); A0, A1, A2, ..., A 10 They are: Such as u s >0, A0 is true, i.e. A0=1, and A1 is false, i.e. A1=0; if abs(u s )>u1, then A2 is true, that is, A2=1; if abs(u s )>u2, then A3 is true, that is, A3=1; if u2>u3, then A4 is true, that is, A4=1, and A5 is false, that is, A5=0; if abs(u s )>u3, then A6 is true, that is, A6=1; if abs(u s )>u4, then A7 is true, i.e. A7=1, and A8 is false, i.e. A8=0; if abs(u s )>3A c Then A9 is true, that is, A9=1, A 10 If it is false, then A 10 =0; The u s is a sine wave, u1, u2, u3, u4 are triangular waves; the frequency of u1, u2, u3, u4 is greater than u s The frequency of u1 and u4 is equal; the frequency of u2 and u3 is equal and the phase difference is 180°; the frequency of u1 and u4 is twice the frequency of u2 and u3; the maximum value of u1 is A c , the minimum value is 0; the maximum value of u4 is 4A c , minimum value is 3A c ; The maximum value of u2 and u3 is 3A c , the minimum value is A c ;u s The amplitude is less than 4A c .

8. The control method of the switched capacitor self-balanced nine-level inverter according to claim 4, characterized in that: Using the driving signal V gs1 -V gs12 Control switch tubes S1-S respectively 12 ; where V gs1 = (B0) or (B3), V gs2 = not((B0) or (B3)), V gs3 = (A7) or (B2), V gs4 = (B1) or (B4), V gs5 = not((B1) or (B4)), V gs6 = A8, V gs7 = A7, V gs8 = (A8) and (A9), V gs9 = not((A1) and (A2)), V gs10 = (A1) and (A2), V gs11 = not((A0) and (A2)), V gs12 = not((A0) and (A2)); where B0 = (A3) and (A 10 ), B1 = (A6) and (A 10 ), B2 = (A3) xor (A6), B3 = (not ((A5) and (A7))) and (A9), B4=(not((A4)and(A7)))and(A9); A0, A1, A2, ..., A 10 They are: Such as u s >0, A0 is true, i.e. A0=1, and A1 is false, i.e. A1=0; if abs(u s )>u1, then A2 is true, that is, A2=1; if abs(u s )>u2, then A3 is true, that is, A3=1; if u2>u3, then A4 is true, that is, A4=1, and A5 is false, that is, A5=0; if abs(u s )>u3, then A6 is true, that is, A6=1; if abs(u s )>u4, then A7 is true, i.e. A7=1, and A8 is false, i.e. A8=0; if abs(u s )>3A c Then A9 is true, that is, A9=1, A 10 If it is false, then A 10 =0; The u s is a sine wave, u1, u2, u3, u4 are triangular waves; the frequency of u1, u2, u3, u4 is greater than u s The frequency of u1 and u4 is equal; the frequency of u2 and u3 is equal and the phase difference is 180°; the frequency of u1 and u4 is twice the frequency of u2 and u3; the maximum value of u1 is A c , the minimum value is 0; the maximum value of u4 is 4A c , minimum value is 3A c ; The maximum value of u2 and u3 is 3A c , the minimum value is A c ;u s The amplitude is less than 4A c .

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