Quantum search simulation method and system for supercomputing

Abstract

The present application relates to the technical field of quantum search simulation, and particularly relates to a quantum search simulation method and system for supercomputing, which constructs a quantum search simulation heterogeneous execution environment, the heterogeneous execution environment is composed of a general processor CPU host end and a coprocessor DCU device end, and the general processor CPU interacts with the coprocessor DCU through a communication bus; in the heterogeneous execution environment, the current computing task scale is determined according to the input number of quantum bits and the target item to be searched, the quantum register is created on the general processor CPU according to the search algorithm circuit diagram, the memory space for storing the probability amplitude data is created on the coprocessor DCU, and the equal-weight superposition state is initialized and prepared, the G iteration process of the quantum search algorithm is simulated, and the target item probability amplitude is obtained through G iteration. The present application transplants the quantum gate operation with intensive calculation to the DCU accelerator for execution, realizes the heterogeneous version running of the quantum search algorithm on the supercomputing platform, has strong scalability, and improves the computing performance of the quantum search simulation platform.

Description

Technical Field

[0001] This invention relates to the field of quantum search simulation technology, and in particular to a quantum search simulation method and system for supercomputing. Background Technology

[0002] A quantum computer is a device that processes information based on the laws of quantum physics. It can solve some non-polynomial complexity problems in a shorter time. In 1996, Grover's quantum search algorithm, by increasing the probability of the target solution appearing, showed the ability to surpass classical computers in the search problem of unordered databases. Grover's algorithm, with its quadratic speedup advantage, can be applied to many fields such as data mining, key solving, machine learning, network routing, and hash functions. With the development of big data, the problem of searching massive amounts of data has become an urgent challenge, and the large-scale simulation implementation of Grover's algorithm has significant practical implications.

[0003] Due to the inherent limitations of current real quantum computers, quantum circuit simulation still plays a crucial role in the research and verification of quantum computing. Simulating quantum algorithms requires numerous matrix-vector update operations; therefore, accelerators such as GPUs and DCUs, which excel at large-scale parallel computing, are ideal tools for simulating quantum algorithms. When simulating quantum algorithms on classical computers, memory requirements increase exponentially with the number of qubits, resulting in high resource consumption and long simulation times. The update operations of quantum gates on the quantum ground state probability amplitudes consume a significant portion of this time. In distributed versions, data communication is required when simulating data-dependent quantum gates, which is a major challenge in quantum algorithm simulation. Therefore, utilizing scalable heterogeneous clusters to achieve efficient quantum algorithm simulation has become a promising research direction. Summary of the Invention

[0004] To this end, the present invention provides a quantum search simulation method and system for supercomputing, which portes the computationally intensive quantum gate operations to the DCU accelerator for execution, enabling the quantum search algorithm to run in a heterogeneous version on the supercomputing platform, with strong scalability and improved computing performance of the quantum search simulation platform.

[0005] According to the design scheme provided by this invention, a quantum search simulation method for supercomputing is provided for simulating the Grover quantum search algorithm, comprising:

[0006] A heterogeneous execution environment for quantum search simulation is constructed. The heterogeneous execution environment consists of a general-purpose processor (CPU) host for logic control processing of the quantum search algorithm and a coprocessor (DCU) device for parallelizing the loop part of the quantum gate simulation function in the quantum search algorithm. The general-purpose processor (CPU) interacts with the coprocessor (DCU) via a communication bus.

[0007] In a heterogeneous execution environment, the current computational task scale is determined based on the number of input qubits and the target term to be searched. A quantum register is created on the general-purpose processor CPU according to the search algorithm roadmap, and a memory space for storing probability amplitude data is created on the coprocessor DCU. An equal-weighted superposition state is initialized and prepared, and the quantum search algorithm G iteration process is simulated. The probability amplitude of the target term is obtained through G iteration.

[0008] As a quantum search simulation method for supercomputing in this invention, a heterogeneous execution environment for quantum search simulation is constructed. The HIP software stack development environment of the coprocessor DCU is used to realize distributed computing of multiple DCUs through HIP+MPI hybrid programming. The quantum gate simulation function is rewritten into the kernel function to be run by the coprocessor DCU through HIP-C.

[0009] As a quantum search simulation method for supercomputing in this invention, the HIP+MPI hybrid programming method further includes: enabling concurrency and data transmission between multi-process control nodes through MPI, data communication between processes through MPI, and multi-threading optimization within a process through HIP.

[0010] As a quantum search simulation method for supercomputing in this invention, further, in the initialization and preparation of equal-weighted superposition states, for an n-bit quantum system, its state is determined by 2... n It consists of a superposition of ground states, and the probability amplitude of each ground state is represented by complex coefficients composed of floating-point numbers. The probability amplitudes of all ground states are stored using complex number arrays.

[0011] As a quantum search simulation method for supercomputing in this invention, after initializing and preparing an equal-weighted superposition state, the kernel function corresponding to the quantum gate simulation function is started at the coprocessor DCU through a preset calling function to complete the simulation of the quantum search algorithm G iteration process.

[0012] As a quantum search simulation method for supercomputing in this invention, before starting the kernel function corresponding to the quantum gate simulation function at the coprocessor DCU through a preset calling function, it further includes: setting the number of threads started by the coprocessor DCU according to the ground state probability amplitude data.

[0013] As a quantum search simulation method for supercomputing in this invention, the kernel function corresponding to the quantum gate simulation function is started at the coprocessor DCU to complete the simulation of the quantum search algorithm G iteration process, including: creating threads according to the set number of threads, and using the scheduler to allocate the loop part of the kernel function corresponding to the simulation function to the corresponding computing nodes for parallel processing.

[0014] As a quantum search simulation algorithm for supercomputing in this invention, the parallel processing further includes: using a preset locator in the kernel function to mark the current thread number, obtaining the offset address of the data read by the current thread according to the thread number, determining whether the data indexed by the thread exceeds the number of probability amplitudes stored in the coprocessor DCU through the offset address, and updating the ground state probability amplitude until all the kernel functions corresponding to the quantum gate simulation functions have finished running, transmitting the transformed ground state probability amplitude back from the coprocessor DCU to the general-purpose processor CPU, and obtaining the target item probability amplitude based on the transmitted data.

[0015] Furthermore, the present invention also provides a quantum search simulation system for supercomputing, used for simulating the Grover quantum search algorithm, comprising: a configuration module and a running module, wherein,

[0016] The configuration module is used to construct a heterogeneous execution environment for quantum search simulation. The heterogeneous execution environment consists of a general-purpose processor CPU host for logic control processing of the quantum search algorithm and a coprocessor DCU device for parallelizing the loop part of the quantum gate simulation function in the quantum search algorithm. The general-purpose processor CPU interacts with the coprocessor DCU via a communication bus.

[0017] The execution module is used to determine the current computational task scale based on the number of input qubits and the target item to be searched in a heterogeneous execution environment. According to the search algorithm roadmap, it creates a quantum register on the general-purpose processor CPU, creates a memory space on the coprocessor DCU to store probability amplitude data, initializes and prepares an equal-weighted superposition state, simulates the G iteration process of the quantum search algorithm, and obtains the probability amplitude of the target item through G iteration.

[0018] The beneficial effects of this invention are:

[0019] This invention utilizes a reasonable task allocation method to write kernel functions in HIP-C to transfer the parallel computing portion of a program to a DCU accelerator for acceleration, enabling the program to achieve excellent performance on heterogeneous platforms. In heterogeneous supercomputer clusters, a hybrid HIP+MPI programming approach can be adopted to implement multi-DCU distributed computing, giving the program good scalability in CPU+DCU heterogeneous clusters. Furthermore, experimental data demonstrates that the acceleration effect is significant in the single-DCU version, and the larger the number of qubits, the more pronounced the DCU acceleration effect. DCU devices have a good acceleration effect on quantum gate operations with intensive computation, greatly helping to overcome the time bottleneck of quantum algorithm simulation. The invention also verifies the portability of the basic quantum gate simulation functions implemented in C language in QuEST on supercomputer systems. These functions can be used to simulate more quantum algorithms on supercomputing platforms, improving algorithm simulation efficiency and broadening the scientific research ecosystem of supercomputing platforms, showing promising application prospects. Attached image description:

[0020] Figure 1 This is a schematic diagram of the quantum search simulation process for supercomputing in the embodiment;

[0021] Figure 2 This is a schematic diagram of the Grover algorithm in the embodiment;

[0022] Figure 3 This is a schematic flowchart illustrating the simulation of the heterogeneous version of the Grover algorithm in this embodiment;

[0023] Figure 4 This is a schematic diagram of the single-node hardware architecture of the supercomputing system in the embodiment;

[0024] Figure 5 This is a schematic diagram comparing the experimental results of the multi-DCU version and the multi-CPU version in the example;

[0025] Figure 6 This example illustrates a comparison of experimental results between the multi-CPU version and the single-node CPU+DCU heterogeneous version. Detailed implementation method:

[0026] To make the objectives, technical solutions, and advantages of this invention clearer and more understandable, the invention will be further described in detail below with reference to the accompanying drawings and technical solutions.

[0027] Quantum computing simulation is a memory-intensive and computationally intensive problem. To improve the efficiency of quantum algorithm simulation, this invention provides embodiments, see [link to embodiments]. Figure 1 As shown, a quantum search simulation method for supercomputing is provided for simulating the Grover quantum search algorithm, comprising:

[0028] S101. Construct a heterogeneous execution environment for quantum search simulation. The heterogeneous execution environment consists of a general-purpose processor (CPU) host for logic control processing of the quantum search algorithm and a coprocessor (DCU) device for parallelizing the loop part of the quantum gate simulation function in the quantum search algorithm. The general-purpose processor (CPU) interacts with the coprocessor (DCU) via a communication bus.

[0029] S102. In a heterogeneous execution environment, the current computational task scale is determined based on the number of input qubits and the target item to be searched. A quantum register is created on the general-purpose processor CPU according to the search algorithm roadmap, and a memory space for storing probability amplitude data is created on the coprocessor DCU. An equal-weighted superposition state is initialized and prepared. The quantum search algorithm G iteration process is simulated, and the probability amplitude of the target item is obtained through G iteration.

[0030] In quantum systems, a quantum state can not only exist in a definite state of 0 or 1, but also in a superposition of the two states. The ground state of a qubit can be represented by Dirac notations |0> and |1>, and the superposition state can be represented by equation (1).

[0031] |ψ>=α0|0>+α1|1> (1)

[0032] Complex numbers α0 and α1 are the probability amplitudes of the ground state, |α0| 2 +|α1| 2 =1,|α0| 2 and |α1| 2 Let be the probability of the corresponding ground state at the time of measurement. An n-bit qubit can be represented as 2^n qubits. n The complex state of the ground states is shown in equation (2), where, α(0..0)=α0,...,

[0033]

[0034] The Grover quantum search algorithm consists of an iterative operation of a set of unitary operators. It mainly maximizes the probability amplitude of the target item by changing the probability amplitude of the quantum ground state, as shown in Figure 2.

[0035] Let the number of qubits be n, and the total number of elements be N = 2. n The initial states of n qubits are subjected to Hadamard transformation to prepare an equal-weighted superposition state, as shown in equation (3). Let |s> represent the uniform superposition state of the initial state.

[0036]

[0037] Oracle consists of a unitary operator U wThe structure is such that the phase of the target term is reversed, Oracle = I-2|ψ><ψ|, if |α> is the target term, <α|ν>=0, then U w |α>=-|α>,U w |ν>=|ν>.

[0038] The mean inversion operator constructs a unitary matrix U s The amplitude of the target item is flipped relative to the average amplitude to amplify the amplitude of the target state, U s =2|s><s|-I.

[0039] The construction of the Oracle and the construction of the mean inversion operator are collectively referred to as the G iteration, where M is the number of target terms to be searched. Theoretically, Grover's algorithm goes through... After G iterations, the probability of finding the target component reaches its optimal value.

[0040] Supercomputers equipped with DCU accelerators are better suited than CPUs for processing large-scale, parallel programs, providing high-performance computing power to support highly complex and high-throughput data processing tasks. The "Songshan" supercomputer adopts a system architecture of Hygon-1 CPU + Hygon-1 DCU accelerators, with each node configured with 32 CPU cores and 4 DCU accelerators. The CPU and DCU work together via a high-speed PCIe 3.0 bus, achieving a maximum bandwidth of 28GB / s to accelerate data communication within the node. The Hygon general-purpose CPU is based on AMD-licensed, independently developed technology, compatible with the x86 instruction set, and possesses high application compatibility and low migration costs. The Hygon DCU coprocessor is based on a GPGPU architecture, fully compatible with the ROCm computing ecosystem, with a single card capacity of 16GB. It can be widely used in computationally intensive applications such as big data processing and quantum computing simulations, and has excellent acceleration effects for quantum parallelism in quantum algorithm simulations. The DCU has a complete software stack—the HIP software stack—a lightweight, modular software development environment used to support applications based on HIP heterogeneous computing. Furthermore, in this embodiment, a heterogeneous execution environment for quantum search simulation is constructed. The HIP software stack development environment of the coprocessor DCU is utilized, and distributed computing across multiple DCUs is achieved through a hybrid HIP+MPI programming approach. The quantum gate simulation functions are rewritten into kernel functions that run on the coprocessor DCUs using HIP-C. MPI can be used to enable concurrency and data transmission between multi-process control nodes; inter-process data communication is achieved through MPI; and intra-process multi-threading optimization is performed using HIP.

[0041] As a preferred embodiment, further, in the initial preparation of the equal-weighted superposition state, for the n-bit quantum system, its state is composed of 2... nThe system consists of a superposition of ground states, with the probability amplitude of each ground state represented by complex coefficients composed of floating-point numbers. All probability amplitudes of the ground states are stored using a complex array. After initializing and preparing the equal-weighted superposition states, the kernel function corresponding to the quantum gate simulation function is started on the coprocessor DCU via a preset calling function to complete the iterative process of the simulated quantum search algorithm G. Before starting the kernel function corresponding to the quantum gate simulation function on the coprocessor DCU via the preset calling function, the system also includes setting the number of threads to be started on the coprocessor DCU based on the ground state probability amplitude data. Threads can be created according to the set number of threads, and the scheduler can allocate the loop portion of the kernel function corresponding to the simulation function to the corresponding computing nodes for parallel processing.

[0042] A quantum algorithm consists of a series of operations performed by quantum gates on the quantum state vector |ψ>. A quantum gate is represented by a unitary matrix U, and the state vector after the quantum gate is applied is represented as |ψ>. ‘ >=U|ψ>. Figure 1 The Grover algorithm circuit diagram shown uses Hadamard gates, X gates, and multi-qubit control gates. The update rules of the ground state probability amplitudes can be analyzed by examining how these three quantum gates act on the state vector. In the formula, ellipses indicate that the corresponding bits have the same value, 0... i This indicates that the position of the i-th element is 0 or 1. i This indicates that the position of the i-th element is 1.

[0043] The matrix representation of a Hadamard gate is as follows The Hadamard gate acts on the i-th state vector, and the update rule for the probability amplitude of each ground state is given by equation (4).

[0044]

[0045]

[0046] The matrix representation of the X-gate is as follows The ground state probability amplitude update rule is to exchange the ground state probability amplitude with the i-th bit being 0 with the ground state probability amplitude with the i-th bit being 1, as shown in equation (5):

[0047] α′(...0 i ...)=α(...1 i ...)

[0048] α ′ (...1 i ...)=α(...0 i ...) (5)

[0049] The update rule for the probability amplitude of a multi-bit control gate is that when bits 0 to n-1 of the two ground states are 1, the probability amplitudes of the ground state with bit n being 0 and the ground state with bit n being 1 are exchanged, as shown in formula (6):

[0050] a ′ (1 n 1 n-1 ...1110)=ɑ(0 n 1 n-1 ...1110)

[0051] a ′ (0 n 1 n-1 ...1110)=ɑ(1 n 1 n-1 ...1110) (6)

[0052] When performing quantum circuit simulations, it is necessary to simulate all quantum states. The states of an n-bit quantum system are determined by 2^n quantum bits. n It consists of a superposition of ground states, each with its corresponding probability amplitude. In this embodiment, the probability amplitude of each ground state can be represented by a complex coefficient consisting of two double-type floating-point numbers. The complex coefficient structure can be designed as follows:

[0053]

[0054] The quantum register should store the total number of quantum ground states, numAmpsTotal. The probability amplitudes of all ground states are stored in a complex array, stateVec. In the distributed version, the total number of processes started, the process ID of each node, the ground state probability amplitude stored on each node, and the ground state probability amplitude stored on the DCU accelerator should be recorded. The created quantum register structure can be represented as follows:

[0055]

[0056] The Grover algorithm simulation first inputs the number of qubits and the number of targets to be searched, creates a quantum register and initializes it to prepare an equal-weighted superposition state, and then simulates the G-iteration process consisting of an oracle and a diffuser. After G iterations, the probability value of the target item is obtained, and the occupied memory is released. The pseudocode of the Grover algorithm simulation process is as follows:

[0057] 1. Input: numQubits, target

[0058] 2. Output: target probability

[0059] 3.Qureg qureg←createQureg(numQubits,env);

[0060] 4. initPlusState(qureg);

[0061] 5. for(r←0to M_PI / 4*sqrt(1< <numQubits)){

[0062] 6.applyOracle(qureg,numQubits,target);

[0063] 7.applyDiffuser(qureg,numQubits);

[0064] 8.}

[0065] 9.target probability←getProbAmp(qureg,target);

[0066] 10. destroyQureg(qureg,env);

[0067] As a preferred embodiment, the parallelization process further includes: using a preset locator in the kernel function to mark the current thread number, obtaining the offset address of the data read by the current thread based on the thread number, determining whether the data indexed by the thread exceeds the number of probability amplitudes stored in the coprocessor DCU based on the offset address, and if it does not exceed the number of probability amplitudes, updating the ground state probability amplitude until all the kernel functions corresponding to the quantum gate simulation functions have finished running, transmitting the transformed ground state probability amplitude back from the coprocessor DCU to the general-purpose processor CPU, and obtaining the target item probability amplitude based on the transmitted data.

[0068] The Grover algorithm increases computational complexity due to the G iteration process. For example, when numQubits = 20, the number of ground state probability amplitudes is 1,048,576, and the number of iterations is 804. When executing the specific quantum gate function, it is necessary to traverse all the probability amplitudes of the ground states, making it a computationally intensive function. However, the loop part in the quantum gate simulation function has no data dependency, so the loop part can be completely parallelized, making it suitable for porting to DCU accelerators for parallel computing acceleration.

[0069] The core of the QuEST quantum simulator is a C language implementation of simulation functions and their distributed versions of basic quantum gates such as Hadamard, RotateX / Y / Z, and PauliX / Y / Z. In this embodiment, the simulation functions of Hadamard gates, X gates, and multi-qubit control gates can be rewritten in HIP-C as kernel functions that can run on the DCU. This allows the parallel quantum gate simulation part to be executed on the DCU accelerator, while the logic control part runs on the CPU from the host side, significantly improving the simulation efficiency of the quantum algorithm. The simulation implementation flow of the CPU+DCU heterogeneous version of the quantum search algorithm is as follows: Figure 3 As shown.

[0070] The host first determines the current computational task size based on the number of input qubits. The CPU creates a quantum register based on the number of input qubits n, and the total probability amplitude corresponding to all ground states is 2^n. n The program calls the `hipMalloc` function to create a memory space on the DCU accelerator to store probability amplitude data and prepare the initial state to form a superposition state. After the initial state preparation is complete, the `hipLanchKernel` function is called to start the quantum gate kernel function written in HIP-C on the DCU side. Before calling the kernel function, the number of threads started on the DCU accelerator needs to be determined according to the number of ground state probability amplitudes. The specific settings are as follows: `dim3 blocksize(256,1)`.

[0071] dim3 gridsize(total ground state probability amplitude / 256 + 1, 1);

[0072] hipLaunchKernelGGL(quantum gate kernel function, gridsize, blocksize, parameter1, parameter2...);

[0073] After the kernel function starts, the device automatically creates threads equal to `gridsize * blocksize`. These threads are then allocated to numerous computing cores by the device's scheduler, achieving parallelization. Within the kernel function, `blockIdx.x * blockDim.x + threadIdx.x` locates the current thread number. Based on this thread number, the offset address for the current thread reading data is calculated. It is then determined whether the data indexed by the thread exceeds the number of probability amplitudes stored in the DCU accelerator. If not, the ground-state probability amplitude is updated. Following the Grover algorithm's roadmap, the Oracle and Diffuser iterative processes, composed of quantum gates, are executed. After all quantum gate operations are completed, the transformed ground-state probability amplitude is transmitted back to the CPU from the DCU accelerator using the `hipMemcpy` function. The `getProbAmp` function retrieves the probability amplitude of the target item, and `hipFree` releases the occupied memory.

[0074] Furthermore, based on the above method, this embodiment of the invention also provides a quantum search simulation system for supercomputing, used for simulating the Grover quantum search algorithm, comprising: a configuration module and a running module, wherein,

[0075] The configuration module is used to construct a heterogeneous execution environment for quantum search simulation. The heterogeneous execution environment consists of a general-purpose processor CPU host for logic control processing of the quantum search algorithm and a coprocessor DCU device for parallelizing the loop part of the quantum gate simulation function in the quantum search algorithm. The general-purpose processor CPU interacts with the coprocessor DCU via a communication bus.

[0076] The execution module is used to determine the current computational task scale based on the number of input qubits and the target item to be searched in a heterogeneous execution environment. According to the search algorithm roadmap, it creates a quantum register on the general-purpose processor CPU, creates a memory space on the coprocessor DCU to store probability amplitude data, initializes and prepares an equal-weighted superposition state, simulates the G iteration process of the quantum search algorithm, and obtains the probability amplitude of the target item through G iteration.

[0077] To verify the effectiveness of this solution, the following explanation is based on experimental data:

[0078] On the "Songshan" supercomputer platform, the quantum search algorithm with different numbers of qubits was simulated for both the CPU+DCU heterogeneous version and the single CPU version, and the probability amplitude of the target item was recorded. After experimental comparison, when the number of qubits is the same, the probability amplitude of the target item obtained is the same and close to 1, which proves the correctness of the simulation results. The experimental results are shown in Table 1.

[0079] Table 1 Comparison of experimental results between CPU+DCU heterogeneous version and single-CPU version

[0080]

[0081] Experimental results from the single-CPU and heterogeneous versions show that when the number of qubits is 20, the speedup of the CPU+DCU heterogeneous version is 8.597. As the number of qubits increases, the speedup reaches over 60 when the number of qubits exceeds 22. This is because the number of ground state probability amplitudes to be processed increases exponentially with the number of qubits. In a DCU accelerator, multithreading can be enabled to achieve true parallelism, demonstrating the superiority of the DCU accelerator in quantum algorithm simulation. Compared to processing all ground state probability amplitudes serially, the DCU accelerator can significantly improve the algorithm's running efficiency.

[0082] To fully utilize the heterogeneous cluster resources of the "Songshan" supercomputer, and referencing the code framework of the multi-CPU distributed version of the QuEST quantum simulator, a multi-DCU version of the Grover algorithm on the "Songshan" supercomputing platform was designed using the MPI+HIP programming model. The main problem to be solved in the simulation on the heterogeneous cluster is how to achieve efficient data communication between processors and the probability amplitude exchange of nonlocal qubits.

[0083] Depend on Figure 4 As shown, in the single-node hardware architecture of the "Songshan" supercomputing system, the Hygon-1 CPU divides its 32 computing cores into four dies. Each die directly controls one DCU accelerator via hardware connections. Since direct data access between DCUs is not possible, the distributed version of the quantum search algorithm simulation uses a model where one MPI process is bound to one CPU core and one DCU accelerator. When data exchange is needed between DCUs, communication is conducted through the host (CPU). When the number of input qubits increases, only the submitted shell script needs to be modified to change the number of enabled cores, thus giving the quantum algorithm simulation strong scalability on the "Songshan" supercomputing platform. The shell script is as follows:

[0084] #! / bin / bash

[0085] #SBATCH--partition=fat

[0086] #SBATCH-J multi-DCU

[0087] #SBATCH--nodes=256

[0088] #SBATCH--ntasks-per-node=1

[0089] #SBATCH--cpus-per-task=1

[0090] #SBATCH--gres=dcu:1

[0091] #load the environment

[0092] module load mpi / hpcx / 2.7.4 / gcc-7.3.1

[0093] time mpirun. / grovers

[0094] The program first uses the `createQuESTEnv` function to create the MPI environment and obtain the process ID on the local device. Then, it calls `hipGetDevice` to get the device ID of the corresponding DCU accelerator and uses the `hipSetdevice` function to bind the process ID to the corresponding device ID, ensuring that each process can only operate the DCU device it is bound to. Next, it creates quantum registers and allocates the required memory space based on the total number of ground states. In distributed mode, a balanced allocation strategy is used to distribute all state vectors evenly across the nodes, ensuring that each node handles the same amount of work. Multiple MPI processes simultaneously call the `hipMalloc` function to allocate memory space on their bound DCU devices to store the probability amplitudes of the ground states and are responsible for running quantum gate simulation functions to update the probability amplitudes. Each DCU device also needs to allocate a set of ground state probability amplitude arrays of the same size for nonlocal qubit data communication.

[0095] In the multi-DCU distributed version, there is a data dependency during the simulation of Hadamard gates and X gates. Before performing quantum gate simulation, it is necessary to first determine whether a data dependency exists based on the position of the qubits involved in the quantum gate interaction. If no data dependency exists, the quantum gate kernel function is directly called to update the ground state probability amplitude on the DCU accelerator. If a data dependency exists, the corresponding process ID is found, and the data in the DCU is transferred to the corresponding CPU via hipMemcpy(DTH). The data is then copied to each other's CPUs using the MPI communication function, and then transferred back to the DCU accelerator via hipMemcpy(HTD) for further calculation of the ground state probability amplitude. The implementation process of other quantum gate functions is similar. The pseudocode for data communication is as follows:

[0096] 1. if (no data dependency exists) {

[0097] 2. hipLaunchKernelGGL();

[0098] 3.}

[0099] 4. else{

[0100] 5. / * Find the process ID corresponding to the local machine * /

[0101] 6. pairRank ← getChunkPairId();

[0102] 7. / *DeviceToHost* /

[0103] 8. hipMemcpy();

[0104] 9. / * Inter-process communication * /

[0105] 10. exchangeStateVectors();

[0106] 11. MPI_Sendrecv();

[0107] 12. / *HostToDevice* /

[0108] 13. hipMemcpy();

[0109] 14. hipLaunchKernelGGL();

[0110] 15.}

[0111] After all quantum gate operations are completed, the transformed ground state probability amplitude is transmitted from the DCU accelerator back to the CPU via the hipMemcpy function to obtain the probability amplitude of the target term, release the memory occupied by the CPU and DCU, and shut down the MPI environment.

[0112] To simulate large-scale quantum search algorithms, multi-CPU and multi-DCU versions of the simulation were conducted on the "Songshan" supercomputing platform. In the multi-CPU version, the experimental results for 24, 25, and 26 qubits with 32, 64, 128, and 256 CPU cores respectively are shown in Table 2. Grover's algorithm uses a large number of Hadamard and X gates in its quantum circuitry. Both of these gates are data-dependent in the distributed version, requiring data communication during simulation. However, as the number of CPU cores increases, Grover's algorithm simulation achieves a significant speedup. This is because, with the same number of qubits, more CPU cores result in fewer ground-state probability amplitudes processed per CPU core, reducing the amount of data that needs to be transmitted during communication. The computational gains outweigh the data transmission overhead, thus reducing the runtime.

[0113] Table 2 Experimental Results for Multi-CPU Version

[0114]

[0115] In the multi-DCU version, the experimental results of simulating 16, 17, 18, and 19 qubits with 32, 64, 128, and 256 DCU cores respectively are shown in Table 3. Increasing the number of DCU accelerators improves the running efficiency of Grover's algorithm.

[0116] Table 3 Experimental Results for Multiple DCU Versions

[0117]

[0118] Comparison of experimental results between multi-CPU and multi-DCU versions, for example Figure 5 As shown, the results indicate that the multi-DCU version takes significantly longer to run 19 bits than the multi-CPU version, and its efficiency is far lower than that of the multi-CPU and single-DCU versions. This is because DCUs cannot communicate directly with each other and need to communicate with their bound CPUs. Data communication is frequent and complex, and the performance improvement brought by parallelism in the multi-DCU version is insufficient to compensate for the problem caused by low communication efficiency. Therefore, the multi-DCU version is not suitable for continuously simulating a large number of data-dependent quantum gates such as Hadamard gates and X gates. It is more suitable for computationally intensive operations with infrequent communication processes, such as phase gates in quantum Fourier transform simulations where there is no data dependency.

[0119] Figure 6 The results show the experimental results of simulating 24, 25, and 26 qubits in the single-node CPU+DCU heterogeneous version and the multi-CPU distributed version. When the multi-CPU version has 256 CPU cores enabled, its simulation efficiency is better than that of the single-DCU version. Therefore, the multi-CPU distributed version is suitable for simulating large-scale quantum search algorithms.

[0120] The data above shows that the CPU+DCU heterogeneous version of the algorithm simulation in this case can achieve a speedup of 64.462 compared to the CPU version. It has good scalability in heterogeneous clusters. The more cores are enabled, the more significant the acceleration effect. The DCU accelerator can demonstrate excellent performance in quantum algorithm simulation, providing a new direction for quantum algorithm simulation.

[0121] Unless otherwise specifically stated, the relative steps, numerical expressions, and values ​​of the components and steps described in these embodiments do not limit the scope of the invention.

[0122] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the systems disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple; relevant parts can be referred to the method section.

[0123] The units and method steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of each example have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations are not considered to be beyond the scope of this invention.

[0124] Those skilled in the art will understand that all or part of the steps in the above methods can be implemented by a program instructing related hardware, and the program can be stored in a computer-readable storage medium, such as a read-only memory, a disk, or an optical disk. Optionally, all or part of the steps in the above embodiments can also be implemented using one or more integrated circuits. Accordingly, each module / unit in the above embodiments can be implemented in hardware or as a software functional module. This invention is not limited to any particular combination of hardware and software.

[0125] Finally, it should be noted that the above-described embodiments are merely specific implementations of the present invention, used to illustrate the technical solutions of the present invention, and not to limit it. The scope of protection of the present invention is not limited thereto. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments within the technical scope disclosed in the present invention, or make equivalent substitutions for some of the technical features; and these modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A quantum search simulation method for supercomputing, used for simulating the Grover quantum search algorithm, characterized in that, Include: A heterogeneous execution environment for quantum search simulation is constructed. The heterogeneous execution environment consists of a general-purpose processor (CPU) host for logic control processing of the quantum search algorithm and a coprocessor (DCU) device for parallelizing the loop part of the quantum gate simulation function in the quantum search algorithm. The general-purpose processor (CPU) interacts with the coprocessor (DCU) via a communication bus. In a heterogeneous execution environment, the current computational task scale is determined based on the number of input qubits and the target term to be searched. A quantum register is created on the general-purpose CPU according to the search algorithm roadmap, and a memory space for storing probability amplitude data is created on the DCU (Digital Core Unit). An equal-weighted superposition state is initialized, and the G-iteration process of the quantum search algorithm is simulated. The probability amplitude of the target term is obtained through G-iteration. Specifically, in the initialization of the equal-weighted superposition state, for an n-qubit quantum system, its state is determined by 2... n The system consists of a superposition of ground states, with the probability amplitude of each ground state represented by complex coefficients composed of floating-point numbers. The probability amplitudes of all ground states are stored using complex number arrays. After initializing and preparing the equal-weighted superposition state, the kernel function corresponding to the quantum gate simulation function is started at the coprocessor DCU through a preset calling function to complete the simulation of the quantum search algorithm G iteration process. The kernel function corresponding to the quantum gate simulation function is started at the coprocessor DCU to complete the simulation of the quantum search algorithm G iteration process, including: creating threads according to the set number of threads, and using the scheduler to allocate the loop part of the kernel function corresponding to the simulation function to the corresponding computing nodes for parallel processing; Parallelization also includes: using a preset locator in the kernel function to mark the current thread number, obtaining the offset address of the data read by the current thread based on the thread number, determining whether the data indexed by the thread exceeds the number of probability amplitudes stored in the coprocessor DCU based on the offset address, updating the ground state probability amplitude if it does not exceed the number of probability amplitudes stored in the coprocessor DCU, and continuing until the kernel functions corresponding to all quantum gate simulation functions have finished running, transmitting the transformed ground state probability amplitude back from the coprocessor DCU to the general-purpose processor CPU, and obtaining the target item probability amplitude based on the transmitted data.

2. The quantum search simulation method for supercomputing according to claim 1, characterized in that, In a heterogeneous execution environment for quantum search simulation, the HIP software stack development environment of the coprocessor DCU is used to realize distributed computing of multiple DCUs through HIP+MPI hybrid programming. The quantum gate simulation function is rewritten into the kernel function to be run by the coprocessor DCU through HIP-C.

3. The quantum search simulation method for supercomputing according to claim 2, characterized in that, The HIP+MPI hybrid programming method includes: enabling concurrency and data transmission between multi-process control nodes through MPI, data communication between processes through MPI, and multi-threading optimization within a process through HIP.

4. The quantum search simulation method for supercomputing according to claim 1, characterized in that, Before starting the kernel function corresponding to the quantum gate simulation function on the coprocessor DCU side through the preset calling function, it also includes: setting the number of threads started by the coprocessor DCU according to the ground state probability amplitude data.

5. A quantum search simulation system for supercomputing, used for simulating the Grover quantum search algorithm, characterized in that, It includes: a configuration module and a runtime module, wherein, The configuration module is used to construct a heterogeneous execution environment for quantum search simulation. The heterogeneous execution environment consists of a general-purpose processor CPU host for logic control processing of the quantum search algorithm and a coprocessor DCU device for parallelizing the loop part of the quantum gate simulation function in the quantum search algorithm. The general-purpose processor CPU interacts with the coprocessor DCU via a communication bus. The execution module, in a heterogeneous execution environment, determines the current computational task scale based on the input number of qubits and the target term to be searched. According to the search algorithm roadmap, it creates a quantum register on the general-purpose CPU, creates memory space on the DCU to store probability amplitude data, initializes and prepares an equal-weighted superposition state, simulates the G-iteration process of the quantum search algorithm, and obtains the probability amplitude of the target term through G-iteration. Specifically, in the initialization and preparation of the equal-weighted superposition state, for an n-qubit quantum system, its state is determined by 2... n The system consists of a superposition of ground states, with the probability amplitude of each ground state represented by complex coefficients composed of floating-point numbers. The probability amplitudes of all ground states are stored using complex number arrays. After initializing and preparing the equal-weighted superposition state, the kernel function corresponding to the quantum gate simulation function is started at the coprocessor DCU through a preset calling function to complete the simulation of the quantum search algorithm G iteration process. The kernel function corresponding to the quantum gate simulation function is started at the coprocessor DCU to complete the simulation of the quantum search algorithm G iteration process, including: creating threads according to the set number of threads, and using the scheduler to allocate the loop part of the kernel function corresponding to the simulation function to the corresponding computing nodes for parallel processing; Parallelization also includes: using a preset locator in the kernel function to mark the current thread number, obtaining the offset address of the data read by the current thread based on the thread number, determining whether the data indexed by the thread exceeds the number of probability amplitudes stored in the coprocessor DCU based on the offset address, updating the ground state probability amplitude if it does not exceed the number of probability amplitudes stored in the coprocessor DCU, and continuing until the kernel functions corresponding to all quantum gate simulation functions have finished running, transmitting the transformed ground state probability amplitude back from the coprocessor DCU to the general-purpose processor CPU, and obtaining the target item probability amplitude based on the transmitted data.

6. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, which, when executed by a processor, implements the steps of the method described in any one of claims 1 to 4.

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