A single-phase three-level inverter circuit and control method thereof

Abstract

The present invention belongs to the field of power electronics and provides a single-phase three-level inverter circuit and a control method thereof. The present invention solves the problem that the existing single-phase three-level inverter adopts traditional Si IGBT devices and adopts a single-phase three-level inverter that hybridly applies SiC MOSFET and Si IGBT. The conduction loss is reduced by a corresponding optimized modulation strategy, and the high-frequency hard switching action in the circuit is concentrated on the SiC MOSFET, thereby achieving the purpose of reducing the switching loss and improving the efficiency.

Description

Technical Field

[0001] The invention belongs to the field of power electronics, and in particular relates to a single-phase three-level inverter circuit and a control method thereof. Background Art

[0002] The statements in this section merely provide background information related to the present invention and do not necessarily constitute prior art.

[0003] With the development of power electronics technology, photovoltaic inverters have higher requirements for efficiency, power density and reliability. Compared with traditional three-level inverters, single-phase three-level inverters have better performance in output voltage and current harmonics, taking into account both system performance and complexity, and are an ideal choice for achieving high efficiency, high reliability and low harmonics.

[0004] As the production process of silicon carbide (SiC) devices matures, its advantages such as high switching frequency, low switching loss and high blocking voltage have brought greater room for improvement in the efficiency and power density of inverters. However, compared with traditional silicon (Si) devices, the cost of SiC devices is relatively high. The existing single-phase three-level inverter uses traditional Si IGBT devices, which have high switching losses and low efficiency in high-frequency applications. Summary of the invention

[0005] In order to solve at least one technical problem existing in the above-mentioned background technology, the first aspect of the present invention provides a single-phase three-level inverter circuit and a control method thereof, which adopts a single-phase three-level inverter that hybridly applies SiC MOSFET and Si IGBT, reduces the conduction loss through a specific optimized modulation strategy, and at the same time makes the high-frequency hard switching action in the circuit all concentrated on the SiC MOSFET, thereby achieving the purpose of reducing switching loss and improving efficiency.

[0006] In order to achieve the above object, the present invention adopts the following technical solution:

[0007] A single-phase three-level inverter circuit comprises: a plurality of switch tubes and diodes, each switch tube being anti-parallel connected to a diode;

[0008] The first ends of the first switch tube and the fifth switch tube are connected to the positive electrode of the bus, and the second ends of the fourth switch tube and the eighth switch tube are connected to the negative electrode of the bus; the second end of the first switch tube is connected to the second switch tube and the first end of the fifth diode, and the second end of the fifth switch tube is connected to the first end of the sixth switch tube and the ninth switch tube;

[0009] The first ends of the fourth switch tube and the eighth switch tube are respectively connected to the second ends of the third switch tube, the sixth diode, the seventh switch tube, and the tenth switch tube, and the second ends of the fifth diode and the ninth switch tube, and the first ends of the sixth diode and the tenth switch tube are all connected to the bus midpoint;

[0010] The second end of the second switch tube and the first end of the third switch tube are connected together to form a first bridge arm end, and the second end of the sixth switch tube and the first end of the seventh switch tube are connected together to form a second bridge arm end; wherein the fifth switch tube and the eighth switch tube are composed of SiC MOSFET;

[0011] The first to fourth switching tubes, the sixth switching tube, the seventh switching tube, the ninth switching tube and the tenth switching tube are formed of Si IGBTs.

[0012] As an implementation method, the positive terminal of the bus is recorded as the P terminal, the negative terminal of the bus is recorded as the N terminal, and the midpoint of the bus is recorded as the O terminal. The commutation process includes six main states of PN, PO, PP, NN, NO, and NP and five transition states.

[0013] As an implementation method, there are two types of commutation in the positive half-cycle circuit, PN-PO-PN and PO-PP-PO. The PN-PO-PN commutation is used for switching the output voltage Vdc-1 / 2Vdc-Vdc, and the PO-PP-PO commutation is used for switching the output voltage 1 / 2Vdc-0-1 / 2Vdc.

[0014] There are two types of commutation in the negative half-cycle circuit, NP-NO-NP and NO-NN-NO. The NP-NO-NP commutation is used to switch the output voltage -Vdc to -1 / 2Vdc and then to -Vdc, and the NO-NN-NO commutation is used to switch the output voltage -1 / 2Vdc to 0 and then to -1 / 2Vdc.

[0015] As an implementation manner, the switching of the output voltage Vdc-1 / 2Vdc-Vdc by PN-PO-PN commutation specifically includes:

[0016] When the circuit is in the PN state, the first switch tube, the second switch tube, the seventh switch tube and the eighth switch tube are turned on, the current flows out through the first switch tube and the second switch tube, and flows in through the seventh switch tube and the eighth switch tube, and the output voltage Vab is Vdc;

[0017] Then the eighth switch is turned off, and the diode connected in parallel with the tenth switch is naturally turned on. The current originally flowing through the eighth switch is continued through the diode connected in parallel with the tenth switch. At this time, the circuit output voltage Vab is 1 / 2Vdc.

[0018] Then the tenth switch is turned on with zero voltage, and the circuit output voltage is 1 / 2Vdc;

[0019] Then the sixth switch tube and the ninth switch tube are turned on with zero voltage, entering the PO state;

[0020] The current flows out through the first switch tube and the second switch tube, and flows into two parallel circuits through the diode connected in parallel to the sixth switch tube, the ninth switch tube, and the diode connected in parallel to the seventh switch tube and the tenth switch tube. The circuit output voltage is 1 / 2Vdc.

[0021] When the circuit switches from the PO state to the PN state, the process is symmetrical to the above process. First, the sixth switch tube and the ninth switch tube are turned off at zero voltage, then the tenth switch tube is turned off at zero voltage, and then the eighth switch tube is turned on, and then the switching from the PO state to the PN state is completed.

[0022] As an implementation manner, the switching of the output voltage 1 / 2Vdc-0-1 / 2Vdc by PO-PP-PO commutation specifically includes:

[0023] When the circuit switches from the PO state to the PP state, the ninth switch tube is turned off with zero voltage, and the fifth switch tube is turned on; the seventh switch tube and the tenth switch tube are turned off with zero current, and enter the PP state. At this time, the first switch tube, the second switch tube, the fifth switch tube and the sixth switch tube are turned on, and the current flows out through the first switch tube and the second switch tube, and flows in through the sixth switch tube and the fifth switch tube, and the circuit output voltage is 0;

[0024] When the circuit switches from the PP state to the PO state, symmetrically to the above process, the seventh switch tube and the tenth switch tube are turned on with zero current, the fifth switch tube is turned off, and the ninth switch tube is turned on with zero voltage, entering the PO state;

[0025] When the output voltage passes through zero, the circuit needs to complete the PP-NN switching; first, the fourth switch tube and the eighth switch tube are turned on with zero current, then the first switch tube and the fifth switch tube are turned off, the third switch tube and the seventh switch tube are turned on, and the second switch tube and the sixth switch tube are turned off with zero current, entering the NN state; at this time, the current flows out through the anti-parallel diode of the third switch tube and the fourth switch tube, and flows in through the seventh switch tube and the eighth switch tube, and the circuit output voltage is 0.

[0026] As an implementation mode, the NP-NO-NP commutation is used to switch the output voltage -Vdc to -1 / 2Vdc and then to -Vdc, and the NO-NN-NO commutation is used to switch the output voltage -1 / 2Vdc to 0 and then to -1 / 2Vdc, specifically including

[0027] When the circuit switches from NN to NO, the eighth switch is turned off, and the anti-parallel diode of the tenth switch is naturally turned on for continuous current flow. At this time, the circuit output voltage is -1 / 2Vdc.

[0028] On this basis, the tenth switch tube is turned on with zero voltage, and the output voltage of the circuit is -1 / 2Vdc;

[0029] Then the sixth switch tube and the ninth switch tube are turned on at zero voltage and enter the NO state. At this time, the current flows out through the fourth diode and the third diode, and flows in through the two parallel circuits of the second diode, the ninth switch tube and the seventh switch tube, the tenth diode;

[0030] When the circuit switches from the NO state to the NN state, the process is symmetrical to the above process. First, the sixth switch tube and the ninth switch tube are turned off with zero voltage, and then the tenth switch tube is turned off with zero voltage; then the eighth switch tube is turned on, and then the switching from the NO state to the NN state is completed;

[0031] When the NO state switches to the NP state, the seventh and tenth switch tubes are turned off with zero voltage; the fifth switch tube is turned on; the ninth switch tube is turned off with zero current and enters the NP state. When the circuit switches from the NP state to the NO state, symmetrical to the above process, the seventh and tenth switch tubes are turned on with zero current, the fifth switch tube is turned off, and the ninth switch tube is turned on with zero current and enters the NO state.

[0032] As an implementation method, hard switching loss only exists on the fifth switch tube and the eighth switch tube, and the right bridge arm in the NO and PO states adopts a mode of two circuits in parallel to pass current.

[0033] In order to solve the above problems, the second aspect of the present invention provides a single-phase three-level inverter circuit control method, which adopts a single-phase three-level inverter that hybridly applies SiC MOSFET and Si IGBT, reduces the conduction loss through the corresponding optimized modulation strategy, and at the same time makes the high-frequency hard switching action in the circuit all concentrated on the SiC MOSFET, thereby achieving the purpose of reducing switching loss and improving efficiency.

[0034] In order to achieve the above-mentioned purpose, the present invention adopts the following technical solution: the control method is applied to a single-phase three-level inverter circuit described in any one of the first aspects, which is used for a single-phase three-level inverter based on a hybrid application of SiC MOSFET and Si IGBT, and reduces the conduction loss through a corresponding optimized modulation strategy, while making the high-frequency hard switching action in the circuit all concentrated on the SiC MOSFET.

[0035] The beneficial effects of the present invention are:

[0036] The present invention adopts a single-phase three-level inverter that hybridly applies SiC MOSFET and Si IGBT, reduces the on-state loss through the corresponding optimized modulation strategy, and at the same time makes all the high-frequency hard switching actions in the circuit concentrated on the SiC MOSFET, thereby achieving the purpose of reducing switching loss and improving efficiency.

[0037] Advantages of additional aspects of the present invention will be given in part in the following description, and in part will become obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] The accompanying drawings in the specification, which constitute a part of the present invention, are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute improper limitations on the present invention.

[0039] Figure 1 is a schematic diagram of a single-phase three-level inverter circuit provided by an embodiment of the present invention;

[0040] Figure 2 It is a circuit schematic diagram of a positive half-cycle circuit PN-PO-PN commutation circuit in a PN shape provided by an embodiment of the present invention;

[0041] Figure 3 It is a circuit schematic diagram of realizing a soft switching transition state during PN-PO-PN commutation of a positive half-cycle circuit provided by an embodiment of the present invention;

[0042] Figure 4 It is a circuit schematic diagram of realizing a soft switching transition state during PN-PO-PN commutation of a positive half-cycle circuit provided by an embodiment of the present invention;

[0043] Figure 5 It is a circuit schematic diagram of a PO-shaped circuit during PN-PO-PN commutation of a positive half-cycle circuit provided by an embodiment of the present invention;

[0044] Figure 6 It is a circuit schematic diagram of a positive half-cycle circuit PO-PP-PO commutation in a PP shape provided by an embodiment of the present invention;

[0045] Figure 7 It is a circuit schematic diagram of realizing a soft switching transition state during PP-NN commutation of a positive half-cycle circuit provided by an embodiment of the present invention;

[0046] Figure 8 It is a circuit schematic diagram of a circuit in which the circuit is NN-shaped during PP-NN commutation of a positive half-cycle circuit provided by an embodiment of the present invention;

[0047] Fig. 9 It is a circuit diagram for realizing a soft switching transition state during NO-NN-NO commutation of a negative half-cycle circuit provided by an embodiment of the present invention;

[0048] Fig.10 It is a circuit diagram for realizing a soft switching transition state during NN-NO commutation of a negative half-cycle circuit provided by an embodiment of the present invention;

[0049] Fig.11It is a circuit schematic diagram of a circuit in a NO state during NN-NO commutation of a negative half-cycle circuit provided by an embodiment of the present invention;

[0050] Fig.12 It is a circuit schematic diagram of a circuit in which the circuit is in NP shape during NP-NO-NP commutation of a negative half-cycle circuit provided by an embodiment of the present invention;

[0051] Fig.13 This is the modulation strategy and the driving signal of each switch tube adopted in the embodiment of the present invention. DETAILED DESCRIPTION

[0052] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0053] It should be noted that the following detailed descriptions are all illustrative and intended to provide further explanation of the present invention. Unless otherwise specified, all technical and scientific terms used herein have the same meanings as those commonly understood by those skilled in the art to which the present invention belongs.

[0054] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit exemplary embodiments according to the present invention. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprising" and / or "including" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0055] In the present invention, the orientation or position relationship indicated by terms such as "one end" is based on the orientation or position relationship shown in the drawings. It is a relational word determined only for the convenience of describing the structural relationship of the various parts or elements of the present invention. It does not specifically refer to any part or element in the present invention and cannot be understood as a limitation on the present invention.

[0056] In the present invention, terms such as "connected" and "connection" should be understood in a broad sense, indicating that the connection can be fixed, integral or detachable; it can be directly connected or indirectly connected through an intermediate medium. Relevant scientific research or technical personnel in this field can determine the specific meaning of the above terms in the present invention according to specific circumstances, and they should not be understood as limiting the present invention.

[0057] Embodiment 1

[0058] This embodiment provides a single-phase three-level inverter circuit, including: a plurality of switch tubes and diodes, each switch tube being anti-parallel connected to a diode;

[0059] Specifically, the first terminals of the first switch tube Ta1 and the fifth switch tube Tb1 are connected to the positive electrode of the bus, and the second terminals of the fourth switch tube Ta4 and the eighth switch tube Tb4 are connected to the negative electrode of the bus;

[0060] The second end of the first switch tube Ta1 is connected to the second switch tube Ta2 and the first end of the fifth diode Da5, and the second end of the fifth switch tube Tb1 is connected to the first ends of the sixth switch tube Tb2 and the ninth switch tube Tb5;

[0061] The first ends of the fourth switch tube Ta4 and the eighth switch tube Tb4 are respectively connected to the second ends of the third switch tube Ta3, the sixth diode Da6, the seventh switch tube Tb3 and the tenth switch tube Tb6, the second ends of the fifth diode Da5 and the ninth switch tube Tb5, the first ends of the sixth diode Da6 and the tenth switch tube Tb6 are all connected to the bus midpoint, the second end of the second switch tube Ta2 and the first end of the third switch tube Ta3 are connected together to form a bridge arm end a, and the second end of the sixth switch tube Tb2 and the first end of the seventh switch tube Tb3 are connected together to form a bridge arm end b;

[0062] Wherein, the fifth switch tube Tb1 and the eighth switch tube Tb4 are composed of SiC MOSFET;

[0063] The first to fourth switching tubes Ta1 to Ta4 , the sixth switching tube Tb2 , the seventh switching tube Tb3 , the ninth switching tube Tb5 and the tenth switching tube Tb6 are formed of Si IGBTs.

[0064] The present invention reduces the on-state loss by setting an optimized modulation strategy based on a single-phase three-level inverter with hybrid application of SiC MOSFET and Si IGBT, and at the same time makes all high-frequency hard switching actions in the circuit concentrated on SiC MOSFET, thereby achieving the purpose of reducing switching loss and improving efficiency.

[0065] The specific working principles include:

[0066] The commutation process includes six main states: PN, PO, PP, NN, NO, and NP, and five transition states. Assuming the bus voltage is Vdc, the current flowing out of phase a is positive, and the commutation process when the current is positive:

[0067] There are two types of commutation in the positive half-cycle circuit, PN-PO-PN and PO-PP-PO, which realize the switching of output voltage Vdc-1 / 2Vdc-Vdc and 1 / 2Vdc-0-1 / 2Vdc respectively.

[0068] PN-PO-PN: When the circuit is in the PN state, the first switch tube Ta1, the second switch tube Ta2, the seventh switch tube Tb3, and the eighth switch tube Tb4 are turned on, and the current flows out through the first switch tube Ta1 and the second switch tube Ta2, and flows in through the seventh switch tube Tb3 and the eighth switch tube Tb4. The output voltage Vab is Vdc. Figure 2 shown.

[0069] Then the eighth switch tube Tb4 is turned off, and the diode Db6 connected in parallel with the tenth switch tube is naturally turned on. The current originally flowing through the eighth switch tube Tb4 is continued to flow through the diode Db6 connected in parallel with the tenth switch tube. At this time, the circuit output voltage Vab is 1 / 2Vdc. Figure 3 shown.

[0070] Then the tenth switch tube Tb6 is turned on with zero voltage, and the circuit output voltage Vab is 1 / 2Vdc. Figure 4 shown.

[0071] Then the sixth switch tube Tb2 and the ninth switch tube Tb5 are turned on with zero voltage and enter the PO state. Figure 5 The current flows out through the first switch tube Ta1 and the second switch tube Ta2, and flows into the two parallel circuits of the sixth switch tube parallel diode Db2, the ninth switch tube Tb5 and the seventh switch tube Tb3 and the tenth switch tube parallel diode Db6, and the circuit output voltage Vab is 1 / 2Vdc.

[0072] When the circuit switches from the PO state to the PN state, the process is symmetrical to the above process: first, the sixth switch tube Tb2 and the ninth switch tube Tb5 are turned off with zero voltage, and the circuit state is as follows: Figure 4 As shown; then the tenth switch tube Tb6 is turned off with zero voltage. Figure 3 As shown; then the eighth switch tube Tb4 is turned on, as shown Figure 2 As shown, the switching from PO to PN state is then completed.

[0073] PO-PP-PO: When the circuit switches from the PO state to the PP state, the ninth switch tube Tb5 is turned off with zero voltage, and the fifth switch tube Tb1 is turned on; the seventh switch tube Tb3 and the tenth switch tube Tb6 are turned off with zero current, and the circuit enters the PP state. At this time, the first switch tube Ta1, the second switch tube Ta2, the fifth switch tube Tb1, and the sixth switch tube Tb2 are turned on, and the current flows out through the first switch tube Ta1 and the second switch tube Ta2, and flows in through the sixth switch tube Db2 and the fifth switch tube Tb1. The circuit output voltage Vab is 0. Figure 6 shown.

[0074] When the circuit switches from the PP state to the PO state, the process is symmetrical to the above process: the seventh switch tube Tb3 and the tenth switch tube Tb6 are turned on with zero current, the fifth switch tube Tb1 is turned off, and the ninth switch tube Tb5 is turned on with zero voltage, entering the PO state;

[0075] When the output voltage crosses zero, the circuit needs to complete the PP-NN switch. Figure 6 The fourth switch tube Ta4 and the eighth switch tube Tb4 are turned on with zero current, as shown in FIG. Figure 7 As shown, at this time Ta4 and Tb4 are turned on but no current flows.

[0076] Then the first switch tube Ta1 and the fifth switch tube Tb1 are turned off, the third switch tube Ta3 and the seventh switch tube Tb3 are turned on, and the second switch tube Ta2 and the sixth switch tube Tb2 are turned off with zero current, and the circuit enters the NN state. At this time, the current flows out through the anti-parallel diodes Da4 and Da3 of the third switch tube and the fourth switch tube, and flows in through the seventh switch tube Tb3 and the eighth switch tube Tb4. The circuit output voltage Vab is 0. Figure 8 shown.

[0077] There are two types of commutation in the negative half-cycle circuit, NP-NO-NP and NO-NN-NO, which realize the switching of output voltage (-Vdc)-(-1 / 2Vdc)-(-Vdc) and (-1 / 2Vdc)-0-(-1 / 2Vdc) respectively.

[0078] When the NN state switches to the NO state, the eighth switch tube Tb4 is turned off, and the anti-parallel diode Db6 of the tenth switch tube is naturally turned on for continuous current flow. Fig. 9 As shown, at this time the circuit output voltage Vab is -1 / 2Vdc.

[0079] On this basis, the tenth switch tube Tb6 is turned on with zero voltage. Fig.10 As shown, at this time the circuit output voltage Vab is -1 / 2Vdc.

[0080] Then the sixth switch tube Tb2 and the ninth switch tube Tb5 are turned on with zero voltage and enter the NO state. Fig.11 At this time, the current flows out through the fourth diode Da4 and the third diode Da3, and flows into the two parallel circuits through the second diode Db2 and the ninth switch tube Tb5 and the seventh switch tube Tb3 and the tenth diode Db6.

[0081] When the circuit switches from the NO state to the NN state, the process is symmetrical to the above process: first, the sixth switch tube Tb2 and the ninth switch tube Tb5 are turned off with zero voltage, and the circuit state is as follows: Fig.10 As shown; then the tenth switch tube Tb6 is turned off with zero voltage. Fig. 9 As shown; then the eighth switch tube Tb4 is turned on, as shown Figure 8 As shown, the switching from NO to NN state is then completed.

[0082] When the NO state switches to the NP state, the seventh switch tube Tb3 and the tenth switch tube Tb6 are turned off with zero voltage; the fifth switch tube Tb1 is turned on; the ninth switch tube Tb5 is turned off with zero current, and enters the NP state. Fig.12 shown.

[0083] When the circuit switches from the NP state to the NO state, the process is symmetrical to the above process: the seventh switch tube Tb3 and the tenth switch tube Tb6 are turned on with zero current, the fifth switch tube Tb1 is turned off, and the ninth switch tube Tb5 is turned on with zero current, and enters the NO state. Fig.11 shown.

[0084] It can be seen from the above circulation process that in this commutation process, hard switching losses only exist on the fifth switch tube Tb1 and the eighth switch tube Tb4. Since Tb1 and Tb4 use SiC MOSFET, the switching losses can be greatly reduced. The right bridge arm in the NO and PO states uses a two-circuit parallel mode to pass current, thereby reducing conduction losses.

[0085] Embodiment 2

[0086] Based on the same inventive concept, this embodiment provides a single-phase three-level inverter circuit control method corresponding to a single-phase three-level inverter circuit. Since the principle of solving the problem by the device in the embodiment of the present application is similar to the above-mentioned method in Example 1, the implementation of the device can refer to the implementation of the method, and the repeated parts will not be repeated.

[0087] The control method is applied to a single-phase three-level inverter circuit as described in any one of the first embodiments, which is used for a single-phase three-level inverter based on a hybrid application of SiC MOSFET and Si IGBT, and reduces the conduction loss by adopting a corresponding optimized modulation strategy, such as Fig.13 As shown. At the same time, the high-frequency hard switching action in the circuit is all concentrated on the SiC MOSFET.

[0088] Wherein, the reduction of conduction loss by corresponding optimized modulation strategy includes:

[0089] There are two types of commutation in the positive half-cycle circuit: PN-PO-PN and PO-PP-PO. The PN-PO-PN commutation is used for switching the output voltage Vdc-1 / 2Vdc-Vdc, and the PO-PP-PO commutation is used for switching the output voltage 1 / 2Vdc-0-1 / 2Vdc.

[0090] There are two types of commutation in the negative half-cycle circuit, NP-NO-NP and NO-NN-NO. The NP-NO-NP commutation is used to switch the output voltage -Vdc to -1 / 2Vdc and then to -Vdc, and the NO-NN-NO commutation is used to switch the output voltage -1 / 2Vdc to 0 and then to -1 / 2Vdc.

[0091] Hard switching loss only exists in the fifth switch tube Tb1 and the eighth switch tube Tb4. In the NO and PO states, the right bridge arm adopts a mode of two circuits in parallel to pass current.

[0092] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A single-phase three-level inverter circuit, characterized in that: include: Multiple switch tubes and diodes, each switch tube is anti-parallel connected with a diode; The first ends of the first switch tube and the fifth switch tube are connected to the positive electrode of the bus, and the second ends of the fourth switch tube and the eighth switch tube are connected to the negative electrode of the bus; the second end of the first switch tube is connected to the second switch tube and the first end of the fifth diode, and the second end of the fifth switch tube is connected to the first end of the sixth switch tube and the ninth switch tube; The first ends of the fourth switch tube and the eighth switch tube are respectively connected to the second ends of the third switch tube, the sixth diode, the seventh switch tube, and the tenth switch tube, and the second ends of the fifth diode and the ninth switch tube, and the first ends of the sixth diode and the tenth switch tube are all connected to the bus midpoint; The second end of the second switch tube and the first end of the third switch tube are connected together to form a first bridge arm end, and the second end of the sixth switch tube and the first end of the seventh switch tube are connected together to form a second bridge arm end; Wherein, the fifth switch tube and the eighth switch tube are composed of SiC MOSFET; The first switch tube, the second switch tube, the third switch tube, the fourth switch tube, the sixth switch tube, the seventh switch tube, the ninth switch tube and the tenth switch tube are composed of Si IGBTs; The positive end of the busbar is recorded as the P end, the negative end of the busbar is recorded as the N end, and the midpoint of the busbar is recorded as the O end. The commutation process includes six main states of PN, PO, PP, NN, NO, and NP and five transition states. Vdc is the specified bus voltage; There are two types of commutation in the positive half-cycle circuit: PN-PO-PN and PO-PP-PO. The PN-PO-PN commutation is used for switching the output voltage Vdc-1 / 2Vdc-Vdc, and the PO-PP-PO commutation is used for switching the output voltage 1 / 2Vdc-0-1 / 2Vdc. There are two types of commutation in the negative half-cycle circuit, NP-NO-NP and NO-NN-NO. The NP-NO-NP commutation is used to switch the output voltage (-Vdc) to (-1 / 2Vdc) and then to (-Vdc), and the NO-NN-NO commutation is used to switch the output voltage (-1 / 2Vdc) to 0 and then to (-1 / 2Vdc).

2. A single-phase three-level inverter circuit as claimed in claim 1, characterized in that: The switching of the output voltage Vdc-1 / 2Vdc-Vdc by PN-PO-PN commutation specifically includes: When the circuit is in the PN state, the first switch tube, the second switch tube, the seventh switch tube and the eighth switch tube are turned on, the current flows out through the first switch tube and the second switch tube, and flows in through the seventh switch tube and the eighth switch tube, and the output voltage Vab is Vdc; Then the eighth switch is turned off, and the diode connected in parallel with the tenth switch is naturally turned on. The current originally flowing through the eighth switch is continued through the diode connected in parallel with the tenth switch. At this time, the circuit output voltage Vab is 1 / 2Vdc. Then the tenth switch is turned on with zero voltage, and the circuit output voltage is 1 / 2Vdc; Then the sixth switch tube and the ninth switch tube are turned on with zero voltage, entering the PO state; The current flows out through the first switch tube and the second switch tube, and flows into two parallel circuits through the diode connected in parallel to the sixth switch tube, the ninth switch tube, and the diode connected in parallel to the seventh switch tube and the tenth switch tube. The circuit output voltage is 1 / 2Vdc. When the circuit switches from the PO state to the PN state, the process is symmetrical with the switching process of the circuit from the PN state to the PO state. First, the sixth switch tube and the ninth switch tube are turned off with zero voltage, then the tenth switch tube is turned off with zero voltage, and then the eighth switch tube is turned on, and then the switching from the PO state to the PN state is completed.

3. A single-phase three-level inverter circuit as claimed in claim 1, characterized in that: The switching of the output voltage 1 / 2Vdc-0-1 / 2Vdc by PO-PP-PO commutation specifically includes: When the circuit switches from the PO state to the PP state, the ninth switch tube is turned off with zero voltage, and the fifth switch tube is turned on; the seventh switch tube and the tenth switch tube are turned off with zero current, and enter the PP state. At this time, the first switch tube, the second switch tube, the fifth switch tube and the sixth switch tube are turned on, and the current flows out through the first switch tube and the second switch tube, and flows in through the sixth switch tube and the fifth switch tube, and the circuit output voltage is 0; When the circuit switches from the PP state to the PO state, the seventh switch tube and the tenth switch tube are turned on with zero current, the fifth switch tube is turned off, and the ninth switch tube is turned on with zero voltage, and enters the PO state; When the output voltage passes through zero, the circuit needs to complete the PP-NN switching; first, the fourth switch tube and the eighth switch tube are turned on with zero current, then the first switch tube and the fifth switch tube are turned off, the third switch tube and the seventh switch tube are turned on, and the second switch tube and the sixth switch tube are turned off with zero current, entering the NN state; at this time, the current flows out through the anti-parallel diode of the third switch tube and the fourth switch tube, and flows in through the seventh switch tube and the eighth switch tube, and the circuit output voltage is 0.

4. A single-phase three-level inverter circuit as claimed in claim 1, characterized in that: The NP-NO-NP commutation is used to switch the output voltage (-Vdc) to (-1 / 2Vdc) and then to (-Vdc), and the NO-NN-NO commutation is used to switch the output voltage (-1 / 2Vdc) to 0 and then to (-1 / 2Vdc), specifically including When the circuit switches from NN to NO, the eighth switch is turned off, and the anti-parallel diode of the tenth switch is naturally turned on for continuous current flow. At this time, the circuit output voltage is -1 / 2Vdc. On this basis, the tenth switch tube is turned on with zero voltage, and the output voltage of the circuit is -1 / 2Vdc; Then the sixth switch tube and the ninth switch tube are turned on at zero voltage and enter the NO state. At this time, the current flows out through the fourth diode and the third diode, and flows in through the two parallel circuits of the second diode, the ninth switch tube and the seventh switch tube, the tenth diode; When the circuit switches from the NO state to the NN state, the process is symmetrical with the circuit switching from the NN state to the NO state. First, the sixth switch tube and the ninth switch tube are turned off with zero voltage, and then the tenth switch tube is turned off with zero voltage; then the eighth switch tube is turned on, and then the switching from the NO state to the NN state is completed; When the NO state switches to the NP state, the seventh switch tube and the tenth switch tube are turned off with zero voltage; The fifth switch tube is turned on; the ninth switch tube is turned off with zero current and enters the NP state. When the circuit switches from the NP state to the NO state, the seventh switch tube and the tenth switch tube are turned on with zero current, the fifth switch tube is turned off, and the ninth switch tube is turned on with zero current and enters the NO state.

5. A single-phase three-level inverter circuit control method, characterized in that: The control method is applied to a single-phase three-level inverter circuit as claimed in any one of claims 1 to 4, which is used for a single-phase three-level inverter based on a hybrid application of SiC MOSFET and Si IGBT, reducing the conduction loss through a corresponding optimized modulation strategy, while concentrating all high-frequency hard switching actions in the circuit on the SiC MOSFET.

6. A single-phase three-level inverter circuit control method as claimed in claim 5, characterized in that: The reducing the conduction loss by the corresponding optimized modulation strategy comprises: There are two types of commutation in the positive half-cycle circuit: PN-PO-PN and PO-PP-PO. The PN-PO-PN commutation is used for switching the output voltage Vdc-1 / 2Vdc-Vdc, and the PO-PP-PO commutation is used for switching the output voltage 1 / 2Vdc-0-1 / 2Vdc. There are two types of commutation in the negative half-cycle circuit, NP-NO-NP and NO-NN-NO. The NP-NO-NP commutation is used to switch the output voltage (-Vdc) to (-1 / 2Vdc) and then to (-Vdc), and the NO-NN-NO commutation is used to switch the output voltage (-1 / 2Vdc) to 0 and then to (-1 / 2Vdc).

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