Circuit structure and implementation method for realizing three-state level conversion through MCU

Abstract

The present invention proposes a circuit structure for OSFP optical module that realizes tri-state level conversion through MCU, including a module end, the module end is used to connect with a host, the module end includes MCU, M_INT output port, resistor R3, resistor R2, INT_RSTn input port, M_RSTn output port, resistor R10, LPWn_PRSn input port and resistor R13, and the MCU includes two analog comparators. The present invention also proposes a method for realizing tri-state level conversion of a circuit structure for OSFP optical module that realizes tri-state level conversion through MCU. The present invention realizes tri-state level conversion through MCU for realizing INT / RSTn and LPWn / PRSn functions in the circuit structure of OSFP optical module, only four resistors, and through the analog comparator of MCU, the functions of INT / RSTn and LPWn / PRSn bidirectional tri-state levels are realized, which is simple and practical, improves the space utilization of PCB, reduces the cost of products, and improves product reliability.

Description

Technical Field

[0001] The present invention relates to the field of level transmission, and in particular to a circuit structure for realizing three-state level conversion through an MCU and a realization method thereof. Background Art

[0002] According to the OSFP Module Specification Rev5.0 hardware protocol document, there are two logic level interfaces in the OSFP module, namely the INT / RSTn interface and the LPWn / PRSn interface (two semaphores for each interface), and each interface supports multiple different voltages corresponding to different states. The OSFP optical module protocol provides multi-level support, but the specific circuit design forms are diverse. Designing circuits with discrete components (transistors, resistors, capacitors) is more complex to implement, has lower reliability, and has no obvious cost advantage.

[0003] There are many PCBA devices in OSFP optical module, which is a high-density PCBA. Space is the biggest difficulty in PCB design. Optimizing circuit design, integrated design and reducing costs are the key points. For OSFP multi-level interface circuits, most of them are designed with discrete devices or special devices to achieve the above interface levels in line with OSFP hardware protocol. For example, the module part of patent CN208986944U is a three-state interface circuit composed of a three-state gate circuit chip, a comparator chip, etc., which requires at least two chips to realize, occupying the area of ​​PCB, resulting in insufficient space and increased costs. Summary of the invention

[0004] The present invention proposes a circuit structure for an OSFP optical module that realizes three-state level conversion through an MCU, thereby solving the problems of more PCBA components and high cost in the OSFP optical module in the prior art.

[0005] The present invention also proposes a method for realizing tri-state level conversion for an OSFP optical module through an MCU, which solves the problems of high design difficulty in the prior art.

[0006] The technical solution of the present invention is implemented as follows: a circuit structure for an OSFP optical module that realizes three-state level conversion through an MCU, including a module end, the module end is used to connect to a host, the module end includes an MCU, an M_INT output port, a resistor R3, a resistor R2, an INT_RSTn input port, an M_RSTn output port, a resistor R10, an LPWn_PRSn input port and a resistor R13, the MCU is electrically connected to the M_INT output port, the INT_RSTn input port and the M_RSTn output port, respectively, the The M_INT output port is electrically connected to the resistor R3, the other end of the resistor R3 is electrically connected to the INT_RSTn input port, the INT_RSTn input port is electrically connected to the resistor R2, and the other end of the resistor R2 is electrically connected to a 3.3V power supply; the M_RSTn output port is electrically connected to the resistor R10 and the reset port on the MCU, respectively, and the other end of the resistor R10 is electrically connected to a 3.3V power supply; the LPWn_PRSn input port is electrically connected to the resistor R13 and the MCU, respectively, and the other end of the resistor R13 is grounded.

[0007] Furthermore, the MCU includes two analog comparators, namely analog comparator 1 and analog comparator 2, the INT_RSTn input port is electrically connected to the input end of analog comparator 1, and the output end of analog comparator 1 is electrically connected to the M_RSTn output port; the LPWn_PRSn input port is electrically connected to analog comparator 2.

[0008] Further, the INT_RSTn input port is used to be electrically connected to a host, and the LPWn_PRSn input port is electrically connected to the host.

[0009] Furthermore, the OSFP optical module is an 800G OSFP optical module.

[0010] A method for realizing tri-state level conversion of a circuit structure of an OSFP optical module by implementing tri-state level conversion through an MCU comprises the following steps: M_RSTn is output through an analog comparator of the MCU, when H_RSTn is at a high level, since R10 is pulled up to 3.3V, M_RSTn maintains a high level, and the MCU does not generate a reset signal; when M_INT output is at a high level, H_INT output is also at a high level, and when M_INT is at a low level, H_INT output is also at a low level; when H_RSTn is at a low level, Then M_RSTn outputs a low level, and the MCU generates a reset signal; when the module end is inserted into the host, the LPWn_PRSn interface signal is pulled down to the ground through R13, and the LPWn_PRSn signal voltage is less than the host reference voltage, then H_PRSn outputs a low level, indicating that the module end is inserted into the host and in place; when H_LPWn is high, M_LPWn is high, and the module works normally; when H_LPWn is low, M_LPWn outputs a low level, and the MCU triggers a low power consumption signal to put the module end into low power consumption mode.

[0011] Further, the reference voltage of analog comparator 1 is set to 1.25V, and the comparator threshold 1 is set to 0.2V; the reference voltage of analog comparator 2 is set to 1.25V, and the comparator threshold 2 is set to 0.2V.

[0012] The implementation method of three-state level conversion is that when the module end is not connected to the host, V_INT / RSTn=0V; when the module end is connected and H_RSTn=Low, V_INT / RSTn=0V and less than the reference voltage 1.25V of the module end, the voltage of M_RSTn is 0V, and the module end is reset; when H_RSTn=High, M_INT=Low, V_INT / RSTn=1.94V, greater than 1.25V, M_RSTn outputs high level, and the module end is not reset; when H_RSTn=High, M_INT=High, V_INT / RSTn=3.07V, greater than 1. 25V, M_RSTn outputs high level, and the module end is not reset; when the module end is not connected to the host, V_LPWn / PRSn=3.3V, which is greater than the host reference voltage of 2.5V, and H_PRSn outputs high level, indicating that there is no module end connected; after the module end is connected, H_LPWn=High, V_LPWn / PRSn=1.7V, which is greater than the module end reference voltage of 1.25V, and M_LPWn outputs high level; when H_LPWn=Low, V_LPWn / PRSn=0.94V, V_LPWn / PRSn is less than the optical module reference voltage of 1.25V, and M_LPWn outputs low level.

[0013] In the present invention, HOST: host; Module: module; OSFP: eight-way pluggable module; INT / RSTn: Interrupt / Reset (interrupt and reset); LPWn / PRSn: Low-Power / Module Present (low-power mode and module present); MCU: single-chip microcomputer; GPIO: general-purpose input and output port; IO: input and output port; M_RSTn: module-side reset signal; M_INT: module-side interrupt signal; H_INT: host-side interrupt signal; H_RSTn: host-side reset signal; M_LPWn: module-side low-power mode signal; H_LPWn: host-side low-power mode signal; H_PRSn: host-side module present signal.

[0014] The beneficial effects of the present invention are as follows: the present invention realizes the INT / RSTn and LPWn / PRSn functions in the circuit structure of the OSFP optical module by implementing the three-state level conversion through the MCU, does not use any gate circuits and reference voltage chips and MOS tubes, etc., only has four resistors, and configures the corresponding input and output, reference voltage, and comparator threshold through the analog comparator of the MCU, that is, realizes the INT / RSTn and LPWn / PRSn bidirectional three-state level functions, is simple and practical, improves the space utilization of the PCB, reduces the cost of the product, and improves the product reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0016] Figure 1 This is a schematic diagram showing that the INT / RSTn signal in the prior art operates in three voltage regions to indicate the reset state of the module and the interrupt state of the host.

[0017] Figure 2 It is a circuit structure schematic diagram of the INT / RSTn signal in the prior art;

[0018] Figure 3 for Figure 2 Circuit parameter diagram of the circuit structure of the INT / RSTn signal shown;

[0019] Figure 4 A schematic diagram of the prior art in which LPWn / PRSn signals operate in three voltage regions to indicate a low power mode and the presence of a module indication module;

[0020] Figure 5 It is a circuit structure schematic diagram of LPWn / PRSn signal in the prior art;

[0021] Figure 6 for Figure 5 Circuit parameters of the circuit structure of the LPWn / PRSn signal shown;

[0022] Figure 7 It is a schematic diagram of an improved structure of the circuit structure principle diagram indicating the INT / RSTn signal in the present invention;

[0023] Figure 8 It is a schematic diagram of an improved structure of the circuit structure principle diagram indicating the LPWn / PRSn signal in the present invention;

[0024] Fig. 9 A circuit structure schematic diagram of a module end of a circuit structure for an OSFP optical module that implements tri-state level conversion through an MCU according to the present invention;

[0025] Fig.10 is the INT / RSTn truth table of the present invention;

[0026] Fig.11 It is the LPWn / PRSn truth table of the present invention. DETAILED DESCRIPTION

[0027] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0028] like Figure 1-3 As shown in the figure, the level definition and circuit schematic of INT / RSTn. The host uses a 2.5V voltage reference to determine the state of the H_INT signal, and the module uses a 1.25V voltage reference to determine the state of the M_RSTn signal.

[0029] like Figure 4-6 As shown in the figure, the level definition and circuit schematic of LPWn / PRSn. The host uses a 2.5V voltage reference to determine the state of the H_PRSn signal, and the module uses a 1.25V voltage reference to determine the state of the M_LPWn signal.

[0030] The present invention does not need to add gate circuit chips and reference voltage chips to the module part to realize the function of the module, and can also achieve the realization of multiple level functions of two interfaces, thereby increasing the effective space for the OSFP packaging PCB part, reducing product costs, and improving reliability.

[0031] The present invention realizes the circuit structure of the three-state level conversion for the OSFP optical module through the MCU using two analog comparators, one GPIO and four resistors R2, R3, R13 and R10 of the MCU. Figure 7 , 8 As shown in Figure 9, M_INT is configured as GPIO open-drain mode output by MCU, output from MCU's A9 pin, connected to one end of resistor R3, the other end of resistor R3 is connected to INT_RSTn port, the INT / RSTn interface pin at the module end is connected to the external host, and is a bidirectional three-state interface pin. Resistor R2 is pulled up to 3.3V, and the other end is connected to INT_RSTn port to provide a pull-up level for INT_RSTn; INT_RSTn port is connected to MCU's C6 pin, C6 is configured as the positive input pin of analog comparator 1 by MCU, and the reference voltage is 1.25V. M_RSTn is the output of MCU analog comparator 1, pin A11, connected to 3.3V through pull-up resistor R10, and connected to MCU's J10 pin (reset pin). When H_RSTn is high, M_RSTn (A11 pin of 105) remains high because R10 is pulled up to 3.3V, then the J10 pin of MCU is also high, and no low-level reset signal is generated to the module. If M_INT output is high, then H_INT output is also high; if M_INT is low, then H_INT output is also low. When H_RSTn is low, INT / RSTn is pulled down to a low level, which is less than the 1.25V reference level of the module, then M_RSTn output is low, pulling down the J10 pin level of MCU to a low level, generating a reset signal, and the MCU enters the reset state, which eventually resets the module.

[0032] The LPWn_PRSn port is a bidirectional three-state interface, connected to one end of R13, and the other end is pulled down to ground, and connected to the A8 pin of the MCU. The A8 pin is configured as the positive input pin of analog comparator 2 by the MCU, and the reference voltage is 1.25V. When the module is inserted, the LPWn_PRSn interface signal is pulled down to ground through R13, and the signal voltage is less than the host reference voltage of 2.5V, then H_PRSn outputs a low level, indicating that the module is inserted into the host and in place. When H_LPWn is high, Figure 8In the middle, R11 / / R12 (in parallel), the voltage on R13, that is, the LPWn_PRSn signal voltage, is calculated and is higher than the reference voltage 1.25V of analog comparator 2, then M_LPWn is high and the module works normally. When H_LPWn is low, there are only R11 and R13, and the voltage on R13, that is, the LPWn_PRSn signal voltage, is calculated and is lower than the reference voltage 1.25V of analog comparator 2, then M_LPWn outputs a low level, and the MCU triggers a low power signal to put the module into low power mode.

[0033] The three-level implementation method of the INT / RSTn interface is as follows: configure one of the MCU's multi-function IOs as analog comparator input 1 as a positive input, set the reference voltage to 1.25V, and set the comparator threshold to 0.2V; configure M_RSTn as the output of analog comparator 1; and configure M_INT as a GPIO with an open-drain output.

[0034] like Figure 2 , 7 As shown in the figure, when the module is not connected, there is no pull-up level, only the pull-down resistor R1, then V_INT / RSTn=0V (interrupt and reset signal voltage); when the module is connected and H_RSTn=Low, V_INT / RSTn is shorted to the ground, V_INT / RSTn=0V and is less than the reference voltage VREF of the module: 1.25V, then M_RSTn=0V, the module end is reset; when H_RSTn=High, M_INT=Low, Greater than 1.25V, M_RSTn outputs high level and does not reset; when H_RSTn=High, M_INT=High, If it is greater than 1.25V, M_RSTn outputs high level. Figure 3 As shown, the result complies with the protocol specification. The result and truth table are shown in Fig.10 .

[0035] The three-level implementation method of the LPWn / PRSn interface is as follows: configure one of the MCU's multi-function IOs as analog comparator input 2 as a positive input, set the reference voltage to 1.25V, and set the comparator threshold to 0.2V.

[0036] like Figure 5 , 8 As shown, when the module is not connected, only R11 is pulled up to 3.3V, V_LPWn / PRSn=3.3V, which is greater than the HOST reference voltage 2.5V, and H_PRSn outputs a high level, indicating that no module is connected; after the module is connected, H_LPWn=High, When V_LPWn / PRSn (low power consumption and module in-position signal voltage) is greater than the reference voltage 1.25V, M_LPWn outputs a high level; when H_LPWn=Low, V_LPWn / PRSn is less than the reference voltage 1.25V, and M_LPWn outputs a low level. The result and truth table are as follows Fig.11 shown.

[0037] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A circuit structure for OSFP optical module using MCU to realize tri-state level conversion, comprising a module end, the module end is used to connect to a host, characterized in that: The module end includes an MCU, an M_INT output port, a resistor R3, a resistor R2, an INT_RSTn input port, an M_RSTn output port, a resistor R10, an LPWn_PRSn input port and a resistor R13. The MCU is electrically connected to the M_INT output port, the INT_RSTn input port and the M_RSTn output port respectively. The M_INT output port is electrically connected to the resistor R3. The other end of the resistor R3 is electrically connected to the INT_RSTn input port. The INT_RSTn input port is electrically connected to the resistor R2. The other end of the resistor R2 is electrically connected to a 3.3V power supply. The M_RSTn output port is electrically connected to the resistor R10 and a reset port on the MCU respectively. The other end of the resistor R10 is electrically connected to a 3.3V power supply. The LPWn_PRSn input port is electrically connected to the resistor R13 and the MCU respectively. The resistor R13 The other end is grounded, the M_INT output port is the module-side interrupt signal output port, the INT_RSTn input port is the interrupt and reset signal input port, the M_RSTn output port is the module-side reset signal output port, the LPWn_PRSn input port is the low power mode and module in-place input port, the MCU includes two analog comparators, namely analog comparator 1 and analog comparator 2, the INT_RSTn input port is electrically connected to the input end of the analog comparator 1, and the output end of the analog comparator 1 is electrically connected to the M_RSTn output port; the LPWn_PRSn input port is electrically connected to the input end of the analog comparator 2, and the output end of the analog comparator 2 is electrically connected to the M_LPWn output port, wherein the M_LPWn output port is the module-side low power mode signal output port, the voltage of INT / RSTn is compared with the reference voltage of the analog comparator 1, and the voltage of LPWn / PRSn is compared with the reference voltage of the analog comparator 2.

2. The circuit structure for OSFP optical module using MCU to realize tri-state level conversion as claimed in claim 1, characterized in that: The INT_RSTn input port is used to be electrically connected to a host, and the LPWn_PRSn input port is electrically connected to a host.

3. The circuit structure for OSFP optical module using MCU to realize tri-state level conversion as claimed in claim 1, characterized in that: The OSFP optical module is an 800G OSFP optical module.

4. A method for implementing three-state level conversion, characterized in that: The circuit structure comprises the following steps: M_RSTn is output through an analog comparator of the MCU, when H_RSTn is at a high level, since R10 is pulled up to 3.3V, M_RSTn remains at a high level, and the MCU does not generate a reset signal; when M_INT output is at a high level, H_INT output is also at a high level, and when M_INT is at a low level, H_INT output is also at a low level; when H_RSTn is at a low level, M_RSTn output is at a low level, and the MCU generates a reset signal; when the module end is inserted into the host, the LPWn_PRSn interface signal is pulled down through R13 When pulled to ground, the LPWn_PRSn signal voltage is less than the host reference voltage, then H_PRSn outputs a low level, indicating that the module is inserted into the host and in place; when H_LPWn is high, M_LPWn is high, and the module works normally; when H_LPWn is low, M_LPWn outputs a low level, and the MCU triggers a low-power signal to put the module into low-power mode. H_RSTn is the host reset signal, H_INT is the host interrupt signal, H_PRSn is the host module in place signal, H_LPWn is the host low-power mode signal, and M_LPWn is the module low-power mode signal.

5. The method for implementing the three-state level conversion as claimed in claim 4, characterized in that : The reference voltage of analog comparator one is set to 1.25V, and the comparator threshold one is set to 0.2V; the reference voltage of analog comparator two is set to 1.25V, and the comparator threshold two is set to 0.2V.

6. The method for implementing the three-state level conversion as claimed in claim 5, characterized in that : When the module is not connected to the host, V_INT / RSTn=0V; when connected to the module and H_RSTn=Low, V_INT / RSTn=0V and less than the reference voltage 1.25V of the module, the voltage of M_RSTn is 0V, and the module is reset; when H_RSTn=High, M_INT=Low, V_INT / RSTn=1.94V, greater than 1.25V, M_RSTn outputs high level, and the module is not reset; when H_RSTn=High, M_INT=High, V_INT / RSTn=3.07V, greater than 1.25V, M_RSTn outputs high level, and the module is not reset; when the module is not connected When entering the host, V_LPWn / PRSn=3.3V, which is greater than the host reference voltage of 2.5V, and H_PRSn outputs a high level, indicating that there is no module end connected; after the module end is connected, H_LPWn=High, V_LPWn / PRSn=1.7V, which is greater than the module end reference voltage of 1.25V, and M_LPWn outputs a high level; when H_LPWn=Low, V_LPWn / PRSn=0.94V, V_LPWn / PRSn is less than the optical module reference voltage of 1.25V, and M_LPWn outputs a low level, where V_INT / RSTn is the interrupt and reset interface signal voltage, and V_LPWn / PRSn is the low power and in-place interface signal voltage.

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