Display device driving method and display device

Abstract

The present application discloses a driving method and a display device, wherein the timing control board of the display device outputs a voltage signal to the wiring of the glass substrate, which is converted into a grayscale signal by the data driving chip to be output to the display panel, and the driving method includes: predicting the grayscale change value of the data line in the display panel; obtaining the original waveform of the zero-level reference voltage pre-output to the wiring of the glass substrate; generating a compensation waveform of the zero-level reference voltage according to the original waveform of the zero-level reference voltage, the grayscale change value and the first grayscale compensation table; synthesizing the original waveform and the compensation waveform of the zero-level reference voltage to output to the wiring of the glass substrate. The present application compensates the zero-level reference voltage when switching between light load and heavy load to avoid excessive peak voltage fluctuation of the zero-level reference voltage, thereby causing abnormal gamma voltage level, causing errors in other voltages generated by the gamma voltage, thereby affecting the display effect.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a driving method for a display device and a display device. Background Art

[0002] TFT-LCD (Thin Film Transistor Liquid Crystal Display) is a flat panel display device that is increasingly being used in the field of high-performance displays due to its small size, low power consumption, no radiation, and relatively low production cost.

[0003] In order to save costs, a glass substrate is usually used as the PCB board of TFT-LCD. When the TFT-LCD is displaying, the gate lines of each row on the display panel are scanned row by row to turn on the pixel units connected to the gate lines in that row, and the data lines output data signals to the turned-on pixel units to charge the pixel units. The front and rear grayscale voltages of the pixels differ too much, and the glass substrate has large impedance and parasitic inductance, and there is no influence of capacitance, which causes all currents to be instantly drawn from the power supply and flow back to GND, causing the power supply voltage or power supply current of the data driver chip to fluctuate greatly in the display area and the blanking area. In addition, when the pictures are different, when switching from a light-load display frame to another heavy-load display frame, and when one row of the display frame is heavy-loaded and the other row is light-loaded, the power ripple fluctuations are also different in these similar situations. The larger the draw current, the greater the difference when switching between light and heavy loads, and the greater the impact. Summary of the invention

[0004] The purpose of the embodiments of the present application is to provide a display device driving method and a display device, which can improve the phenomenon that the power supply voltage of the display device is instantly loaded due to a large load change, thereby improving the display effect stability of the display device.

[0005] The present application discloses a driving method for a display device, wherein the display device comprises a display panel and a driving module, wherein the driving module comprises a timing control board, a glass substrate and a data driving chip, wherein the timing control board outputs a voltage signal to a wiring of the glass substrate, which is converted into a grayscale signal by the data driving chip to be output to the display panel, and the driving method comprises:

[0006] Predicting grayscale change values ​​of data lines in a display panel;

[0007] Acquire the original waveform of the zero-level reference voltage pre-output to the glass substrate wiring;

[0008] Generate a compensation waveform of the zero-level reference voltage according to the original waveform of the zero-level reference voltage, the grayscale change value and the first grayscale compensation table; and

[0009] The original waveform and the compensation waveform of the zero-level reference voltage are combined to output to the wiring of the glass substrate;

[0010] The original waveform and the compensation waveform of the zero-reference voltage are a pair of anti-phase waveforms.

[0011] Optionally, the driving method further comprises the following steps:

[0012] Acquire the original waveform of the power supply voltage pre-output to the glass substrate wiring;

[0013] generating a compensated waveform of the power supply voltage according to the original waveform of the power supply voltage, the grayscale change value and the second grayscale compensation table; and

[0014] The original waveform and the compensation waveform of the power supply voltage are combined to output to the wiring of the glass substrate;

[0015] The original waveform and the compensated waveform of the power supply voltage are a pair of anti-phase waveforms.

[0016] Optionally, the step of obtaining an original waveform of a zero-level reference voltage pre-output to a glass substrate wiring line includes:

[0017] Collecting the actual voltage of the zero-level reference voltage on the data driver chip, and converting the collected actual voltage into a digital signal voltage and storing it in a storage table;

[0018] Generate an analog voltage of a corresponding zero-level reference voltage according to the digital signal voltage stored in the storage table,

[0019] The original waveform of the zero-level reference voltage pre-outputted to the glass substrate wiring is obtained through the analog voltage of the zero-level reference voltage;

[0020] The step of obtaining the original waveform of the power supply voltage pre-output to the glass substrate wiring includes:

[0021] Collecting the actual voltage of the power supply voltage on the data driver chip, and converting the collected actual voltage into a digital signal voltage and storing it in a storage table;

[0022] Generate the corresponding analog voltage with energy voltage according to the digital signal voltage stored in the storage table.

[0023] The original waveform of the zero-level reference voltage pre-outputted to the glass substrate wiring is obtained through the analog voltage of the zero power supply voltage.

[0024] Optionally, the resistance of the glass trace is R, the current on the glass trace is Ivaa, the power supply current is Itotal, and the absolute value of the peak voltage value in the compensation waveform of the power supply voltage is A ，The absolute value of the peak voltage value of the collected power supply voltage is A', and the absolute value of the peak voltage value of the compensation waveform of the zero-level reference voltage is B ， The absolute value of the peak voltage value of the collected zero-level reference voltage is B', wherein the absolute value of the peak voltage value in the compensation waveform of the power supply voltage is A=A'+Rvaa*Ivaa, and the absolute value of the peak voltage value of the compensation waveform of the zero-level reference voltage is B=B'+R*Itotal.

[0025] Optionally, the step of predicting the grayscale change value of the data line in the display panel includes:

[0026] Obtaining an average grayscale value of a data voltage during a display time and a blanking time of any frame in the display panel, and calculating a difference between the average grayscale values ​​of the data voltage during the display time and the blanking time to obtain a grayscale change value;

[0027] In the compensation waveform of the zero-level reference voltage generated according to the original waveform of the zero-level reference voltage, the grayscale variation value and the first grayscale compensation table, the first grayscale compensation table has compensation values ​​corresponding to grayscale variation values ​​from 1 to 255.

[0028] Optionally, the rising moment of the voltage in the original waveform of the zero quasi-reference voltage and the falling moment of the voltage in the compensated waveform of the zero quasi-reference voltage are the same moment, the rising duration of the voltage in the original waveform of the zero quasi-reference voltage and the falling duration of the voltage in the compensated waveform of the zero quasi-reference voltage are equal, the falling moment of the voltage in the original waveform of the zero quasi-reference voltage and the rising moment of the voltage in the compensated waveform of the zero quasi-reference voltage are the same moment, and the falling duration of the voltage in the original waveform of the zero quasi-reference voltage and the rising duration of the voltage in the compensated waveform of the zero quasi-reference voltage are equal.

[0029] Optionally, the compensation values ​​of the first grayscale compensation table and the second grayscale compensation table are different. The first grayscale compensation table compensates for grayscale change values ​​from 1 to 255, and gradually increases with the increase of grayscale change values. The second grayscale compensation table compensates for change values ​​of 50, 51-100, 101-150, 151-200, 201-250 and other ranges. The compensation values ​​in different ranges are different, and the compensation values ​​in the same range are the same.

[0030] Optionally, the timing control board is provided with a power chip and a plurality of series resistance circuits, and the driving method further includes a current inspection and adjustment step, and the current inspection and adjustment step includes:

[0031] Detect and calculate the magnitude of the current flowing into the wiring on the glass substrate per unit time;

[0032] According to the current size per unit time, it is determined whether to connect a series resistance circuit to adjust the current size and control the peak current value output by the power chip.

[0033] The present application also discloses a display device, which is driven by any of the above driving methods, wherein the display device comprises a driving module and a display panel, wherein the driving module comprises a timing control board, a glass substrate and a data driving chip, wherein the timing control board outputs a zero-level reference voltage in a voltage signal to a wiring of the glass substrate, and the zero-level reference voltage is converted into a grayscale signal by the data driving chip to be output to the display panel;

[0034] The timing control board is provided with a detection module, a memory and a compensation voltage generation module. The detection module is used to detect the grayscale change value of the data line in the input value display panel. The memory stores a first grayscale compensation table. The compensation voltage generation module generates a compensation waveform of the zero-level reference voltage according to the grayscale change value, the first grayscale compensation table stored in the memory, and the original waveform of the zero-level reference voltage. The original waveform of the zero-level reference voltage and the compensation waveform are integrated to output to the routing of the glass substrate.

[0035] Optionally, the timing control board is provided with an acquisition module and a digital-to-analog conversion module, the acquisition module is used to acquire the power supply voltage signal and the zero-level reference voltage signal of the routing output value data driving chip of the glass substrate, and send the value to the digital-to-analog conversion module, the digital-to-analog conversion module converts the acquired power supply voltage signal and the zero-level reference voltage signal into digital signals and stores them in a storage device.

[0036] The present application uses a glass substrate as a circuit board for laying out wiring. Since the glass substrate has large impedance and parasitic inductance, and has no influence of capacitance, the instantaneous draw of the power supply voltage is large, which in turn causes inaccurate zero-level reference voltage. To address this, the present application first predicts the grayscale change value of the data line in the display panel, generates a compensation waveform of the zero-level reference voltage according to the original waveform of the zero-level reference voltage, the grayscale change value, and the first grayscale compensation table, and combines the original waveform and the compensation waveform of the zero-level reference voltage to output to the wiring of the glass substrate to avoid excessive fluctuation of the zero-level reference voltage, thereby avoiding fluctuations in all voltages, causing a butterfly effect, and avoiding affecting the entire power supply and signal system. By changing the zero-level reference voltage that is finally output to the wiring of the glass substrate, the problem of large instantaneous current draw during light-heavy load switching is solved, and the stability of the power supply and the zero-level reference voltage GND is maintained. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] The included drawings are used to provide a further understanding of the embodiments of the present application, which constitute a part of the specification, are used to illustrate the implementation methods of the present application, and together with the text description, explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. In the drawings:

[0038] Figure 1 is a schematic flow chart of a driving method according to a first embodiment of the present application;

[0039] Figure 2 is a schematic diagram of exemplary power supply voltage, power supply current and zero-level reference voltage signal waveforms of the present application;

[0040] Figure 3 is a schematic diagram of a zero-level reference voltage signal waveform of the first embodiment of the present application;

[0041] Figure 4 is a schematic flow chart of a driving method according to a second embodiment of the present application;

[0042] Figure 5 is a schematic diagram of the waveforms of the power supply voltage and current signals and the zero-level reference voltage of the second embodiment of the present application;

[0043] Figure 6 is a schematic flow chart of a driving method according to a third embodiment of the present application;

[0044] Figure 7 is a schematic structural diagram of a display device according to a fourth embodiment of the present application;

[0045] Figure 8 is a schematic structural diagram of a driving module according to a fourth embodiment of the present application;

[0046] Fig. 9 It is a partial structural diagram of a driving module of a display device according to the fifth embodiment of the present application.

[0047] Among them, 100, display device; 200, display panel; 210, data line; 220, pixel; 300, driving module; 310, glass substrate; 320, timing control board; 321, first grayscale compensation table; 322, detection module; 323, storage; 324, compensation voltage generation module; 325, acquisition module; 326, digital-to-analog conversion module; 327, second grayscale compensation table; 328, power chip; 330, data driving chip; 340, series resistance circuit; 341, first series resistance circuit; 342, second series resistance circuit; 343, first Three series resistor circuit; 344, fourth series resistor circuit; 350, control selector; T1, first control switch; T2, second control switch; T3, third control switch; T4, fourth control switch; T5, fifth control switch; T6, sixth control switch; T7, seventh control switch; T8, eighth control switch; T9, ninth control switch; R1, first resistor; R2, second resistor; R3, third resistor; R4, fourth resistor; R5, fifth resistor; S1, first control signal; S2, second control signal; S3, third control signal; S4, fourth control signal. DETAILED DESCRIPTION

[0048] It should be understood that the terms used herein, the specific structures and functional details disclosed are only for describing specific embodiments and are representative, but the present application can be implemented in many alternative forms and should not be construed as being limited to only the embodiments described herein.

[0049] The present application is described in detail below with reference to the accompanying drawings and optional embodiments.

[0050] refer to Figure 1 As shown, as the first embodiment of the present application, in order to solve the instability of power supply voltage caused by large load changes, a driving method of a display device is disclosed, the display device includes a display panel and a driving module, the driving module includes a timing control board, a glass substrate and a data driving chip, the timing control board outputs a voltage signal to the wiring of the glass substrate, which is converted into a grayscale signal by the data driving chip to be output to the display panel, and the driving method includes:

[0051] S1: predicting the grayscale change value of the data line in the display panel;

[0052] S2: Obtaining the original waveform of the zero-level reference voltage pre-output to the glass substrate wiring;

[0053] S3: generating a compensation waveform of the zero-level reference voltage according to the original waveform of the zero-level reference voltage, the grayscale change value and the first grayscale compensation table; and

[0054] S4: combining the original waveform and the compensation waveform of the zero-level reference voltage to output to the wiring of the glass substrate;

[0055] The original waveform and the compensation waveform of the zero-reference voltage are a pair of anti-phase waveforms. When the voltage of the original waveform increases, the voltage of the compensation waveform decreases. Conversely, when the voltage of the original waveform decreases, the voltage of the compensation waveform increases.

[0056] refer to Figure 2 As shown in the figure, the actual voltage test diagram of light load switching to heavy load when the glass substrate is used as the timing control board of the display device and the PCB between the flip chip film. The blue is the voltage waveform of the simulated power supply VAA, the green is the current waveform of the simulated power supply VAA, and the orange is the voltage waveform of GND; VAA is a stable voltage source waveform under normal circumstances, and the voltage fluctuation is almost invisible, and GND is the 0-level reference voltage. At the moment of screen switching, the current required by the back-end load suddenly increases, but at this time the power IC cannot react so quickly, and the power provided is constant, so the VAA voltage suddenly drops to the voltage of V1 (less than VAA), and the VAA current suddenly reaches I1. In the extremely short time before and after this change, the power before the change = the power after the change, so there is Iaa*VAA voltage ≈ I1*V1, and the subsequent power supply adjusts the output so that the VAA voltage returns to the standard voltage, and Iaa outputs the current according to the actual demand; because of this instantaneous load withdrawal, the trace impedance and parasitic inductance exist, and when the circuit switch is suddenly disconnected or opened, an overvoltage will be generated inside, resulting in a spike current in the circuit for a short period of time, causing the GND voltage of the glass PCB to rise instantly Based on this, the present application first predicts the grayscale change value of the data line in the display panel, generates a compensation waveform of the zero-level reference voltage according to the original waveform of the zero-level reference voltage, the grayscale change value and the first grayscale compensation table, and combines the original waveform and the compensation waveform of the zero-level reference voltage to output to the wiring of the glass substrate, so as to avoid excessive fluctuation of the zero-level reference voltage, thereby causing fluctuations of all voltages, causing a butterfly effect, and affecting the entire power supply and signal system. By changing the zero-level reference voltage on the wiring that is finally output to the glass substrate, the problem of large instantaneous current draw during light-heavy load switching is solved, the stability of the power supply and the zero-level reference voltage GND is maintained, and the problem of excessive fluctuation of the zero-level reference voltage GND causing abnormal Gamma voltage level is avoided.

[0057] In general, reference Figure 3As shown, the rising moment of the voltage in the original waveform of the zero quasi-reference voltage and the falling moment of the voltage in the compensated waveform of the zero quasi-reference voltage are the same moment, the rising duration of the voltage in the original waveform of the zero quasi-reference voltage and the falling duration of the voltage in the compensated waveform of the zero quasi-reference voltage are equal, the falling moment of the voltage in the original waveform of the zero quasi-reference voltage and the rising moment of the voltage in the compensated waveform of the zero quasi-reference voltage are the same moment, and the falling duration of the voltage in the original waveform of the zero quasi-reference voltage and the rising duration of the voltage in the compensated waveform of the zero quasi-reference voltage are equal.

[0058] like Figure 4 As shown, as the second embodiment of the present application, it is a further refinement and improvement of the above-mentioned first embodiment. Considering that after the zero-level reference voltage is adjusted, the output power supply voltage may still cause the problem of load withdrawal, so this embodiment also adjusts the power supply voltage. Specifically, the driving method further includes the following steps:

[0059] S5: obtaining the original waveform of the power supply voltage pre-output to the glass substrate wiring;

[0060] S6: generating a compensated waveform of the power supply voltage according to the original waveform of the power supply voltage, the grayscale change value and the second grayscale compensation table; and

[0061] S7: synthesizing the original waveform and the compensation waveform of the power supply voltage to output to the wiring of the glass substrate;

[0062] The original waveform and the compensated waveform of the power supply voltage are a pair of anti-phase waveforms.

[0063] This embodiment also compensates the power supply voltage by compensating for the ripple fluctuation caused by the instantaneous load withdrawal problem of each voltage source, or by slowing down the rising slope. This can solve the problem of large instantaneous current withdrawal when switching between light and heavy loads, and maintain the stability of the power supply and GND.

[0064] Furthermore, it should be noted that step S2 includes:

[0065] S21: Collecting the actual voltage of the zero-level reference voltage on the data driving chip, and converting the collected actual voltage into a digital signal voltage and storing it in a storage table;

[0066] S22: Generate an analog voltage of a corresponding zero-level reference voltage according to the digital signal voltage stored in the storage table,

[0067] S23: obtaining an original waveform of a zero-level reference voltage pre-output to a glass substrate trace through an analog voltage of the zero-level reference voltage;

[0068] The step S6 comprises:

[0069] S61: Collecting the actual voltage of the power supply voltage on the data driver chip, and converting the collected actual voltage into a digital signal voltage and storing it in a storage table;

[0070] S62: Generate a corresponding analog voltage with energy source voltage according to the digital signal voltage stored in the storage table,

[0071] S63: Obtaining an original waveform of a zero-level reference voltage pre-output to a glass substrate trace through a simulation voltage of zero power supply voltage.

[0072] By collecting the GND voltage and VAA voltage at the remote end back to the timing control board, the specific collection method is to run independent routing on the glass PCB, without overlapping with other routing or connecting with the power supply voltage VAA or GND large area entering the data driver chip (to avoid being affected by other factors), which is equivalent to pulling a feedback signal back to the collection module. The collected signal is as follows Figure 5 The actual voltage of the feedback can be seen, and its actual voltage waveform is not a uniform and regularly rising waveform. In this way, our acquisition module cannot collect accurate analog waveforms. Then, after the waveform is processed by the acquisition module, an actual voltage waveform collected will be obtained. Usually, the analog voltage is converted into digital voltage for storage. When the subsequent timing control board outputs the power supply voltage and GND, the corresponding digital voltage can be directly called to obtain the voltage of the original waveform. The compensation voltage of the corresponding compensation waveform is generated through the digital voltage to synthesize the power supply voltage and GND.

[0073] refer to Figure 5 , the waveform of the actual voltage fed back is the waveform at the end of the glass PCB trace, before entering the data driver chip, and the acquisition needs to pull the line back from the glass PCB. Because the resistance is large, there will be an attenuation problem, so the actual collected voltage will have a voltage drop, and the voltage values ​​of points A and B are both greater than points A' and B', but the waveform we finally compensate is to be transmitted back to the power supply, so the attenuation problem must also be considered. Then A'=A-Rvaa*Ivaa (R is the resistance of the VAA glass-based trace), B'=BR*Itotal (R is the GND resistance from the input end to the output end, and I is the total GND current), so the actual voltage collected needs to be added with the attenuated voltage difference, that is, the A and B voltages of the compensated waveform are A=A'+Rvaa*Ivaa, B=B'+R*Itotal. In this way, the power supply voltage and GND waveform entering the data driver chip can be truly restored. And according to different grayscales and different currents, the positions of points A and B also need to change accordingly.

[0074] Generally, the grayscale change value is usually obtained by obtaining the average grayscale value of the data voltage during the display time and the blanking time of any frame in the display panel, calculating the difference between the average grayscale value of the data voltage during the display time and the blanking time, so as to obtain the grayscale change value, and calling different compensations corresponding to different grayscale change values, as shown in Table 1 below:

[0075]

[0076] Table 1: First grayscale compensation table

[0077] The compensation waveform of the zero-level reference voltage is generated based on the original waveform of the zero-level reference voltage, the grayscale change value and the first grayscale compensation table. The first grayscale compensation table has compensation values ​​corresponding to grayscale change values ​​1 to 255, so that the corresponding compensation can be found regardless of the grayscale change before and after.

[0078] In addition, it should be noted that the compensation values ​​of the first grayscale compensation table and the second grayscale compensation table are different. The first grayscale compensation table compensates for grayscale change values ​​of 1 to 255, and gradually increases as the grayscale change value increases. The second grayscale compensation table compensates for multiple ranges of change values ​​such as 50, 51-100, 101-150, 151-200, 201-250, etc. The compensation values ​​in different ranges are different, and the compensation values ​​in the same range are the same, as shown in Table 2 below:

[0079]

[0080] Table 2: Second grayscale compensation table

[0081] Considering that after improving the voltage of GND, the power supply voltage has less influence on the load, and each grayscale difference can be compensated when adjusting GND, the power supply can be compensated for the grayscale value within a certain range.

[0082] like Figure 6 As shown, as a third embodiment of the present application, and further improvement of any of the above embodiments, taking the first embodiment as an example for improvement, the timing control board is provided with a power chip and a plurality of series resistance circuits, and the driving method further includes a current inspection and adjustment step, and the current inspection and adjustment step includes:

[0083] S8: Detect and calculate the current flowing into the wiring on the glass substrate per unit time;

[0084] S9: Determine whether to connect a series resistor circuit to adjust the current size according to the current size per unit time, and control the peak current value output by the power chip.

[0085] A current regulating module is arranged on the timing control board, and the current regulating module is connected to the power chip to regulate the peak current in the power current signal; the current flowing into the wiring on the glass substrate within a unit time is detected and calculated, and then a series resistor circuit corresponding to the wiring loop is selected, and the timing of the resistor being connected in series to the loop is selected at the moment of signal switching, at which time a change will be generated. If the voltage difference per unit time is constant, the peak current needs to be reduced, and the resistance needs to be increased. Therefore, the role of the series resistor circuit is to prevent the instantaneous change of the current from surging, thereby allowing it to rise slowly. When the rise is completed, the series resistor is cancelled and the normal mode is restored to solve the problem of large instantaneous current draw during light and heavy load switching, maintain the stability of the power supply and the 0-level reference voltage GND, and avoid excessive power supply voltage fluctuations due to excessive power supply current fluctuations.

[0086] like Figure 7 As shown, as a fourth embodiment of the present application, a display device is disclosed, wherein the display device is driven using the driving method described in any of the above embodiments, referring to Figure 7 and Figure 8 As shown, the display device 100 includes a driving module 300 and a display panel. The driving module 300 includes a timing control board 320, a glass substrate 310 and a data driving chip 330. The timing control board 320 outputs a zero-level reference voltage in a voltage signal to a wiring of the glass substrate 310, which is converted into a grayscale signal by the data driving chip 330 and output to the display panel 200. The timing control board 320 is provided with a detection module 322, a memory 323 and a compensation voltage generation module 324. The detection module 322 is used to detect the grayscale change value of the data line in the input value display panel. The memory 323 stores a first grayscale compensation table 321. The compensation voltage generation module 324 generates a compensation waveform of the zero-level reference voltage according to the grayscale change value, the first grayscale compensation table 321 stored in the memory 323 and the original waveform of the zero-level reference voltage, and outputs the original waveform of the zero-level reference voltage and the compensation waveform after integrating them to the wiring of the glass substrate 310.

[0087] The timing control board 320 is provided with a collection module 325 and a digital-to-analog conversion module 326. The collection module 325 is used to collect the wiring output value data of the glass substrate 310, the power supply voltage signal and the zero-level reference voltage signal of the driving chip 330, and send the value to the digital-to-analog conversion module 326. The digital-to-analog conversion module 326 converts the collected power supply voltage signal and the zero-level reference voltage signal into digital signals and stores them in a storage device. The digital-to-analog conversion module 326 includes a digital-to-analog converter and an analog-to-digital converter.

[0088] The acquisition module 325 collects the GND voltage and the power supply voltage VAA voltage at the far end back to the timing control board 320. The specific acquisition method is to take independent lines on the glass PCB, which do not overlap with other lines or connect to the VAA or GND large area entering the data driver chip 330. The collected voltage waveform is processed by the acquisition module 325 to obtain an actual voltage waveform collected. The actual voltage waveform is converted from analog voltage to digital voltage through the digital-to-analog conversion module 326 and stored; due to different screens and different draws, all compensated waveforms are different. If the ripple is processed or the collected signal is processed and re-input into the data driver chip 330, there will be a delay problem. The solution of simply adding capacitors is not suitable for glass-based platforms. Therefore, when producing a display panel, it is necessary to first improve a database, including all possibilities of switching from light load to heavy load and from heavy load to light load, so as to ensure that all data before I output are processed, so as to achieve the integration of the original waveform and the compensated waveform, and avoid the occurrence of current peaks.

[0089] refer to Fig. 9 As shown, as the fifth embodiment of the present application, it is a further refinement of the above-mentioned fourth embodiment. Problems may arise in actual work. The acquisition module 325 can collect the actual output current. In order to ensure that there is no problem in the display after the power supply voltage and the GND voltage are adjusted, a current inspection step will be set. The series resistance circuit 340 is provided with at least four, which detects and calculates the current size flowing into the wiring on the glass substrate 310 per unit time; according to the current size per unit time, it is determined whether to connect the series resistance circuit to adjust the current size, and control the peak current value output by the power chip 328.

[0090] Specifically, each series resistance circuit 340 is provided with two control switches and a resistor, and the resistor in each series resistance circuit 340 is arranged between the two control switches, and the control ends of the two control switches are respectively connected to the control selector 350, and the selection controller outputs different control signals to the two control switches in each series resistance circuit 340 according to the voltage difference calculated by the load calculation module 140, so as to control the corresponding series resistance circuit 340 to be connected in series to the loop of the power chip 328 and the glass substrate 310.

[0091] Intervention is carried out at the source of the generation. For the display panel 200 from light load to heavy load or from heavy load to light load, it is caused by the sudden change of the data voltage in the driving signal. The wiring resistance on the glass substrate 310 and the rear-end load are constant. The greater the voltage difference that changes per unit time, the greater the current. If the voltage difference per unit time is constant, to reduce the peak current, it is necessary to increase the resistance. Therefore, the role of the series resistor is to prevent the instantaneous change of the current from surging, so that the current output by the power supply rises slowly. When the rise is complete, the series resistor is removed to restore the normal mode.

[0092] Furthermore, the series resistance circuit 340 is provided with four, and the four series resistance circuits 340 are respectively a first series resistance circuit 341, a second series resistance circuit 342, a third series resistance circuit 343 and a fourth series resistance circuit 344; the first series resistance circuit 341 includes a first control switch T1, a second control switch T2 and a first resistor R1, the control end of the first control switch T1 receives the first control signal S1, the input end is connected to the power chip 328, the output end is connected to the input end of the second control switch T2 through the first resistor R1, and the control end of the second control switch T2 is connected to the first control signal S2. The second series resistor circuit 342 includes a third control switch T3, a fourth control switch T4 and a second resistor R2, the control end of the third control switch T3 receives the first control signal S1, the input end is connected to the power chip 328, and the output end is connected to the input end of the fourth control switch T4 through the second resistor R2, the control end of the fourth control switch T4 receives the third control signal S3, and the output end is connected to the wiring on the glass substrate 310; the third series resistor circuit 343 includes a fifth control switch T5, a sixth control switch T6 and a sixth control switch T7. The control end of the fifth control switch T5 receives the fourth control signal S4, the input end is connected to the power chip 328, and the output end is connected to the input end of the sixth control switch T6 through the third resistor R3. The control end of the sixth control switch T6 receives the second control signal S2, and the output end is connected to the wiring on the glass substrate 310; the fourth series resistance circuit 344 includes a seventh control switch T7, an eighth control switch T8 and a fourth resistor R4. The control end of the seventh control switch T7 receives the fourth control signal S4, the input end is connected to the power chip 328, and the output end is connected to the input end of the sixth control switch T6 through the third resistor R3. The control end of the sixth control switch T6 receives the second control signal S2, and the output end is connected to the wiring on the glass substrate 310. The input end of the eighth control switch T8 is connected through the fourth resistor R4, the control end of the eighth control switch T8 receives the third control signal S3, and the output end is connected to the wiring on the glass substrate 310; the resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3 and the fourth resistor R4 increase in sequence, and the current output by the power chip 328 is changed after passing through the resistors in the series resistor circuit to be output to the wiring of the glass substrate 310, and finally input into the display panel 200. According to the load size fed back by the display panel 200, the size of the resistor in the series circuit resistor and the grayscale range value can be adjusted.

[0093] It should be noted that the limitations of the various steps involved in this scheme, without affecting the implementation of the specific scheme, are not considered to limit the order of the steps, that is, the steps written in front can be executed first, or can be executed later, or even simultaneously. As long as this scheme can be implemented, it should be considered to belong to the scope of protection of this application. The inventive concept of this application can form a lot of embodiments, but the length of the application document is limited and cannot be listed one by one. Therefore, under the premise of no conflict, the various embodiments or technical features described above can be arbitrarily combined to form a new embodiment. After the various embodiments or technical features are combined, the original technical effect will be enhanced.

[0094] The above content is a further detailed description of the present application in combination with specific optional implementation methods, and it cannot be determined that the specific implementation of the present application is limited to these descriptions. For ordinary technicians in the technical field to which the present application belongs, several simple deductions or substitutions can be made without departing from the concept of the present application, which should be deemed to fall within the scope of protection of the present application.

Claims

1. A method for driving a display device, wherein the display device comprises a display panel and a driving module, wherein: The driving module includes a timing control board, a glass substrate and a data driving chip. The timing control board outputs a voltage signal to the wiring of the glass substrate, which is converted into a grayscale signal by the data driving chip to be output to the display panel. The driving method includes: Predicting grayscale change values ​​of data lines in a display panel; Acquire the original waveform of the zero-level reference voltage pre-output to the glass substrate wiring; generating a compensation waveform of the zero-level reference voltage according to the original waveform of the zero-level reference voltage, the grayscale variation value and the first grayscale compensation table; and The original waveform and the compensation waveform of the zero-level reference voltage are combined to output to the wiring of the glass substrate; The original waveform and the compensation waveform of the zero-level reference voltage are a pair of anti-phase waveforms; The driving method further comprises the following steps: Acquire the original waveform of the power supply voltage pre-output to the glass substrate wiring; generating a compensated waveform of the power supply voltage according to the original waveform of the power supply voltage, the grayscale change value and the second grayscale compensation table; and The original waveform of the power supply voltage and the compensated waveform of the power supply voltage are combined to output to the wiring of the glass substrate; Wherein, the original waveform of the power supply voltage and the compensated waveform of the power supply voltage are a pair of anti-phase waveforms; The timing control board is provided with a power chip and a plurality of series resistance circuits. The driving method further comprises a current inspection and adjustment step, and the current inspection and adjustment step comprises: Detect and calculate the magnitude of the current flowing into the wiring on the glass substrate per unit time; According to the current size per unit time, it is determined whether to connect a series resistance circuit to adjust the current size and control the peak current value output by the power chip.

2. The driving method according to claim 1, characterized in that: The step of obtaining the original waveform of the zero-level reference voltage pre-outputted to the glass substrate wiring includes: Collecting the actual voltage of the zero-level reference voltage on the data driver chip, and converting the collected actual voltage into a digital signal voltage and storing it in a storage table; Generate an analog voltage of a corresponding zero-level reference voltage according to the digital signal voltage stored in the storage table, The original waveform of the zero-level reference voltage pre-outputted to the glass substrate wiring is obtained through the analog voltage of the zero-level reference voltage; The step of obtaining the original waveform of the power supply voltage pre-output to the glass substrate wiring includes: Collecting the actual voltage of the power supply voltage on the data driver chip, and converting the collected actual voltage into a digital signal voltage and storing it in a storage table; Generate an analog voltage corresponding to the power supply voltage according to the digital signal voltage stored in the storage table, The original waveform of the zero-level reference voltage pre-outputted to the glass substrate wiring is obtained through the analog voltage of the power supply voltage.

3. The driving method according to claim 2, characterized in that: The resistance of the glass trace is Rvaa, the current on the glass trace is Ivaa, the power supply current is Itotal, and the absolute value of the peak voltage value in the compensation waveform of the power supply voltage is A ， The absolute value of the peak voltage value of the collected power supply voltage is A', and the absolute value of the peak voltage value of the compensation waveform of the zero-level reference voltage is B ， The absolute value of the peak voltage value of the collected zero-level reference voltage is B', wherein the absolute value of the peak voltage value in the compensation waveform of the power supply voltage is A=A'+Rvaa*Ivaa, and the absolute value of the peak voltage value of the compensation waveform of the zero-level reference voltage is B=B'+R*Itotal.

4. The driving method according to claim 1, characterized in that: The step of predicting the grayscale change value of the data line in the display panel comprises: Obtaining an average grayscale value of a data voltage during a display time and a blanking time of any frame in the display panel, and calculating a difference between the average grayscale values ​​of the data voltage during the display time and the blanking time to obtain a grayscale change value; In the compensation waveform of the zero-level reference voltage generated according to the original waveform of the zero-level reference voltage, the grayscale variation value and the first grayscale compensation table, the first grayscale compensation table has compensation values ​​corresponding to grayscale variation values ​​from 1 to 255.

5. The driving method according to any one of claims 1 to 4, characterized in that: The rising moment of the voltage in the original waveform of the zero-level reference voltage and the falling moment of the voltage in the compensated waveform of the zero-level reference voltage are the same moment, the rising duration of the voltage in the original waveform of the zero-level reference voltage and the falling duration of the voltage in the compensated waveform of the zero-level reference voltage are equal, the falling moment of the voltage in the original waveform of the zero-level reference voltage and the rising moment of the voltage in the compensated waveform of the zero-level reference voltage are the same moment, and the falling duration of the voltage in the original waveform of the zero-level reference voltage and the rising duration of the voltage in the compensated waveform of the zero-level reference voltage are equal.

6. The driving method according to claim 2, characterized in that: The compensation values ​​of the first grayscale compensation table and the second grayscale compensation table are different. The first grayscale compensation table compensates for grayscale change values ​​from 1 to 255, and gradually increases with the increase of grayscale change values. The second grayscale compensation table compensates for change values ​​in multiple ranges of 50, 51-100, 101-150, 151-200, and 201-250. The compensation values ​​in different ranges are different, and the compensation values ​​in the same range are the same.

7. A display device driven by the driving method according to any one of claims 1 to 6, characterized in that: The display device comprises a driving module and a display panel, wherein the driving module comprises a timing control board, a glass substrate and a data driving chip, wherein the timing control board outputs a zero-level reference voltage in a voltage signal to a wiring of the glass substrate, and the zero-level reference voltage is converted into a grayscale signal by the data driving chip to be output to the display panel; The timing control board is provided with a detection module, a memory and a compensation voltage generation module. The detection module is used to detect the grayscale change value of the data line in the input value display panel. The memory stores a first grayscale compensation table. The compensation voltage generation module generates a compensation waveform of the zero-level reference voltage according to the grayscale change value, the first grayscale compensation table stored in the memory, and the original waveform of the zero-level reference voltage. The original waveform and the compensation waveform of the zero-level reference voltage are integrated and output to the routing of the glass substrate.

8. The display device according to claim 7, characterized in that: The timing control board is provided with an acquisition module and a digital-to-analog conversion module. The acquisition module is used to acquire the power supply voltage signal and the zero-level reference voltage signal output from the wiring of the glass substrate to the data driving chip, and send them to the digital-to-analog conversion module. The digital-to-analog conversion module converts the acquired power supply voltage signal and the zero-level reference voltage signal into digital signals and stores them in a storage.

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