Chip preparation process based on piezoelectric MEMS structure
Through the process of etching in the piezoelectric MEMS structure to form a gap or hollow structure and spreading the polymer, the sound leakage, air leakage and structural fragility of MEMS acoustic devices are solved, and the reliability and yield of the device are improved.
Patent Information
- Application Number
- CN202311222060.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-09-20
- Publication Date
- 2024-12-10
AI Technical Summary
The opening and opening of piezoelectric MEMS acoustic devices leads to sound leakage and air leakage, reducing device reliability; devices such as reflectors and other devices are fragile and broken due to residual stress, resulting in reduced yield.
Using a chip preparation process based on a piezoelectric MEMS structure, by sequentially growing the metal layer and the piezoelectric layer on the substrate, etching to form a through gap or hollow structure, and the polymer is grown away from the substrate plane, extending to In the gap or hollow structure, the surface polymer is removed, and only the polymer in the gap is retained to prevent sound and air leakage, and reduce residual stress during the structure release process.
Effectively prevent sound and air leakage from acoustic devices, improve the working range and reliability of the devices, avoid structural damage caused by residual stress, and improve yield.
Smart Images
Figure CN119100332A_ABST
Abstract
Description
Technical Field
[0001] One or more embodiments of the present specification relate to the field of semiconductor process technology, and in particular, to a chip preparation process based on a piezoelectric MEMS structure. Background Art
[0002] At present, some acoustic devices in piezoelectric MEMS sensors or actuators introduce openings and seams in the structure to increase the diaphragm amplitude, but at the same time it will cause sound leakage and air leakage, reducing the working range and reliability of the device. In addition, devices with large-area released top silicon structures, such as MEMS reflectors and vibration tables, will cause structural fragility and fracture, device damage, etc. during the release process of the structure due to residual stress and other reasons, resulting in a serious decline in the yield rate.
[0003] In summary, the present application now proposes a chip preparation process based on a piezoelectric MEMS structure to solve the above-mentioned problems. Summary of the invention
[0004] The present invention aims to solve the problems raised in the background technology. The purpose of one or more embodiments of this specification is to propose a chip preparation process based on a piezoelectric MEMS structure to prevent sound leakage of acoustic devices and also to avoid device damage caused by residual stress on the reflector.
[0005] Based on the above purpose, one or more embodiments of the present specification provide a chip preparation process based on a piezoelectric MEMS structure, including the following steps: preparing a substrate, the substrate having a relative front and back side, and sequentially growing a first metal layer, a piezoelectric layer, and a second metal layer on the front side of the substrate; sequentially etching the second metal layer, the piezoelectric layer, the first metal layer, and the front side of the substrate to generate through gaps in the second metal layer, the piezoelectric layer, the first metal layer, and the front side of the substrate; growing a polymer on a plane of the second metal layer away from the substrate and extending the polymer to the inside of the gap; removing the polymer grown on the plane of the second metal layer away from the substrate; and etching the back side of the substrate to form a back cavity.
[0006] According to the chip preparation process based on the piezoelectric MEMS structure proposed in the embodiment of the present invention, the gap is in the shape of a hole.
[0007] According to the chip preparation process based on the piezoelectric MEMS structure proposed in the embodiment of the present invention, the gap is in the shape of a slit with an "X"-shaped structure.
[0008] According to the chip preparation process based on the piezoelectric MEMS structure proposed in the embodiment of the present invention, the gap is hollow.
[0009] According to the chip preparation process based on the piezoelectric MEMS structure proposed in an embodiment of the present invention, the substrate is a silicon substrate.
[0010] According to the chip preparation process based on the piezoelectric MEMS structure proposed in an embodiment of the present invention, the substrate is an SOI substrate, and the SOI substrate includes bottom silicon and top silicon connected by a buried oxide layer.
[0011] The beneficial effects of the present invention are described in detail below with reference to the embodiments and drawings of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] In order to more clearly illustrate one or more embodiments of the present specification or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only one or more embodiments of the present specification. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0013] Figure 1 A schematic diagram of step S1 in a chip preparation process based on a piezoelectric MEMS structure proposed in an embodiment of the present invention;
[0014] Figure 2 A schematic diagram of step S2 in a chip preparation process based on a piezoelectric MEMS structure proposed in an embodiment of the present invention;
[0015] Figure 3 A schematic diagram of step S3 in the chip preparation process based on the piezoelectric MEMS structure proposed in an embodiment of the present invention;
[0016] Figure 4 For the present invention Figure 3 Schematic diagram of the structure of the polymer;
[0017] Figure 5 A schematic diagram of step S4 in the chip preparation process based on the piezoelectric MEMS structure proposed in an embodiment of the present invention;
[0018] Figure 6 A schematic diagram of step S5 in the chip preparation process based on the piezoelectric MEMS structure proposed in an embodiment of the present invention;
[0019] Figure 7 It is a schematic diagram of step S6 in the chip preparation process based on the piezoelectric MEMS structure proposed in an embodiment of the present invention.
[0020] In the figure numerals: 1. bottom silicon; 2. buried oxide layer; 3. top silicon; 4. first metal layer; 5. piezoelectric layer; 6. second metal layer; 7. polymer. DETAILED DESCRIPTION
[0021] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in conjunction with specific embodiments.
[0022] According to the following Figure 1-Figure 7 The specific structure of the chip preparation process based on the piezoelectric MEMS structure in the embodiment of the present invention is described.
[0023] Embodiment 1
[0024] The chip preparation process based on the piezoelectric MEMS structure proposed in the embodiment of the present invention includes the following steps:
[0025] S1, prepare a substrate, the substrate has a relative front side, grow a first metal layer 4 on the front side of the substrate as a bottom electrode, grow a piezoelectric layer 5 on the side of the first metal layer 4 away from the substrate, and grow a second metal layer 6 on the side of the piezoelectric layer 5 away from the substrate as a top electrode, such as Figure 1 As shown. Optionally, the substrate is an SOI substrate, which is composed of a bottom silicon 1 and a top silicon 3 connected by a buried oxide layer 2. Optionally, the substrate is a silicon substrate (not shown in the figure).
[0026] S2, the second metal layer 6, the piezoelectric layer 5 and the first metal layer 4 are sequentially etched to produce a through-hole structure in the center of the second metal layer 6, the piezoelectric layer 5 and the first metal layer 4, such as Figure 2 As shown in a.
[0027] S3, etching the top silicon 3, so that the center of the top silicon 3 forms a hole structure similar to that in step S2, such as Figure 3 As shown in a.
[0028] S4, such as Figure 4 As shown, at the same time, polymer 7 is grown on the plane of the second metal layer 6 away from the substrate, and extends into the hole-like structure of step S2 and step S3, filling the hole-like structure (as shown in FIG. Figure 5 a).
[0029] S5, removing the polymer 7 grown on the surface of the second metal layer 6, and only retaining the polymer 7 in the gap, such as Figure 6 As shown in a, the polymer 7 in the gap ensures the amplitude of the vibrating part of the top silicon 3 while preventing sound leakage and air leakage, thereby improving the working range and reliability of the device.
[0030] S6, etching the bottom silicon 1 and the buried oxide layer 2 to form a back cavity of the chip, such as Figure 7 As shown in a.
[0031] Embodiment 2
[0032] The chip preparation process based on the piezoelectric MEMS structure proposed in the embodiment of the present invention includes the following steps:
[0033] S1, prepare a substrate, the substrate has a relative front side, grow a first metal layer 4 on the front side of the substrate as a bottom electrode, grow a piezoelectric layer 5 on the side of the first metal layer 4 away from the substrate, and grow a second metal layer 6 on the side of the piezoelectric layer 5 away from the substrate as a top electrode, such as Figure 1 As shown. Optionally, the substrate is an SOI substrate, which is composed of a bottom silicon 1 and a top silicon 3 connected by a buried oxide layer 2. Optionally, the substrate is a silicon substrate (not shown in the figure).
[0034] S2, the second metal layer 6, the piezoelectric layer 5 and the first metal layer 4 are sequentially etched to form a through gap among the second metal layer 6, the piezoelectric layer 5 and the first metal layer 4, and the gap is in an "X"-shaped structure, such as Figure 2 As shown in c.
[0035] S3, etching the top silicon 3, so that the top silicon 3 forms the same gap as in step S2, such as Figure 3 As shown in c.
[0036] S4, at the same time, a polymer 7 (such as Figure 5 c), and extends to the "X"-like structure of step S2 and step S3, filling the "X"-like structure (as shown in FIG. Figure 4 shown).
[0037] S5, removing the polymer 7 grown on the surface of the second metal layer 6, and only retaining the polymer 7 in the gap, such as Figure 6 As shown in c, the polymer 7 in the gap ensures the amplitude of the vibrating part of the top silicon 3 while preventing sound leakage and air leakage, thereby improving the working range and reliability of the device.
[0038] S6, etching the bottom silicon 1 and the buried oxide layer 2 to form a back cavity of the chip, such as Figure 7 As shown in c.
[0039] Embodiment 3
[0040] S1, prepare a substrate, the substrate has a relative front side, grow a first metal layer 4 on the front side of the substrate as a bottom electrode, grow a piezoelectric layer 5 on the side of the first metal layer 4 away from the substrate, and grow a second metal layer 6 on the side of the piezoelectric layer 5 away from the substrate as a top electrode, such as Figure 1 As shown. Optionally, the substrate is an SOI substrate, which is composed of a bottom silicon 1 and a top silicon 3 connected by a buried oxide layer 2. Optionally, the substrate is a silicon substrate (not shown in the figure).
[0041] S2, etching the second metal layer 6 to form a hollow structure through the second metal layer 6, forming a vibration part and a fixed part independent of each other from the inside to the outside of the second metal layer, and the vibration part and the fixed part are connected by a cantilever beam; etching the piezoelectric layer 5 to form the same structure as the second metal layer 6; etching the first metal layer 4 to form the same structure as the piezoelectric layer 5; Figure 2 As shown in b.
[0042] S3, etching the top silicon 3, so that the top silicon 3 forms the same structure as the first metal layer 4, such as Figure 3 As shown in b.
[0043] S4, growing a polymer 7 (such as Figure 5 b), and extends to the hollow structure of step S2 and step S3 (as shown in Figure 4 ), filling the hollow structure.
[0044] S5, removing the polymer 7 grown on the surface of the second metal layer 6, and only retaining the polymer 7 in the hollow structure, such as Figure 6 As shown in b, during the structure release process of the chip, problems such as structural fragility and fracture, device damage, etc. caused by residual stress and the like are avoided, thereby improving the product yield.
[0045] S6, etching the bottom silicon 1 and the buried oxide layer 2 to form a back cavity of the chip, such as Figure 7 As shown in b.
[0046] Optionally, the polymer is one or a combination of PI (polyimide), parylene, polyparaxylene and PDMS (polydimethylsiloxane).
[0047] One or more embodiments of this specification are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of one or more embodiments of this specification should be included in the scope of protection of this disclosure.
Claims
1. A chip preparation process based on a piezoelectric MEMS structure, characterized in that: The following steps are involved: A substrate is prepared, wherein the substrate has a front side and a back side opposite to each other, and a first metal layer (4), a piezoelectric layer (5) and a second metal layer (6) are sequentially grown on the front side of the substrate; The second metal layer (6), the piezoelectric layer (5), the first metal layer (4) and the front surface of the substrate are sequentially etched to generate through-going gaps in the second metal layer (6), the piezoelectric layer (5), the first metal layer (4) and the front surface of the substrate; Growing a polymer (7) on a plane of the second metal layer (6) away from the substrate and extending the polymer (7) into the gap; removing the polymer (7) grown away from the plane of the substrate of the second metal layer (6); The back side of the substrate is etched to form a back cavity.
2. The chip preparation process based on piezoelectric MEMS structure according to claim 1 is characterized in that: The slit is in the shape of a hole.
3. The chip preparation process based on piezoelectric MEMS structure according to claim 1 is characterized in that: The gap is in the shape of a gap with an "X"-shaped structure.
4. The chip preparation process based on piezoelectric MEMS structure according to claim 1 is characterized in that: The gap is hollow.
5. The chip preparation process based on piezoelectric MEMS structure according to any one of claims 1 to 4, characterized in that: The substrate is a silicon substrate.
6. The chip preparation process based on the piezoelectric MEMS structure according to any one of claims 1 to 4, characterized in that: The substrate is an SOI substrate, which includes bottom silicon and top silicon connected by a buried oxide layer.