Test board and test method

Abstract

The invention relates to the technical field of printed circuit board testing, in particular to a testing board and a testing method.The testing board comprises multiple layers of core boards, circuits with the minimum line width in a circuit board to be tested are arranged on the testing board, the circuits are arranged on the two sides of the core boards respectively, bonding pads are arranged at the two ends of the circuits respectively, and the bonding pads are arranged on the core boards. By reasonably connecting the bonding pads in the layers and the bonding pads between the layers, after the test board is subjected to an aging test in the environments of high temperature, humidity, temperature cycle, mechanical stress and the like, a universal meter is used for carrying out short circuit detection on the bonding pads of the top core board, so that whether short circuit occurs between lines can be judged; the layer where the short circuit of the test board is located can be judged, and related workers directly perform flat grinding on the layer where the short circuit is located, so that the related workers can conveniently analyze short circuit reasons, the improvement of the product preparation process of the circuit board can be effectively promoted, and the yield of the circuit board is greatly improved.

Description

Technical Field

[0001] The invention relates to the technical field of printed circuit board testing, in particular to a testing board and a testing method. Background Art

[0002] A circuit board is a substrate used to realize circuit connection. It is usually made of insulating materials such as glass fiber, epoxy resin, etc., with conductive lines attached on it to realize the connection and signal transmission between electronic components. It is widely used in various electronic devices.

[0003] In order to test the reliability and service life of circuit boards in the prior art, the circuit boards are usually placed in high temperature, humidity, temperature cycle, mechanical stress and other environments to accelerate the aging process and conduct aging tests to ensure that the circuit boards can work stably within the expected life cycle. This testing method may cause early aging and damage of components, and even cause the entire circuit board to fail, greatly increasing production costs and resource consumption. Summary of the invention

[0004] The embodiments of the present invention provide a test board and a test method to solve the problem in the prior art that the circuit board causes early aging and damage of components during aging tests, and even causes the entire circuit board to fail, thereby increasing production costs and resource consumption.

[0005] In a first aspect, the present invention provides a test board, the test board comprising N core boards, N being a positive integer greater than 1, wherein each layer of the core board is respectively provided with N left pads and N right pads, the number of connections between the left pads of the i-th core board is i, i=2...N; the number of connections between the right pads of the i-th core board is i, i=2...N;

[0006] The left pads Ln1 of the core boards of each layer are interconnected, n=1...N; the left pads Ln2 of the core boards of each layer are interconnected, n=1...N-1; and so on; the left pads Ln(N-1) of the core boards of each layer are interconnected, n=1, 2; and the left pads LnN of the core boards of each layer are not interconnected, n=1...N;

[0007] The right pads Rn1 of the core boards of each layer are interconnected, n=1...N; the right pads Rn2 of the core boards of each layer are interconnected, n=1...N-1; and so on, the right pads Rn(N-1) of the core boards of each layer are interconnected, n=1, 2; and the right pads RnN of the core boards of each layer are not interconnected, n=1...N;

[0008] The left pad LnN of each layer of the core board is electrically connected to the first circuit, and the right pad RnN of each layer of the core board is electrically connected to the second circuit, and there is a gap between the first circuit and the second circuit.

[0009] In one embodiment, a metal hole is provided on the left pad Ln1 of each core board so that the left pad Ln1 of each core board is connected to each other, and a metal hole is provided on the left pad Ln2 of each core board so that the left pad Ln2 of each core board is connected to each other, and so on, a metal hole is provided on the left pad Ln(N-1) of each core board so that the left pad Ln(N-1) of each core board is connected to each other;

[0010] A metal hole is set on the right side pad Rn1 of each core board to make the right side pads Rn1 of each core board conductive to each other, a metal hole is set on the right side pad Rn2 of each core board to make the right side pads Rn2 of each core board conductive to each other, and so on, a metal hole is set on the right side pad Rn(N-1) of each core board to make the right side pads Rn(N-1) of each core board conductive to each other.

[0011] In one embodiment, a metal wire is arranged between the left pad L2N and the left pad L2(N-1) of the second core board, so that the number of connections between the left pads of the second core board is 2, and metal wires are arranged between the left pad L3N and the left pad L3(N-1) of the third core board and between the left pad L3(N-1) and the left pad L3(N-2), so that the number of connections between the left pads of the third core board is 3, and so on, metal wires are arranged between the left pad LN(N-1) of the Nth core board, between the left pad LN(N-1) and the left pad LN(N-2), and even between the left pad LN2 and the left pad LN1, so that the number of connections between the left pads of the Nth core board is N;

[0012] A metal wire is arranged between the right side pad R2N and the right side pad R2(N-1) of the second layer core board, so that the number of connections between the right side pads of the second layer core board is 2, and metal wires are arranged between the right side pad RnN and the right side pad R3(N-1) of the third layer core board, and between the right side pad R3(N-1) and the right side pad R3(N-2), so that the number of connections between the right side pads of the third layer core board is 3, and so on. Metal wires are arranged between the right side pad RNN and the right side pad RN(N-1) of the Nth layer core board, between the right side pad RN(N-1) and the right side pad RN(N-2), and even between the right side pad RN2 and the right side pad RN1, so that the number of connections between the right side pads of the Nth layer core board is N.

[0013] In one embodiment, the number of connections between the left pads of the first layer core board is 0, and the number of connections between the right pads of the first layer core board is 0.

[0014] In one embodiment, the test board is arranged on the process edge of the circuit board to be tested.

[0015] In a second aspect, the present invention provides a test board. Based on the test board of the first aspect, the number of connections between the left pads of the first layer core board is N, and the number of connections between the right pads of the first layer core board is N.

[0016] In one embodiment, metal wires are provided between the left pad L1N and the left pad L1(N-1), between the left pad L1(N-1) and the left pad L1(N-2), and even between the left pad L12 and the left pad L11 of the first core board, so that the number of connections between the left pads of the first core board is N;

[0017] Metal wires are arranged between the right side pad R1N and the right side pad R1(N-1) of the first layer core board, between the right side pad R1(N-1) and the right side pad R1(N-2), and even between the right side pad R12 and the right side pad R11, so that the number of connections between the right side pads of the first layer core board is N.

[0018] In a third aspect, the present invention provides a test board, comprising N layers of core boards, N being a positive integer greater than 1, wherein each layer of the core boards is respectively provided with a left solder pad and a right solder pad, the left solder pads of each layer of the core boards are interconnected, the right solder pads of each layer of the core boards are interconnected, the left solder pads of each layer of the core boards are electrically connected to a first circuit, the right solder pads of each layer of the core boards are electrically connected to a second circuit, and there is a spacing between the first circuit and the second circuit.

[0019] In a fourth aspect, the present invention provides a testing method, wherein the testing method uses the testing board described in the first aspect and its implementation manner to perform testing, comprising:

[0020] Use the two ends of the test equipment to connect the left pad L1N of the first layer core board and the right pad R1N of the first layer core board respectively;

[0021] Determine whether a short circuit occurs between the first circuit of the first core board and the second circuit of the first core board;

[0022] Use two ends of the test device to connect the left pad L1 (N-1) of the first core board and the right pad R1 (N-1) of the first core board respectively;

[0023] Determine whether a short circuit occurs between the first circuit of the second layer core board and the second circuit of the second layer;

[0024] And so on;

[0025] Using two ends of the test device to respectively connect the left pad L11 of the first core board and the right pad R11 of the first core board;

[0026] Determine whether a short circuit occurs between the first circuit of the N-th layer core board and the second circuit of the N-th layer.

[0027] In a fifth aspect, the present invention provides a testing method, wherein the testing method uses the testing board described in the second aspect and its implementation manner to perform testing, comprising:

[0028] Use the two ends of the test equipment to connect any pad on the left side of the first layer core board and any pad on the right side of the first layer core board respectively;

[0029] Determine whether a short circuit occurs between the first circuit and the second circuit of the test board;

[0030] If the judgment result is that a short circuit occurs between the first circuit and the second circuit of the test board, the metal wire between the left pad L1N and the left pad L1(N-1) of the first core board of the test board is cut off, and the metal wire between the right pad R1N and the right pad R1(N-1) of the first core board is cut off;

[0031] Using two ends of the test device to respectively connect the left pad L1N of the first core board and the right pad R1N of the first core board;

[0032] Determine whether a short circuit occurs between the first circuit of the first core board and the second circuit of the first core board;

[0033] If the judgment result is that there is no short circuit between the first circuit of the first core board and the second circuit of the first core board, the metal wire between the left pad L1 (N-1) and the left pad L1 (N-2) of the first core board is cut off, and the metal wire between the right pad R1 (N-1) and the right pad R1 (N-2) of the first core board is cut off;

[0034] Use two ends of the test device to connect the left pad L1 (N-1) of the first core board and the right pad R1 (N-1) of the first core board respectively;

[0035] Determine whether a short circuit occurs between the first circuit of the second layer core board and the second circuit of the second layer;

[0036] And so on;

[0037] If the judgment result is that there is no short circuit between the first circuit of the N-1th layer core board and the second circuit of the N-1th layer, then the judgment result is that there is no short circuit between the first circuit of the Nth layer core board and the second circuit of the Nth layer.

[0038] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0039] The present invention provides a test board, the test board is provided with a plurality of core boards, a circuit with the smallest line width in a circuit board to be tested is provided on the test board, the circuits are respectively provided on both sides of each core board, the distance between the circuits on both sides is the smallest line distance in the circuit of the circuit board to be tested, and pads are respectively provided at both ends of the circuit, and the pads in each layer and the pads between each layer are reasonably connected, so that after the test board is subjected to an aging test under high temperature, humidity, temperature cycle, mechanical stress and the like, a multimeter is used to perform a short circuit detection on the pads of the top core board, so that it can be determined whether a short circuit occurs between the circuits, and the layer where the short circuit of the test board is located can be determined, and relevant staff can directly grind flat to the layer where the short circuit is located, so that it is convenient for relevant staff to analyze the cause of the short circuit, and it can effectively promote the improvement of the product preparation process of the circuit board, and greatly improve the yield of the circuit board. The test board of the present invention will not affect the circuit board to be tested, avoids the failure of the circuit board caused by the aging test, and there is no interference from other circuits during the test process, so that the test result is more accurate, convenient for data analysis, and can effectively promote the improvement of the product manufacturing process. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative labor.

[0041] Figure 1-1 is a schematic diagram of a cross-sectional structure of a test board provided by an embodiment of the present invention;

[0042] Figure 1-2 This is a schematic diagram of the structure of a first circuit and a second circuit of a test board provided by an embodiment of the present invention;

[0043] Figure 1-3 This is a schematic diagram of the structure of a first circuit and a second circuit of a test board provided by an embodiment of the present invention;

[0044] Figure 2-1 is a schematic diagram of a cross-sectional structure of a test board provided by an embodiment of the present invention;

[0045] Figure 2-2 is a schematic diagram of the cross-sectional structure of a three-layer test board provided by one embodiment of the present invention;

[0046] Figure 2-3 is a schematic diagram of the cross-sectional structure of a four-layer test board provided by one embodiment of the present invention;

[0047] Figure 3 is a schematic diagram of a cross-sectional structure of a test board provided by an embodiment of the present invention;

[0048] Figure 4 It is a flow chart of a testing method provided by one embodiment of the present invention;

[0049] Figure 5 It is a flow chart of a testing method provided by one embodiment of the present invention;

[0050] Among them, 1, left pad, 2, right pad, 3, left pad through hole, 4, right pad through hole, 5, first line, 6, second line. DETAILED DESCRIPTION

[0051] In order to make the technical problems, technical solutions and beneficial effects solved by the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0052] In the description of the present invention, it should be understood that the terms "longitudinal", "radial", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In the description of the present invention, unless otherwise specified, "plurality" means two or more.

[0053] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0054] In order to fully understand the present invention, detailed structures and steps will be presented in the following description to illustrate the technical solutions proposed by the present invention. The preferred embodiments of the present invention are described in detail below, but in addition to these detailed descriptions, the present invention may also have other implementations.

[0055] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the disclosure belongs. It will be further understood that the terms used herein should be interpreted as having a meaning consistent with their meaning in the context of this specification and the relevant technology, and will not be interpreted in an idealized or overly formal sense unless explicitly defined as such herein.

[0056] In the first embodiment, Figure 1-1 As shown, a schematic diagram of the cross-sectional structure of a test board is provided, and the test board includes: N layers of core boards, N is a positive integer greater than 1, wherein each layer of the core boards is respectively provided with a left solder pad 1 and a right solder pad 2, the left solder pads 1 of each layer of the core boards are interconnected, the right solder pads 2 of each layer of the core boards are interconnected, the left solder pads 1 of each layer of the core boards are electrically connected to the first circuit 5, and the right solder pads 2 of each layer of the core boards are electrically connected to the second circuit 6, and there is a spacing between the first circuit 5 and the second circuit 6.

[0057] It can be understood that the left side pads 1 of each layer of the core board are connected through a through hole, and the right side pads 2 of each layer of the core board are connected through a through hole. One through hole can be set on each pad for connection, or multiple through holes can be set on the pad for connection. Preferably, multiple through holes can be set on the pad.

[0058] Further, the test board is arranged on the process edge of the circuit board to be tested, the number of core board layers of the test board is the same as the number of layers of the circuit board to be tested, each pad can be connected to a plurality of first lines 5 and a plurality of second lines 6, the line width of the first line 5 and the second line 6 is the line with the smallest line width among all the lines in the circuit board to be tested, and there is a spacing between the first line 5 and the second line 6, such as Figure 1-2 As shown, the first circuit 5 and the second circuit 6 can be parallel to each other, and the distance between the parallel first circuit 5 and the second circuit 6 is the minimum line distance of the circuits in the circuit board to be tested; Figure 1-3 As shown, the first line 5 and the second line 6 may also be broken lines with a certain angle, and the first line 5 and the second line 6 may be set according to actual application conditions.

[0059] Preferably, the length of the region where the first line 5 and the second line 6 intersect is not less than 3 mm to ensure the validity of the test result.

[0060] When it is necessary to perform an aging test on the circuit board to be tested, the test board on the process side of the circuit board to be tested is removed and placed in a box under high temperature, humidity, temperature cycle, mechanical stress and other environments. The test board is powered through the pads on both sides of the test board, so that the test board replaces the circuit board to be tested for the aging test. After the aging test, the pads on both sides are tested for short circuit using a multimeter. If a short circuit occurs, it means that the circuit board to be tested may also have a short circuit during the aging test. Furthermore, if a short circuit is detected on the test board, the cause of the short circuit of the test board is analyzed, and the circuit board to be tested is improved according to the cause of the short circuit, thereby improving the quality of the circuit board.

[0061] The test board of this embodiment sets up a special test board to replace the circuit board for aging test, which will not affect the circuit board to be tested, avoiding circuit board failure caused by aging test, and there is no interference from other circuits during the test process, making the test results more accurate and convenient for data analysis, which can effectively promote the improvement of product manufacturing process.

[0062] like Figure 2-1 As shown, a schematic diagram of the cross-sectional structure of a test board is provided.

[0063] In the second embodiment, Figure 2-1 As shown, a test board is provided, the test board includes N core boards, N is a positive integer greater than 1, wherein each layer of the core board is respectively provided with N left pads and N right pads, the number of connections between the left pads of the i-th core board is i, i=2...N; the number of connections between the right pads of the i-th core board is i, i=2...N;

[0064] The left pads Ln1 of each layer of the core board are interconnected, n=1...N; the left pads Ln2 of each layer of the core board are interconnected, n=1...N-1; and so on; the left pads Ln(N-1) of each layer of the core board are interconnected, n=1, 2; and the left pads LnN of each layer of the core board are not interconnected, n=1...N;

[0065] The right pads Rn1 of each layer of the core board are interconnected, n=1...N; the right pads Rn2 of each layer of the core board are interconnected, n=1...N-1; and so on, the right pads Rn(N-1) of each layer of the core board are interconnected, n=1, 2; and the right pads RnN of each layer of the core board are not interconnected, n=1...N;

[0066] The left pad LnN of each layer of the core board is electrically connected to the first circuit 5 , and the right pad RnN of each layer of the core board is electrically connected to the second circuit 6 . There is a gap between the first circuit 5 and the second circuit 6 .

[0067] Although the test board in Example 1 can replace the circuit board for aging test and short-circuit test after aging test, the relevant staff cannot confirm which specific layer of the test board has a short circuit. If a short-circuit analysis is required, they can only grind layer by layer to confirm the short-circuit location, which places high requirements on the relevant staff. A more optimized test board of this embodiment is needed to reduce the failure rate of grinding by the relevant staff and improve the success rate of short-circuit analysis.

[0068] Specifically, Figure 2-1 As shown, the number of connections between the pads on the left side of the core board is starting from the number of pads on the left side of the core board connected to the first line 5, and the number of connections between the left pads 1 of the second layer of the core board is 2, which means that the left pad L2N of the second layer of the core board is connected to the left pad L2(N-1), wherein the 2 in L2N represents the number of layers of the core board, the L in L2N represents that the pad is the left pad, the N in L2N represents that the pad is in the Nth column, and the N in L2(N-1) represents that the pad is in the (N-1) column; the number of connections between the left pads of the third layer of the core board is 3, which means that the left pad L3N of the third layer of the core board is connected to the left pad L3(N-1), and the left pad L3(N-1) is connected to the left pad L3(N-2).

[0069] Similarly, the number of connections between the right side pads of the second layer core board is 2, which means that the right side pad R2N of the second layer core board is connected to the right side pad R2(N-1), and the number of connections between the right side pads of the third layer core board is 3, which means that the right side pad R3N of the third layer core board is connected to the right side pad R3(N-1), and the right side pad R3(N-1) is connected to the right side pad R3(N-2).

[0070] n=1……N means that n in Ln1 is 1, 2……N, and the left pads Ln1 of each layer of core board are interconnected, n=1……N, indicating that all pads from the first layer of core board in the first column of the left pads to the Nth layer of pads in the first column of the left pads are all conductive; the left pads Ln2 of each layer of core board are interconnected, n=1……N-1, indicating that all pads from the first layer of core board in the second column of the left pads to the N-1th layer of pads in the second column of the left pads are all conductive, and the right pads are similar, which are the same as the first line 5 and the second line 6 in Example 1, the line width of the first line 5 and the second line 6 is the line with the smallest line width among all lines in the circuit board to be tested, the first line 5 and the second line 6 can be parallel to each other, and the first line 5 and the second line 6 can also be broken lines with a certain angle.

[0071] It can be understood that the number of connections of the left pad and the right pad of the first core board can be 0 respectively. When a multimeter is used to detect short circuits on the first pads, the short circuit can be located, and the layer where the short circuit of the test board is located can be accurately known. The number of connections of the left pad and the right pad of the first core board can also be N-1 respectively. When a multimeter is used to detect short circuits on the first pads, it can be quickly determined whether a short circuit has occurred in the test board.

[0072] Preferably, Figure 2-2 As shown, a schematic diagram of the cross-sectional structure of a three-layer core board is provided, the number of connections of the left pad and the number of connections of the right pad of the first layer of the three-layer core board are 2 respectively, and a short circuit test can be performed after the test board of the three-layer core board is subjected to an aging test, and a multimeter is used to connect any one of the left pads and any one of the right pads of the first layer of the three-layer core board. If a short circuit occurs, it is determined that a short circuit occurs between the first circuit 5 and the second circuit 6 in the test board, and if no short circuit occurs, it is determined that no short circuit occurs between the circuits of the test board. If a short circuit occurs, if it is determined that a short circuit occurs between the first circuit 5 and the second circuit 6 in the test board, disconnect the left pad L13 and the left pad L12 of the first layer core board of the test board, and disconnect the right pad R13 and the right pad R12 of the first layer core board of the test board, connect the left pad L13 and the right pad R13 at both ends of the multimeter, and perform a short circuit detection. If the detection result is a short circuit, it is determined that a short circuit occurs between the first circuit 5 and the second circuit 6 on the first layer core board of the test board, and a short circuit analysis can be performed on the circuit of the first layer.

[0073] If there is no short circuit between the left pad L13 and the right pad R13 of the 1st core board, disconnect the left pad L12 and the left pad L11 of the 1st core board of the test board, and disconnect the right pad R12 and the right pad R11 of the 1st core board of the test board. Connect the two ends of the multimeter to the left pad L12 and the right pad R12 to perform a short circuit detection. If the detection result is a short circuit, it is determined that the first circuit 5 and the second circuit 6 on the 2nd core board of the test board are short-circuited. The test board can be ground to the 2nd layer, and a short circuit analysis is performed on the circuit of the 2nd layer; if there is no short circuit between the left pad L12 and the right pad R12 of the 1st core board, it is determined that the first circuit 5 and the second circuit 6 on the 3rd core board of the test board are short-circuited. The test board can be ground to the 3rd layer, and a short circuit analysis is performed on the circuit of the 3rd layer.

[0074] Preferably, Figure 2-3As shown, a schematic diagram of the cross-sectional structure of a four-layer core board is provided, the number of connections of the left pad 1 of the first core board of the four-layer core board and the number of connections of the right pad 2 are 3 respectively, and a short circuit test can be performed after the test board of the three-layer core board is subjected to an aging test, and a multimeter is used to connect any one of the left pads 1 and any one of the right pads 2 of the first core board of the four-layer core board. If a short circuit occurs, it is determined that a short circuit occurs between the first circuit 5 and the second circuit 6 in the test board, and if no short circuit occurs, it is determined that the circuits of the test board are No short circuit occurs. If it is determined that a short circuit occurs between the first circuit 5 and the second circuit 6 in the test board, disconnect the left pad L14 and the left pad L13 of the first layer core board of the test board, and disconnect the right pad R14 and the right pad R13 of the first layer core board of the test board. Connect the two ends of the multimeter to the left pad L14 and the right pad R14 to perform a short circuit test. If the test result is a short circuit, it is determined that a short circuit occurs between the first circuit 5 and the second circuit 6 on the first layer core board of the test board, and a short circuit analysis can be performed on the circuit of the first layer.

[0075] If there is no short circuit between the left pad L14 and the right pad R14 of the 1st layer core board, disconnect the left pad L13 and the left pad L12 of the 1st layer core board of the test board, and disconnect the right pad R13 and the right pad R12 of the 1st layer core board of the test board. Connect the two ends of the multimeter to the left pad L13 and the right pad R13 to perform a short circuit test. If the test result is a short circuit, it is determined that the first circuit 5 and the second circuit 6 on the 2nd layer core board of the test board are short-circuited. The test board can be ground to the 2nd layer, and a short circuit analysis can be performed on the circuit of the 2nd layer.

[0076] If there is no short circuit between the left pad L13 and the right pad R13 of the 1st core board, disconnect the left pad L12 and the left pad L11 of the 1st core board of the test board, and disconnect the right pad R12 and the right pad R11 of the 1st core board of the test board. Connect the two ends of the multimeter to the left pad L12 and the right pad R12 to perform a short circuit detection. If the detection result is a short circuit, it is determined that the first line 5 and the second line 6 on the 3rd core board of the test board are short-circuited. The test board can be ground to the 3rd layer, and a short circuit analysis is performed on the line on the 3rd layer; if there is no short circuit between the left pad L12 and the right pad R12 of the 1st core board, it is determined that the first line 5 and the second line 6 on the 4th core board of the test board are short-circuited. The test board can be ground to the 4th layer, and a short circuit analysis is performed on the line on the 4th layer.

[0077] The test board of the present embodiment is provided with a plurality of core boards, and the circuit with the smallest line width in the circuit board to be tested is set on the test board, and the circuits are respectively set on both sides of each core board, and the distance between the circuits on both sides is the smallest line distance in the circuit of the circuit board to be tested, and pads are respectively provided at both ends of the circuit, and the pads in each layer and the pads between each layer are reasonably connected, so that after the test board is subjected to aging test under high temperature, humidity, temperature cycle, mechanical stress and other environments, a multimeter is used to perform short circuit detection on the pads of the top core board, so that it can be judged whether a short circuit occurs between the circuits, and the layer where the short circuit of the test board is located can be judged, and the relevant staff can directly grind to the layer where the short circuit is located, so that the relevant staff can analyze the cause of the short circuit, and can effectively promote the improvement of the product preparation process of the circuit board, and greatly improve the yield of the circuit board. The test board of the present invention will not affect the circuit board to be tested, avoid the failure of the circuit board caused by the aging test, and there is no interference from other circuits during the test process, so that the test results are more accurate, convenient for data analysis, and can effectively promote the improvement of the product manufacturing process.

[0078] In the third embodiment, Figure 2-1 As shown, on the basis of the above-mentioned embodiment 2, a metal hole is provided on the left pad Ln1 of each core board, so that the left pads Ln1 of each core board are mutually conductive, and a metal hole is provided on the left pad Ln2 of each core board, so that the left pads Ln2 of each core board are mutually conductive, and so on, a metal hole is provided on the left pad Ln(N-1) of each core board, so that the left pads Ln(N-1) of each core board are mutually conductive;

[0079] A metal hole is set on the right side pad Rn1 of each core board to make the right side pads Rn1 of each core board conductive to each other, a metal hole is set on the right side pad Rn2 of each core board to make the right side pads Rn2 of each core board conductive to each other, and so on, a metal hole is set on the right side pad Rn(N-1) of each core board to make the right side pads Rn(N-1) of each core board conductive to each other.

[0080] It can be understood that the metal holes are through holes after electroplating. Before the core boards are pressed together, corresponding through holes are first set on each core board and filled with electroplating, so that after the core boards are pressed together, the core boards of each layer are connected through the plated holes. Only one through hole can be set in the pad where a through hole needs to be prepared, or multiple through holes can be set in the pad where a through hole needs to be prepared, so as to avoid a defective through hole during the processing of the test board, which affects the short circuit detection of the test board.

[0081] The test board of this embodiment has through holes set on corresponding pads, and the connection between each layer of core board is achieved by electroplating the through holes. In addition, multiple through holes are set in the pads where through holes are required to be set, so as to avoid a defective through hole in the test board during the processing process, which will affect the short circuit test of the test board.

[0082] In the fourth embodiment, Figure 2-1 As shown, on the basis of the above-mentioned third embodiment, a metal wire is arranged between the left pad L2N of the second core board and the left pad L2(N-1), so that the number of connections between the left pads 1 of the second core board is 2, and metal wires are arranged between the left pad L3N of the third core board and the left pad L3(N-1) and between the left pad L3(N-1) and the left pad L3(N-2), so that the number of connections between the left pads 1 of the third core board is 3, and so on, metal wires are arranged between the left pad LN(N-1) of the Nth core board, between the left pad LN(N-1) and the left pad LN(N-2), and even between the left pad LN2 and the left pad LN1, so that the number of connections between the left pads 1 of the Nth core board is N;

[0083] A metal wire is arranged between the right side pad R2N and the right side pad R2(N-1) of the second layer core board, so that the number of connections between the right side pads 2 of the second layer core board is 2, and metal wires are arranged between the right side pad RnN and the right side pad R3(N-1) of the third layer core board and between the right side pad R3(N-1) and the right side pad R3(N-2) respectively, so that the number of connections between the right side pads 2 of the third layer core board is 3, and so on, metal wires are arranged between the right side pad RNN and the right side pad RN(N-1) of the Nth layer core board, between the right side pad RN(N-1) and the right side pad RN(N-2), and even between the right side pad RN2 and the right side pad RN1, so that the number of connections between the right side pads 2 of the Nth layer core board is N.

[0084] It can be understood that the metal wire is a copper wire, and the copper wire can be set between the pads through circuit pattern production. The copper wire enables the pads on each layer of the core board to be connected. After the core board is pressed together, the pads on the top layer of the core board are measured using a multimeter. The pads can be connected to any layer of the core board except the top layer through the through hole. The copper wires set on these core boards can be connected to the first circuit 5 and the second circuit 6 that need to be short-circuited.

[0085] The test board of this embodiment sets copper wires between corresponding pads, and uses the copper wires to connect the first circuit 5 and the second circuit 6 to the pads connected to the top pads through the through holes, so that after the aging test, the test board can determine the layer where the short circuit of the test board is located by testing the pads of the corresponding top core board. The relevant staff can directly grind to the layer where the short circuit is located, which is convenient for the relevant staff to analyze the cause of the short circuit, which can effectively promote the improvement of the product preparation process of the circuit board and greatly improve the yield of the circuit board.

[0086] In the fifth embodiment, Figure 2-1 As shown, based on the above-mentioned fourth embodiment, the number of connections between the left pads 1 of the first layer core board is 0, and the number of connections between the right pads 2 of the first layer core board is 0.

[0087] After the aging test of the test board, use a multimeter to connect the left pad L1N and the right pad R1N to determine whether a circuit occurs in the first line 5 and the second line 6 of the first layer core board of the test board; use a multimeter to connect the left pad L1(N-1) and the right pad R1(N-1) to determine whether a circuit occurs in the first line 5 and the second line 6 of the second layer core board of the test board, and so on. The multimeter can be used to test whether all layers of the test board are short-circuited.

[0088] In this embodiment, when a multimeter is used to perform short circuit detection on the first layer of pads, faults can be eliminated one by one, thereby locating the short circuit in the test board and accurately knowing the layer of the test board where the short circuit is located.

[0089] like Figure 3 As shown, a schematic diagram of the cross-sectional structure of a test board is provided.

[0090] In Example 6, Figure 3 As shown, a test board is provided. Based on the above fourth embodiment, the number of connections between the left pads 1 of the first layer core board is N, and the number of connections between the right pads 2 of the first layer core board is N.

[0091] After the aging test of the test board, use a multimeter to connect any left pad 1 and any right pad 2 to determine whether there is a short circuit in the test board. If the test board is short-circuited, disconnect the copper wire between the left pad L1N and the left pad L1(N-1), and disconnect the copper wire between the right pad R1N and the right pad R1(N-1). Use a multimeter to connect the left pad L1N and the right pad R1N to test whether the first line 5 and the second line 6 of the first layer core board have a circuit. If there is no short circuit in the first layer of core board, disconnect the copper wire between the left pad L1 (N-1) and the left pad L1 (N-2), and disconnect the copper wire between the right pad R1 (N-1) and the right pad R1 (N-2), and use a multimeter to connect the left pad L1 (N-1) and the right pad R1 (N-1), and then you can determine whether there is a circuit in the first line 5 and the second line 6 of the second layer of core board of the test board. By analogy, you can use a multimeter to test whether all layers of the test board have a short circuit.

[0092] The test board of this embodiment can quickly determine whether a short circuit occurs in the test board. If a short circuit occurs in the test board, the connection between the corresponding pads can be disconnected, and then a multimeter can be used for testing to locate the short circuit in the test board and accurately determine the layer of the test board where the short circuit occurs.

[0093] In embodiment seven, Figure 3 As shown, on the basis of the sixth embodiment, metal wires are provided between the left pad L1N and the left pad L1(N-1), between the left pad L1(N-1) and the left pad L1(N-2), and even between the left pad L12 and the left pad L11, so that the number of connections between the left pads 1 of the first core board is N;

[0094] Metal wires are arranged between the right side pad R1N and the right side pad R1(N-1) of the first layer core board, between the right side pad R1(N-1) and the right side pad R1(N-2), and even between the right side pad R12 and the right side pad R11, so that the number of connections between the right side pads 2 of the first layer core board is N.

[0095] The metal wire is a copper wire, which can be arranged on the first layer of the core board by means of circuit pattern production, or can be welded between the pads by welding or other methods. If a multimeter is used to perform a short circuit test on each layer of the core board of the test board, the copper wire arranged between the pads can be cut off, or the copper wire connected between the pads can be removed by welding or other methods.

[0096] The test board of this embodiment has copper wires set between the first layer of pads. When the test board is subjected to a short-circuit test, it is possible to quickly determine whether a short circuit occurs on the test board, and to determine which specific layer of the core boards has a short circuit by cutting or removing the copper wires.

[0097] In the eighth embodiment, based on the above-mentioned second embodiment, the test board is arranged on the process edge of the circuit board to be tested.

[0098] In this embodiment, the test board is set on the process edge of the circuit board to be tested. When the circuit board is manufactured, the test board is also manufactured. There is no need to increase the manufacturing process to specially manufacture the test board. The test board is set on the process edge. When conducting the test, the process edge is directly removed to conduct the aging test, thereby avoiding the waste of resources.

[0099] In the ninth embodiment, Figure 4 As shown, a flow chart of a testing method is provided, and the testing method uses the testing board of any one of the embodiments from the second embodiment to the fifth embodiment to perform testing, including:

[0100] Step S101: Use two ends of the test equipment to respectively connect the left pad L1N of the first layer core board and the right pad R1N of the first layer core board.

[0101] The test equipment may be a multimeter, with the function switch of the multimeter adjusted to the on-off test position, with both ends of the multimeter contacting the left pad L1N of the first core board and the right pad R1N of the first core board respectively.

[0102] Step S102: Determine whether a short circuit occurs between the first circuit 5 of the first-layer core board and the second circuit 6 of the first-layer core board.

[0103] If you hear a beep from the multimeter, it means that there is a short circuit between the two pads. If the multimeter shows a large or infinite resistance value, it means that there is no short circuit between the two pads.

[0104] Step S103: Use the two ends of the test device to respectively connect the left pad L1 (N-1) of the first layer core board and the right pad R1 (N-1) of the first layer core board.

[0105] Set the function switch of the multimeter to the continuity test position, and contact the two ends of the multimeter with the left pad L1 (N-1) of the first core board and the right pad R1 (N-1) of the first core board respectively.

[0106] Step S104: determining whether a short circuit occurs between the first circuit 5 of the second layer core board and the second circuit 6 of the second layer;

[0107] The determination method is the same as step S102 and will not be described in detail here.

[0108] By analogy, whether the first line 5 and the second line 6 of the third layer core board are short-circuited, whether the first line 5 and the second line 6 of the fourth layer core board are short-circuited, and so on until the N-1th layer.

[0109] Step S10 (2N-1): Use the two ends of the test device to respectively connect the left pad L11 of the first layer core board and the right pad R11 of the first layer core board.

[0110] Adjust the function switch of the multimeter to the continuity test position, and contact the two ends of the multimeter with the left pad L11 of the first core board and the right pad R11 of the first core board respectively.

[0111] Step S10 (2N): Determine whether a short circuit occurs between the first circuit 5 of the N-th layer core board and the second circuit 6 of the N-th layer.

[0112] The determination method is the same as step S102 and will not be described in detail here.

[0113] The test method of this embodiment can eliminate the short circuits one by one when using a multimeter to detect the short circuits on the first layer of pads, so as to locate the short circuits in the test board and accurately know the layer where the short circuits are located on the test board. The relevant staff can directly grind to the layer where the short circuits are located, which is convenient for the relevant staff to analyze the causes of the short circuits, and can effectively promote the improvement of the product preparation process of the circuit board, greatly improving the yield of the circuit board.

[0114] In Example 10, Figure 4 As shown, a flow chart of a testing method is provided, wherein the testing method uses the testing board of any one of the sixth to seventh embodiments to perform testing, including:

[0115] Step S201: Use two ends of the test equipment to respectively connect any pad on the left side of the first layer core board and any pad on the right side of the first layer core board.

[0116] Adjust the function switch of the multimeter to the continuity test position, and connect the two ends of the multimeter to any one of the left pads 1 of the first core board and any one of the right pads 2 of the first core board.

[0117] Step S202: Determine whether a short circuit occurs between the first circuit 5 and the second circuit 6 of the test board.

[0118] The determination method is the same as step S102 and will not be described in detail here.

[0119] Step S203: If the judgment result is that a short circuit occurs between the first circuit 5 and the second circuit 6 of the test board, the metal wire between the left pad L1N and the left pad L1(N-1) of the first core board of the test board is cut off, and the metal wire between the right pad R1N and the right pad R1(N-1) of the first core board is cut off.

[0120] The copper wires disposed between the pads may be cut, or the copper wires connected between the pads may be removed by welding or the like.

[0121] Step S204: Use two ends of the test device to respectively connect the left pad L1N of the first layer core board and the right pad R1N of the first layer core board.

[0122] Adjust the function switch of the multimeter to the continuity test position, and contact the two ends of the multimeter with the left pad L1N of the first core board and the right pad R1N of the first core board respectively.

[0123] Step S205: Determine whether a short circuit occurs between the first circuit 5 of the first-layer core board and the second circuit 6 of the first-layer core board.

[0124] The determination method is the same as step S102 and will not be described in detail here.

[0125] Step S206: If the judgment result is that there is no short circuit between the first circuit 5 of the first layer core board and the second circuit 6 of the first layer core board, the metal wire between the left pad L1 (N-1) and the left pad L1 (N-2) of the first layer core board is cut off, and the metal wire between the right pad R1 (N-1) and the right pad R1 (N-2) of the first layer core board is cut off.

[0126] The copper wires disposed between the pads may be cut, or the copper wires connected between the pads may be removed by welding or the like.

[0127] Step S207: Use the two ends of the test device to respectively connect the left pad L1 (N-1) of the first layer core board and the right pad R1 (N-1) of the first layer core board.

[0128] Set the function switch of the multimeter to the continuity test position, and contact the two ends of the multimeter with the left pad L1 (N-1) of the first core board and the right pad R1 (N-1) of the first core board respectively.

[0129] Step S208: Determine whether a short circuit occurs between the first circuit 5 of the second layer core board and the second circuit 6 of the second layer.

[0130] The determination method is the same as step S102 and will not be described in detail here.

[0131] By analogy, whether the first line 5 and the second line 6 of the third layer core board are short-circuited, whether the first line 5 and the second line 6 of the fourth layer core board are short-circuited, and so on until the N-1th layer.

[0132] Step S20 (3N+2): If the judgment result is that there is no short circuit between the first circuit 5 of the N-1th layer core board and the second circuit 6 of the N-1th layer, then the judgment result is that there is no short circuit between the first circuit 5 of the Nth layer core board and the second circuit 6 of the Nth layer.

[0133] The test method of this embodiment can quickly determine whether a short circuit occurs on the test board. If a short circuit occurs on the test board, the connection between the corresponding pads can be disconnected, and then a multimeter can be used for testing to locate the short circuit in the test board and accurately know the layer where the short circuit occurs on the test board. The relevant staff can directly grind to the layer where the short circuit occurs, which is convenient for the relevant staff to analyze the cause of the short circuit, and can effectively promote the improvement of the product preparation process of the circuit board, greatly improving the yield of the circuit board. It is convenient for data analysis and can effectively promote the improvement of the product manufacturing process.

[0134] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included in the protection scope of the present invention.

Claims

1. A test board, characterized in that: The test board includes N core boards, where N is a positive integer greater than 1, wherein each core board is provided with N left pads and N right pads, respectively, and the number of connections between the left pads of the i-th core board is i, i=2...N; the number of connections between the right pads of the i-th core board is i, i=2...N; The left pads Ln1 of the core boards of each layer are interconnected, n=1...N; the left pads Ln2 of the core boards of each layer are interconnected, n=1...N-1; and so on; the left pads Ln(N-1) of the core boards of each layer are interconnected, n=1, 2; and the left pads LnN of the core boards of each layer are not interconnected, n=1...N; The right pads Nn1 of the core boards of each layer are interconnected, n=1...N; the right pads Rn2 of the core boards of each layer are interconnected, n=1...N-1; and so on, the right pads Rn(N-1) of the core boards of each layer are interconnected, n=1, 2; and the right pads RnN of the core boards of each layer are not interconnected, n=1...N; The left pad LnN of each layer of the core board is electrically connected to the first circuit, and the right pad RnN of each layer of the core board is electrically connected to the second circuit, and there is a gap between the first circuit and the second circuit.

2. The test board according to claim 1, characterized in that A metal hole is provided on the left pad Ln1 of each core board so that the left pads Ln1 of each core board are mutually conductive, and a metal hole is provided on the left pad Ln2 of each core board so that the left pads Ln2 of each core board are mutually conductive, and so on, a metal hole is provided on the left pad Ln(N-1) of each core board so that the left pads Ln(N-1) of each core board are mutually conductive; A metal hole is set on the right side pad Rn1 of each core board to make the right side pads Rn1 of each core board conductive to each other, a metal hole is set on the right side pad Rn2 of each core board to make the right side pads Rn2 of each core board conductive to each other, and so on, a metal hole is set on the right side pad Rn(N-1) of each core board to make the right side pads Rn(N-1) of each core board conductive to each other.

3. The test board according to claim 2, characterized in that A metal wire is arranged between the left pad L2N and the left pad L2(N-1) of the second core board, so that the number of connections between the left pads of the second core board is 2; a metal wire is arranged between the left pad L3N and the left pad L3(N-1) of the third core board, and between the left pad L3(N-1) and the left pad L3(N-2), so that the number of connections between the left pads of the third core board is 3; and so on; a metal wire is arranged between the left pad LN(N-1) of the Nth core board, between the left pad LN(N-1) and the left pad LN(N-2), and even between the left pad LN2 and the left pad LN1, so that the number of connections between the left pads of the Nth core board is N; A metal wire is arranged between the right side pad R2N and the right side pad R2(N-1) of the second layer core board, so that the number of connections between the right side pads of the second layer core board is 2, and metal wires are arranged between the right side pad RnN and the right side pad R3(N-1) of the third layer core board, and between the right side pad R3(N-1) and the right side pad R3(N-2), so that the number of connections between the right side pads of the third layer core board is 3, and so on. Metal wires are arranged between the right side pad RNN and the right side pad RN(N-1) of the Nth layer core board, between the right side pad RN(N-1) and the right side pad RN(N-2), and even between the right side pad RN2 and the right side pad RN1, so that the number of connections between the right side pads of the Nth layer core board is N.

4. The test board according to claim 3, characterized in that: The number of connections between the left pads of the first layer core board is 0, and the number of connections between the right pads of the first layer core board is 0.

5. The test board according to claim 3, characterized in that: The number of connections between the left pads of the first layer core board is N, and the number of connections between the right pads of the first layer core board is N.

6. The test board according to claim 5, characterized in that Metal wires are arranged between the left pad L1N and the left pad L1(N-1), between the left pad L1(N-1) and the left pad L1(N-2), and even between the left pad L12 and the left pad L11, so that the number of connections between the left pads of the first core layer is N; Metal wires are arranged between the right side pad R1N and the right side pad R1(N-1) of the first layer core board, between the right side pad R1(N-1) and the right side pad R1(N-2), and even between the right side pad R12 and the right side pad R11, so that the number of connections between the right side pads of the first layer core board is N.

7. The test board according to claim 1, characterized in that: The test board is arranged on the process edge of the circuit board to be tested.

8. A test board, characterized in that: The test board includes N layers of core boards, N is a positive integer greater than 1, wherein each layer of the core boards is respectively provided with a left solder pad and a right solder pad, the left solder pads of each layer of the core boards are interconnected, the right solder pads of each layer of the core boards are interconnected, the left solder pads of each layer of the core boards are electrically connected to a first circuit, the right solder pads of each layer of the core boards are electrically connected to a second circuit, and there is a spacing between the first circuit and the second circuit.

9. A testing method, characterized in that: The testing method is performed using any test board as claimed in claims 1 to 4, comprising: Use the two ends of the test equipment to connect the left pad L1N of the first layer core board and the right pad R1N of the first layer core board respectively; Determine whether a short circuit occurs between the first circuit of the first core board and the second circuit of the first core board; Use two ends of the test device to connect the left pad L1 (N-1) of the first core board and the right pad R1 (N-1) of the first core board respectively; Determine whether a short circuit occurs between the first circuit of the second layer core board and the second circuit of the second layer; And so on; Using two ends of the test device to respectively connect the left pad L11 of the first core board and the right pad R11 of the first core board; Determine whether a short circuit occurs between the first circuit of the N-th layer core board and the second circuit of the N-th layer.

10. A testing method, characterized in that: The testing method uses the testing board as claimed in claim 6 to perform testing, comprising: Use the two ends of the test equipment to connect any pad on the left side of the first layer core board and any pad on the right side of the first layer core board respectively; Determine whether a short circuit occurs between the first circuit and the second circuit of the test board; If the judgment result is that a short circuit occurs between the first circuit and the second circuit of the test board, the metal wire between the left pad L1N and the left pad L1(N-1) of the first core board of the test board is cut off, and the metal wire between the right pad R1N and the right pad R1(N-1) of the first core board is cut off; Using two ends of the test device to respectively connect the left pad L1N of the first core board and the right pad R1N of the first core board; Determine whether a short circuit occurs between the first circuit of the first core board and the second circuit of the first core board; If the judgment result is that there is no short circuit between the first circuit of the first core board and the second circuit of the first core board, the metal wire between the left pad L1 (N-1) and the left pad L1 (N-2) of the first core board is cut off, and the metal wire between the right pad R1 (N-1) and the right pad R1 (N-2) of the first core board is cut off; Use two ends of the test device to connect the left pad L1 (N-1) of the first core board and the right pad R1 (N-1) of the first core board respectively; Determine whether a short circuit occurs between the first circuit of the second layer core board and the second circuit of the second layer; And so on; If the judgment result is that there is no short circuit between the first circuit of the N-1th layer core board and the second circuit of the N-1th layer, then the judgment result is that there is no short circuit between the first circuit of the Nth layer core board and the second circuit of the Nth layer.

Images