Method for packaging chip with cofferdam structure
By combining the silicon substrate with the light-transmitting cover plate as a whole and making a cofferdam on the silicon substrate, the brittleness and stability problems in the traditional silicon substrate cofferdam manufacturing process are solved, and higher impact and vibration resistance are achieved and more Stable packaging structure.
Patent Information
- Application Number
- CN202411225393.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-03
- Publication Date
- 2024-12-10
AI Technical Summary
The traditional silicon substrate cofferdam manufacturing process can easily lead to reduced cracks and structural brittleness, and the mechanical stress and vibration are greatly affected, resulting in insufficient reliability and stability.
First, the silicon substrate is bonded to the light-transmitting cover plate to form a stable overall structure, and then a cofferdam is made on the silicon substrate. By bonding the protective coating and glue, thinning and forming through grooves, reducing brittleness and dispersing stress .
It improves the impact and vibration resistance of the cofferdam, reduces the processing complexity and damage risk, and enhances the stability and reliability of the overall structure.
Smart Images
Figure CN119108405A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of electronic packaging, and in particular to a chip packaging method with a cofferdam structure. Background Art
[0002] In the manufacture of semiconductor and optoelectronic devices, the fabrication of cofferdam structures is crucial for chip protection and functional realization. The traditional cofferdam manufacturing process is usually directly processed on the silicon substrate. Due to the brittleness of silicon materials, this method is prone to cracks or damage during processing. In addition, the silicon substrate processed separately is susceptible to mechanical stress and vibration during processing, resulting in reduced structural integrity and reliability. Summary of the invention
[0003] The object of the present invention is to provide a chip packaging method with a cofferdam structure to solve the above-mentioned problem.
[0004] This embodiment provides a chip packaging method with a cofferdam structure, which includes:
[0005] providing a substrate;
[0006] Providing a light-transmitting cover plate, and bonding the substrate to the light-transmitting substrate;
[0007] Removing a portion of the substrate, so that the remaining area of the substrate forms a cofferdam;
[0008] The cofferdam is bonded to the chip packaging structure.
[0009] As a further improvement of the present invention, the substrate is a silicon substrate, the silicon substrate comprises a cofferdam area and a removal area, and the cofferdam area is retained to form the cofferdam.
[0010] As a further improvement of the present invention, bonding the substrate to the light-transmitting cover plate comprises:
[0011] Disposing a protective coating on the cofferdam area of the silicon substrate;
[0012] An adhesive material is disposed on the protective coating layer, and the silicon substrate and the light-transmitting cover plate are bonded together by the adhesive material.
[0013] As a further improvement of the present invention, bonding the substrate to the light-transmitting cover plate comprises:
[0014] forming a groove on the surface of the silicon substrate removal area;
[0015] An adhesive material is disposed on the cofferdam area of the silicon substrate, and the silicon substrate and the light-transmitting cover plate are bonded together by the adhesive material.
[0016] As a further improvement of the present invention, the removing of a portion of the substrate area includes:
[0017] thinning the silicon substrate;
[0018] A through groove is formed around the silicon substrate removal area, the silicon substrate removal area is removed, and the substrate cofferdam area constitutes the cofferdam.
[0019] As a further improvement of the present invention, the removing of a portion of the substrate area includes:
[0020] thinning the silicon substrate;
[0021] A partial through groove is formed around the silicon substrate removal area, and at least one connection area is reserved to connect the substrate removal area and the cofferdam area. After adhering the removal area, the silicon substrate removal area is taken out, and the substrate cofferdam area constitutes the cofferdam.
[0022] As a further improvement of the present invention, the at least one connection area is retained, specifically comprising:
[0023] The surface of the substrate removal area is rectangular, and the connection areas are arranged at two ends of the diagonal line of the substrate removal area.
[0024] As a further improvement of the present invention, thinning the silicon substrate specifically includes:
[0025] The silicon substrate is thinned to 100-300 μm.
[0026] As a further improvement of the present invention, it also includes:
[0027] A soft buffer pad is arranged on the surface of the substrate removal area.
[0028] The present invention also provides a chip packaging structure manufactured according to the chip packaging method of the cofferdam.
[0029] The beneficial effect of the present invention is that the present invention first integrally bonds the silicon substrate and the light-transmitting substrate used for making the cofferdam, and then makes the cofferdam on the silicon substrate after bonding. By first bonding to form an integral structure, the cofferdam can be made under more stable conditions. The combination of the silicon substrate and the light-transmitting substrate provides additional support, reduces the brittleness of the silicon substrate, and reduces the process complexity and damage risk during the processing. In addition, the overall structure can effectively disperse stress, reduce the risk of brittle fracture of a single component, and has higher impact and vibration resistance. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] Figure 1 It is a schematic diagram of the steps of a chip packaging method with a cofferdam structure in one embodiment of the present invention.
[0031] Figure 2 to Figure 10It is a schematic structural diagram of each step of a chip packaging method with a cofferdam structure in one embodiment of the present invention. DETAILED DESCRIPTION
[0032] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in combination with the specific implementation methods of the present invention and the corresponding drawings. Obviously, the described implementation methods are only part of the implementation methods of the present invention, not all implementation methods. Based on the implementation methods of the present invention, all other implementation methods obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.
[0033] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.
[0034] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.
[0035] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.
[0036] like Figure 1 As shown, this embodiment provides a chip packaging method with a cofferdam, and the packaging method is applied to an image sensor chip, and the method includes:
[0037] S1: Provide a substrate 1.
[0038] S2: providing a light-transmitting cover plate 2 and bonding the substrate 1 to the light-transmitting substrate 1.
[0039] S3: removing a part of the substrate 1, and the remaining area of the substrate 1 forms a cofferdam 1a.
[0040] S4: bonding the cofferdam 1 a to the chip packaging structure 6 .
[0041] like Figure 2As shown, in step S1, the substrate 1 is a silicon substrate 1, and the silicon substrate 1 includes a cofferdam area 11 and a removal area 12, and the cofferdam area 11 is retained to form the cofferdam 1a.
[0042] The dam 1a is set around the image sensor chip in the packaging structure to block unwanted light and prevent stray light from entering the sensor sensitive area of the image sensor chip. By effectively controlling the path of light, the dam 1a can improve the contrast and clarity of the image, thereby improving the overall performance of the sensor. In addition, the dam 1a can protect the chip with a physical barrier, enhancing the durability and reliability of the system.
[0043] The cofferdam 1a is made of a silicon substrate 1. The silicon material has high hardness and mechanical strength and can withstand certain physical shocks and pressures. The high strength of the silicon material helps the cofferdam 1a to remain stable during the packaging process. In addition, silicon has good thermal conductivity and can effectively conduct away the heat generated during the operation of the chip, thereby helping to maintain a suitable operating temperature and prevent the chip from overheating. Moreover, the silicon material can be processed with high precision through mature semiconductor manufacturing processes, such as photolithography and etching, which enables the production of precise and complex cofferdams 1a.
[0044] Although the silicon substrate 1 has the above advantages, the high hardness of the silicon material also makes it fragile and easily broken when subjected to excessive mechanical stress, and cracks are generated due to impact or vibration, which affects the reliability and service life of the cofferdam 1a.
[0045] Therefore, in this embodiment, the silicon substrate 1 and the transparent substrate 1 used to make the cofferdam 1a are first integrally bonded, and then the cofferdam 1a is made on the silicon substrate 1. Through integral bonding, the silicon substrate 1 and the transparent substrate 1 become a whole, which improves the overall strength and stability of the system.
[0046] By first bonding to form an overall structure, the cofferdam 1a can be made under more stable conditions. The combination of the silicon substrate 1 and the light-transmitting substrate 1 provides additional support, reduces the brittleness of the silicon substrate 1, and reduces the process complexity and damage risk during processing. In addition, the overall structure can effectively disperse stress, reduce the risk of brittle fracture of a single component, and has higher impact and vibration resistance.
[0047] In addition to the silicon substrate 1 used in this embodiment, in other embodiments, a ceramic substrate 1, a polymer substrate 1 or a composite material substrate 1 may also be used to make the cofferdam 1a.
[0048] In step S2, since this embodiment is used for an image sensor chip, a transparent cover plate 2 is required. The transparent cover plate 2 can be made of glass, transparent plastics such as PC, PMMA, etc., to ensure that it has a high light transmittance, so as to ensure that the light signal can reach the photosensitive area of the image sensor without obstacles. The transparent cover plate 2 can protect the image sensor chip from external physical impact, dust and other impurities, and play a sealing role to prevent moisture, chemicals, etc. from corroding the chip, thereby extending the service life of the chip.
[0049] In this embodiment, step S2 includes:
[0050] S2a1: Figure 3 As shown, a protective coating 3 is provided on the cofferdam area 11 of the silicon substrate 1 .
[0051] S2a2: If Figure 4 As shown, a glue material 4 is disposed on the protective coating layer 3 , and the silicon substrate 1 and the light-transmitting cover plate 2 are bonded together by the glue material 4 .
[0052] The protective coating 3 is a solder resist film. The protective coating 3 can be provided to raise the silicon substrate 1 to facilitate the subsequent removal process and avoid damage to the transparent cover plate 2 during the removal process.
[0053] When providing the protective coating 3, the silicon substrate 1 is first cleaned and surface activated by chemical cleaning, plasma cleaning or other methods to ensure good adhesion of the solder resist. The solder resist is then evenly coated on the dam area 11 by spin coating, spray coating or screen printing. The thickness of the coating should be precisely controlled as required to achieve an ideal padding effect. The coated solder resist is cured to enhance its mechanical properties and durability.
[0054] In addition to using solder resist as the protective coating 3 , other polymer materials with thermal stability and certain mechanical strength may also be used as the protective coating 3 .
[0055] The adhesive material 4 is evenly coated on the solder mask so that the adhesive material 4 covers the entire cofferdam area 11. The transparent cover plate 2 and the cofferdam area 11 on the silicon substrate 1 are aligned and pressed together with appropriate pressure to ensure tight adhesion. The adhesive material 4 is then cured to ensure adhesion and optical performance.
[0056] In another embodiment, step S2 includes:
[0057] S2b1: As Figure 5 As shown, a groove 15 is formed on the surface of the removed area 12 of the silicon substrate 1 .
[0058] S2b2: As Figure 6As shown, a glue material 4 is provided in the cofferdam area 11 of the silicon substrate 1 , and the silicon substrate 1 and the light-transmitting cover plate 2 are bonded by the glue material 4 .
[0059] The groove 15 can form a buffer gap between the silicon substrate 1 and the transparent cover plate 2, so that during the removal process, there is enough space between the silicon substrate 1 and the transparent cover plate 2 to prevent direct contact with the transparent cover plate 2 and damage to the transparent cover plate 2.
[0060] The depth of the groove 15 can be set according to the thickness of the silicon substrate 1. In this embodiment, the thickness of the groove 15 is 10 μm. The groove 15 with a depth of 10 μm can effectively form a gap without excessively weakening the mechanical strength of the substrate 1. The groove 15 can be formed by dry etching, wet etching, mechanical processing, etc.
[0061] After forming the groove 15, the adhesive material 4 is directly placed on the cofferdam area 11 of the silicon substrate 1, so that the adhesive material 4 covers the entire cofferdam area 11. Align the transparent cover plate 2 and the cofferdam area 11 on the silicon substrate 1, apply appropriate pressure to press them together to ensure close adhesion. Then, the adhesive material 4 is cured to ensure adhesion and optical performance.
[0062] In this embodiment, step S3 specifically includes:
[0063] S3a1: thinning the silicon substrate 1.
[0064] S3a2: As Figure 7 As shown, a through groove 13 is formed around the removal area 12 of the silicon substrate 1, and the removal area 12 of the silicon substrate 1 is removed, and the cofferdam area 11 of the substrate 1 constitutes the cofferdam 1a.
[0065] In this embodiment, the height of the cofferdam 1a is controlled by thinning the silicon substrate 1 to 100-300 μm to meet the design requirements. In other embodiments, the thinning thickness can also be adjusted according to the packaging structure requirements. A mechanical grinder is used to preliminarily thin the silicon substrate 1 to remove the excess portion.
[0066] In step S3a2, the shape and path of the through groove 13 are determined according to the design requirements of the cofferdam 1a so as to accurately remove the unnecessary area of the substrate 1. Dry etching can be used to form the through groove 13 using etching technology, which is suitable for realizing high-precision and high-aspect-ratio structures and for processing complex geometric figures of the silicon substrate 1. Alternatively, laser processing can be used to quickly form the through groove 13 using laser cutting technology, which is suitable for processing that requires fast and flexible processing.
[0067] like Figure 8 As shown, a soft buffer pad 5 may also be provided on the surface of the removed area 12 of the substrate 1 .
[0068] In the process of removing the removed area 12 of the silicon substrate 1, for the convenience of processing, the transparent cover plate 2 is usually processed below the silicon substrate 1. When the removed area 12 of the silicon substrate 1 is removed, it will fall on the transparent cover plate 2 and cause damage to the transparent cover plate 2. Therefore, a soft buffer pad 5 is provided on the surface of the removed area 12 of the substrate 1 to reduce the impact force on the transparent cover plate 2 and protect the surface of the transparent cover plate 2 from damage.
[0069] The buffer pad 5 can be a soft polymer material such as solder mask, PDMS, SBR, silicone, etc. The buffer pad 5 can be evenly arranged on the surface area of the removed area 12 of the silicon substrate 1 to improve the buffering effect, effectively absorb impact and avoid damage.
[0070] In another embodiment, step S3 specifically includes:
[0071] S3b1: Thinning the silicon substrate 1.
[0072] S3b2: A partial through groove 13 is formed around the removal area 12 of the silicon substrate 1, and at least one connection area 14 is reserved to connect the substrate 1 removal area 12 and the cofferdam area 11. After adhering the removal area 12, the silicon substrate 1 removal area 12 is taken out, and the substrate 1 cofferdam area 11 constitutes the cofferdam 1a.
[0073] The silicon substrate 1 is thinned to 100-300 μm so that the height of the cofferdam 1 a meets the requirements and the overall height and heat dissipation efficiency of the packaging structure meet the design requirements.
[0074] The connection area 14 is reserved, i.e., a small section of unpenetrated silicon is reserved between the removal area 12 and the cofferdam area 11, so as to maintain the stability of the removal area 12 during the etching process, effectively prevent the removal area 12 from shifting or falling off due to vibration or external force during the etching process, and avoid the risk of damage to other components such as the transparent cover 2. And the removal area 12 can be easily broken or cut completely by external force after the removal process such as etching is completed, so as to facilitate the final removal operation.
[0075] like Fig. 9 As shown, in this embodiment, the surface of the substrate 1 removal area 12 is rectangular, and the connection area 14 is arranged at both ends of the diagonal of the substrate 1 removal area 12. The connection area 14 is arranged at both ends of the diagonal of the rectangular removal area 12, which can provide uniform support and stability and effectively disperse the stress generated during the processing.
[0076] In other embodiments, the shapes of the removal area 12 and the retention area may also be adjusted according to the shape of the cofferdam 1a.
[0077] like Fig.10 As shown, after the cofferdam 1a structure is manufactured, the transparent cover plate 2 and the chip packaging structure 6 are bonded.
[0078] This embodiment also provides a chip packaging structure manufactured by the above chip packaging method.
[0079] In summary, in this embodiment, the silicon substrate 1 and the light-transmitting substrate 1 used to make the cofferdam 1a are first integrally bonded, and then the cofferdam 1a is made on the silicon substrate 1 after bonding. By first bonding to form an integral structure, the cofferdam 1a can be made under more stable conditions. The combination of the silicon substrate 1 and the light-transmitting substrate 1 provides additional support, reduces the brittleness of the silicon substrate 1, and reduces the process complexity and damage risk during the processing. In addition, the overall structure can effectively disperse stress, reduce the risk of brittle fracture of a single component, and has higher impact and vibration resistance.
[0080] It should be understood that although this specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each implementation mode may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.
[0081] The series of detailed descriptions listed above are only specific descriptions of feasible implementation methods of the present invention and are not intended to limit the scope of protection of the present invention. All equivalent implementation methods or changes that do not deviate from the technical spirit of the present invention should be included in the scope of protection of the present invention.
Claims
1. A chip packaging method with a cofferdam structure, characterized in that: include: providing a substrate; Providing a light-transmitting cover plate, and bonding the substrate to the light-transmitting substrate; Removing a portion of the substrate, so that the remaining area of the substrate forms a cofferdam; The cofferdam is bonded to the chip packaging structure.
2. The chip packaging method with a cofferdam structure according to claim 1, characterized in that: The substrate is a silicon substrate, and the silicon substrate includes a cofferdam area and a removal area, and the cofferdam area is retained to form the cofferdam.
3. The chip packaging method with a cofferdam structure according to claim 2, characterized in that: The step of bonding the substrate to the light-transmitting cover plate comprises: Disposing a protective coating on the cofferdam area of the silicon substrate; An adhesive material is disposed on the protective coating layer, and the silicon substrate and the light-transmitting cover plate are bonded together by the adhesive material.
4. The chip packaging method with a cofferdam structure according to claim 2, characterized in that: The step of bonding the substrate to the light-transmitting cover plate comprises: forming a groove on the surface of the silicon substrate removal area; An adhesive material is disposed on the cofferdam area of the silicon substrate, and the silicon substrate and the light-transmitting cover plate are bonded together by the adhesive material.
5. The chip packaging method with a cofferdam structure according to claim 2, characterized in that: The removing of a part of the substrate area comprises: thinning the silicon substrate; A through groove is formed around the silicon substrate removal area, the silicon substrate removal area is removed, and the substrate cofferdam area constitutes the cofferdam.
6. The chip packaging method with a cofferdam structure according to claim 2, characterized in that: The removing of a part of the substrate area comprises: thinning the silicon substrate; A partial through groove is formed around the silicon substrate removal area, and at least one connection area is reserved to connect the substrate removal area and the cofferdam area. After adhering the removal area, the silicon substrate removal area is taken out, and the substrate cofferdam area constitutes the cofferdam.
7. The chip packaging method with a cofferdam structure according to claim 6, characterized in that: The at least one connection area is specifically reserved and includes: The surface of the substrate removal area is rectangular, and the connection areas are arranged at two ends of the diagonal line of the substrate removal area.
8. The chip packaging method with a cofferdam structure according to claim 5, characterized in that: The thinning of the silicon substrate specifically includes: The silicon substrate is thinned to 100-300 μm.
9. The chip packaging method with a cofferdam structure according to claim 2, characterized in that: Also includes: A soft buffer pad is arranged on the surface of the substrate removal area.
10. A chip packaging structure manufactured by the chip packaging method with a cofferdam structure according to any one of claims 1 to 9.