Buck-type switching power supply topological structure and control method

Abstract

The embodiment of the invention provides a Buck-type switching power supply topological structure and a control method, the topological structure comprises a Buck-type switching circuit, the Buck-type switching circuit comprises at least one phase of Buck-type switching sub-circuit, the output voltage of any phase of Buck-type switching sub-circuit is connected with a first power MOS tube, the first power MOS tube is connected with a second power MOS tube and a first energy storage inductor, and the second power MOS tube is connected with a second energy storage inductor. The first energy storage inductor is connected with a first output capacitor and a first output load, and the first output capacitor is connected with the first output load in parallel; and the main control chip is used for outputting a control signal for controlling the Buck type switching circuit based on the received sampling value of the Buck type switching circuit. According to the embodiment of the invention, the conduction loss of the diode can be reduced, and the working efficiency of the Buck-type switching power supply is improved.

Description

Technical Field

[0001] The embodiments of the present invention relate to the technical field of converter control, and in particular to a Buck type switching power supply topology structure and a control method. Background Art

[0002] In recent years, power semiconductor devices and integrated circuits have developed rapidly, and various special chips and microprocessors have been developed and applied in the field of power electronics. Advanced manufacturing process technology has made the computing speed of chips and microprocessors faster and faster, and the power consumption is lower and lower, but correspondingly, the performance requirements of these special chips and microprocessors for power supply have become more stringent. Chips and microprocessors usually need to output low-voltage, high-current and small voltage ripple power to meet the power needs of the chip. As a kind of power supply, DC switching power supply is widely used in power supply system with high conversion efficiency.

[0003] The core of DC switching power supply is DC / DC converter. Buck switching power supply, as a basic DC / DC converter topology, plays an important role in the design of switching power supply. At present, Buck switching power supply often uses Schottky diode for freewheeling, but this will produce large diode conduction loss, greatly reduce converter efficiency, and is not suitable for low voltage and high current fields.

[0004] Therefore, how to provide a Buck-type switching power supply topology structure to reduce diode conduction loss has become an urgent problem to be solved. Summary of the invention

[0005] In view of this, an embodiment of the present invention provides a Buck type switching power supply topology structure and a control method, which reduces the conduction loss of the diode and improves the working efficiency of the Buck type switching power supply.

[0006] To achieve the above objectives, in a first aspect, an embodiment of the present invention provides a Buck type switching power supply topology structure, including:

[0007] A Buck switch circuit, comprising at least one phase of Buck switch sub-circuit, wherein the output voltage of any phase of the Buck switch sub-circuit is connected to a first power MOS tube, the first power MOS tube is connected to a second power MOS tube and a first energy storage inductor, the first energy storage inductor is connected to a first output capacitor and a first output load, and the first output capacitor is connected in parallel with the first output load;

[0008] The main control chip is used to output a control signal for controlling the Buck type switch circuit based on the received sampling value of the Buck type switch circuit.

[0009] Optionally, the Buck type switching circuit is a four-phase interleaved parallel Buck type switching circuit, and the four-phase interleaved parallel Buck type switching circuit is composed of four-phase Buck type switching sub-circuits connected in parallel.

[0010] Optionally, the four-phase Buck switch sub-circuits in the four-phase interleaved parallel Buck switch circuit share an input terminal, an output capacitor and an output terminal.

[0011] Optionally, the main control chip is also used to: generate a control signal for controlling the Buck type switching circuit according to the PID controller and the single neuron controller based on the received sampling value of the Buck type switching circuit.

[0012] Optionally, the main control chip includes:

[0013] A processing module, used for processing the received sampled value of the Buck switch circuit to obtain a deviation value;

[0014] A state converter, used to generate a state value based on a sampling value and a deviation value of a Buck type switch circuit, wherein the state value includes a first state value, a second state value and a third state value;

[0015] A single neuron controller, used to determine a target weight at a current moment, wherein the target weight includes a first target weight, a second target weight, and a third target weight;

[0016] A PID controller, for adjusting a control coefficient based on a target weight, wherein the control coefficient is a proportional control, an integral control, and a differential control, wherein the proportional integral corresponds to a first state value and a first target weight, the integral control corresponds to a second state value and a second target weight, and the differential control corresponds to a third state value and a third target weight;

[0017] The control signal generating module is used to generate a control signal for controlling the Buck switch circuit based on the adjusted control coefficient.

[0018] Optionally, the single neuron controller is used to determine the target weight at the current moment, specifically by using the state value, the learning rate of the proportional control, the deviation value at the current moment, multiplied by the control amount at the previous moment, and superimposing the weight of the neuron at the previous moment to obtain the target weight.

[0019] In a second aspect, an embodiment of the present invention provides a control method for a Buck type switching power supply topology structure, comprising:

[0020] Get the sample value of the Buck switch circuit;

[0021] The main control chip outputs a control signal for controlling the Buck type switch circuit based on the received sampling value of the Buck type switch circuit, wherein the Buck type switch circuit includes at least one phase of Buck type switch sub-circuit, and the output voltage of any phase of the Buck type switch sub-circuit is connected to a first power MOS tube, the first power MOS tube is connected to a second power MOS tube and a first energy storage inductor, the first energy storage inductor is connected to a first output capacitor and a first output load, and the first output capacitor is connected in parallel with the first output load.

[0022] Optionally, the main control chip outputs a control signal for controlling the Buck type switching circuit based on the received sampling value of the Buck type switching circuit, specifically: based on the received sampling value of the Buck type switching circuit, a control signal for controlling the Buck type switching circuit is generated according to the PID controller and the single neuron controller.

[0023] Optionally, the step of generating a control signal for controlling the Buck type switch circuit based on the received sampled value of the Buck type switch circuit according to the PID controller and the single neuron controller includes:

[0024] Based on the received sampled value of the Buck switch circuit, a deviation value is obtained by processing;

[0025] Generate a state value based on a sampling value and a deviation value of a Buck type switch circuit, wherein the state value includes a first state value, a second state value, and a third state value;

[0026] Determine the target weights at the current moment, wherein the target weights include a first target weight, a second target weight, and a third target weight;

[0027] Adjust the control coefficient based on the target weight, the control coefficient is proportional control, integral control and differential control, the proportional integral corresponds to the first state value and the first target weight, the integral control corresponds to the second state value and the second target weight, and the differential control corresponds to the third state value and the third target weight;

[0028] Based on the adjusted control coefficient, a control signal for controlling the Buck switch circuit is generated.

[0029] Optionally, determining the target weight at the current moment is specifically: utilizing the state value, the learning rate of the proportional control, the deviation value at the current moment, multiplying the control amount at the previous moment, and superimposing the weight of the neuron at the previous moment to obtain the target weight.

[0030] It can be seen that the present invention provides a Buck-type switching power supply topology structure, including a Buck-type switching circuit, including at least one phase of Buck-type switching sub-circuit, the output voltage of any phase of Buck-type switching sub-circuit is connected to a first power MOS tube, the first power MOS tube is connected to a second power MOS tube and a first energy storage inductor, the first energy storage inductor is connected to a first output capacitor and a first output load, and the first output capacitor is connected in parallel with the first output load; a main control chip is used to output a control signal for controlling the Buck-type switching circuit based on the received sampling value of the Buck-type switching circuit. The embodiment of the present invention uses a MOS tube (synchronous rectification field effect tube) to replace the traditional Schottky diode. The on-resistance of the MOS tube is generally in the milliohm level. When outputting a large current, the loss is much lower than the loss of the traditional Schottky diode, thereby improving the working efficiency of the switching power supply.

[0031] Furthermore, an embodiment of the present invention also provides a multi-phase interleaved parallel Buck type switching circuit. The multi-phase interleaved parallel Buck type switching circuit is formed by interleaved parallel connection, has a common input and output, has the same switching frequency of each phase branch, and has a 90° phase difference between adjacent two-phase drive signals. The power of each branch is 1 / 4 of the total power, which reduces the component level of each branch, improves the power level of the converter, effectively reduces the output voltage and current ripple, and effectively ensures the output accuracy; and the synchronous rectification technology can greatly reduce the energy loss of the Buck type switching power supply, further improving the working efficiency of the switching power supply. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0033] Figure 1 This is a single-phase Buck switching power supply topology diagram.

[0034] Figure 2 A topological diagram of a Buck-type switch subcircuit provided in an embodiment of the present invention.

[0035] Figure 3 A topological diagram of a four-phase interleaved parallel Buck switch circuit provided in an embodiment of the present invention.

[0036] Figure 4 A system structure diagram of a Buck type switch circuit provided in an embodiment of the present invention.

[0037] Figure 5The operating waveform of the Buck switch circuit provided by the embodiment of the present invention in the first mode.

[0038] Figure 6 The operating waveform of the Buck switch circuit provided by the embodiment of the present invention in the second mode.

[0039] Figure 7 The operating waveform of the Buck switch circuit provided by the embodiment of the present invention in the third mode.

[0040] Figure 8 The operating waveform of the Buck switch circuit provided by the embodiment of the present invention in the fourth mode.

[0041] Fig. 9 A schematic diagram of the execution steps of the main control chip provided in an embodiment of the present invention.

[0042] Fig.10 An optional block diagram of a control method for a Buck-type switching power supply topology structure provided in an embodiment of the present invention.

[0043] Fig.11 Output voltage waveform diagrams of the Buck switch circuit provided in the embodiment of the present invention when the load changes under two control methods.

[0044] Fig.12 Output voltage waveform diagram of the Buck switch circuit provided in the embodiment of the present invention when the input voltage suddenly changes under two control methods. DETAILED DESCRIPTION

[0045] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0046] The topology structure of the Buck type switching power supply using Schottky diode for freewheeling mentioned in the background technology can be referred to Figure 1As shown in FIG. 1 , the main circuit of the Buck switching power supply topology consists of the input voltage Vin, the power MOS tube Q1, the freewheeling diode D, the energy storage inductor L, the output capacitor C and the output load R, and Vout represents the output voltage signal. In each switching cycle, when the driving signal controls the power tube Q1 to turn on, the freewheeling diode D is reversely cut off because the voltage difference between the two ends is (0-Vin), Vin charges the energy storage inductor L, the voltage difference between the two ends of the inductor is approximately the difference between Vin-Vout, and the inductor current rises linearly; when the driving signal controls the power tube Q1 to turn off, because the current on the inductor cannot suddenly change to zero, the voltage at point a is forced to be negative, the freewheeling diode D is forward-conducted, the voltage difference between the two ends of the inductor is approximately 0-Vout, the energy on the inductor is transferred to the output capacitor C and the output load R, and the inductor current decreases linearly.

[0047] When the load is light, the inductor current gradually decreases until it reaches zero. At this time, the load current is provided by the output capacitor, and the capacitor discharges to reduce the load voltage. After the next cycle arrives, the drive signal continues to control the on and off of the power tube Q1. The above charging and freewheeling stages are repeated continuously to maintain the stability of the output voltage. However, under the topology of the above Buck type switching power supply, the freewheeling diode has a large forward voltage drop, which will cause great power loss when a large current passes through.

[0048] Based on this, the inventors found that the on-resistance of the rectifier MOS tube is extremely low, so the freewheeling diode can be replaced by a power MOS tube. By taking advantage of the fact that the on-resistance of the power MOS tube is much smaller than the on-resistance of the diode, the conduction loss of the MOS tube can be much lower than the conduction loss of the freewheeling diode when the load current is large, thereby improving the working efficiency of the Buck type switching power supply. The loss is manifested in the device in the form of heat. Therefore, the power MOS tube in the embodiment of the present invention generates small loss and less heat, which reduces the heat dissipation pressure and is conducive to the miniaturization of the power supply.

[0049] Specifically, the topology structure of at least one phase Buck switch sub-circuit in the present application is as follows: Figure 2 As shown, the output voltage of any phase Buck switch sub-circuit is connected to the first power MOS tube Q1, the first power MOS tube Q1 is connected to the second power MOS tube Q2 and the first energy storage inductor L, the first energy storage inductor L is connected to the first output capacitor C and the first output load R, and the first output capacitor C is connected to the first output load R in parallel.

[0050] In order to improve the power level of the switching power supply and reduce the output voltage and current ripple, the multi-phase Buck switch sub-circuit can be interleaved in parallel to form a four-phase interleaved parallel Buck switch circuit.

[0051] In a further optional implementation, the four-phase Buck switch sub-circuits in the four-phase interleaved parallel Buck switch circuit share the input terminal, output capacitor and output terminal. Figure 3 As shown, in the embodiment of the present invention, four-phase Buck switch sub-circuits are connected in parallel and two ports are used in common. The two ports include an input terminal Vin and an output terminal Vout. The output terminal is connected in parallel with a capacitor C. The four-phase interleaved synchronous circuit includes main power switch tubes Q1, Q2, Q3, and Q4, synchronous switch tubes Q5, Q6, Q7, and Q8, and four energy storage inductors L1, L2, L3, and L4.

[0052] After obtaining the four-phase staggered parallel Buck switch circuit in this application, it can also be connected to the main control chip to control the four-phase staggered parallel Buck switch circuit through the main control chip to meet the power supply requirements of the power system for the chip. Figure 4 As shown, the sampling module 20 is used to collect the input voltage of the four-phase interleaved parallel Buck type switch circuit 10, as well as the inductor current of each phase and the output voltage and current in the four-phase interleaved parallel Buck type switch circuit 10. The sampling module 20 transmits the collected data to the main control chip 30. The main control chip 30 outputs a control signal for controlling the Buck type switch circuit based on the received sampling value. The control signal is transmitted to the switch tube driving module 40. The switch tube driving module 40 generates PMWs with different duty cycle ranges, and uses PMWs with different duty cycle ranges to realize the conduction and closing of the switch tubes in the four-phase interleaved parallel Buck type switch circuit.

[0053] In an optional embodiment, the main control chip 30 can generate staggered driving signals of four phases whose phases are sequentially staggered by π / 2 to control the on and off of the power MOS tubes of each phase.

[0054] When the four-phase interleaved parallel Buck switch circuit is in different duty cycle ranges, the corresponding modes are different. The four-phase interleaved parallel Buck switch circuit has four modes, each of which uses T / 4, T / 2, and 3T / 4 as segmentation points. The gate drive signal of the power MOS tube, the ripple current of each phase inductor, and the output total inductor current waveforms in the four working modes are shown in the figure below. Figure 5-Figure 8 Each mode takes the turn-on moment of the power MOS tube Q1 as the starting point, the duty cycle D = ton / T, and the working mode within a switching cycle is as follows:

[0055] like Figure 5As shown, the first mode is 0 < DT ≤ T / 4. During the time period [0, DT], the first power MOS transistor Q1 is turned on, and the second power MOS transistor Q5 is turned off. The inductor L1 is in the charging state, and the inductor current iL1 starts to rise and reaches the maximum value at the moment of DT. The inductors L2, L3, and L4 supply energy to the load, and the current is in the decreasing state. During the time period [DT, T / 4], all the power MOS transistors are turned off, and the four-phase inductor discharges through the four-way second power MOS transistors.

[0056] As Figure 6 shown, the second mode is T / 4 < DT ≤ T / 2. During the time period [0, t1], the first power MOS transistor Q1 and the first power MOS transistor Q4 are turned on. The inductors L1 and L4 are in the state of storing electrical energy, and the inductor current rises. The inductors L2 and L3 are in the state of releasing energy through the second power MOS transistors Q6 and Q7, and the inductor current decreases. During the time period [t1, T / 4], the inductor current iL1 rises, and iL2, iL3, and iL4 all decrease. During the time period [T / 4, DT], iL1 and iL2 rise, and the inductor current iL1 reaches the maximum value at the moment of DT.

[0057] As Figure 7 shown, the third mode is T / 2 < DT ≤ 3T / 4. During the time period [0, t1], the first power MOS transistors Q1, Q3, and Q4 are turned on. The inductor currents iL1, iL3, and iL4 rise, and the inductor L2 is in the state of releasing energy, and the inductor current iL2 decreases. The iL2 drops to the minimum value at the moment of T / 4. During the time period [T / 4, T / 4 + t1], the currents of iL1, iL2, and iL4 rise. The iL3 drops to the minimum value at the moment of T / 2. During the time period [T / 2, DT], the currents of iL1, iL2, and iL3 rise.

[0058] As Figure 8 shown, the fourth mode is 3T / 4 < DT ≤ T. During the time periods [0, t1], [T / 4, T / 4 + t1], [T / 2, T / 2 + t1], and [3T / 4, DT], all the first power MOS transistors Q1, Q2, Q3, and Q4 are turned on, and the four-phase inductor is in the charging state. During the time periods [t1, T / 4], [T / 4 + t1, T / 2], [T / 2 + t1, 3T / 4], and [3T / 4 + t1, T], Q2, Q3, Q4, and Q1 are turned off respectively, and the inductor current decreases.

[0059] It can be seen that in the embodiment of the present invention, by adopting the four-phase Buck-type switching sub-circuits to be interleaved and paralleled to form a four-phase interleaved parallel Buck-type switching circuit, each Buck-type switching sub-circuit in the four-phase interleaved parallel Buck-type switching circuit shares a part of the current, thereby reducing the current stress and thermal stress of the components and reducing the power device loss.

[0060] In an optional embodiment, in order to avoid uneven current flow in the four-phase inductors due to different inductances, the four-phase circuit uses energy storage inductors with the same inductance, that is, L1=L2=L3=L4=L.

[0061] The above is the main structure of the Buck-type switching power supply topology in the present application. In order to achieve effective control of the Buck-type switching circuit, in an optional embodiment, the main control chip can also be specifically used to generate a control signal for controlling the Buck-type switching circuit according to the PID controller based on the received sampling value of the Buck-type switching circuit.

[0062] In a further embodiment, the main control chip can also be used to generate a control signal for controlling the Buck type switch circuit according to the PID controller and the single neuron controller based on the received sampling value of the Buck type switch circuit.

[0063] PID controller includes proportional K P , integral K I and differential K D The three coefficients can achieve different levels of control, specifically, proportional control K P , when the deviation occurs, the controller responds immediately and produces a control effect, so that the control amount changes in the direction of reducing the deviation; while the integral control K I , eliminate the static error of the system; but at the same time it will reduce the response speed of the system and increase the overshoot; the longer the integral time, the weaker the accumulation effect of the integral, and the longer the time to eliminate the static error; but the system will not oscillate during transition, which can reduce the overshoot and improve the stability of the system; differential control K D , which can speed up the adjustment process and prevent the change of deviation; it helps to reduce overshoot, overcome oscillation and make the system stable.

[0064] Specifically, the execution steps of the main control chip can be as follows: Fig. 9 As shown in the figure, since the PID controller is combined with the single neuron controller, the self-learning and adaptive capabilities of the single neuron are integrated. Therefore, the control method implemented by the main control chip has the advantages of simple structure, good adaptability and strong robustness.

[0065] In an optional embodiment, the main control chip specifically includes:

[0066] A processing module, used for processing the received sampled value of the Buck switch circuit to obtain a deviation value;

[0067] Specifically, the deviation value is the deviation between the expected value and the actual value of the system.

[0068] A state converter, used to generate a state value based on a sampling value and a deviation value of a Buck type switch circuit, wherein the state value includes a first state value, a second state value and a third state value;

[0069] The first state value, the second state value and the third state value may be x1(k), x2(k), x3(k), respectively.

[0070] A single neuron controller, used to determine a target weight at a current moment, wherein the target weight includes a first target weight, a second target weight, and a third target weight;

[0071] In an optional embodiment, the target weight may be an initial weight or an adjusted weight.

[0072] The process of adjusting the target weight can be specifically as follows: using the state value, the learning rate of the proportional control, the deviation value at the current moment, multiplying it by the control amount at the previous moment, and superimposing the weight of the neuron at the previous moment to obtain the target weight.

[0073] A PID controller, for adjusting a control coefficient based on a target weight, wherein the control coefficient is a proportional control, an integral control, and a differential control, wherein the proportional integral corresponds to a first state value and a first target weight, the integral control corresponds to a second state value and a second target weight, and the differential control corresponds to a third state value and a third target weight;

[0074] For example, in order to obtain the proportional integral, the first state value, the learning rate of the proportional control, the deviation value at the current moment, multiplied by the control amount at the previous moment, and the weight of the neuron at the previous moment are superimposed on the first state value to obtain the first target weight, and the proportional control is adjusted based on the first target weight to obtain the adjusted proportional control coefficient; of course, both integral control and differential control can be obtained using the corresponding state values, which are not listed here.

[0075] The control signal generating module is used to generate a control signal for controlling the Buck switch circuit based on the adjusted control coefficient.

[0076] Specifically, Fig. 9 This is a control diagram for controlling the controlled object. Fig. 9 As shown, r(k) is the expected value, y(k) is the actual value; e(k) is the deviation between the expected value and the actual value of the system, that is, e(k) = r(k) - y(k). e(k) passes through the state converter to obtain the state values ​​x1(k), x2(k), x3(k) required by the controller:

[0077]

[0078] w1(k), w2(k), w3(k) are the weights of the neurons; K is the neuron proportional coefficient, K>0; the output of the single neuron PID controller is Δu(k), and the control signal input to the controlled object (which can be a Buck type switching circuit) at the kth moment is set to u(k):

[0079]

[0080] u(k)=u(k-1)+Δu(k) Formula 3

[0081] The average connection weight can be The averaging process can ensure the convergence of the single neuron controller.

[0082] Further, according to the control algorithm formula of incremental PID:

[0083] Δu(k)=k P (e(k)-e(k-1))+k I e(k)+k D (e(k)-2e(k-1)+e(k-2)) Formula 4

[0084] Corresponding to Formula 2 and Formula 4, we can get the three coefficients of PID control:

[0085] k P =Kw′1(k), k I =Kw'2(k), k D =Kw'3(k) Formula 5

[0086] Furthermore, in order to further optimize the control accuracy of the controlled object, the single neuron controller can also adjust the weights of the neurons to achieve the three coefficients k of PID control. P , k I , k D Online adjustment is performed to make the coefficient more consistent with the actual situation of the circuit, thus achieving effective control of the circuit.

[0087] Specifically, the process of online adjustment of the neuron weights may be:

[0088]

[0089] Since the online learning correction of PID parameters is mainly related to the deviation e(k) and the change Δe(k) between the expected value and the actual value, the change Δe(k) is the change of the deviation e(k) between the expected value and the actual value. Based on this, the weight of the neuron can be optimized. i After (k) is replaced by e(k)+Δe(k), it can be obtained as follows:

[0090]

[0091] In formula 7, η P , η I , η D The learning rates of proportion, integration and differentiation are respectively. Proportional P, integral I and differential D correspond to different learning rates η P , η I , η D , so that precise adjustment can be achieved for any coefficient.

[0092] From the above calculation process, it can be seen that in the embodiment of the present invention, the supervised Hebb learning rule can be used to adjust the weight of the neuron online. Specifically, when the output changes, it is fed back to the main control chip through the system, and the main control chip obtains the deviation value e(k) after processing, and then obtains the controller state value x1, x2, x3 through state conversion, and then these three state values ​​are respectively multiplied by the learning rate of proportion, integration, and differentiation, and the deviation value at this moment and the control amount at the previous moment, and then the weight at the previous moment is superimposed to obtain the weight at this moment, as shown in Formula 6-Formula 7. Through this iterative update method, when the system changes each time, the weight of the neuron at the corresponding moment will be adjusted once. After Formula 7 ends, repeat the steps Formula 2-Formula 5 to achieve online adjustment of the three coefficients of PID control.

[0093] The present invention provides a Buck-type switching power supply topology structure, including a Buck-type switching circuit, including at least one phase of Buck-type switching sub-circuit, the output voltage of any phase of Buck-type switching sub-circuit is connected to a first power MOS tube, the first power MOS tube is connected to a second power MOS tube and a first energy storage inductor, the first energy storage inductor is connected to a first output capacitor and a first output load, and the first output capacitor is connected in parallel with the first output load; a main control chip is used to output a control signal for controlling the Buck-type switching circuit based on the received sampling value of the Buck-type switching circuit. The embodiment of the present invention adopts a MOS tube (synchronous rectification field effect tube) to replace the traditional Schottky diode. The on-resistance of the MOS tube is generally in the milliohm level. When outputting a large current, the loss is much lower than the loss of the traditional Schottky diode, thereby improving the working efficiency of the switching power supply.

[0094] Furthermore, an embodiment of the present invention also provides a multi-phase interleaved parallel Buck type switching circuit. The multi-phase interleaved parallel Buck type switching circuit is formed by interleaved parallel connection, has a common input and output, has the same switching frequency of each phase branch, and has a 90° phase difference between adjacent two-phase drive signals. The power of each branch is 1 / 4 of the total power, which reduces the component level of each branch, improves the power level of the converter, effectively reduces the output voltage and current ripple, and effectively ensures the output accuracy; and the synchronous rectification technology can greatly reduce the energy loss of the Buck type switching power supply, further improving the working efficiency of the switching power supply.

[0095] Furthermore, the three coefficients of PID control can be obtained through online adjustment, which is more in line with the actual needs of the circuit and improves the control accuracy of the controlled object.

[0096] The following is an introduction to the control method of the Buck-type switching power supply topology structure provided by an embodiment of the present invention. The method content described below can be considered as a control method for a Buck-type switching circuit that can be implemented based on the aforementioned Buck-type switching power supply topology structure, and the content described below can be referenced to the content described above.

[0097] As an optional implementation, Fig.10 An optional block diagram of a control method for a Buck-type switching power supply topology structure provided by an embodiment of the present invention, the control method for a Buck-type switching power supply topology structure may specifically include:

[0098] Step S11, obtaining a sample value of a Buck type switch circuit;

[0099] Step S22: The main control chip outputs a control signal for controlling the Buck type switch circuit based on the received sampling value of the Buck type switch circuit, wherein the Buck type switch circuit includes at least one phase of Buck type switch sub-circuit, and the output voltage of any phase of the Buck type switch sub-circuit is connected to a first power MOS tube, the first power MOS tube is connected to a second power MOS tube and a first energy storage inductor, the first energy storage inductor is connected to a first output capacitor and a first output load, and the first output capacitor is connected to the first output load in parallel.

[0100] Optionally, the Buck type switching circuit is a four-phase interleaved parallel Buck type switching circuit, and the four-phase interleaved parallel Buck type switching circuit is composed of four-phase Buck type switching sub-circuits connected in parallel.

[0101] Optionally, the four-phase Buck switch sub-circuits in the four-phase interleaved parallel Buck switch circuit share an input terminal, an output capacitor and an output terminal.

[0102] Optionally, the main control chip outputs a control signal for controlling the Buck type switching circuit based on the received sampling value of the Buck type switching circuit, specifically: based on the received sampling value of the Buck type switching circuit, a control signal for controlling the Buck type switching circuit is generated according to the PID controller and the single neuron controller.

[0103] Optionally, the step of generating a control signal for controlling the Buck type switch circuit based on the received sampled value of the Buck type switch circuit according to the PID controller and the single neuron controller includes:

[0104] Based on the received sampled value of the Buck switch circuit, a deviation value is obtained by processing;

[0105] Generate a state value based on a sampling value and a deviation value of a Buck type switch circuit, wherein the state value includes a first state value, a second state value, and a third state value;

[0106] Determine the target weights at the current moment, wherein the target weights include a first target weight, a second target weight, and a third target weight;

[0107] Adjust the control coefficient based on the target weight, the control coefficient is proportional control, integral control and differential control, the proportional integral corresponds to the first state value and the first target weight, the integral control corresponds to the second state value and the second target weight, and the differential control corresponds to the third state value and the third target weight;

[0108] Based on the adjusted control coefficient, a control signal for controlling the Buck switch circuit is generated.

[0109] Optionally, determining the target weight at the current moment is specifically: utilizing the state value, the learning rate of the proportional control, the deviation value at the current moment, multiplying the control amount at the previous moment, and superimposing the weight of the neuron at the previous moment to obtain the target weight.

[0110] In order to verify the above-mentioned Buck-type switching power supply topology structure and control algorithm, the embodiment of the present invention can further build a four-phase interleaved Buck-type switching power supply simulation model in Matlab / Simulink according to the parameters, and verify the superiority of the proposed control method by comparing the working performance of only using the PID control method and the working performance of the PID controller combined with the single neuron controller under different working conditions.

[0111] Fig.11 The output voltage waveform diagram of the Buck switch circuit provided by the embodiment of the present invention when the load changes under two control methods. Fig.11As shown, at 30ms, the load at the output end changes from full load to half load, and the system reaches stability at about 37.1ms under the traditional PID control method, and reaches stability at about 34.9ms under the proposed control method, and the overshoot generated is reduced; at 60ms, the load at the output end returns to full load, and the system reaches stability at about 69.7ms under the PID control method, and reaches stability at about 66.2ms under the control method combining the PID controller and the single neuron controller provided in an embodiment of the present invention, and the overshoot generated is reduced; in addition, in terms of system rise time, the system reaches the required output value at about 9.5ms under the PID control method, and reaches the required output value at about 5.8ms under the proposed control method.

[0112] Fig.12 The output voltage waveform diagram of the Buck type switch circuit provided in the embodiment of the present invention when the input voltage suddenly changes under two control methods. Fig.12 As shown, at 30ms, the input voltage changes from 15V to 10V, and the system reaches stability in about 43.3ms under the PID control method under the PID controller, while the control method under the PID controller and the single neuron controller mentioned in the embodiment of the present invention can make the system reach stability in about 38.7ms, and the overshoot generated is reduced; at 60ms, the input voltage returns to 15V, and the system reaches stability in about 73ms under the PID control method, and the system reaches stability in about 69.8ms under the control method of the combination of the PID controller and the single neuron controller provided in the embodiment of the present invention, and the overshoot generated is reduced; in addition, in terms of system rise time, the system reaches the desired output value in about 13.7ms under the PID control method, and the system reaches the desired output value in about 7.6ms under the control method mentioned in the embodiment of the present invention.

[0113] By comparing the control capabilities of the two control methods under different working conditions of the Buck switch circuit, it can be seen that the control method provided by the embodiment of the present invention can reduce overshoot, shorten the adjustment time, improve the system response speed, overcome the uncertainty of the controlled object and the influence of random disturbances, and improve the control effect.

[0114] The above describes multiple implementation schemes provided by the embodiments of the present invention. The various optional methods introduced in the implementation schemes can be combined and cross-referenced with each other without conflict, thereby extending a variety of possible implementation schemes, which can all be considered as implementation schemes disclosed and open in the embodiments of the present invention.

[0115] Although the embodiments of the present invention are disclosed above, the present application is not limited thereto. Any person skilled in the art may make various changes and modifications without departing from the spirit and scope of the present application. Therefore, the protection scope of the present application shall be subject to the scope defined by the claims.

Claims

1. A Buck type switching power supply topology, characterized in that: include: Buck type switching circuit, The method comprises: at least one phase Buck switch subcircuit, wherein the output voltage of any phase Buck switch subcircuit is connected to a first power MOS tube, the first power MOS tube is connected to a second power MOS tube and a first energy storage inductor, the first energy storage inductor is connected to a first output capacitor and a first output load, and the first output capacitor is connected in parallel with the first output load; The main control chip is used to output a control signal for controlling the Buck type switch circuit based on the received sampling value of the Buck type switch circuit.

2. The Buck type switching power supply topology structure according to claim 1, characterized in that: The Buck type switch circuit is a four-phase interleaved parallel Buck type switch circuit, and the four-phase interleaved parallel Buck type switch circuit is composed of four-phase Buck type switch sub-circuits connected in parallel.

3. The Buck type switching power supply topology structure according to claim 2 is characterized in that: The four-phase Buck switch sub-circuits in the four-phase interleaved parallel Buck switch circuit share an input terminal, an output capacitor and an output terminal.

4. The Buck type switching power supply topology structure according to claim 1, characterized in that: The main control chip is also used to generate a control signal for controlling the Buck type switch circuit according to the PID controller and the single neuron controller based on the received sampling value of the Buck type switch circuit.

5. The Buck type switching power supply topology structure according to claim 4, characterized in that: The main control chip includes: A processing module, used for processing the received sampled value of the Buck switch circuit to obtain a deviation value; A state converter, used to generate a state value based on a sampling value and a deviation value of a Buck type switch circuit, wherein the state value includes a first state value, a second state value and a third state value; A single neuron controller, used to determine a target weight at a current moment, wherein the target weight includes a first target weight, a second target weight, and a third target weight; A PID controller, for adjusting a control coefficient based on a target weight, wherein the control coefficient is a proportional control, an integral control, and a differential control, wherein the proportional integral corresponds to a first state value and a first target weight, the integral control corresponds to a second state value and a second target weight, and the differential control corresponds to a third state value and a third target weight; The control signal generating module is used to generate a control signal for controlling the Buck switch circuit based on the adjusted control coefficient.

6. The Buck type switching power supply topology structure according to claim 5, characterized in that: The single neuron controller is used to determine the target weight at the current moment, specifically by using the state value, the learning rate of the proportional control, the deviation value at the current moment, multiplied by the control amount at the previous moment, and superimposing the weight of the neuron at the previous moment to obtain the target weight.

7. A control method for a Buck type switching power supply topology structure, characterized in that: include: Get the sample value of the Buck switch circuit; The main control chip outputs a control signal for controlling the Buck type switch circuit based on the received sampling value of the Buck type switch circuit, wherein the Buck type switch circuit, It includes at least one phase Buck type switch sub-circuit, the output voltage of any phase Buck type switch sub-circuit is connected to a first power MOS tube, the first power MOS tube is connected to a second power MOS tube and a first energy storage inductor, the first energy storage inductor is connected to a first output capacitor and a first output load, and the first output capacitor is connected in parallel with the first output load.

8. The control method of the Buck type switching power supply topology structure according to claim 7, characterized in that: The main control chip outputs a control signal for controlling the Buck type switch circuit based on the received sampling value of the Buck type switch circuit, specifically: based on the received sampling value of the Buck type switch circuit, a control signal for controlling the Buck type switch circuit is generated according to the PID controller and the single neuron controller.

9. The control method of the Buck type switching power supply topology structure according to claim 8, characterized in that: The method of generating a control signal for controlling the Buck type switch circuit based on the received sampled value of the Buck type switch circuit according to the PID controller and the single neuron controller includes: Based on the received sampled value of the Buck switch circuit, a deviation value is obtained by processing; Generate a state value based on a sampling value and a deviation value of a Buck type switch circuit, wherein the state value includes a first state value, a second state value, and a third state value; Determine the target weights at the current moment, wherein the target weights include a first target weight, a second target weight, and a third target weight; Adjust the control coefficient based on the target weight, the control coefficient is proportional control, integral control and differential control, the proportional integral corresponds to the first state value and the first target weight, the integral control corresponds to the second state value and the second target weight, and the differential control corresponds to the third state value and the third target weight; Based on the adjusted control coefficient, a control signal for controlling the Buck switch circuit is generated.

10. The control method of the Buck type switching power supply topology structure according to claim 9, characterized in that: The target weight at the current moment is determined by: using the state value, the learning rate of the proportional control, the deviation value at the current moment, multiplying the control amount at the previous moment, and superimposing the weight of the neuron at the previous moment to obtain the target weight.

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