Automatic detection and correction circuit and method for wrong installation of FLASH chip

Abstract

The invention discloses an automatic detection and correction circuit and method for wrong installation of a FLASH chip, the circuit comprises a wrong installation detection circuit, a power supply correction circuit and a signal correction circuit, the wrong installation detection circuit is connected with the power supply correction circuit, and the power supply correction circuit is connected with the signal correction circuit; the method comprises the following steps: judging the installation condition of the FLASH chip through a voltage signal output by a misloading detection circuit; a power supply loop of the power supply correction circuit is adjusted according to the installation condition of the FLASH chip, and a CHANNELSELECTION signal is output; the CHANNELSELECTION signal is used for controlling the first logic switch chip and the second logic switch chip to carry out channel selection, so that the signal direction of the FLASH chip is automatically corrected. Compared with the prior art, according to the detection circuit and method designed by the invention, after the server mainboard is powered on, even if the FLASH chip is mistakenly installed, the FLASH chip cannot be damaged due to short circuit, and the FLASH chip can normally work without manual correction, so that the error rate is greatly reduced, and the maintenance difficulty and the labor cost are reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of server mainboards, and in particular to an automatic detection and correction circuit and method for incorrect installation of a FLASH chip. Background Art

[0002] At present, in the early stage of server development, the FLASH chips of BIOS and BMC are not directly soldered on the motherboard, but a chip adapter (hereinafter referred to as socket or FLASH chip holder) is soldered on the motherboard, and the FLASH chip is placed in the adapter for use; to meet the need to frequently disassemble the FLASH chip to burn the program. However, since the FLASH chip holder does not have a fool-proof design, the FLASH chip can be placed forward (correct installation) or reverse (wrong installation); when installed correctly, the FLASH chip can work normally; when installed incorrectly, due to the particularity of the FLASH pin definition, the power supply and ground will be reversed, and the FLASH will not only fail to work properly, but will also be damaged, and even cause the motherboard power supply to short-circuit.

[0003] The existing technology usually adopts the following methods to solve the above problems: (1) hardware engineers, software engineers, test engineers and other fields jointly locate the problem; after finding the root cause, manually replace the new FLASH chip and place it in the chip holder in the correct direction; (2) design a fault interception function using the logic resources on the motherboard, such as by detecting the voltage value of the FLASH chip or pre-verifying the data with the FLASH before starting the computer. However, although the above solutions can detect the problem of incorrect chip installation, the detection steps are cumbersome, time-consuming and labor-intensive, and after the problem is found, it is still necessary to manually change the chip orientation, which greatly increases the labor cost. Summary of the invention

[0004] The purpose of the present invention is to provide an automatic detection and correction circuit and method for incorrect installation of a FLASH chip, aiming to solve the problem that the prior art has complicated steps and requires manual change of the chip orientation, which is time-consuming and labor-intensive, and increases labor costs.

[0005] In order to solve the above technical problems, the purpose of the present invention is achieved through the following technical solutions:

[0006] The first aspect of the present application provides an automatic detection and correction circuit for incorrect installation of a FLASH chip, comprising: an incorrect installation detection circuit, a power correction circuit and a signal correction circuit, the incorrect installation detection circuit is connected to the power correction circuit, and the power correction circuit is connected to the signal correction circuit; the incorrect installation detection circuit is used to detect whether the FLASH chip is incorrectly installed; the power correction circuit is used to automatically correct the power direction of the FLASH chip; and the signal correction circuit is used to automatically correct the signal direction of the FLASH chip.

[0007] In a possible implementation, the misinstallation detection circuit includes: an operational amplifier, a first resistor, a second resistor, a third resistor and a first capacitor; the first end of the first resistor is connected to a power supply, and the second end of the first resistor is respectively connected to the second end of the second resistor and the positive signal input terminal of the operational amplifier; the first end of the second resistor is grounded; the negative signal input terminal of the operational amplifier is connected to the second end of the third resistor, and the first end of the third resistor is connected to the power correction circuit; the first end of the first capacitor is grounded, and the second end of the first capacitor is respectively connected to the power supply and the positive power input terminal of the operational amplifier; the negative power input terminal of the operational amplifier is grounded; and the output terminal of the operational amplifier is connected to the power correction circuit.

[0008] In a possible implementation, the power correction circuit includes a power loop control module and a chip module, and the power loop control module includes a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube and a fifth MOS tube; the first end of the fourth resistor is connected to the output end of the misinstallation detection circuit, and the second end of the fourth resistor is respectively connected to the first end of the fifth resistor and the gate of the first MOS tube; the second end of the fifth resistor is grounded and connected to the source of the first MOS tube; the first end of the sixth resistor is connected to the power supply, and the second end of the sixth resistor is connected to the first end of the seventh resistor; the drain of the first MOS tube is respectively connected to the second end of the sixth resistor and the first end of the eighth resistor; the second end of the eighth resistor is respectively connected to the gate of the second MOS tube and the first end of the ninth resistor; The second end of the resistor is connected to the power supply and the source of the second MOS respectively; the drain of the second MOS is connected to the drain of the third MOS; the source of the third MOS is grounded and connected to the second end of the seventh resistor; the first end of the tenth resistor is connected to the second end of the seventh resistor and the gate of the third MOS respectively; the first end of the eleventh resistor is connected to the first end of the twelfth resistor and the gate of the fourth MOS respectively; the second end of the eleventh resistor is connected to the second end of the sixth resistor and the first end of the seventh resistor respectively; the second end of the twelfth resistor is grounded and connected to the source of the fourth MOS; the drain of the fourth MOS is connected to the second end of the thirteenth resistor and the second end of the fourteenth resistor respectively; the first end of the thirteenth resistor is connected to the gate of the fifth MOS; the first end of the fourteenth resistor is connected to the power supply and the source of the fifth MOS respectively; the drain of the fifth MOS is connected to the second end of the sixth resistor and the first end of the seventh resistor respectively.

[0009] In a possible implementation, the chip module includes a FLASH chip and an equivalent diode, and the equivalent diode is located inside the FLASH chip; when the FLASH chip is installed correctly:

[0010] The first end of the equivalent diode is connected to the power supply end of the FLASH chip; the second end of the equivalent diode is connected to the ground end of the FLASH chip; the power supply end of the FLASH chip is connected to the second end of the sixth resistor; the ground end of the FLASH chip is connected to the drain of the second MOS tube.

[0011] In a possible implementation, when the FLASH chip is installed incorrectly:

[0012] The first end of the equivalent diode is connected to the power supply end of the FLASH chip; the second end of the equivalent diode is connected to the ground end of the FLASH chip; the ground end of the FLASH chip is connected to the second end of the sixth resistor; the power supply end of the FLASH chip is connected to the drain of the second MOS tube.

[0013] In a possible implementation, the signal correction circuit includes a first logic switch chip, a second logic switch chip, a FLASH chip seat and a BMC: the FLASH chip seat is connected to the FLASH chip; one end of the first logic switch chip is connected to the signal output end of the FLASH chip seat, and the other end of the first logic switch chip is connected to the first signal receiving end of the BMC; one end of the second logic switch chip is connected to the signal output end of the FLASH chip seat, and the other end of the second logic switch chip is connected to the second signal receiving end of the BMC; the CHANNEL_SELECTION signal end of the first logic switch chip and the CHANNEL_SELECTION signal end of the second logic switch chip are respectively connected to the power correction circuit.

[0014] In a possible implementation, it further includes a first LED display circuit and a second LED display circuit; the first LED display circuit is connected to the power correction circuit, and the second LED display circuit is connected to the wrong installation detection circuit.

[0015] In a possible implementation, the first LED display circuit includes: a sixth MOS tube, a first LED lamp, and a fifteenth resistor; the gate of the sixth MOS tube is connected to the power correction circuit; the drain of the sixth MOS tube is grounded; the source of the sixth MOS tube is connected to the second end of the first LED lamp; the first end of the first LED lamp is connected to the second end of the fifteenth resistor; and the first end of the fifteenth resistor is connected to the power supply.

[0016] In a possible implementation, the second LED display circuit includes: a seventh MOS tube, a second LED lamp, and a sixteenth resistor; the gate of the seventh MOS tube is connected to the misinstallation detection circuit; the drain of the seventh MOS tube is grounded; the source of the seventh MOS tube is connected to the second end of the second LED lamp; the first end of the second LED lamp is connected to the second end of the sixteenth resistor; and the first end of the sixteenth resistor is connected to a power supply.

[0017] A second aspect of the present application provides a method for automatically detecting and correcting incorrect installation of a FLASH chip, comprising:

[0018] The installation status of the FLASH chip is determined by the voltage signal output by the wrong installation detection circuit;

[0019] Adjust the power supply loop of the power supply correction circuit according to the installation status of the FLASH chip and output the CHANNEL_SELECTION signal;

[0020] The first logic switch chip and the second logic switch chip are controlled to perform channel selection through the CHANNEL_SELECTION signal to automatically correct the signal direction of the FLASH chip.

[0021] The beneficial effects of the present invention compared with the prior art are as follows: the present invention provides an automatic detection and correction circuit for incorrect installation of a FLASH chip, which consists of two parts: an incorrect installation detection circuit and an incorrect installation correction circuit. The incorrect installation detection circuit determines whether the FLASH chip is incorrectly installed by voltage comparison, and the incorrect installation correction circuit is implemented from two levels. At the power level, an H-bridge structure power supply circuit is used in combination with the incorrect installation detection circuit to form a circuit that can automatically correct the power direction. At the signal level, two four-channel 2-to-1 logic switch chips are used in combination with the incorrect installation detection circuit to form a circuit that can automatically correct the signal direction. Based on the automatic detection and correction circuit, an automatic detection and correction method for incorrect installation of a FLASH chip is also designed, including: determining the installation status of the FLASH chip by a voltage signal output by the incorrect installation detection circuit; adjusting the power supply circuit of the power correction circuit according to the installation status of the FLASH chip, and outputting a CHANNEL_SELECTION signal; and controlling the first logic switch chip and the second logic switch chip to perform channel selection by the CHANNEL_SELECTION signal to realize automatic correction of the signal direction of the FLASH chip. Compared with the prior art, the detection circuit and method designed in the present invention ensures that after the server motherboard is powered on, even if the FLASH chip is incorrectly installed, the FLASH chip will not be damaged by a short circuit and can work normally without manual correction. Its automatic detection and correction circuit can detect errors in real time and make automatic adjustments, which greatly reduces the error rate and reduces the maintenance difficulty and labor cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying any creative work.

[0023] Figure 1A schematic diagram of a circuit for automatically detecting and correcting incorrect installation of a FLASH chip provided by an embodiment of the present invention;

[0024] Figure 2 A steady-state voltage waveform diagram of a node D in the schematic diagram of an automatic detection and correction circuit for incorrect installation of a FLASH chip provided in an embodiment of the present invention;

[0025] Figure 3 The automatic detection and correction circuit for incorrect installation of a FLASH chip provided by an embodiment of the present invention is a steady-state voltage waveform diagram of a node A when the FLASH chip is incorrectly installed and the correction circuit is ineffective;

[0026] Figure 4 The automatic detection and correction circuit for incorrect installation of the FLASH chip provided by the embodiment of the present invention is a voltage waveform diagram of the node A being quickly corrected to 0V as the ground voltage of the FLASH when the chip is incorrectly installed but the correction circuit is effective;

[0027] Figure 5 The voltage waveform diagram of the node A of the automatic detection and correction circuit for incorrect installation of the FLASH chip provided by the embodiment of the present invention when the FLASH chip is correctly installed;

[0028] Figure 6 The voltage waveform diagram of the node C when the FLASH chip is incorrectly installed in the automatic detection and correction circuit of the FLASH chip incorrectly installed provided by the embodiment of the present invention;

[0029] Figure 7 A schematic diagram of a power supply circuit formed by a MOS tube when the FLASH chip is correctly installed and the automatic detection and correction circuit for incorrect installation of the FLASH chip provided by an embodiment of the present invention is installed;

[0030] Figure 8 The automatic detection and correction circuit for incorrect installation of a FLASH chip provided by an embodiment of the present invention shows a voltage waveform diagram of the node A being completely pulled to 0V as the ground of the FLASH chip when the FLASH chip is incorrectly installed;

[0031] Fig. 9 The automatic detection and correction circuit for incorrect installation of a FLASH chip provided by an embodiment of the present invention provides a voltage waveform diagram of a 3.3V power supply of a FLASH chip when the FLASH chip is incorrectly installed, and the voltage of the node B is corrected to 3.3V;

[0032] Fig.10 A schematic diagram of a power supply circuit after correction when a FLASH chip is incorrectly installed, provided by an automatic detection and correction circuit for incorrect installation of a FLASH chip according to an embodiment of the present invention;

[0033] Fig.11A schematic diagram of the signal flow of the switch chip selection when the FLASH chip is correctly installed in the automatic detection and correction circuit of the FLASH chip incorrect installation provided by the embodiment of the present invention;

[0034] Fig.12 A schematic diagram of the corrected signal flow of the automatic detection and correction circuit for incorrect installation of a FLASH chip provided by an embodiment of the present invention when the FLASH chip is incorrectly installed;

[0035] Fig.13 A circuit diagram of a first LED display circuit and a second LED display circuit provided in an embodiment of the present invention;

[0036] Fig.14 A schematic flow chart of a method for automatically detecting and correcting incorrect installation of a FLASH chip provided by an embodiment of the present invention.

[0037] Reference numerals:

[0038] 10. Wrong installation detection circuit; 20. Power correction circuit; 201. Power loop control module; 202. Chip module; 30. Signal correction circuit; 40. First LED display circuit; 50. Second LED display circuit. DETAILED DESCRIPTION

[0039] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0040] It should be understood that when used in this specification and the appended claims, the terms "include" and "comprises" indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.

[0041] It should also be understood that the terms used in this specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the specification of the present invention and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.

[0042] It should be further understood that the term "and / or" used in the present description and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0043] See also Figures 1 to 13 , please refer to Figure 1 An embodiment of the present invention provides an automatic detection and correction circuit for incorrect installation of a FLASH chip U2, including: an incorrect installation detection circuit 10, a power correction circuit 20 and a signal correction circuit 30, wherein the incorrect installation detection circuit 10 is connected to the power correction circuit 20, and the power correction circuit 20 is connected to the signal correction circuit 30; the incorrect installation detection circuit 10 is used to detect whether the FLASH chip U2 is incorrectly installed; the power correction circuit 20 is used to automatically correct the power direction of the FLASH chip U2; and the signal correction circuit 30 is used to automatically correct the signal direction of the FLASH chip U2.

[0044] Specifically, the automatic detection and correction circuit consists of two parts: the wrong installation detection circuit 10 and the wrong installation correction circuit. The wrong installation detection circuit 10 determines whether the FLASH chip U2 is installed incorrectly by voltage comparison. The wrong installation correction circuit is implemented from two levels. The power level uses an H-bridge structure power supply circuit with an incorrect installation detection circuit to form a circuit that can automatically correct the power direction. The signal level uses two four-channel 2-to-1 logic switch chips with the wrong installation detection circuit 10 to form a circuit that can automatically correct the signal direction. Through the wrong installation detection circuit 10, the system can accurately determine the installation status of the FLASH chip U2 to avoid system instability or failure caused by incorrect installation; at the same time, the dual correction mechanism at the power level and the signal level ensures that no matter which level the error occurs, it can be handled promptly and effectively.

[0045] like Figure 1 As shown, the misinstallation detection circuit 10 includes: an operational amplifier U1, a first resistor R1, a second resistor R2, a third resistor R3 and a first capacitor C1; the first end of the first resistor R1 is connected to the power supply, and the second end of the first resistor R1 is respectively connected to the second end of the second resistor R2 and the positive signal input end of the operational amplifier U1; the first end of the second resistor R2 is grounded; the negative signal input end of the operational amplifier U1 is connected to the second end of the third resistor R3, and the first end of the third resistor R3 is connected to the power correction circuit 20; the first end of the first capacitor C1 is grounded, and the second end of the first capacitor C1 is respectively connected to the power supply and the positive power input end of the operational amplifier U1; the negative power input end of the operational amplifier U1 is grounded; the output end of the operational amplifier U1 is connected to the power correction circuit 20.

[0046] The working principle of the wrong installation detection circuit 10 of the present invention is to judge whether the FLASH chip U2 is installed incorrectly by comparing the voltage values ​​of Node D and Node A, wherein Node D is used as a reference voltage, which is obtained by a 3.3V power supply through a resistor voltage divider, and the theoretical voltage value is fixed equal to 3.3*R1 / (R1+R2)=3.3 / 2=1.65V. The actual measured peak value is 1.72V, which is close to the theoretical value. Figure 2 As shown; Node A is the power input voltage of the FLASH chip U2. When the error correction circuit function is shielded (disconnecting the fourth resistor R4 can shield it), the incorrect installation of the FLASH chip U2 will cause the voltage of node A to be clamped at about 1.0-1.1V for a long period of time, as shown below Figure 3 As shown; if the correction circuit is effective, the voltage of node A will be corrected to 0V after a period of power-on, such as Figure 4 When the FLASH chip U2 is correctly installed, the voltage at node A will eventually rise to 3.3V, as shown in Figure 5 As shown, at this time, the voltage of node A (3.3V) will be greater than the voltage of node D (1.65V), and Node C will output 0V; when the FLASH chip U2 is installed incorrectly, the voltage of node A (1.0~1.1V) will be less than the voltage of node D (1.65V), and node C will output 2V (Note: In order to make the output voltage of the detection circuit as smooth as possible, the operational amplifier U1 used in this solution is not a rail-to-rail operational amplifier, so the maximum output voltage is only 2V; if a rail-to-rail operational amplifier is used, the maximum output voltage is close to the power supply voltage 3.3V). Figure 6 shown.

[0047] Specifically, the voltage is clamped at 1.0-1.1V because: when the FLASH is incorrectly installed, at the beginning of the system power-on, the following process occurs: 1. The voltage at node A starts to rise from 0V. At this time, since the voltage at node A does not reach the conduction threshold voltage of Q3, Q3 is turned off, and the equivalent diode D1 does not form a conduction loop and cannot be turned on; 2. Until the voltage at node A reaches the conduction threshold voltage of Q3, Q3 gradually turns on. At this time, 3.3V->R6->D1->Q3->GND has been formed at both ends of D1. Discharge loop, but at this time Q3 has just turned on, Rds (Q3's drain-source impedance) is still relatively large. The large Rds makes D1's impedance to ground relatively large, and node A is not short-circuited; 3. As Q3's conduction degree deepens, Q3's Rds becomes smaller and smaller, making the equivalent diode D1's impedance to ground smaller and smaller, and node A gradually short-circuit to the ground, and the voltage of node A begins to fall; 4. The voltage of node A drops, causing Q3's conduction degree to decrease, Rds to increase, and D1's impedance to ground to increase, causing the voltage of node A to rise. From the above processes 3 and 4, it can be seen that the voltage at point A drives Q3, Q3 drives D1, and D1 limits the voltage at point A, thus forming a closed loop. Finally, the voltage at node A will be in a dynamic equilibrium state and stabilized within a range, which is measured to be 1.0~1.1V. This phenomenon provides feasibility for the idea of ​​detecting incorrect chip installation.

[0048] like Figure 1As shown, the power correction circuit 20 includes a power loop control module 201 and a chip module 202. The power loop control module 201 includes a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a first MOS tube Q1, a second MOS tube Q2, a third MOS tube Q3, a fourth MOS tube Q4 and a fifth MOS tube Q5; a first end of the fourth resistor R4 is connected to the wrong The output end of the detection circuit 10 is connected, the second end of the fourth resistor R4 is connected to the first end of the fifth resistor R5 and the gate of the first MOS tube Q1 respectively; the second end of the fifth resistor R5 is grounded and connected to the source of the first MOS tube Q1; the first end of the sixth resistor R6 is connected to the power supply, and the second end of the sixth resistor R6 is connected to the first end of the seventh resistor R7; the drain of the first MOS tube Q1 is connected to the second end of the sixth resistor R6 and the first end of the eighth resistor R8 respectively; the second end of the eighth resistor R8 is connected to the gate of the second MOS tube Q2 and the gate of the ninth resistor R9 respectively The first end of the ninth resistor R9 is connected to the power supply and the source of the second MOSFET Q2 respectively; the drain of the second MOSFET Q2 is connected to the drain of the third MOSFET Q3; the source of the third MOSFET Q3 is grounded and connected to the second end of the seventh resistor R7; the first end of the tenth resistor R10 is connected to the second end of the seventh resistor R7 and the gate of the third MOSFET Q3 respectively; the first end of the eleventh resistor R11 is connected to the first end of the twelfth resistor R12 and the gate of the fourth MOSFET Q4 respectively; the second end of the eleventh resistor R11 is connected to the sixth resistor R7 ... seventh resistor R7 and the gate of the third MOSFET Q3 respectively; the first end of the eleventh resistor R11 is connected to the first end of the twelfth resistor R12 and the gate of the fourth MOSFET Q4 respectively; the second end of the eleventh resistor R11 is connected to the sixth resistor R7 respectively; the second end of the eleventh resistor R11 is connected to the sixth resistor R7 respectively; the first end of the tenth resistor R10 is connected to the second end of the seventh resistor R7 and the gate of the third MOSFET Q3 respectively; the first end of the eleventh resistor R11 is connected to the The second end of the twelfth resistor R12 is connected to the ground and connected to the source of the fourth MOSFET Q4; the drain of the fourth MOSFET Q4 is respectively connected to the second end of the thirteenth resistor R13 and the second end of the fourteenth resistor R14; the first end of the thirteenth resistor R13 is connected to the gate of the fifth MOSFET Q5; the first end of the fourteenth resistor R14 is respectively connected to the power supply and the source of the fifth MOSFET Q5; the drain of the fifth MOSFET Q5 is respectively connected to the second end of the sixth resistor R6 and the first end of the seventh resistor R7.

[0049] like Figure 7 As shown, the chip module 202 includes a FLASH chip U2 and an equivalent diode D1, and the equivalent diode D1 is located inside the FLASH chip U2; when the FLASH chip U2 is installed correctly: the first end of the equivalent diode D1 is connected to the power supply end of the FLASH chip U2; the second end of the equivalent diode D1 is connected to the ground end of the FLASH chip U2; the power supply end of the FLASH chip U2 is connected to the second end of the sixth resistor R6; the ground end of the FLASH chip U2 is connected to the drain of the second MOS tube Q2.

[0050] Specifically, when the FLASH chip U2 is correctly installed, it can be seen from the above embodiment that the voltage of node A can smoothly rise to 3.3V, and the voltage of node A is greater than the voltage of node D, and the output node C of the detection circuit will output 0V. At this time, the N-channel MOS transistor Q1 driven by node C is turned off; the P-channel MOS transistor Q2 driven by node A is turned off, and the N-channel MOS transistors Q4 and Q3 are turned on; and Q4 is turned on so that the P-channel MOS transistor Q5 driven by Q4 is turned on, and finally the following is formed. Figure 7 In the power supply circuit shown, node A serves as the 3.3V power supply of the FLASH chip U2, and node B serves as the ground of the FLASH chip U2.

[0051] like Figure 8 As shown, in the case where the FLASH chip U2 is installed incorrectly: the first end of the equivalent diode D1 is connected to the power supply end of the FLASH chip U2; the second end of the equivalent diode D1 is connected to the ground end of the FLASH chip U2; the ground end of the FLASH chip U2 is connected to the second end of the sixth resistor R6; the power supply end of the FLASH chip U2 is connected to the drain of the second MOS tube Q2.

[0052] Specifically, when the FLASH chip U2 is incorrectly installed, it can be seen from the above embodiment that the voltage of node A is clamped at 1.0-1.1V, so the voltage of node A is less than the voltage of node D, and the output node C of the detection circuit will output 2V. At this time, the N-channel MOS tube Q1 driven by node C is turned on; Q1 is turned on, which will short-circuit node A with the power ground and completely pull the voltage of node A from 1.0-1.1V to 0V. Figure 8 As shown; the P-channel MOS tube Q2 driven by node A is turned on, and the N-channel MOS tubes Q4 and Q3 are turned off; and the turning off of Q4 causes the P-channel MOS tube Q5 driven by Q4 to be turned off, and finally the following is formed Fig.10 The corrected power supply circuit shown in FIG. 1 is now node A serving as the ground of the FLASH chip U2 ( Figure 8 ), node B is used as the 3.3V power supply of FLASH chip U2 ( Fig. 9 ).

[0053] like Figure 11-12As shown, the signal correction circuit 30 includes a first logic switch chip U3, a second logic switch chip U4, a FLASH chip seat and a BMC: the FLASH chip seat is connected to the FLASH chip U2; one end of the first logic switch chip U3 is connected to the signal output end of the FLASH chip seat, and the other end of the first logic switch chip U3 is connected to the first signal receiving end of the BMC; one end of the second logic switch chip U4 is connected to the signal output end of the FLASH chip seat, and the other end of the second logic switch chip U4 is connected to the second signal receiving end of the BMC; the CHANNEL_SELECTION signal end of the first logic switch chip U3 and the CHANNEL_SELECTION signal end of the second logic switch chip U4 are respectively connected to the power correction circuit 20.

[0054] Specifically, when the FLASH chip U2 is correctly installed, the voltage value of the CHANNEL_SELECTION signal is equal to the voltage of node B, which is 0V, thereby controlling the switch chips U3 and U4 to select channel 1; making the signal loop as Fig.11 As shown; when the FLASH chip U2 is incorrectly installed, the CHANNEL_SELECTION signal voltage value is equal to the node B voltage of 3.3V, thereby controlling the switch chips U3 and U4 to select channel 2; making the signal loop as Fig.12 As shown, even if the pin sequence of the FLASH chip U2 and the socket is completely reversed, it can be corrected at the BMC end by switching the channels of switches U3 and U4.

[0055] like Fig.13 As shown, the automatic detection and correction circuit also includes a first LED display circuit 40 and a second LED display circuit 50 ; the first LED display circuit 40 is connected to the power correction circuit 20 , and the second LED display circuit 50 is connected to the wrong installation detection circuit 10 .

[0056] Specifically, the effect of the self-correcting FLASH chip U2 cannot be seen intuitively, so an LED is chosen to indicate whether the circuit has triggered self-correction, reflecting the power correction status and misinstallation detection results in real time and accurately, providing strong support for circuit maintenance and troubleshooting; at the same time, the design of the display circuit also fully considers the user experience and convenience of operation.

[0057] like Fig.13 As shown, the first LED display circuit 40 includes: a sixth MOSFET Q6, a first LED lamp LED1, and a fifteenth resistor R15; the gate of the sixth MOSFET Q6 is connected to the power correction circuit 20; the drain of the sixth MOSFET Q6 is grounded; the source of the sixth MOSFET Q6 is connected to the second end of the first LED lamp LED1; the first end of the first LED lamp LED1 is connected to the second end of the fifteenth resistor R15; and the first end of the fifteenth resistor R15 is connected to the power supply.

[0058] Specifically, when the FLASH chip U2 is incorrectly installed, the wrong installation detection circuit 10 detects that there is a short circuit in the power circuit and switches the power circuit to the reverse direction, thereby triggering the automatic correction function and the first LED light LED1 turns green.

[0059] like Fig.13 As shown, the second LED display circuit 50 includes: a seventh MOSFET Q7, a second LED lamp LED2, and a sixteenth resistor R16; the gate of the seventh MOSFET Q7 is connected to the wrong installation detection circuit 10; the drain of the seventh MOSFET Q7 is grounded; the source of the seventh MOSFET Q7 is connected to the second end of the second LED lamp LED2; the first end of the second LED lamp LED2 is connected to the second end of the sixteenth resistor R16; and the first end of the sixteenth resistor R16 is connected to the power supply.

[0060] Specifically, when the FLASH chip U2 is correctly installed, the wrong installation detection circuit 10 will not take effect, so it will not have any impact if the related electronic components are not installed. At this time, the second LED lamp LED2 is green, indicating that the automatic correction function is not triggered.

[0061] See also Fig.14 The embodiment of the present invention also provides a method for automatically detecting and correcting incorrect installation of a FLASH chip, comprising:

[0062] S110, judging the installation status of the FLASH chip through the voltage signal output by the wrong installation detection circuit.

[0063] Specifically, the wrong installation detection circuit first collects the voltage signal related to the installation of the FLASH chip in real time through the built-in voltage divider circuit. The collected voltage signal is sent to the comparator in the wrong installation detection circuit for analysis. Through the preset threshold, the comparator can determine whether the voltage signal is within the normal range, thereby inferring the installation status of the FLASH chip. According to the analysis results of the voltage signal, the wrong installation detection circuit can accurately determine whether the FLASH chip is incorrectly installed. If the voltage signal is abnormal, such as exceeding the preset range, it is determined to be incorrectly installed.

[0064] S120, adjusting the power loop of the power correction circuit according to the installation status of the FLASH chip, and outputting a CHANNEL_SELECTION signal.

[0065] Specifically, once the misinstallation detection circuit determines that the FLASH chip is incorrectly installed, the power correction circuit will respond immediately. Through the built-in H-bridge structure, the power correction circuit can automatically adjust the direction of the power loop to ensure that power is supplied to the FLASH chip with the correct polarity. While adjusting the power loop, the power correction circuit will also output a CHANNEL_SELECTION signal, which is a control signal used to indicate subsequent signal correction operations.

[0066] S130 , controlling the first logic switch chip and the second logic switch chip to perform channel selection through the CHANNEL_SELECTION signal, so as to automatically correct the signal direction of the FLASH chip.

[0067] Specifically, the CHANNEL_SELECTION signal is sent to the control end of the first logic switch chip and the second logic switch chip. The two logic switch chips are multi-channel selectors that can select different channels according to the control signal. According to the instruction of the CHANNEL_SELECTION signal, the first logic switch chip and the second logic switch chip will perform channel selection. By selecting the correct channel, the logic switch chip can reroute the signal line of the FLASH chip to correct the direction of the signal. After the signal direction is corrected, the system will perform further signal stability verification. By reading the status register of the FLASH chip or performing simple read and write operations, the system can confirm whether the signal direction has been correctly corrected and ensure that the FLASH chip can work normally.

[0068] Through the above specific implementation, the automatic detection and correction method for incorrect installation of the FLASH chip can detect the installation status of the FLASH chip in real time and accurately, and automatically adjust the power supply circuit and signal direction when an error is found to ensure that the FLASH chip can work normally. This method not only improves the stability and reliability of the system, but also reduces the need for manual intervention and improves maintenance efficiency.

[0069] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in the present application, and these modifications or replacements should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. An automatic detection and correction circuit for incorrect installation of a FLASH chip, characterized in that: include: A wrong installation detection circuit, a power correction circuit and a signal correction circuit, wherein the wrong installation detection circuit is connected to the power correction circuit, and the power correction circuit is connected to the signal correction circuit; the wrong installation detection circuit is used to detect whether the FLASH chip is installed incorrectly; the power correction circuit is used to automatically correct the power direction of the FLASH chip; and the signal correction circuit is used to automatically correct the signal direction of the FLASH chip.

2. The automatic detection and correction circuit for incorrect installation of a FLASH chip according to claim 1, characterized in that: The mis-installation detection circuit comprises: an operational amplifier, a first resistor, a second resistor, a third resistor and a first capacitor; The first end of the first resistor is connected to a power supply, and the second end of the first resistor is connected to the second end of the second resistor and the positive signal input end of the operational amplifier respectively; A first end of the second resistor is grounded; The negative signal input terminal of the operational amplifier is connected to the second end of the third resistor, and the first end of the third resistor is connected to the power supply correction circuit; A first end of the first capacitor is grounded, and a second end of the first capacitor is connected to a power supply and a positive power input terminal of the operational amplifier respectively; The negative power input terminal of the operational amplifier is grounded; The output end of the operational amplifier is connected to the power supply correction circuit.

3. The automatic detection and correction circuit for incorrect installation of a FLASH chip according to claim 1, characterized in that: The power correction circuit includes a power loop control module and a chip module, and the power loop control module includes a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube and a fifth MOS tube; The first end of the fourth resistor is connected to the output end of the mis-installation detection circuit, and the second end of the fourth resistor is connected to the first end of the fifth resistor and the gate of the first MOS tube respectively; The second end of the fifth resistor is grounded and connected to the source of the first MOS tube; The first end of the sixth resistor is connected to the power supply, and the second end of the sixth resistor is connected to the first end of the seventh resistor; The drain of the first MOS tube is connected to the second end of the sixth resistor and the first end of the eighth resistor respectively; The second end of the eighth resistor is connected to the gate of the second MOS tube and the first end of the ninth resistor respectively; The second end of the ninth resistor is connected to the power supply and the source of the second MOS tube respectively; The drain of the second MOS tube is connected to the drain of the third MOS tube; The source of the third MOS tube is grounded and connected to the second end of the seventh resistor; The first end of the tenth resistor is connected to the second end of the seventh resistor and the gate of the third MOS tube respectively; The first end of the eleventh resistor is connected to the first end of the twelfth resistor and the gate of the fourth MOS tube respectively; The second end of the eleventh resistor is connected to the second end of the sixth resistor and the first end of the seventh resistor respectively; The second end of the twelfth resistor is grounded and connected to the source of the fourth MOS tube; The drain of the fourth MOS tube is connected to the second end of the thirteenth resistor and the second end of the fourteenth resistor respectively; A first end of the thirteenth resistor is connected to the gate of the fifth MOS tube; The first end of the fourteenth resistor is connected to the power supply and the source of the fifth MOS tube respectively; The drain of the fifth MOS tube is connected to the second end of the sixth resistor and the first end of the seventh resistor respectively.

4. The automatic detection and correction circuit for incorrect installation of a FLASH chip according to claim 3, characterized in that: The chip module includes a FLASH chip and an equivalent diode, and the equivalent diode is located inside the FLASH chip; When the FLASH chip is installed correctly: The first end of the equivalent diode is connected to the power supply end of the FLASH chip; The second end of the equivalent diode is connected to the ground end of the FLASH chip; The power supply terminal of the FLASH chip is connected to the second end of the sixth resistor; The ground terminal of the FLASH chip is connected to the drain of the second MOS tube.

5. The automatic detection and correction circuit for incorrect installation of a FLASH chip according to claim 4, characterized in that: In case of incorrect installation of the FLASH chip: The first end of the equivalent diode is connected to the power supply end of the FLASH chip; The second end of the equivalent diode is connected to the ground end of the FLASH chip; The ground terminal of the FLASH chip is connected to the second end of the sixth resistor; The power supply terminal of the FLASH chip is connected to the drain of the second MOS tube.

6. The automatic detection and correction circuit for incorrect installation of a FLASH chip according to claim 1, characterized in that: The signal correction circuit includes a first logic switch chip, a second logic switch chip, a FLASH chip seat and a BMC: The FLASH chip holder is connected to the FLASH chip; One end of the first logic switch chip is connected to the signal output end of the FLASH chip holder, and the other end of the first logic switch chip is connected to the first signal receiving end of the BMC; One end of the second logic switch chip is connected to the signal output end of the FLASH chip holder, and the other end of the second logic switch chip is connected to the second signal receiving end of the BMC; The CHANNEL_SELECTION signal end of the first logic switch chip and the CHANNEL_SELECTION signal end of the second logic switch chip are respectively connected to the power correction circuit.

7. The automatic detection and correction circuit for incorrect installation of a FLASH chip according to claim 1, characterized in that: It also includes a first LED display circuit and a second LED display circuit; the first LED display circuit is connected to the power correction circuit, and the second LED display circuit is connected to the wrong installation detection circuit.

8. The automatic detection and correction circuit for incorrect installation of a FLASH chip according to claim 7, characterized in that: The first LED display circuit includes: a sixth MOS tube, a first LED lamp, and a fifteenth resistor; The gate of the sixth MOS tube is connected to the power correction circuit; The drain of the sixth MOS tube is grounded; The source electrode of the sixth MOS tube is connected to the second end of the first LED lamp; The first end of the first LED lamp is connected to the second end of the fifteenth resistor; The first end of the fifteenth resistor is connected to a power source.

9. The automatic detection and correction circuit for incorrect installation of a FLASH chip according to claim 7, characterized in that: The second LED display circuit comprises: a seventh MOS tube, a second LED lamp, and a sixteenth resistor; The gate of the seventh MOS tube is connected to the mis-installation detection circuit; The drain of the seventh MOS tube is grounded; The source electrode of the seventh MOS tube is connected to the second end of the second LED lamp; The first end of the second LED lamp is connected to the second end of the sixteenth resistor; The first end of the sixteenth resistor is connected to a power source.

10. A method for automatically detecting and correcting incorrect installation of a FLASH chip, characterized in that: include: The installation status of the FLASH chip is determined by the voltage signal output by the wrong installation detection circuit; Adjust the power supply loop of the power supply correction circuit according to the installation status of the FLASH chip and output the CHANNEL_SELECTION signal; The first logic switch chip and the second logic switch chip are controlled to perform channel selection through the CHANNEL_SELECTION signal to automatically correct the signal direction of the FLASH chip.

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