Method and system for predicting electrical characteristics of CMOS (Complementary Metal Oxide Semiconductor) device

Abstract

The invention discloses a method and system for predicting electrical characteristics of a CMOS device, and belongs to the technical field of computer aided design and simulation, and the method comprises the steps: obtaining technological parameters and electrical parameters based on the production line data of the CMOS device; based on the data dimensions of the process parameters and the electrical parameters, the number of convolution layers of the model is adjusted, an activation function is set between each layer of convolution, and by setting a full connection layer and constructing a prediction model, the process parameters are used as model input, the electrical parameters are used as model output, and the electrical characteristics of the CMOS device are predicted. According to the method, the problem of weight difference caused by the sequence of the process parameters during convolution is avoided, the problem of overfitting is solved, and the electrical parameters of the CMOS device are predicted more accurately and more quickly based on the process parameters.

Description

Technical Field

[0001] The present invention relates to the technical field of computer-aided design and simulation, and in particular to a method and system for predicting electrical characteristics of CMOS devices. Background Art

[0002] The rapid development of information science, energy, national defense and other fields has put forward vital and diverse requirements for semiconductor devices. Based on the current mature process, artificial neural networks can provide an option for rapid prediction of device structure or properties, while ensuring the accuracy of prediction, reducing computing costs and shortening the development cycle.

[0003] At present, people use fully connected neural network models to predict the electrical parameters of devices based on process parameters, such as Figure 1 However, due to cost issues, there is a focus on the process in actual manufacturing, and the generated data set is prone to overfitting when using the commonly used fully connected neural network model for prediction, resulting in poor model accuracy; in addition, the fully connected neural network model has a long calculation time and high calculation cost due to its network structure; the network structure of the convolutional neural network determines that it can effectively avoid the overfitting problem, but the convolutional neural network is often used for image data of device performance and structure, and is not often used for one-dimensional data. Summary of the invention

[0004] In order to solve the above problems, the purpose of the present invention is to provide a prediction technology for the electrical characteristics of CMOS devices, which is used to avoid the weight difference problem caused by the order of process parameters during convolution, thereby solving the overfitting problem, and more accurately and quickly predict the electrical parameters of CMOS devices based on process parameters.

[0005] In order to achieve the above technical objectives, the present invention provides a method for predicting electrical characteristics of CMOS devices, comprising the following steps:

[0006] Based on the production line data of CMOS devices, obtain process parameters and electrical parameters;

[0007] Based on the data dimensions of process parameters and electrical parameters, the convolution kernel size and number of convolution layers of the model are obtained, and an activation function is set between each layer of convolution. By setting a fully connected layer, a prediction model is constructed to use process parameters as model input and electrical parameters as model output to predict the electrical characteristics of CMOS devices.

[0008] Preferably, in the process of obtaining the convolutional neural network, the convolution kernel size and the number of convolution layers are adjusted according to the dimension of the process parameters, taking into account the accuracy and operation speed of the prediction model;

[0009] Preferably, in the process of acquiring the dimension of the process parameter, the union of the process parameters of all processes of the CMOS device is used as the dimension of the current process parameter.

[0010] Preferably, in the process of setting the activation function, according to the accuracy and operation speed of the prediction model, Relu or sigmoid, Tanh function is set between each layer of convolution as the activation function to improve the prediction accuracy of the model and prevent overfitting.

[0011] Preferably, in the process of constructing the prediction model, the process parameters and electrical parameters are used as data sets to train the prediction model, obtain the convolution layer weights, and obtain the trained prediction model by adjusting the hyperparameters. The model is used to predict the electrical characteristics of the semiconductor device to be simulated by obtaining the structural parameters or process parameters of the semiconductor device to be simulated.

[0012] Preferably, in the process of predicting the electrical characteristics of the semiconductor device to be simulated, the structural parameters or process parameters of the semiconductor device to be simulated are standardized or normalized and then input into the trained prediction model to perform electrical characteristic prediction.

[0013] The present invention discloses a prediction system for electrical characteristics of CMOS devices, comprising:

[0014] Data acquisition module, used to obtain process parameters and electrical parameters based on production line data of CMOS devices;

[0015] The prediction module is used to obtain the convolution kernel size and number of convolution layers of the model based on the data dimensions of the process parameters and electrical parameters, and to set the activation function between each convolution layer. By setting the fully connected layer, a prediction model is constructed to use the process parameters as the model input and the electrical parameters as the model output to predict the electrical characteristics of the CMOS device.

[0016] Preferably, the prediction module is further used to adjust the convolution size according to the dimension of the process parameters and the accuracy and operation speed of the prediction model.

[0017] Preferably, the prediction module is also used to use process parameters and electrical parameters as data sets to train the prediction model, obtain convolution layer weights, and obtain the trained prediction model by adjusting hyperparameters, which is used to predict the electrical characteristics of the semiconductor device to be simulated by obtaining the structural parameters or process parameters of the semiconductor device to be simulated.

[0018] Preferably, the prediction module is further used to standardize or normalize the structural parameters or process parameters of the semiconductor device to be simulated, and then input them into the trained prediction model to perform electrical characteristic prediction.

[0019] The present invention discloses the following technical effects:

[0020] The present invention avoids the problem of weight differences caused by the order of process parameters during convolution, solves the overfitting problem, and predicts the electrical parameters of CMOS devices based on process parameters more accurately and quickly. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0022] Figure 1 It is the fully connected neural network model mentioned in the prior art described in the present invention;

[0023] Figure 2 It is a convolutional network architecture of one layer of the convolutional neural network model structure described in the present invention;

[0024] Figure 3 It is a schematic diagram of the prediction process of the present invention;

[0025] Figure 4 It is a schematic diagram of the method flow of the present invention. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. The components of the embodiments of the present invention generally described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present invention.

[0027] like Figure 1-4 As shown, the present invention provides a method for predicting electrical characteristics of a CMOS device, comprising the following steps:

[0028] Based on the production line data of CMOS devices, obtain process parameters and electrical parameters;

[0029] Based on the data dimensions of process parameters and electrical parameters, the convolution kernel size and number of convolution layers of the model are obtained, and an activation function is set between each layer of convolution. By setting a fully connected layer, a prediction model is constructed to use process parameters as model input and electrical parameters as model output to predict the electrical characteristics of CMOS devices.

[0030] Further preferably, in the method for predicting electrical characteristics of CMOS devices provided by the present invention, in the process of obtaining the convolution kernel size (set to 1*n in the present invention to adapt to device data and avoid the influence of the order of process data during convolution on model accuracy), n is adjusted according to the dimension of process parameters and the accuracy of the prediction model.

[0031] Further preferably, in the method for predicting the electrical characteristics of CMOS devices provided by the present invention, in the process of acquiring the convolutional neural network, the convolution kernel size and the number of convolution layers are adjusted according to the dimension of the process parameters, taking into account the accuracy and operation speed of the prediction model.

[0032] Further preferably, in the method for predicting electrical characteristics of a CMOS device provided by the present invention, in the process of obtaining the dimension of the process parameter, the union of the process parameters of all processes of the CMOS device is used as the dimension of the current process parameter.

[0033] Further preferably, in the method for predicting electrical characteristics of CMOS devices provided by the present invention, in the process of setting the activation function, Relu or sigmoid, Tanh function is set as the activation function between each layer of convolution to improve the prediction accuracy of the model and prevent overfitting.

[0034] Further preferably, in the prediction method for electrical characteristics of CMOS devices provided by the present invention, in the process of constructing a prediction model, process parameters and electrical parameters are used as data sets to train the prediction model, obtain convolutional layer weights, and obtain the trained prediction model by adjusting hyperparameters. The model is used to predict the electrical characteristics of the semiconductor device to be simulated by obtaining the structural parameters or process parameters of the semiconductor device to be simulated.

[0035] Further preferably, in the method for predicting the electrical characteristics of CMOS devices provided by the present invention, in the process of predicting the electrical characteristics of the semiconductor device to be simulated, the structural parameters or process parameters of the semiconductor device to be simulated are standardized or normalized, and then input into the trained prediction model to perform electrical characteristic prediction.

[0036] The present invention discloses a prediction system for electrical characteristics of CMOS devices, comprising:

[0037] Data acquisition module, used to obtain process parameters and electrical parameters based on production line data of CMOS devices;

[0038] The prediction module is used to obtain the convolution kernel size and number of convolution layers of the model based on the data dimensions of the process parameters and electrical parameters, and to set the activation function between each convolution layer. By setting the fully connected layer, a prediction model is constructed to use the process parameters as the model input and the electrical parameters as the model output to predict the electrical characteristics of the CMOS device.

[0039] Further preferably, the prediction module of the prediction system for the electrical characteristics of CMOS devices disclosed in the present invention is also used to adjust the convolution size according to the dimension of the process parameters and the accuracy and operation speed of the prediction model.

[0040] Further preferably, the prediction module of the prediction system for the electrical characteristics of CMOS devices disclosed in the present invention is also used to use process parameters and electrical parameters as data sets to train the prediction model, obtain convolutional layer weights, and obtain the trained prediction model by adjusting hyperparameters, which is used to predict the electrical characteristics of the semiconductor device to be simulated by obtaining the structural parameters or process parameters of the semiconductor device to be simulated.

[0041] Further preferably, the prediction module of the prediction system for the electrical characteristics of CMOS devices disclosed in the present invention is also used to standardize or normalize the structural parameters or process parameters of the semiconductor device to be simulated and input them into the trained prediction model to predict the electrical characteristics.

[0042] Embodiment: The present invention provides a convolutional neural network model that can be applied to process parameters. The model can predict the electrical parameters of the device based on the process parameters, and specifically includes the following contents: The convolutional neural network model structure, wherein a layer of the convolutional network architecture is as follows: Figure 2 As shown. The hyperparameters of the model are designed based on the data set constructed based on the CMOS production line data. The number of model layers can be increased according to the accuracy requirements. The model input is the specific parameters of 87 processes, that is, 87 dimensions, the dimensions can be changed, and the current dimension is the union of the process parameters of all processes of the device. The output of the model is 194 electrical parameters, that is, 194 dimensions, the dimensions can be changed; therefore, the model is universal. The feature prediction of the model selects a one-dimensional convolution layer with a convolution kernel size of 1*3. An activation function layer is added between each convolution layer to improve the model prediction accuracy and prevent overfitting. The activation function selects Relu (Rectified Linear Units). The activation function layer transforms the result of each convolution layer through the Relu function.

[0043] The prediction process of this model is as follows Figure 3 As shown, the following steps are included:

[0044] Step 1: Build the model, add convolutional layers as needed, select activation functions, and add pooling layers and batch normalization layers as needed;

[0045] Step 2: Determine process parameters and electrical parameters based on the samples and organize the data into a data set;

[0046] Step 3: Process the data to standardize or normalize the structural parameters or process parameters of the semiconductor device to be simulated;

[0047] Step 4: Divide the data set into training set, validation set, and test set, input them into the model to start training the convolution layer weights, and obtain the neural network with the highest prediction accuracy by adjusting the hyperparameters;

[0048] Step 5: Save the model and apply it to practice.

[0049] Based on the data set of the current process, the comparison between the accuracy and running speed of the convolutional neural network model designed by the present invention and the accuracy and running speed of the fully connected neural network model is shown in Table 1.

[0050] Table 1

[0051] Fully connected neural network model Convolutional Neural Network Model Training Accuracy 95.51380358387142 95.91177245985146 Test accuracy 94.95427746242947 95.94286982218425 Running speed 1.41it / s 3.44it / s

[0052] The technical key of the present invention lies in the use of a convolutional neural network as a model network structure for parameter prediction, and the selection of a one-dimensional convolution kernel to adapt to one-dimensional process data. Since the data set comes from the actual production line, the designed prediction model is closer to reality and can be used to solve practical problems.

[0053] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0054] In the description of the present invention, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0055] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A method for predicting electrical characteristics of CMOS devices, characterized in that: The following steps are involved: Based on the production line data of CMOS devices, obtain process parameters and electrical parameters; Based on the data dimensions of the process parameters and the electrical parameters, the convolution kernel size and the number of convolution layers of the model are obtained, and an activation function is set between each layer of convolution. By setting a fully connected layer, a prediction model is constructed to use the process parameters as model input and the electrical parameters as model output to predict the electrical characteristics of the CMOS device.

2. A method for predicting electrical characteristics of a CMOS device according to claim 1, characterized in that: In the process of obtaining the number of convolution layers and the size of the convolution kernel, the number of convolution layers and the size of the convolution kernel are adjusted according to the dimension of the process parameters and taking into account the accuracy and operation speed of the prediction model.

3. A method for predicting electrical characteristics of a CMOS device according to claim 2, characterized in that: In the process of obtaining the dimension of the process parameter, the union of the process parameters of all processes of the CMOS device is used as the dimension of the current process parameter.

4. A method for predicting electrical characteristics of a CMOS device according to claim 3, characterized in that: In the process of setting the activation function, according to the accuracy and operation speed of the prediction model, Relu or sigmoid, Tanh function is set between each layer of convolution as the activation function to improve the prediction accuracy of the model and prevent overfitting.

5. A method for predicting electrical characteristics of a CMOS device according to claim 4, characterized in that: In the process of constructing the prediction model, the process parameters and the electrical parameters are used as data sets to train the prediction model, obtain the convolution layer weights, and obtain the trained prediction model by adjusting the hyperparameters. The model is used to predict the electrical characteristics of the semiconductor device to be simulated by obtaining the structural parameters or process parameters of the semiconductor device to be simulated.

6. A method for predicting electrical characteristics of a CMOS device according to claim 5, characterized in that: In the process of predicting the electrical characteristics of the semiconductor device to be simulated, the structural parameters or process parameters of the semiconductor device to be simulated are standardized or normalized and then input into the trained prediction model to predict the electrical characteristics.

7. A prediction system for electrical characteristics of CMOS devices, characterized in that: include: Data acquisition module, used to obtain process parameters and electrical parameters based on production line data of CMOS devices; The prediction module is used to obtain the convolution kernel size and number of convolution layers of the model based on the data dimensions of the process parameters and electrical parameters, and to set the activation function between each convolution layer. By setting the fully connected layer, a prediction model is constructed to use the process parameters as the model input and the electrical parameters as the model output to predict the electrical characteristics of the CMOS device.

8. A prediction system for electrical characteristics of CMOS devices according to claim 7, characterized in that: The prediction module is further used to adjust the convolution size according to the dimension of the process parameter and the accuracy and operation speed of the prediction model.

9. A prediction system for electrical characteristics of CMOS devices according to claim 8, characterized in that: The prediction module is also used to use the process parameters and the electrical parameters as data sets to train the prediction model, obtain the convolution layer weights, and obtain the trained prediction model by adjusting the hyperparameters. The model is used to predict the electrical characteristics of the semiconductor device to be simulated by obtaining the structural parameters or process parameters of the semiconductor device to be simulated.

10. A prediction system for electrical characteristics of CMOS devices according to claim 9, characterized in that: The prediction module is also used to standardize or normalize the structural parameters or process parameters of the semiconductor device to be simulated, and then input them into the trained prediction model to perform electrical characteristic prediction.

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