Method for optimizing wiring crosstalk in PCB design

Abstract

The invention provides a method for optimizing wiring crosstalk in PCB design, and relates to the technical field of circuit diagram design. The routing crosstalk optimization method comprises the following steps of selecting signals or signal groups and layers needing to be checked, setting routing requirements, reading a PCB design drawing and obtaining the position and the angle of each routing line segment, screening out non-compliant routing line segments, determining the wiring modification space of illegal lines, and determining the routing crosstalk according to the routing modification space of the illegal lines. And automatic or manual wiring modification is carried out according to the modification space. According to the method, by optimizing the signal circuit design, the crosstalk problem generated when high-speed signals are arranged in parallel or in an overlapped mode on adjacent layers is effectively solved, so that the reliability and performance of PCB design are improved, the board card design cost and the material cost are reduced, and meanwhile the PCB design is more flexible.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit diagram design, and in particular to a method for optimizing routing crosstalk in PCB design. Background Art

[0002] As electronic products become more and more multifunctional, complex and miniaturized, the size of printed circuit boards, as the main components of electronic products, is getting smaller and smaller, which makes the density of components and wiring on PCBs continuously increase to meet the demand. This increases the difficulty and complexity of engineers in the layout wiring stage, resulting in some design defects.

[0003] For the performance and reliability requirements of high-speed signals, crosstalk is an issue that needs to be taken seriously and resolved. Crosstalk refers to the interference between signals due to the influence of electromagnetic fields during signal transmission. The higher the signal frequency, the more significant the crosstalk problem will be. In order to effectively control crosstalk, PCB design and layout are crucial.

[0004] In PCB design, the most common problem is that high-speed signals overlap or run parallel between adjacent layers, causing crosstalk. Therefore, how to avoid high-speed signals overlapping or running parallel between adjacent layers, causing crosstalk, is one of the keys to ensuring high-speed signal quality.

[0005] Therefore, a method for optimizing routing crosstalk in PCB design is needed to solve the above technical problems. Summary of the invention

[0006] In order to solve the above technical problems, the present invention provides a method for optimizing routing crosstalk in PCB design, comprising the following steps:

[0007] Step 1: Select the signal to be checked or select several signals and form a signal group;

[0008] Step 2: Select the layer to be inspected;

[0009] Step 3: Set the routing requirements, including setting the maximum parallel length allowed;

[0010] Step 4: Read the PCB design drawing and obtain the position, angle and actual maximum parallel length of each routing segment in the PCB design drawing;

[0011] Step 5: Screen each routing line segment for non-compliance; extract the routing line segments where the signal or signal group propagates in the layer that needs to be checked, and compare whether there are any illegal lines that do not meet the routing requirements;

[0012] Step 6: Obtain the wiring modification space of the illegal line through the position and angle of each routing line segment;

[0013] Step 7: Evaluate whether the wiring modification space meets the standard 10-degree corrugated routing. If so, use the standard 10-degree corrugated routing to automatically modify the illegal signal lines.

[0014] Step 8: Evaluate whether the wiring modification space meets the requirements of arbitrary angle corrugated routing; if so, calculate the corresponding routing angle and corrugated line segment length according to the actual modification space to perform automatic wiring modification;

[0015] Step 9: Evaluate the wiring modification space. If the standard 10-degree corrugated routing and arbitrary-angle corrugated routing cannot be met, proceed to manual wiring modification.

[0016] As a further solution, in step 2, the layers to be checked are selected to include single-layer mode, double-layer mode and multi-layer mode; among which, the wiring modification range of the single-layer mode is a single layer, the wiring modification range of the double-layer mode is a single layer or a double layer, and the wiring modification range of the multi-layer mode is a single layer, a double layer or a multi-layer.

[0017] As a further solution, in step three, the maximum parallel length allowed is 200 mil.

[0018] As a further solution, in step seven, the standard 10 degree corrugated routing is set up by the following steps:

[0019] Get the starting and ending points of the illegal line;

[0020] Rotate the original illegal line 10 degrees clockwise or counterclockwise from the starting point, and retain the line segment with the maximum parallel length allowed;

[0021] Based on the routing line segment intercepted in the previous section, the original illegal line is rotated 10 degrees in the opposite direction at the end of the previous routing line segment, and the next routing line segment with the maximum parallel length allowed is intercepted and retained;

[0022] Repeat the rotation and interception steps until the end point is reached to obtain a standard 10-degree corrugated trace.

[0023] As a further solution, in step eight, the arbitrary angle corrugated routing is set up by the following steps:

[0024] Get the starting and ending points of the illegal line;

[0025] Get the boundary line of the wiring modification space;

[0026] Rotate the original illegal line clockwise or counterclockwise from the starting point until it touches the boundary line of the wiring modification space, and intercept the routing line segments within the wiring modification space with the maximum parallel length or less and reserved;

[0027] Based on the routing line segment intercepted in the previous section, the original illegal line is rotated in the opposite direction at the end of the previous routing line segment until it touches the boundary line of the routing modification space, and the next routing line segment within the routing modification space and below the maximum parallel length allowed is intercepted and retained;

[0028] Repeat the rotation and interception steps until the end point is reached to obtain a wavy trace at any angle.

[0029] As a further solution, when the routing modification range is two or more layers, the illegal lines of each layer are merged into the same temporary layer, and the automatic routing modification is performed on each illegal line. After the automatic routing modification is completed, the modified routing segments are separated and placed back into the layer before the modification.

[0030] As a further solution, in steps 7 and 8, wiring modifications are displayed by different colors;

[0031] In step nine, the illegal lines are also highlighted and jumped to the corresponding positions.

[0032] As a further solution, in step three, the routing requirements also include setting the minimum allowable line spacing. After the routing modification is completed, the PCB design drawing is updated and the actual minimum line spacing of each routing segment is obtained.

[0033] As a further solution, in step three, a minimum line spacing of 1 mil or three times the line width is allowed.

[0034] As a further solution, after step 9, the illegal lines that do not meet the minimum allowed line spacing are also screened, and automatic routing modifications are performed through the following steps:

[0035] Obtain the illegal lines that do not meet the minimum allowed line spacing and the starting and ending points of the illegal lines;

[0036] Get the boundary line of the wiring modification space;

[0037] The illegal lines that do not meet the minimum allowed line spacing are shifted outward until the minimum allowed line spacing is reached;

[0038] Determine whether the translated routing segment exceeds the boundary line of the wiring modification space;

[0039] If it exceeds the limit, manual wiring modification will be performed; if it does not exceed the limit, the route segment after translation will be retained;

[0040] Connect the starting point of the illegal line with the starting point of the translated routing segment, and connect the ending point of the illegal line with the ending point of the translated routing segment to complete the automatic routing modification.

[0041] Compared with the related art, the method for optimizing routing crosstalk in PCB design provided by the present invention has the following beneficial effects:

[0042] The present invention optimizes the routing crosstalk by the following steps: selecting the signal or signal group and layer to be checked, setting routing requirements, reading the PCB design drawing and obtaining the position and angle of each routing segment, screening the non-compliant routing segments, determining the wiring modification space of the illegal lines, and performing automatic or manual wiring modification according to the modification space. This method effectively improves the crosstalk problem caused by parallel or overlapping wiring of high-speed signals in adjacent layers by optimizing the signal line design, thereby improving the reliability and performance of the PCB design, reducing the board design cost and material cost, and making the PCB design more flexible. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 A schematic diagram of the steps of a method for optimizing routing crosstalk in PCB design provided by the present invention;

[0044] Figure 2 A schematic diagram of crosstalk generated by mutual interference provided by the present invention;

[0045] Figure 3 This is a schematic diagram of a PCB design for improving crosstalk provided by the present invention. DETAILED DESCRIPTION

[0046] The present invention will be further described below in conjunction with the accompanying drawings and implementation modes.

[0047] like Figure 1 As shown, a method for optimizing routing crosstalk in PCB design includes the following steps:

[0048] Step 1: Select the signal to be checked or select several signals and form a signal group;

[0049] Step 2: Select the layer to be inspected;

[0050] Step 3: Set the routing requirements, including setting the maximum parallel length allowed;

[0051] Step 4: Read the PCB design drawing and obtain the position, angle and actual maximum parallel length of each routing segment in the PCB design drawing;

[0052] Step 5: Screen each routing line segment for non-compliance; extract the routing line segments where the signal or signal group propagates in the layer that needs to be checked, and compare whether there are any illegal lines that do not meet the routing requirements;

[0053] Step 6: Obtain the wiring modification space of the illegal line through the position and angle of each routing line segment;

[0054] Step 7: Evaluate whether the wiring modification space meets the standard 10-degree corrugated routing. If so, use the standard 10-degree corrugated routing to automatically modify the illegal signal lines.

[0055] Step 8: Evaluate whether the wiring modification space meets the requirements of arbitrary angle corrugated routing; if so, calculate the corresponding routing angle and corrugated line segment length according to the actual modification space to perform automatic wiring modification;

[0056] Step 9: Evaluate the wiring modification space. If the standard 10-degree corrugated routing and arbitrary-angle corrugated routing cannot be met, proceed to manual wiring modification.

[0057] It should be noted that: Figure 2 When high-speed signals are routed in parallel or overlapped on adjacent layers, the distance between the upper and lower layers is too small, and the electric fields of different signals interfere with each other to produce crosstalk. In this case, crosstalk can be improved by optimizing the signal line design. Generally, when the distance between two signal lines is 3 times or more of the line width, and the parallel length does not exceed 200 mil, the electromagnetic field interference of the signal can be effectively improved. You can also increase the line spacing, or use a routing method with an angle of more than 10 degrees between the two signal lines (such as Figure 3 ) to improve the crosstalk problem. It can be seen that in PCB design, reasonable signal routing can effectively avoid the crosstalk problem between high-speed signals, and the method for optimizing routing crosstalk described in this patent can timely detect parallel or overlapping routing and avoid the occurrence of crosstalk problems.

[0058] As a further solution, in step 2, the layers to be checked are selected to include single-layer mode, double-layer mode and multi-layer mode; among which, the wiring modification range of the single-layer mode is a single layer, the wiring modification range of the double-layer mode is a single layer or a double layer, and the wiring modification range of the multi-layer mode is a single layer, a double layer or a multi-layer.

[0059] As a further solution, in step three, the maximum parallel length allowed is 200 mil.

[0060] As a further solution, in step seven, the standard 10 degree corrugated routing is set up by the following steps:

[0061] Get the starting and ending points of the illegal line;

[0062] Rotate the original illegal line 10 degrees clockwise or counterclockwise from the starting point, and retain the line segment with the maximum parallel length allowed;

[0063] Based on the routing line segment intercepted in the previous section, the original illegal line is rotated 10 degrees in the opposite direction at the end of the previous routing line segment, and the next routing line segment with the maximum parallel length allowed is intercepted and retained;

[0064] Repeat the rotation and interception steps until the end point is reached to obtain a standard 10-degree corrugated trace.

[0065] As a further solution, in step eight, the arbitrary angle corrugated routing is set up by the following steps:

[0066] Get the starting and ending points of the illegal line;

[0067] Get the boundary line of the wiring modification space;

[0068] Rotate the original illegal line clockwise or counterclockwise from the starting point until it touches the boundary line of the wiring modification space, and intercept the routing line segments within the wiring modification space with the maximum parallel length or less and reserved;

[0069] Based on the routing line segment intercepted in the previous section, the original illegal line is rotated in the opposite direction at the end of the previous routing line segment until it touches the boundary line of the routing modification space, and the next routing line segment within the routing modification space and below the maximum parallel length allowed is intercepted and retained;

[0070] Repeat the rotation and interception steps until the end point is reached to obtain a wavy trace at any angle.

[0071] It should be noted that: in a specific embodiment, a standard 10-degree corrugated routing is used, and the length of the corrugated line segment is 200 mils, and the illegal signal line is re-routed. Here, the 10-degree corrugated routing means rotating the line 10 degrees clockwise or counterclockwise on the basis of the original line, routing the line at 10 degrees for 200 mils, and then routing another 200 mils after mirroring the angle, and so on. The routing modification may be to modify only one layer, or both layers at the same time, so that the line segment no longer overlaps or is parallel to the other layer.

[0072] As a further solution, when the routing modification range is two or more layers, the illegal lines of each layer are merged into the same temporary layer, and the automatic routing modification is performed on each illegal line. After the automatic routing modification is completed, the modified routing segments are separated and placed back into the layer before the modification.

[0073] As a further solution, in steps 7 and 8, wiring modifications are displayed by different colors;

[0074] In step nine, the illegal lines are also highlighted and jumped to the corresponding positions.

[0075] As a further solution, in step three, the routing requirements also include setting the minimum allowable line spacing. After the routing modification is completed, the PCB design drawing is updated and the actual minimum line spacing of each routing segment is obtained.

[0076] As a further solution, in step three, a minimum line spacing of 1 mil or three times the line width is allowed.

[0077] As a further solution, after step 9, the illegal lines that do not meet the minimum allowed line spacing are also screened, and automatic routing modifications are performed through the following steps:

[0078] Obtain the illegal lines that do not meet the minimum allowed line spacing and the starting and ending points of the illegal lines;

[0079] Get the boundary line of the wiring modification space;

[0080] The illegal lines that do not meet the minimum allowed line spacing are shifted outward until the minimum allowed line spacing is reached;

[0081] Determine whether the translated routing segment exceeds the boundary line of the wiring modification space;

[0082] If it exceeds the limit, manual wiring modification will be performed; if it does not exceed the limit, the route segment after translation will be retained;

[0083] Connect the starting point of the illegal line with the starting point of the translated routing segment, and connect the ending point of the illegal line with the ending point of the translated routing segment to complete the automatic routing modification.

[0084] The above are only embodiments of the present invention, and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A method for optimizing routing crosstalk in PCB design, characterized in that: The steps include: Step 1: Select the signal to be checked or select several signals and form a signal group; Step 2: Select the layer to be inspected; Step 3: Set the routing requirements, including setting the maximum parallel length allowed; Step 4: Read the PCB design drawing and obtain the position, angle and actual maximum parallel length of each routing segment in the PCB design drawing; Step 5: Screen each routing line segment for non-compliance; extract the routing line segments where the signal or signal group propagates in the layer that needs to be checked, and compare whether there are any illegal lines that do not meet the routing requirements; Step 6: Obtain the wiring modification space of the illegal line through the position and angle of each routing line segment; Step 7: Evaluate whether the wiring modification space meets the standard 10-degree corrugated routing. If so, use the standard 10-degree corrugated routing to automatically modify the illegal signal lines. Step 8: Evaluate whether the wiring modification space meets the requirements of arbitrary angle corrugated routing; if so, calculate the corresponding routing angle and corrugated line segment length according to the actual modification space to perform automatic wiring modification; Step 9: Evaluate the wiring modification space. If the standard 10-degree corrugated routing and arbitrary-angle corrugated routing cannot be met, proceed to manual wiring modification.

2. The method for optimizing routing crosstalk in PCB design according to claim 1, characterized in that: In step 2, the layers to be checked are selected to include single-layer mode, double-layer mode and multi-layer mode; among which, the wiring modification range of the single-layer mode is a single layer, the wiring modification range of the double-layer mode is a single layer or a double layer, and the wiring modification range of the multi-layer mode is a single layer, a double layer or a multi-layer.

3. The method for optimizing routing crosstalk in PCB design according to claim 1, characterized in that: In step three, the maximum parallel length allowed is 200 mils.

4. The method for optimizing routing crosstalk in PCB design according to claim 1, characterized in that: In step seven, the standard 10-degree corrugated routing is set up by following the steps below: Get the starting and ending points of the illegal line; Rotate the original illegal line 10 degrees clockwise or counterclockwise from the starting point, and retain the line segment with the maximum parallel length allowed; Based on the routing line segment intercepted in the previous section, the original illegal line is rotated 10 degrees in the opposite direction at the end of the previous routing line segment, and the next routing line segment with the maximum parallel length allowed is intercepted and retained; Repeat the rotation and interception steps until the end point is reached to obtain a standard 10-degree corrugated trace.

5. The method for optimizing routing crosstalk in PCB design according to claim 2, characterized in that: In step eight, arbitrary angle corrugated routing is set up by following the steps below: Get the starting and ending points of the illegal line; Get the boundary line of the wiring modification space; Rotate the original illegal line clockwise or counterclockwise from the starting point until it touches the boundary line of the wiring modification space, and intercept the routing line segments within the wiring modification space with the maximum parallel length or less and reserved; Based on the routing line segment intercepted in the previous section, the original illegal line is rotated in the opposite direction at the end of the previous routing line segment until it touches the boundary line of the routing modification space, and the next routing line segment within the routing modification space and below the maximum parallel length allowed is intercepted and retained; Repeat the rotation and interception steps until the end point is reached to obtain a wavy trace at any angle.

6. A method for optimizing routing crosstalk in PCB design according to any one of claims 4 and 5, characterized in that: When the routing modification range is double or multiple layers, the illegal lines of each layer will be merged into the same temporary layer, and the illegal lines will be automatically routed and modified. After the automatic routing modification is completed, the modified routing segments will be separated and placed back into the layer before the modification.

7. The method for optimizing routing crosstalk in PCB design according to claim 1, characterized in that: In steps 7 and 8, wiring modifications are displayed using different colors; in step 9, the illegal lines are also highlighted and jumped to the corresponding positions.

8. The method for optimizing routing crosstalk in PCB design according to claim 1, characterized in that: In step three, the routing requirements also include setting the minimum allowable line spacing. After the routing modification is completed, the PCB design drawing is updated and the actual minimum line spacing of each routing segment is obtained.

9. The method for optimizing routing crosstalk in PCB design according to claim 8, characterized in that: In step three, the minimum line spacing allowed is 1 mil or three times the line width.

10. The method for optimizing routing crosstalk in PCB design according to claim 8, characterized in that: After step 9, the illegal lines that do not meet the minimum allowed line spacing are also screened, and automatic routing modifications are performed through the following steps: Obtain the illegal lines that do not meet the minimum allowed line spacing and the starting and ending points of the illegal lines; Get the boundary line of the wiring modification space; The illegal lines that do not meet the minimum allowed line spacing are shifted outward until the minimum allowed line spacing is reached; Determine whether the translated routing segment exceeds the boundary line of the wiring modification space; If it exceeds the limit, manual wiring modification will be performed; If it does not exceed, the route segment after translation is retained; Connect the starting point of the illegal line with the starting point of the translated routing segment, and connect the ending point of the illegal line with the ending point of the translated routing segment to complete the automatic routing modification.

Images