Radio frequency chip flip interconnection structure and preparation method thereof

Abstract

The invention discloses a radio frequency chip flip interconnection structure and a preparation method, the structure comprises a first substrate and a second substrate with the same size, a plurality of first nail head bumps are bonded on a bonding pad of the first substrate, and a plurality of second nail head bumps corresponding to the first nail head bumps in position are bonded on a bonding pad of the second substrate; wherein the diameter of the first nail head protruding point is smaller than the diameter of the bonding pad of the first substrate, the diameter of the first nail head protruding point is larger than the diameter of the second nail head protruding point, and the Vickers hardness of the first nail head protruding point is larger than the Vickers hardness of the second nail head protruding point. The low-Vickers-hardness nail head protruding points provide compensation for the height of the high-Vickers-hardness nail head protruding points on the other side through large deformation in the inversion process, and the high-Vickers-hardness nail head protruding points guarantee controllable collapse of the height of the air cavity through small deformation in the inversion process. And crosstalk and self-excitation of the radio frequency signal in the transmission process of the inverted structure are avoided.

Description

Technical Field

[0001] The invention belongs to the technical field of microelectronic packaging, and in particular relates to a radio frequency chip flip-chip interconnection structure and a preparation method thereof. Background Art

[0002] With the development trend of high integration and miniaturization of electronic products, planar integration technology can no longer meet the needs of rapid development, and flip-chip interconnection technology has emerged. The preparation of micro-bumps is a key technology in flip-chip interconnection. Stud bumps are prepared by spherical bonding of metal wires using a wire bonder. As a low-cost and simple bump preparation method, it is widely used in the industry. However, the metal bumps obtained by this method are small in size and have poor height consistency.

[0003] For the flip-chip interconnection of large-sized RF chips with a large number of bumps, on the one hand, it is necessary to ensure the height of the air cavity after flip-chipping to avoid crosstalk during signal transmission between upper and lower devices; on the other hand, a highly consistent micro-bump array is required to prevent reliability problems such as cold solder joints or open circuits in some bumps after flip-chipping, which restricts the application of stud bump technology in the field of RF three-dimensional integration.

[0004] The current stud bump technology, such as the Chinese invention patent CN110444522B, discloses a chip preparation method, which improves the high consistency of the bump array by flattening the micro bumps on the surface of the flip chip. However, on the one hand, it increases the complexity of the process, and on the other hand, it is only applicable to flip chip structures with small size and small number of bumps. For flip chips with large size and large number of bumps, it is difficult to ensure the uniformity of pressure application, and thus the high consistency of the bump array cannot be guaranteed;

[0005] For example, Chinese invention patent CN115050659A discloses a metal bump leveling method and a flip chip method, which improves the height consistency of the bump array by mechanically cutting and thinning the metal bumps on the surface of a single chip or wafer. However, on the one hand, it increases the complexity of the process, and on the other hand, the bump array prepared by this method undergoes secondary deformation after flipping, which will cause the bump array height to be further reduced, and the air cavity height to be reduced, which is easy to cause signal crosstalk and self-excitation of upper and lower layer devices during high-frequency transmission;

[0006] For example, Chinese invention patent CN111029267B discloses a flip-chip interconnect structure and a preparation method thereof, wherein solder bumps are prepared on the first chip pad and nail head bumps are prepared on the second chip pad, and the two bumps are combined by molten welding. Since the solder bump pads usually need to be made of UBM layers, the assembly cost and process complexity are increased. In addition, the solder is easily oxidized, and welding without flux is prone to cold welding and false welding, which affects product reliability.

[0007] For example, Chinese invention patent CN111029266B discloses a method for preparing stud bumps and stud bumps, which realizes a stud bump structure with a certain height by forming a stud bump including a first bump and a second bump at a preset position on the carrier, thereby ensuring the application in high-frequency chip 3D stacking integration. However, stacking of multiple layers of bumps will lead to further accumulation of bump thickness deviations, thereby deteriorating bump height consistency, and cannot meet the flip-chip requirements of large-size and multi-bump chips;

[0008] That is, it is difficult for the existing technology to solve the problem of high consistency of stud bumps and the performance degradation problem caused by insufficient air cavity height during RF chip flipping while ensuring low cost, high assembly reliability and process convenience. Summary of the invention

[0009] The purpose of the present invention is to overcome the defects of the prior art and provide a radio frequency chip flip-chip interconnection structure and a preparation method, wherein stud bumps with different Vickers hardness are manufactured on two substrates, the stud bumps with low Vickers hardness provide compensation for the height of the stud bumps with high Vickers hardness on the other side through a large deformation during the flip-chip process, and the stud bumps with high Vickers hardness ensure the controllable collapse of the air cavity height through a small deformation during the flip-chip process, thereby avoiding crosstalk and self-excitation of radio frequency signals during the transmission of the flip-chip structure, that is, at a low cost, by designing the hardness gradient of the stud bumps in the flip-chip interconnection structure, the problem of stud bump consistency and insufficient air cavity height during the flip-chip application of large-size and multi-bump radio frequency chips is solved, and at the same time, the preparation process of the flip-chip interconnection structure is simple and the assembly reliability is high.

[0010] The object of the present invention is achieved through the following technical solutions:

[0011] A radio frequency chip flip-chip interconnection structure comprises a first substrate and a second substrate of the same size, wherein a plurality of first stud bumps are bonded to a pad of the first substrate, and a plurality of second stud bumps corresponding to the positions of the first stud bumps are bonded to a pad of the second substrate;

[0012] The diameter of the first stud bump is smaller than the pad diameter of the first substrate, the diameter of the first stud bump is larger than the diameter of the second stud bump, and the Vickers hardness of the first stud bump is larger than the Vickers hardness of the second stud bump.

[0013] In one embodiment, the diameter of the first stud bump is 1 / 4 of the pad diameter of the first substrate. times, n is greater than 1.

[0014] In one embodiment, the Vickers hardness of the first stud bump is 1.2 to 2 times the Vickers hardness of the second stud bump.

[0015] In one embodiment, the diameter of the first stud bump is 1.2 to 2 times the diameter of the second stud bump.

[0016] In one embodiment, the first substrate is a circuit substrate or a flip chip. When the first substrate is a circuit substrate, the second substrate is a flip chip; when the first substrate is a flip chip, the second substrate is a circuit substrate or a flip chip.

[0017] In one embodiment, the first stud bump and the second stud bump are both made of metal or alloy material.

[0018] The present invention also provides a method for preparing a radio frequency chip flip-chip interconnection structure, which is used to prepare the above radio frequency chip flip-chip interconnection structure, comprising the following steps:

[0019] Step S1, preparing a first stud bump on a pad of a first substrate;

[0020] Step S2, preparing a second stud bump on the pad of the second substrate;

[0021] Step S3, flipping the first substrate and the second substrate;

[0022] Step S4, pressing the first substrate and the second substrate tightly, so that the first stud bumps and the second stud bumps are plastically deformed and in close contact with each other;

[0023] Step S5, completing solid phase welding of the first stud bump and the second stud bump by heating and ultrasonic action to form a flip-chip interconnection structure between the first substrate and the second substrate;

[0024] In which, in step S1, the diameter of the prepared first stud bump is smaller than the pad diameter of the first substrate, and in step S2, the diameter of the prepared second stud bump is smaller than the diameter of the first stud bump, and the Vickers hardness of the prepared second stud bump is smaller than the Vickers hardness of the first stud bump.

[0025] In one embodiment, in step S1 and step S2, the first stud bump and the second stud bump are both made of metal or alloy material by a wire bonding machine.

[0026] In one embodiment, in step S1, the diameter of the first stud bump is 1 / 4 of the pad diameter of the first substrate. times, n is greater than 1.

[0027] In one embodiment, in step S2, the Vickers hardness of the prepared first stud bump is 1.2 to 2 times the Vickers hardness of the prepared second stud bump, and the diameter of the prepared first stud bump is 1.2 to 2 times the diameter of the prepared second stud bump.

[0028] The beneficial effects of the present invention are:

[0029] By designing the hardness gradient of the stud bumps in the flip-chip interconnection structure, stud bumps with different Vickers hardnesses are manufactured on two substrates, and the size ratio of the stud bumps on the two substrates is obtained through mechanical simulation according to the Vickers hardness ratio of the stud bumps on the two substrates, so that during the flip-chip process between the first substrate and the second substrate, the height deformation of the stud bumps with high Vickers hardness is 0.2 to 0.8 times the height deformation of the stud bumps with low Vickers hardness, that is, the stud bumps with low Vickers hardness provide compensation for the height of the stud bumps with high Vickers hardness on the other side through the large deformation during the flip-chip process, and the stud bumps with high Vickers hardness ensure the controllable collapse of the air cavity height through the small deformation during the flip-chip process, so as to avoid crosstalk and self-excitation of radio frequency signals during the transmission of the flip-chip structure, that is, the stud bump consistency problem and the insufficient air cavity height problem in the flip-chip application of large-size and multi-bump radio frequency chips are solved at a low cost, and the preparation process of the flip-chip interconnection structure is simple and the assembly reliability is high. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The present invention will be described in more detail below based on embodiments and with reference to the accompanying drawings, wherein:

[0031] Figure 1 The schematic diagram of the structure before the first substrate and the second substrate of the present invention are flipped is shown;

[0032] Figure 2 A schematic structural diagram showing a flip-chip interconnect structure of the present invention;

[0033] In the drawings, like reference numerals are used for like parts. The drawings are not necessarily to scale.

[0034] Reference numerals:

[0035] 1-first substrate, 2-second substrate, 3-first stud bump, 4-second stud bump. DETAILED DESCRIPTION

[0036] The present invention will be further described below in conjunction with the accompanying drawings.

[0037] Example 1

[0038] The present invention provides a radio frequency chip flip-chip interconnection structure, such as Figure 1 and Figure 2As shown, it includes a first substrate 1 and a second substrate 2 of the same size, a plurality of first stud bumps 3 are bonded to the pads of the first substrate 1, and a plurality of second stud bumps 4 corresponding to the positions of the first stud bumps 3 are bonded to the pads of the second substrate 2;

[0039] The diameter of the first stud bump 3 is smaller than the pad diameter of the first substrate 1, the diameter of the first stud bump 3 is larger than the diameter of the second stud bump 4, and the Vickers hardness of the first stud bump 3 is larger than the Vickers hardness of the second stud bump 4;

[0040] It should be noted that, in this embodiment, by designing the hardness gradient of the stud bumps on the two substrates in the flip-chip interconnection structure, stud bumps with different Vickers hardness are manufactured on the two substrates, so that the stud bumps with low Vickers hardness provide compensation for the height of the stud bumps with high Vickers hardness on the other side through a large deformation during the flip-chip process, and the stud bumps with high Vickers hardness ensure the controllable collapse of the air cavity height through a small deformation during the flip-chip process, thereby avoiding crosstalk and self-excitation of the RF signal during the transmission of the flip-chip structure, that is, at a low cost, the stud bump consistency problem and the problem of insufficient air cavity height of the stud bumps in the flip-chip application of large-size and multi-bump RF chips are solved;

[0041] Specifically, the diameter of the first stud bump 3 is 1 / 100 of the pad diameter of the first substrate 1. times, n is greater than 1, the Vickers hardness of the first nail head bump 3 is 1.2 to 2 times the Vickers hardness of the second nail head bump 4, and the diameter of the first nail head bump 3 is 1.2 to 2 times the diameter of the second nail head bump 4;

[0042] It should be noted that in order to further ensure the consistency of the stud bumps during the flip-chip application of large-size and multi-bump RF chips and to ensure the controllable collapse of the air cavity height, the inventors found that in the flip-chip process between the first substrate and the second substrate, the height deformation of the stud bump with high Vickers hardness is 0.2 to 0.8 times the height deformation of the stud bump with low Vickers hardness. The effect is best, that is, the height deformation ratio of the first stud bump 3 and the second stud bump 4 is further limited, so as to limit the size ratio and Vickers hardness ratio between the first stud bump 3 and the second stud bump 4. First, the diameter of the first stud bump 3 is obtained based on the pad diameter of the first substrate 1. After determining the Vickers hardness of the first stud bump 3 and the Vickers hardness ratio of the second stud bump 4, the diameter size of the second stud bump 4 can be obtained by combining mechanical simulation, the stud bump consistency during the flip-chip application of large-size and multi-bump RF chips and the controllable collapse of the air cavity height can be ensured.

[0043] In one embodiment, the first substrate 1 is a circuit substrate or a flip chip. When the first substrate 1 is a circuit substrate, the second substrate 2 is a flip chip. When the first substrate 1 is a flip chip, the second substrate 2 is a circuit substrate or a flip chip.

[0044] It should be noted that the flip-chip interconnection structure has two substrates, and the substrate can be a circuit substrate or a flip chip, that is, the flip-chip interconnection structure can form a variety of substrate combinations, such as the first substrate 1 is a circuit substrate, and the second substrate 2 is a flip chip; the first substrate 1 is a flip chip, and the second substrate 2 is a circuit substrate; the first substrate 1 and the second substrate 2 are both flip chips, that is, it can be understood that the first substrate 1 and the second substrate 2 mentioned in this embodiment need to be set according to the actual substrate material, and the first substrate 1 can be provided with a high Vickers hardness stud bump, or a low Vickers hardness stud bump, and the second substrate 2 can be provided with a Vickers hardness stud bump corresponding to it as described above;

[0045] Furthermore, the first stud bump 3 and the second stud bump 4 are both made of metal or alloy materials, such as gold, silver, copper or their alloys.

[0046] Example 2

[0047] The present invention also provides a method for preparing a radio frequency chip flip-chip interconnection structure, comprising the following steps:

[0048] Step S1, preparing a first stud bump on a pad of a first substrate;

[0049] Step S2, preparing a second stud bump on the pad of the second substrate;

[0050] Step S3, flipping the first substrate and the second substrate;

[0051] Step S4, pressing the first substrate and the second substrate tightly, so that the first stud bumps and the second stud bumps are plastically deformed and in close contact with each other;

[0052] Step S5, completing solid phase welding of the first stud bump and the second stud bump by heating and ultrasonic action to form a flip-chip interconnection structure between the first substrate and the second substrate;

[0053] Wherein, in step S1, the diameter of the prepared first stud bump is smaller than the pad diameter of the first substrate, in step S2, the diameter of the prepared second stud bump is smaller than the diameter of the first stud bump, and the Vickers hardness of the prepared second stud bump is smaller than the Vickers hardness of the first stud bump, and in step S1 and step S2, the first stud bump and the second stud bump are both made of metal or alloy material by a wire bonding machine;

[0054] It should be noted that, first, a stud bump with high Vickers hardness is prepared on a substrate, which is recorded as the first substrate and the first stud bump. The diameter of the first stud bump is obtained based on the size of the pad on the first substrate. The first stud bump is prepared on the pad of the first substrate by a wire bonding machine. Under the diameter and Vickers hardness of the first stud bump, the diameter and Vickers hardness of the second stud bump are determined, and the second stud bump is also prepared on the pad of the second substrate by a wire bonding machine. Then, temperature, pressure and ultrasound are applied by a thermal ultrasonic flip-chip method to solid-phase weld the first stud bump and the second stud bump. In this process, due to the different Vickers hardnesses of the first stud bump and the second stud bump, the stud bump with low Vickers hardness is welded together. By providing compensation for the height of the high Vickers hardness stud bump on the other side through a large deformation during the flip-chip process, the high Vickers hardness stud bump ensures a controllable collapse of the air cavity height through a small deformation during the flip-chip process, avoiding crosstalk and self-excitation of the radio frequency signal during the transmission of the flip-chip structure, that is, at a low cost, the stud bump consistency problem and the insufficient air cavity height problem in the flip-chip application of large-size and multi-bump radio frequency chips are solved, and the preparation process steps are simple. At the same time, the diameter difference between the first stud bump and the second stud bump allows the low Vickers hardness stud bump to fully contact the high Vickers hardness stud bump while the large variable, providing a guarantee for the reliability of flip-chip of large-size and multi-bump chips;

[0055] Further, in step S1, the diameter of the prepared first stud bump is 1 / 100 of the pad diameter of the first substrate. times, n is greater than 1, in step S2, the Vickers hardness of the prepared first stud bump is 1.2 to 2 times the Vickers hardness of the prepared second stud bump, and the diameter of the prepared first stud bump is 1.2 to 2 times the diameter of the prepared second stud bump;

[0056] It should be noted that the inventors have found that, during the inverted mounting process of the first substrate and the second substrate, the best effect is achieved when the height deformation of the stud bump with high Vickers hardness is 0.2 to 0.8 times the height deformation of the stud bump with low Vickers hardness, that is, by limiting the height deformation ratio of the first stud bump and the second stud bump, the first stud bump and the second stud bump meet the above-mentioned height deformation ratio during inverted mounting;

[0057] Example 3

[0058] Different from Example 2, in this embodiment, the present invention further provides a specific preparation process of a radio frequency chip flip-chip interconnection structure, including the following steps:

[0059] Step S1, preparing a first stud bump on a pad of a first substrate;

[0060] Step S2, preparing a second stud bump on the pad of the second substrate;

[0061] Step S3, flipping the first substrate and the second substrate;

[0062] Step S4, using a thermal ultrasonic flip chip bonding machine, applying pressure with a nozzle to press the first substrate and the second substrate tightly, so that the first stud bump and the second stud bump are plastically deformed and in close contact with each other;

[0063] Step S5, applying ultrasound with the nozzle to solid-phase weld the first stud bump and the second stud bump together under the action of high temperature;

[0064] Among them, the first substrate and the second substrate are upper and lower chips of a multifunctional amplitude and phase control module. The materials of the first substrate and the second substrate are both gallium arsenide. The surface pads of the first substrate and the second substrate are gold-plated. The outer dimensions of the first substrate and the second substrate are both 5mm×5mm, the number of pads is 105, and the size of the pad is 100um×100um:

[0065] In step S1, a first stud bump is prepared on a first substrate by a wire bonding machine. The wire is made of gold alloy wire with a diameter of 25 um. The prepared first stud bump has a diameter of 80 um, a height of 35 um, and a Vickers hardness of 80 to 90 HV.

[0066] In step S2, a second stud bump is prepared on a second substrate by a wire bonding machine. The wire material is 4N gold wire with a diameter of 25 um. The prepared second stud bump has a diameter of 60 um, a height of 15 um, and a Vickers hardness of 50-55 HV.

[0067] like Figure 2 As shown, in the interconnect structure prepared after flip-chip, the bump diameter on the first substrate side is 85um and the bump height is 30um, while the bump diameter on the second substrate side is 80um and the bump height is 8um;

[0068] In the description of the present invention, it is necessary to understand that the terms "upper", "lower", "bottom", "top", "front", "back", "inside", "outside", "left", "right", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0069] Although the present invention is described herein with reference to specific embodiments, it should be understood that these embodiments are merely examples of the principles and applications of the present invention. It should therefore be understood that many modifications may be made to the exemplary embodiments and that other arrangements may be devised without departing from the spirit and scope of the present invention as defined by the appended claims. It should be understood that the various dependent claims and features described herein may be combined in a manner different from that described in the original claims. It should also be understood that features described in conjunction with individual embodiments may be used in other described embodiments.

Claims

1. A radio frequency chip flip-chip interconnection structure, characterized in that: It comprises a first substrate and a second substrate of the same size, wherein a plurality of first stud bumps are bonded to the pads of the first substrate, and a plurality of second stud bumps corresponding to the positions of the first stud bumps are bonded to the pads of the second substrate; The diameter of the first stud bump is smaller than the pad diameter of the first substrate, the diameter of the first stud bump is larger than the diameter of the second stud bump, and the Vickers hardness of the first stud bump is larger than the Vickers hardness of the second stud bump.

2. The radio frequency chip flip-chip interconnect structure according to claim 1, characterized in that: The diameter of the first stud bump is 1 / 4 of the pad diameter of the first substrate. times, n is greater than 1.

3. The radio frequency chip flip-chip interconnect structure according to claim 1, characterized in that: The Vickers hardness of the first stud bump is 1.2 to 2 times the Vickers hardness of the second stud bump.

4. The radio frequency chip flip-chip interconnect structure according to claim 3, characterized in that: The diameter of the first stud bump is 1.2 to 2 times the diameter of the second stud bump.

5. The radio frequency chip flip-chip interconnect structure according to claim 1, characterized in that: The first substrate is a circuit substrate or a flip chip. When the first substrate is a circuit substrate, the second substrate is a flip chip; when the first substrate is a flip chip, the second substrate is a circuit substrate or a flip chip.

6. The radio frequency chip flip-chip interconnect structure according to claim 1, characterized in that: The first stud bump and the second stud bump are both made of metal or alloy material.

7. A method for preparing a radio frequency chip flip-chip interconnection structure, used for preparing the radio frequency chip flip-chip interconnection structure according to any one of claims 1 to 6, characterized in that: The steps include: Step S1, preparing a first stud bump on a pad of a first substrate; Step S2, preparing a second stud bump on the pad of the second substrate; Step S3, flipping the first substrate and the second substrate; Step S4, pressing the first substrate and the second substrate tightly, so that the first stud bumps and the second stud bumps are plastically deformed and in close contact with each other; Step S5, completing solid phase welding of the first stud bump and the second stud bump by heating and ultrasonic action to form a flip-chip interconnection structure between the first substrate and the second substrate; In which, in step S1, the diameter of the prepared first stud bump is smaller than the pad diameter of the first substrate, and in step S2, the diameter of the prepared second stud bump is smaller than the diameter of the first stud bump, and the Vickers hardness of the prepared second stud bump is smaller than the Vickers hardness of the first stud bump.

8. The method for preparing a radio frequency chip flip-chip interconnection structure according to claim 7, characterized in that: In step S1 and step S2, the first stud bump and the second stud bump are both made of metal or alloy material by a wire bonding machine.

9. The method for preparing a radio frequency chip flip-chip interconnection structure according to claim 8, characterized in that: In step S1, the diameter of the first stud bump is 1 / 4 of the pad diameter of the first substrate. times, n is greater than 1.

10. The method for preparing a radio frequency chip flip-chip interconnection structure according to claim 9, characterized in that: In step S2, the Vickers hardness of the prepared first stud bump is 1.2 to 2 times the Vickers hardness of the prepared second stud bump, and the diameter of the prepared first stud bump is 1.2 to 2 times the diameter of the prepared second stud bump.

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