MCU pin multiplexing function test method and device

Abstract

The invention discloses an MCU pin multiplexing function test method, and the method comprises the steps: enabling to-be-tested pins to form a two-dimensional array according to a port number, a multiplexing number and an input / output function; one group of TX and RX pins is sequentially taken out from the two-dimensional array, and the TX and RX pins are respectively configured to enter a multiplexing function test working mode; and in the test working mode, testing each taken-out pin pair. The document automatic conversion method and the electronic equipment provided by the embodiment of the invention at least have the following beneficial effects that whether each pin achieves an expected multiplexing function or not can be tested under the condition that the microcontroller is not connected with a peripheral device, and the test efficiency is greatly improved.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic circuits, and in particular to a method and device for testing the pin multiplexing function of an MCU. Background Art

[0002] MCU (Micro Controller Unit), also known as "single-chip microcomputer", integrates the central processing unit (CPU), memory (RAM), input / output interface (I / O), etc. into "one IC".

[0003] Microcontrollers have many pins. Except for special function pins such as power, ground, reset, etc., the rest of the pins can be used as general input and output pins, and can also be multiplexed into other communication or control functions, such as i2c communication pins, timer input and output pins, MCO output pins, etc. Taking PA10 of MM32F0140 as an example, this pin can be multiplexed into the following functions: TIM17_BKIN, UART1_RX, TIM1_CH3, UART1_TX, I2C_SDA, TIM1_CH1, SPI2_SCK / I2S2_CK, CAN_TX.

[0004] Taking UART as an example, the TX and RX pins can be PA9 and PA10, PA13 and PA14, or PB3 and PB4. Similarly, I2C or SPI also have several groups of pins to realize their communication functions. In the initial stage of development, one group is often used for functional testing. However, if the test does not cover the pins of other groups, the pins of other groups may miss the corresponding functions.

[0005] When testing pin multiplexing functions, the most direct testing method is to configure each pin to the corresponding function and test them one by one.

[0006] Taking PA9 and PA10 of MM32F0140 as an example, when testing the UART function, connect an external computer to see if it can communicate with the serial port assistant; when testing I2C, connect an external AT24C02 storage chip to see if reading and writing are successful;

[0007] When testing SPI, connect W25Q128 to see if reading and writing are successful. This is just one pin of the microcontroller, and the rest of the pins are tested in the same way. Testing the entire chip is time-consuming and laborious. Summary of the invention

[0008] One of the purposes of the embodiments of the present invention is to provide a MCU pin multiplexing function testing method and device, which greatly improves the testing efficiency compared with the prior art method of directly testing pins one by one through a simple and practical microcontroller pin function multiplexing testing method.

[0009] In order to solve the above technical problems, in a first aspect, an embodiment of the present invention provides a method for testing an MCU pin multiplexing function, the method comprising:

[0010] The pins to be tested are organized into a two-dimensional array according to the port number, multiplexing number and input and output function;

[0011] Sequentially taking out one group of TX and RX pins from the two-dimensional array, and configuring the TX and RX pins respectively to enter a multiplexing function test working mode;

[0012] In the test operation mode, each pin pair taken out is tested.

[0013] Preferably, the configuring of the TX and RX pins to enter the multiplexing function test working mode specifically includes:

[0014] Configure the TX pin to multiplex push-pull output mode, and configure the TX pin to generate EXTI interrupt trigger pin;

[0015] Configure the RX pin as push-pull output mode.

[0016] Preferably, in the test working mode, testing each pin pair taken out specifically includes:

[0017] Use the waveform sent out by the TX pin and enter the EXTI interrupt;

[0018] Flip the RX pin in EXTI so that the waveform received by the RX pin is consistent with the waveform sent by the TX pin;

[0019] It is determined whether the sent waveform is consistent with the received waveform. If so, the pin multiplexing function test of the group is successful.

[0020] Furthermore, in the multiplexed push-pull output mode, the data is sent through the P-MOS tube and the N-MOS tube, and finally output to the I / O port;

[0021] In the push-pull output mode, the value of the output data register passes through the P-MOS tube and the N-MOS tube and is finally output to the I / O port.

[0022] In a second aspect, an embodiment of the present invention further provides an MCU pin multiplexing function testing device, the device comprising:

[0023] The pin multiplexing configuration unit is used to form a two-dimensional array of the pins to be tested according to the port number, multiplexing number and input and output function;

[0024] A test mode configuration unit, used to sequentially take out one group of TX and RX pins from the two-dimensional array, and configure the TX and RX pins to enter a multiplexing function test working mode;

[0025] The test unit is used to test each pin pair taken out in the test working mode.

[0026] Preferably, the test mode configuration unit specifically includes:

[0027] The first configuration module is used to configure the TX pin to be in a multiplexed push-pull output mode and to configure the TX pin to be a trigger pin for generating an EXTI interrupt;

[0028] The second configuration module is used to configure the RX pin to be in a push-pull output mode.

[0029] Preferably, the testing unit specifically includes:

[0030] The sending module is used to send the waveform using the TX pin and enter the EXTI interrupt;

[0031] The interrupt module is used to flip the RX pin in EXTI so that the waveform received by the RX pin is consistent with the waveform sent by the TX pin;

[0032] The judging module is used to judge whether the sent waveform is consistent with the received waveform. If so, the pin multiplexing function test of the group is successful.

[0033] Furthermore,

[0034] In the multiplexed push-pull output mode, the data is sent through the P-MOS tube and the N-MOS tube, and finally output to the I / O port;

[0035] In the push-pull output mode, the value of the output data register passes through the P-MOS tube and the N-MOS tube and is finally output to the I / O port.

[0036] On the other hand, an embodiment of the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, wherein the computer program includes program instructions, and when the program instructions are executed by a processor, the processor executes the method as described above.

[0037] On the other hand, an embodiment of the present invention further provides an electronic device, including a processor and a memory, wherein the memory is used to store a computer program, the computer program includes program instructions, and the processor is configured to call the program instructions to execute the method as described above.

[0038] Compared with the prior art, the automatic document conversion method and electronic device provided by the embodiments of the present invention have at least the following beneficial effects: it is possible to test whether each pin has achieved the expected multiplexing function without connecting peripheral devices to the microcontroller, thereby greatly improving the test efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] The preferred implementation modes will be described below in a clear and understandable manner with reference to the accompanying drawings to further illustrate the above-mentioned characteristics, technical features, advantages and implementation methods of the present invention.

[0040] Figure 1 This is a flow chart of a method for testing the MCU pin multiplexing function according to an embodiment of the present invention;

[0041] Figure 2 A schematic diagram of a circuit for configuring a TX pin as a multiplexed push-pull output according to an embodiment of the present invention;

[0042] Figure 3 A schematic diagram of a circuit for configuring a TX pin to enter an EXTI interrupt according to the present invention;

[0043] Figure 4 A schematic diagram of the EXTI interrupt module implemented in the present invention;

[0044] Figure 5 A schematic diagram of a circuit for configuring the RX pin as a push-pull output according to an embodiment of the present invention;

[0045] Figure 6 A schematic diagram of a circuit for flipping the RX pin output during an interrupt in an embodiment of the present invention;

[0046] Figure 7 This is a structural schematic diagram of a MCU pin multiplexing function test device according to an embodiment of the present invention;

[0047] Figure 8 The present invention is a schematic diagram of the structure of an electronic device for implementing a MCU pin multiplexing function test. DETAILED DESCRIPTION

[0048] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the specific implementation methods of the present invention will be described below with reference to the accompanying drawings. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings and other implementation methods can be obtained based on these drawings without creative work.

[0049] In order to simplify the drawings, only the parts related to the invention are schematically shown in each figure, and they do not represent the actual structure of the product. In addition, in order to simplify the drawings and facilitate understanding, in some figures, only one of the parts with the same structure or function is schematically drawn or marked. In this article, "one" not only means "only one", but also means "more than one".

[0050] The following mainly takes some specific embodiments as examples to describe in detail the implementation of the technical solution of the present invention.

[0051] like Figure 1 As shown, in order to achieve the purpose of the invention, an embodiment of the present invention provides a method for testing the MCU pin multiplexing function, comprising the following steps:

[0052] S1, organize the pins to be tested into a two-dimensional array according to the port number, multiplexing number and input and output function;

[0053] S2, sequentially taking out one group of TX and RX pins from the two-dimensional array, and configuring the TX and RX pins respectively to enter the multiplexing function test working mode;

[0054] S3. In the test working mode, each pin pair taken out is tested.

[0055] Preferably, the configuring of the TX and RX pins to enter the multiplexing function test working mode specifically includes:

[0056] Configure the TX pin to multiplex push-pull output mode, and configure the TX pin to generate EXTI interrupt trigger pin;

[0057] Configure the RX pin as push-pull output mode.

[0058] Preferably, in the test working mode, testing each pin pair taken out specifically includes:

[0059] Use the waveform sent out by the TX pin and enter the EXTI interrupt;

[0060] Flip the RX pin in EXTI so that the waveform received by the RX pin is consistent with the waveform sent by the TX pin;

[0061] It is determined whether the sent waveform is consistent with the received waveform. If so, the pin multiplexing function test of the group is successful.

[0062] In the prior art, taking UART1 among several UART function modules of MCU as an example, several communication pins of UART1 are PA9 (TX), PA10 (RX) and PC4 (TX), PC5 (RX) as examples, so that 4 pins will have 4 groups of wiring modes for external communication, namely, (PA9, PA10), (PA9, PC5), (PC4, PA10), (PC4, PC5), and each group needs to communicate with the external serial port, which is quite troublesome. The following takes PA9 and PA10 as examples to introduce the configuration process of conventional tests.

[0063] 1. Configure UART basic functions, including baud rate, bit width, stop bit, parity bit, hardware control flow, etc.

[0064] 2. Configure PA9 as multiplexed push-pull output.

[0065] In the multiplexed push-pull output mode, the multiplexing function of the on-chip peripheral module is used to determine the output value, which passes through the P-MOS tube and the N-MOS tube and is finally output to the I / O port. Here we should pay attention to the P-MOS tube and the N-MOS tube. When the output value is set to a high level, the P-MOS tube is in the open state and the N-MOS tube is in the closed state. At this time, the level of the I / O port is determined by the P-MOS tube: high level; when the output value is set to a low level, the P-MOS tube is in the closed state and the N-MOS tube is in the open state. At this time, the level of the I / O port is determined by the N-MOS tube: low level. At the same time, the level of the I / O port can also be read through the input circuit; note that at this time, the level of the I / O port must be the output level.

[0066] Since a simple push-pull circuit is reverse, that is, when a low-level input occurs, the PMOS is turned on and the output is a high level; when a high-level input occurs, the NMOS is turned on and the output is a low level, an inverter can be added to the input end.

[0067] 3. Configure PA10 as floating input.

[0068] In floating input mode, the level signal of the I / O port directly enters the input data register.

[0069] 4. The UART function module sends data to the serial port assistant through PA9. After receiving the data, the serial port assistant sends the data to the UART function module of the MCU through PA10.

[0070] If the data is consistent with expectations, the test of this group of pins is completed and the next group is tested.

[0071] As mentioned above, the inventors found that the existing testing methods are costly, especially when testing a microcontroller with 100 or 144 pins, the pin multiplexing function test requires at least one week of work. In the early FPGA stage of microcontroller design, the bit file of each version must be verified repeatedly.

[0072] The input waveform of the pin of the embodiment of the invention can be generated by itself without external excitation, and the specific waveform of the pin input is determined according to the output of other pins. Tests such as I2C and SPI can also generate output and input waveforms according to standard protocols. It has low cost and high efficiency, and can complete the multiplexing function test of the microcontroller pin within 10 minutes. It has strong versatility and can be used for various types of microcontrollers.

[0073] Take the UART1 of MM32F0140 as an example. After initializing UART1, use the UART function module to send a byte of data (such as 0x55), so that a series of waveforms will appear on the UART1_TX (PA9) pin. You only need to get the same waveform on UART1_RX (PA10) for the hardware to receive the data. At this time, if the received data is also 0x55, it can be known that PA9 multiplexing UART1_TX function is normal, and PA10 multiplexing UART1_RX function is also normal.

[0074] To achieve the same waveform of PA10 and PA9, PA9 needs to be configured to enter EXTI interrupt at the same time, and in the interrupt function, the pin of PA10 is flipped according to the level of PA9. This step is the key to the embodiment of the invention.

[0075] 1. As Figure 2 Take the following as an example, configure PA9 as multiplexed push-pull output, and let UART1 send data to the PA9 pin;

[0076] In the multiplexed push-pull output mode, the multiplexing function of the on-chip peripheral module is used to determine the output value, which passes through the P-MOS tube and the N-MOS tube and is finally output to the I / O port. Here we should pay attention to the P-MOS tube and the N-MOS tube. When the output value is set to a high level, the P-MOS tube is in the open state and the N-MOS tube is in the closed state. At this time, the level of the I / O port is determined by the P-MOS tube: high level; when the output value is set to a low level, the P-MOS tube is in the closed state and the N-MOS tube is in the open state. At this time, the level of the I / O port is determined by the N-MOS tube: low level. At the same time, the level of the I / O port can also be read through the input circuit; note that at this time, the level of the I / O port must be the output level.

[0077] Since a simple push-pull circuit is reverse, that is, when a low-level input occurs, the PMOS is turned on and the output is a high level; when a high-level input occurs, the NMOS is turned on and the output is a low level, an inverter can be added to the input end.

[0078] 2. If Figure 3 As shown, configuring PA9 can enter EXTI interrupt;

[0079] EXTI (External interrupt / event controller) is an external interrupt / event controller that manages 20 interrupt / event lines of the controller. Each interrupt / event line corresponds to an edge detector, which can detect the rising edge and falling edge of the input signal. EXTI can configure each interrupt / event line individually, and can be configured as an interrupt or event, as well as the properties of the trigger event.

[0080] EXTI can be divided into two major functions, one is to generate interrupts, the other is to generate events, these two functions are different in hardware.

[0081] First Look Figure 4 The circuit flow indicated by the upper dotted line is a circuit that generates an interrupt, and the final signal flows into the NVIC controller. Let's look at the circuit flow indicated by the lower dotted line. It is a circuit that generates an event, and finally outputs a pulse signal.

[0082] The input line can be understood as a certain IO pin. If the IO pin changes, the EXTI function module can be used to generate an interrupt or an event. A key point of the present invention is to use EXTI to generate an interrupt and then perform appropriate operations in the interrupt.

[0083] 3. If Figure 5 As shown, PA10 is configured as a push-pull output.

[0084] In the push-pull output mode, the output bit is set / cleared to the value of the register or data register, which passes through the P-MOS tube and the N-MOS tube and is finally output to the I / O port. It should be noted here that for the P-MOS tube and the N-MOS tube, when the output value is set to a high level, the P-MOS tube is in the on state and the N-MOS tube is in the off state. At this time, the level of the I / O port is determined by the P-MOS tube: high level; when the output value is set to a low level, the P-MOS tube is in the off state and the N-MOS tube is in the on state. At this time, the level of the I / O port is determined by the N-MOS tube: low level. At the same time, the level of the I / O port can also be read through the input circuit; note that at this time, the level of the I / O port must be the output level. Since the pure push-pull circuit is reverse, that is, when the low level input is turned on, the PMOS outputs a high level; when the high level input is turned on, the NMOS outputs a low level, an inverter can be added to the input end.

[0085] The UART function module sends data through PA9. The sent data will cause the high and low levels of the PA9 pin to change, thereby causing an EXTI interrupt.

[0086] like Figure 6 As shown, in the EXTI interrupt, read the high and low levels of PA9, and then flip PA10 to make the waveform on the PA10 pin consistent with the output of PA9.

[0087] The high and low levels of PA10 output will be read by the "multiplexed function input" of the PA10 pin itself, that is, the UART1 receiving function is used to read the input data register value of PA10 and determine whether it is consistent with the sent data.

[0088] In the above steps, the connectivity between PA9 and PA10 can be tested without external communication equipment on the input and output pins. The next round starts after the test is completed.

[0089] exist Figure 2-Figure 6 In the IO pin, the protection diode (two diodes on the upper and lower sides of the IO pin) is used to prevent the pin from being input with excessively high or low voltage. When the pin voltage is higher than VDD, the upper diode is turned on; when the pin voltage is lower than VSS, the lower diode is turned on to prevent abnormal voltage from being introduced into the chip and causing the chip to burn out.

[0090] P-MOS tube and N-MOS tube, the unit circuit composed of P-MOS tube and N-MOS tube makes GPIO have "push-pull output" and "open-drain output" modes.

[0091] TTL Schottky trigger: After the signal passes through the trigger, the analog signal is converted into a digital signal of 0 and 1. However, when the GPIO pin is used as the input channel of the ADC to collect voltage, its "analog input" function is used, and the signal no longer passes through the trigger for TTL level conversion.

[0092] The pin multiplexing function configuration of the above embodiment of the present invention is only an example. In actual testing, the TX pin can be configured as one of the open-drain output, push-pull output, multiplexed open-drain output, and multiplexed push-pull output working modes, and the TX pin can be configured as an EXTI interrupt trigger pin;

[0093] Configure the RX pin to one of the push-pull output mode, analog input, floating input, pull-down input, and pull-up input.

[0094] The input waveform of the pin of the embodiment of the invention can be generated by itself without external excitation, and the specific waveform of the pin input is determined according to the output of other pins. Tests such as I2C and SPI can also generate output and input waveforms according to standard protocols. It has low cost and high efficiency, and can complete the multiplexing function test of the microcontroller pin within 10 minutes. It has strong versatility and can be used by various types of microcontrollers.

[0095] like Figure 7 As shown, an embodiment of the present invention further provides an MCU pin multiplexing function testing device, the device comprising:

[0096] The pin multiplexing configuration unit is used to form a two-dimensional array of the pins to be tested according to the port number, multiplexing number and input and output function;

[0097] A test mode configuration unit, used to sequentially take out one group of TX and RX pins from the two-dimensional array, and configure the TX and RX pins to enter a multiplexing function test working mode;

[0098] The test unit is used to test each pin pair taken out in the test working mode.

[0099] Preferably, the test mode configuration unit specifically includes:

[0100] The first configuration module is used to configure the TX pin to be in a multiplexed push-pull output mode and to configure the TX pin to be a trigger pin for generating an EXTI interrupt;

[0101] The second configuration module is used to configure the RX pin to be in a push-pull output mode.

[0102] Preferably, the testing unit specifically includes:

[0103] The sending module is used to send the waveform using the TX pin and enter the EXTI interrupt;

[0104] The interrupt module is used to flip the RX pin in EXTI so that the waveform received by the RX pin is consistent with the waveform sent by the TX pin;

[0105] The judging module is used to judge whether the sent waveform is consistent with the received waveform. If so, the pin multiplexing function test of the group is successful.

[0106] Furthermore,

[0107] In the multiplexed push-pull output mode, the data is sent through the P-MOS tube and the N-MOS tube, and finally output to the I / O port;

[0108] In the push-pull output mode, the value of the output data register passes through the P-MOS tube and the N-MOS tube and is finally output to the I / O port.

[0109] In the device embodiment, its implementation method is the same as the method implementation method, and will not be described in detail here.

[0110] like Figure 8 As shown, an electronic device provided by an embodiment of the present application, the electronic device 1000 includes a processor 1001 and a memory 1002, and the processor 1001 and the memory 1002 can be interconnected through a communication bus 1003. The communication bus 1003 can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The communication bus 1003 can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, the memory 1002 is used to store a computer program, and the computer program includes program instructions. The processor 1001 is configured to call the program instructions, and the above program includes a method for executing some or all of the steps in the aforementioned method.

[0111] The processor 1001 may be a general purpose central processing unit (CPU), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits for controlling the execution of the above program.

[0112] The memory 1002 may be a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, a random access memory (RAM) or other types of dynamic storage devices that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical disc, laser disc, optical disc, digital versatile disc, Blu-ray disc, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory may exist independently and be connected to the processor via a bus. The memory may also be integrated with the processor.

[0113] The electronic device 1000 may further include a communication module 1004 and a display 1005. The communication module 1004 may be connected to the optical tracking device for communication. The communication module 1004 may be a wireless communication module (eg, a WiFi module, a Bluetooth module, etc.) or a wired communication module.

[0114] In addition, the electronic device 1000 may also include common components such as a communication interface (eg, a USB interface, a microphone interface, etc.), an antenna, etc., which will not be described in detail here.

[0115] An embodiment of the present invention also provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program for electronic data exchange, and the computer program enables a computer to execute part or all of the steps of any MCU pin multiplexing function testing method recorded in the above method embodiments.

[0116] It should be noted that, for the aforementioned method embodiments, for the sake of simplicity, they are all expressed as a series of action combinations, but those skilled in the art should be aware that the present application is not limited by the described order of actions, because according to the present application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present application.

[0117] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0118] In the several embodiments provided in the present application, it should be understood that the disclosed device can be implemented in other ways. For example, the device embodiments described above are only schematic, such as the division of the units, which is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, and the indirect coupling or communication connection of devices or units can be electrical or other forms.

[0119] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0120] In addition, the functional units in the various embodiments of the application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated units may be implemented in the form of hardware or in the form of software program modules.

[0121] If the integrated unit is implemented in the form of a software program module and sold or used as an independent product, it can be stored in a computer-readable memory. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a memory, including a number of instructions to enable a computer device (which can be a personal computer, server or network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned memory includes: U disk, read-only memory (ROM), random access memory (RAM), mobile hard disk, magnetic disk or optical disk and other media that can store program codes.

[0122] A person of ordinary skill in the art can understand that all or part of the steps in the various methods of the above embodiments can be completed by instructing related hardware through a program, and the program can be stored in a computer-readable memory, which can include: a flash drive, a read-only memory, a random access memory, a magnetic disk or an optical disk, etc.

[0123] The embodiments of the present application are introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and core idea of ​​the present application. At the same time, for general technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

[0124] It should be noted that the above embodiments can be freely combined as needed. The above are only preferred embodiments of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be regarded as the protection scope of the present invention.

Claims

1. A method for testing the MCU pin multiplexing function. It is characterized in that The method comprises: The pins to be tested are organized into a two-dimensional array according to the port number, multiplexing number and input and output function; Sequentially taking out one group of TX and RX pins from the two-dimensional array, and configuring the TX and RX pins respectively to enter a multiplexing function test working mode; In the test operation mode, each pin pair taken out is tested.

2. The MCU pin multiplexing function testing method as claimed in claim 1, It is characterized in that The configuration of the TX and RX pins to enter the multiplexing function test working mode specifically includes: Configure the TX pin to multiplex push-pull output mode, and configure the TX pin to generate EXTI interrupt trigger pin; Configure the RX pin as push-pull output mode.

3. The MCU pin multiplexing function testing method as claimed in claim 2, It is characterized in that In the test working mode, testing each pin pair taken out specifically includes: Use the waveform sent out by the TX pin and enter the EXTI interrupt; Flip the RX pin in EXTI so that the waveform received by the RX pin is consistent with the waveform sent by the TX pin; It is determined whether the sent waveform is consistent with the received waveform. If so, the pin multiplexing function test of the group is successful.

4. The MCU pin multiplexing function testing method as claimed in claim 3, It is characterized in that In the multiplexed push-pull output mode, the data is sent through the P-MOS tube and the N-MOS tube, and finally output to the I / O port; In the push-pull output mode, the value of the output data register passes through the P-MOS tube and the N-MOS tube and is finally output to the I / O port.

5. A MCU pin multiplexing function test device, It is characterized in that The device comprises: The pin multiplexing configuration unit is used to form a two-dimensional array of the pins to be tested according to the port number, multiplexing number and input and output function; A test mode configuration unit, used to sequentially take out one group of TX and RX pins from the two-dimensional array, and configure the TX and RX pins to enter a multiplexing function test working mode; The test unit is used to test each pin pair taken out in the test working mode.

6. The MCU pin multiplexing function test device as claimed in claim 5, It is characterized in that The test mode configuration unit specifically includes: The first configuration module is used to configure the TX pin to be in a multiplexed push-pull output mode and to configure the TX pin to be a trigger pin for generating an EXTI interrupt; The second configuration module is used to configure the RX pin to be in a push-pull output mode.

7. The MCU pin multiplexing function test device as claimed in claim 6, It is characterized in that The test unit specifically includes: The sending module is used to send the waveform using the TX pin and enter the EXTI interrupt; The interrupt module is used to flip the RX pin in EXTI so that the waveform received by the RX pin is consistent with the waveform sent by the TX pin; The judging module is used to judge whether the sent waveform is consistent with the received waveform. If so, the pin multiplexing function test of the group is successful.

8. The MCU pin multiplexing function test device as claimed in claim 2, It is characterized in that In the multiplexed push-pull output mode, the data is sent through the P-MOS tube and the N-MOS tube, and finally output to the I / O port; In the push-pull output mode, the value of the output data register passes through the P-MOS tube and the N-MOS tube and is finally output to the I / O port.

9. An electronic device, It is characterized in that The method comprises a processor and a memory, wherein the memory is used to store a computer program, the computer program comprises program instructions, and the processor is configured to call the program instructions to execute the method according to any one of claims 1 to 4.

10. A computer-readable storage medium, It is characterized in that The computer-readable storage medium stores a computer program, wherein the computer program includes program instructions, and when the program instructions are executed by a processor, the processor is enabled to perform the method according to any one of claims 1 to 4.

Images