Printed circuit board and electronic equipment
By setting up multiple rows of through holes and lead channels in the fan-out area of the printed circuit board, the signal crosstalk and processing difficulty problems caused by the increase of signal modules are solved, and the smooth routing and cost reduction of signal lines are achieved.
Patent Information
- Application Number
- CN202411368339.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-27
- Publication Date
- 2024-12-17
- Estimated Expiration
- 2044-09-27
AI Technical Summary
In the printed circuit board of electronic equipment, the increase in the number of signal modules leads to an increase in the number of pads and through holes, resulting in a narrow trace area of the signal line, which may cause signal crosstalk or the problem of inability to set the signal line, and the complex blind hole process increases processing Difficulty and cost.
By providing multiple rows of through holes and lead channels in the fan-out area, the through hole density in the first direction is reduced, allowing the signal line to extend from the inside of the multiple rows of through holes, reducing crosstalk between the signal lines, and simplifying the printed circuit board's Process and cost.
It effectively reduces crosstalk between signals on the signal line, reduces the production complexity and cost of printed circuit boards, and achieves smooth routing of signal lines.
Smart Images

Figure CN119155894A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present disclosure relate to the technical field of network equipment, and in particular to a printed circuit board and an electronic device. Background Art
[0002] Printed circuit boards can be used to integrate different signal modules in electronic devices (e.g., electronic devices used for network communication). A connector can be used to connect the signal module to the printed circuit board. For example, pins are provided on the connector, pads are provided on the printed circuit board, the pins of the connector are fixedly connected to the pads of the printed circuit board, and the signal module can be plugged into the connector, thereby realizing the signal connection between the signal module and the printed circuit board. Summary of the invention
[0003] Embodiments of the present disclosure provide a printed circuit board and an electronic device.
[0004] In a first aspect, an embodiment of the present disclosure provides a printed circuit board method, comprising: at least two pad areas, each of which extends along a first direction; at least two fan-out areas, each of which corresponds to one of the pad areas one by one, and the fan-out area is arranged adjacent to the corresponding pad area; for each of the pad areas, a row of first pads is arranged in the pad area on the first surface of the printed circuit board, and a plurality of first pads in each row of the first pads are arranged along the first direction; wherein each row of the first pads is fixedly connected to a row of pins of a connector; the connector comprises at least one row of pins; each of the fan-out areas comprises a plurality of rows of through holes and a plurality of lead channels, and a plurality of through holes in each row of through holes are arranged along the first direction; the plurality of rows of through holes comprise a first through hole corresponding to each of the first pads one by one; for each of the first pads, the first pad is connected to the corresponding first through hole through a first lead, and the first lead passes through a target lead channel corresponding to the first pad; the first lead is arranged on the first surface, and the first lead is a curve; wherein the target lead channel is one of the plurality of lead channels.
[0005] In a second aspect, an embodiment of the present disclosure provides an electronic device, comprising: a printed circuit board and a connector, wherein the printed circuit board is a printed circuit board as in the first aspect and various possible designs of the first aspect.
[0006] The printed circuit board and electronic device provided in this embodiment include at least two pad areas, each of which extends along a first direction; at least two fan-out areas, each of which corresponds to one pad area one-to-one, and the fan-out area is arranged adjacent to the corresponding pad area; for each pad area, a row of first pads is arranged in the pad area on the first surface of the printed circuit board, and a plurality of first pads in each row of the first pads are arranged along the first direction; wherein each row of the first pads is fixedly connected to a row of pins of a connector; the connector includes at least one row of pins; each fan-out area includes multiple rows of through holes and multiple lead channels, and a plurality of through holes in each row of through holes are arranged along the first direction; the multiple rows of through holes include first through holes corresponding to each of the first pads one-to-one; for each of the first pads, the first pad is connected to the corresponding first through hole through a first lead, and the first lead passes through a target lead channel corresponding to the first pad; the first lead is arranged on the first surface, and the first lead is a curve; wherein the target lead channel is one of the multiple lead channels. Through the above scheme, in the fan-out area corresponding to each pad area, the through holes corresponding to the multiple pads in the pad area are arranged in multiple rows, thereby reducing the density of the through holes arranged in the first direction. Multiple lead channels can be arranged in the fan-out area, and the fan-out leads are led out from the corresponding target lead channels. Since the density of the through holes distributed along the first direction is reduced, an internal signal line area extending along the second direction can be formed inside the multiple rows of through holes, which helps to reduce the crosstalk between the signals transmitted on the signal lines. BRIEF DESCRIPTION OF THE DRAWINGS
[0007] In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.
[0008] Figure 1 A top view of a printed circuit board provided for an embodiment of the present disclosure;
[0009] Figure 2 A schematic diagram of the lead fan-out of a pad area and the corresponding fan-out area;
[0010] Figure 3 is a schematic diagram of the first fan-out sub-area;
[0011] Figure 4 is a schematic diagram of a second surface of a printed circuit board;
[0012] Figure 5is a schematic diagram of the third fan-out sub-area;
[0013] Figure 6 is a schematic diagram of projection of the third solder sub-region and the third fan-out sub-region onto the first surface;
[0014] Figure 7 It is a partial structural schematic diagram of the fan-out area with shielding holes;
[0015] Figure 8 This is a schematic diagram of the lead fan-out corresponding to a row of pads close to the positioning holes;
[0016] Fig. 9 A schematic diagram of the structure of an electronic device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION
[0017] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.
[0018] As the number of signal modules integrated in the printed circuit board increases, the signal modules can be integrated on the upper surface and the lower surface of the printed circuit board respectively. Pads can be set on the upper surface and the lower surface of the printed circuit board respectively, and the pads need to be connected to the vias through fan-out leads, and the vias can be connected to the signal lines in the printed circuit board. In this way, the pads connected to the fan-out leads, the vias connected to the fan-out leads, and the signal lines connected to the vias form a signal transmission path.
[0019] In some embodiments, blind holes can be used for lead fanning out for the pads on the upper surface and the lower surface, respectively. That is, blind holes can be set for the pads on the upper surface and the lower surface, respectively, using one or more layers of printed circuit boards, and fan-out leads are used to connect the pads and the blind holes, and the blind holes can be connected to the signal lines, thereby forming signal transmission paths corresponding to the pads on the upper surface and the lower surface, respectively. Such an implementation method can prevent interference between the fan-out leads on the upper surface and the lower surface.
[0020] However, the blind hole process is complicated, which increases the processing difficulty and production cost of the printed circuit board. In order to reduce the processing difficulty and production cost of the printed circuit board, the inventor hopes to use through holes to complete the lead fan-out.
[0021] However, due to the increase in signal module connection points, the number of corresponding pads and through holes of pads will also increase. If through holes corresponding to two surfaces are set on one side of the pad by straight-out punching to fan out the leads, the signal lines corresponding to one or more rows of pads will not be able to be routed through the internal area of the pad. Therefore, signal lines can only be set through the side of each row of pads, but for multiple rows of pads, the routing area of the line number line is very narrow, which may cause signal crosstalk in the signal line, or the signal line cannot be set.
[0022] In order to solve the above problems, the solution provided by the embodiment of the present disclosure is to set a corresponding fan-out area for each first row of pads, set multiple rows of through holes and multiple lead channels in the fan-out area, and the fan-out leads corresponding to the multiple rows of through holes are led out through the target channels. Thereby reducing the density of the through holes arranged in the first direction. Multiple lead channels can be set in the fan-out area, and the fan-out leads are led out from the corresponding target lead channels. Since the density of the through holes distributed along the first direction is reduced, an internal signal line area can be formed inside the multiple rows of through holes, which helps to reduce the crosstalk between the signals transmitted on the signal lines.
[0023] Please combine Figure 1 and Figure 2 , Figure 1 A top view of a printed circuit board provided in an embodiment of the present disclosure. Figure 2 It is a schematic diagram of the lead fan-out of a pad area and the corresponding fan-out area. Figure 1 As shown, the printed circuit board 10 includes:
[0024] At least two pad regions 101, each pad region extending along a first direction;
[0025] At least two fan-out regions 102, each fan-out region 102 corresponds to a pad region 101 one-to-one, and the fan-out region 102 is disposed adjacent to the corresponding pad region 101;
[0026] For each pad area 101, a row of first pads is arranged in the pad area on the first surface of the printed circuit board 10, and a plurality of first pads 1011 in each row of first pads are arranged along a first direction; wherein each row of first pads is fixedly connected to a row of pins of the connector; and the connector includes at least one row of pins;
[0027] Each fan-out region 102 includes a plurality of rows of through-hole regions (eg Figure 2 The plurality of through holes in each row of through hole regions are arranged along a first direction; the through holes in the plurality of rows of through hole regions include a first through hole 1012 corresponding to each of the first pads 1011 one by one;
[0028] For each first solder pad 1011, the first solder pad 1011 is connected to the corresponding first through hole 1012 via a first lead 1013, and the first lead 1013 passes through a target lead channel corresponding to the first solder pad; the first lead 1013 is arranged on the first surface, and the first lead 1013 is a curve; wherein the target lead channel is one of the multiple lead channels 105.
[0029] In this embodiment, the printed circuit board can be divided into at least two pad areas 101 and at least two fan-out areas 102. The pad area is used to set a plurality of pads. The pads can be, for example, rectangular pads with long sides extending along the second direction. Multiple rows of first through holes 1012 can be set in the fan-out area 102.
[0030] The printed circuit board may include a first surface, a second surface, and a multi-layer printed circuit board disposed between the first surface and the second surface. Signal lines may be embedded in different layers of the printed circuit board.
[0031] The pad area of the printed circuit board can be provided with pads for connecting with any connector. The above connector includes one of the following types of connectors: RF connector, fiber optic interface connector, power connector, etc. In some application scenarios, the connector can be a fiber optic interface connector. The fiber optic interface connector is used to connect the optical module to the printed circuit board.
[0032] In some embodiments, at least two pad regions 101 are arranged along the second direction, and the first direction and the second direction are perpendicular to each other;
[0033] Each pad region 101 includes a row of first pads 1011 disposed on the first surface.
[0034] In these embodiments, the printed circuit board may be provided with at least two pad regions 101 arranged along the second direction, and each pad region 101 may include a plurality of pads 1011 arranged along the first direction.
[0035] The first pad 1011 of each pad area 101 in the at least two pad areas arranged along the second direction is used to connect with the pin of the connector. The connector may include at least one row of pins. The printed circuit board may be provided with pads connected with the pins of multiple connectors.
[0036] The connector may be a four-channel connector or an eight-channel connector (Octagon Small Form-factor Pluggable, OSFP).
[0037] In this embodiment, at least two pad areas 101 may be provided in the first surface of the printed circuit board, and each pad area 101 is provided with a row of first pads. The first through holes 1012 provided in the fan-out area 102 of the first surface correspond to the first pads 1011 one by one. For each first pad 1011, a first lead 1013 is provided between the first pad 1011 and the corresponding first through hole 1012 in the first surface. The first lead may be provided as a curve. The first lead may be provided as a curve to reduce interference between the first lead and signals transmitted by other signal lines.
[0038] In this embodiment, in order to use through holes as lead fan-out through holes to reduce the manufacturing complexity of the printed circuit board and reduce costs, and to enable the signal lines inside the multiple rows of first pads to be led out from the internal area of the pads, in the fan-out area corresponding to each pad area, the through holes corresponding to the multiple pads in the pad area are arranged in multiple rows in this solution, thereby reducing the density of the through holes arranged in the first direction. Multiple lead channels can be arranged in the fan-out area, and the fan-out leads are led out from the corresponding target lead channels. Since the density of the through holes distributed along the first direction is reduced, an internal signal line area extending along the second direction can be formed inside the multiple rows of through holes, which helps to reduce the crosstalk between the signals transmitted on the signal lines.
[0039] In some embodiments, please continue to combine Figure 1 and Figure 2 For each pad area 101, the pad area 101 includes a symmetrical first pad sub-area 1010 and a second pad sub-area 1010', and the fan-out area 102 corresponding to the pad area 101 includes a symmetrical first fan-out sub-area 103 and a second fan-out sub-area 104, wherein,
[0040] The first pad distribution in the first pad sub-region 1010 is mirror-symmetrical to the first pad distribution in the second pad sub-region 1010 ′; and
[0041] The distribution of the lead channels in the first fan-out sub-region 103 and the first leads 1013 in the lead channels are mirror-symmetrical to the distribution of the lead channels in the second fan-out sub-region 104 and the first leads 1013 in the lead channels.
[0042] For each pad region 101, the first pad sub-region 1010 and the second pad sub-region 1010' in the pad region 101 are symmetrical about the center line of the pad region 101. The distribution of the first pads in the first pad sub-region 1010 and the distribution of the first pads in the second pad sub-region 1010' are mirror-symmetrical, for example, mirror-symmetrical about the center line of the pad region.
[0043] In these embodiments, by setting the first solder sub-area and the second solder sub-area in the solder pad area, the distribution of the first solder pad in the first solder sub-area and the distribution of the first solder pad in the second solder sub-area are mirror-symmetrical, and the lead channel distribution and the first lead in the first fan-out sub-area and the second fan-out sub-area in the fan-out area are mirror-symmetrical, the process complexity of the printed circuit board can be further simplified and the production cost of the printed circuit board can be reduced.
[0044] In some embodiments, the first fan-out sub-region includes a first lead channel, a second lead channel, and a third lead channel, wherein:
[0045] The first lead channel is located at the center of the first area, and the second lead channel and the third lead channel are located at two edge areas of the first area;
[0046] A width of the second lead channel and a width of the third lead channel are smaller than a width of the first lead channel.
[0047] Please continue to refer to Figure 3 , Figure 3 Schematic diagram of the first fan-out sub-region. The first fan-out sub-region 103 includes a first lead channel 1051 located in the central region of the first fan-out sub-region 103 and a second lead channel 1052 and a third lead channel 1053 located in two edge regions extending along the second direction of the first fan-out sub-region 103. The widths of the second lead channel 1052 and the third lead channel 1053 are smaller than the width of the first lead channel 1051.
[0048] In these embodiments, since the width of the first lead channel is greater than the widths of the second lead channel and the third lead channel, and no through hole is provided in the first lead channel, a fan-out lead can be provided in the first lead channel, and a signal line can also be provided in the first lead channel, such as a signal line provided in a different printed circuit board layer, etc. Interference between fan-out leads and interference between signal lines can be reduced.
[0049] In some embodiments, the first solder sub-region includes a first group of first solder pads, a second group of first solder pads, a third group of first solder pads, and a fourth group of first solder pads arranged along a first direction;
[0050] The second lead channel 1052 includes a first sub-channel 10521, a second sub-channel 10522 and a third sub-channel 10523, wherein the first sub-channel 10521 is composed of a blank area between the first group of first pads 1 and a row of first through holes adjacent to the first pad sub-region 10121;
[0051] The second sub-channel 10522 is composed of a first edge region of the first fan-out sub-region extending along the second direction;
[0052] The third sub-channel 10523 is composed of a blank area between an area 10123 where a group of first through holes corresponding to the first group of first pads 1 are located and an area 10122 where a row of through holes adjacent to the group of first through holes are located, wherein the first sub-channel and the third sub-channel extend along the first direction.
[0053] The plurality of first pads in the first pad sub-area 103 are divided into a plurality of groups, such as a first pad group 1 arranged in a first direction, a second pad group 2, a third pad group 3 and a fourth pad group 4. Each group of pads is used to connect to a pair of differential signal pins of a connector. The first through holes corresponding to each group of first pads include a group of first through holes. The plurality of groups of first through holes may be located in different rows. The plurality of groups of first through holes are staggered.
[0054] In these embodiments, the first edge region of the first fan-out sub-region can be used to form a second lead channel, and the fan-out leads corresponding to the first group of first pads can be routed in the first edge region, which can reduce the density of the fan-out leads and help reduce interference between signals.
[0055] In some embodiments, the first lead channel is used to set the first leads corresponding to the second group of first pads.
[0056] In these embodiments, the first lead channel 1051 is located at the center of the first fan-out sub-region, and the first lead channel 1051 is used to set two first leads corresponding to the second group of first pad groups 2. In addition, the first lead channel 1051 can also set fan-out leads located on the first surface.
[0057] In some embodiments, the third lead channel 1053 includes a fourth sub-channel 10531, a fifth sub-channel 10532, and a sixth sub-channel 10533, wherein:
[0058] The fourth sub-channel 10531 is composed of a blank area between the fourth group of first pad group 4 and an area 10121 where a row of through holes adjacent to the first pad sub-area is located;
[0059] The fifth sub-channel is composed of a second edge region of the first fan-out sub-region extending along the second direction; the second edge region here is a right edge region of the first fan-out sub-region.
[0060] The sixth sub-channel 10533 is composed of a blank area between an area 10122 where a group of first through holes corresponding to the fourth group of first pad groups 4 are located and an area 10121 where a row of through holes adjacent to the group of first through holes are located.
[0061] In these embodiments, the second edge region of the first fan-out sub-region can be used to form a third lead channel, and the fan-out leads corresponding to the fourth group of first pads can be routed in the second edge region, which can reduce the density of the fan-out leads and help reduce interference between signals.
[0062] In some embodiments, the plurality of rows of through holes disposed on one side of the first pad sub-region include a first row of through holes (row 1), a second row of through holes (row 2), and a third row of through holes (row 3) disposed in the first fan-out sub-region 103, wherein the distances between the first row of through holes (row 1), the second row of through holes (row 2), and the third row of through holes (row 3) and the pad region are increased in sequence;
[0063] The first through hole corresponding to the first welding group 1 is located in the third row of through holes (row 3) and is adjacent to the first edge area.
[0064] The first lead connecting the first group of first pads (group 1) and the corresponding first through hole is a first curve, and the first curve is located in the second lead channel. The first through hole corresponding to the first group of first pads (group 1) is located in the third row of through holes and adjacent to the first edge area.
[0065] For each pad region 101, a corresponding fan-out region 102 may be provided on one side of the pad region. The plurality of rows of through holes arranged along the second direction provided in the fan-out region 102 include a first row of through holes (row 1), a second row of through holes (row 2) and a third row of through holes (row 3).
[0066] The first through hole corresponding to the second group of first pads group 2 is located in the third row of through holes (row 3);
[0067] The first lead connecting the second group of first pads 2 and the corresponding first through hole is a second curve, and the second curve is located in the first lead channel.
[0068] The first through hole corresponding to the third group of first pads 3 is located in the first row of through holes (row 1), and the first lead between the third group of first pads 3 and the corresponding first through hole is arranged in the area between the first row of through holes and the third group of first pads.
[0069] The first through holes corresponding to the fourth group of first pads 4 are located in the second row of through holes (row 2);
[0070] The first lead connecting the fourth group of first pads 4 and the corresponding first through holes is a third curve, and the third curve is located in the third lead channel.
[0071] The first curve, the second curve and the third curve are not parallel to each other.
[0072] In these embodiments, the plurality of first pads in the first pad sub-region are divided into a plurality of groups, and each group of first pads is respectively provided with a group of first through holes. Each first pad in each group of first pads can be connected to the corresponding first through hole through a first lead. The first leads corresponding to each first pad in each group of first pads can be parallel to each other.
[0073] The first leads between different groups of first pads and the corresponding first through holes are not parallel to each other, so as to reduce the interference of signals transmitted on the first leads corresponding to different groups of first pads.
[0074] By setting corresponding positions for the first through holes corresponding to each group of first solder pads, and setting lead channels where the first leads connecting each group of first solder pads and the corresponding first through holes are located, the lead fan-out of each group of first solder pads can be reasonably configured, and the number of through holes distributed along the first direction can be reduced. The signal lines can be internally transmitted through each row of solder pads, so that the leads can be fanned out through the through holes in the printed circuit board, reducing the complexity of the manufacturing process of the printed circuit board and reducing the cost of the printed circuit board.
[0075] Combine the following Figure 1 , Figure 4 , Figure 4 The schematic diagram of the second surface of the printed circuit board is shown. The second surface of the printed circuit board 10 includes a plurality of pad areas 201 arranged along a first direction, and each pad area 201 corresponds to a fan-out area 202 arranged on one side of the pad area. The fan-out area 202 corresponding to each pad area 201 includes a plurality of lead channels and a plurality of rows of through holes. In the first surface of the printed circuit board, each pad area is provided with a row of a plurality of first pads arranged along the first direction.
[0076] The multiple rows of through holes of the printed circuit board include first through holes corresponding to the first pads one by one. The multiple first through holes are located in different rows. The first through holes are connected to the corresponding first pads through first leads to complete the fan-out of the first pads.
[0077] The multiple rows of pads in the first surface can be used to connect to multiple connectors.
[0078] In order to increase the carrying capacity of the connector, the printed circuit board can be connected with more signal modules.
[0079] On the second surface of the printed circuit board, for each pad area 201, a row of second pads 2011 is arranged in the pad area of the second surface of the printed circuit board, and a plurality of second pads in each row of second pads are arranged along the first direction; wherein each row of second pads 2011 is fixedly connected to a row of pins of the connector; and the connector includes at least two rows of pins;
[0080] The multiple rows of through holes in each fan-out region 202 include a second through hole corresponding to each second pad one by one;
[0081] Each fan-out area includes a plurality of lead channels located on the second surface. For each second pad, the second pad is connected to the corresponding second through hole via a second lead, and the second lead passes through a target lead channel in the second surface corresponding to the second pad. The second lead is arranged on the second surface, and the second lead is a curve. Each lead channel in the second surface corresponds to a lead channel in the first surface, and a projection of the lead channel in the second surface onto the first surface coincides with the lead channel corresponding to the first surface.
[0082] In this embodiment, each row of second pads is used for fixed connection with a row of pins of the connector. The fixed connection may be, for example, welding.
[0083] For each pad area 201, a fan-out area 202 is provided on one side of the pad area 201 on the second surface. The fan-out area 202 includes a symmetrical third fan-out sub-area 203 and a fourth fan-out sub-area 204. The projections of the third fan-out sub-area 203 and the fourth fan-out sub-area 204 onto the first surface overlap with the first fan-out sub-area 103 and the second fan-out sub-area 104, respectively.
[0084] Each pad region 201 may include a third pad sub-region 2010 and a fourth pad sub-region 2010' on the second surface which are centrally symmetrical, wherein a projection of the third pad sub-region onto the first surface overlaps with a first pad sub-region 1010 in the pad region, and a projection of each second pad in the third pad sub-region onto the first surface overlaps with a corresponding first pad in the first pad sub-region. A projection of the fourth pad sub-region 2010' onto the first surface overlaps with a second pad sub-region 1010' in the pad region, and each second pad in the fourth pad sub-region overlaps with a corresponding first pad in the second pad sub-region 1010'.
[0085] For each pad area 201, the pad area 201 includes a symmetrical third fan-out sub-area 203 and a fourth fan-out sub-area 204 in the corresponding fan-out area 202 on the second surface, and the projections of the third fan-out sub-area 204 and the fourth fan-out sub-area 204 onto the first surface overlap with the first fan-out sub-area 103 and the second fan-out sub-area 104, respectively. Since the third fan-out sub-area and the fourth fan-out sub-area are symmetrical in center, the third fan-out sub-area can be used for description. Figure 5 As shown, Figure 5 The third fan-out sub-region 203 includes multiple rows of through holes, such as a first row of channel rows 1 , a second row of through hole rows 2 , and a third row of through hole rows 3 , each row of through holes includes multiple second through holes 2012 .
[0086] In the second surface, for each third fan-out sub-region 203, the third fan-out sub-region 203 includes a fourth lead channel, a fifth lead channel and a sixth lead channel, wherein the fourth lead channel, the fifth lead channel and the sixth lead channel correspond to the first lead channel, the second lead channel and the second lead channel in the first fan-out sub-region of the first surface, respectively. Accordingly, the fourth lead channel is located at the center of the third fan-out sub-region. The fifth lead channel is located at the first edge of the third fan-out sub-region, and the sixth lead channel is located at the second edge of the third fan-out sub-region. Arranging the lead channel in the same area of different surfaces can simplify the manufacturing process of the printed circuit board on the one hand, and on the other hand, the same area is used as the lead channel on the first surface and the second surface, so that through holes will not be arranged in these areas, which is conducive to arranging signal lines and fan-out leads in these areas.
[0087] In some embodiments, each pad region includes a symmetrical third pad sub-region 2010 and a fourth pad sub-region 2010 ′ in the second surface;
[0088] The plurality of second pads in each third pad sub-region 2010 are divided into a first group of second pads, a second group of second pads, a third group of second pads and a fourth group of second pads arranged along the first direction, wherein:
[0089] The projection of the second lead connecting the first group of second pads and the corresponding second through holes onto the first surface is mirror-symmetrical to the first lead connecting the fourth group of first pads and the corresponding first through holes;
[0090] The projection of the second leads connected between the fourth group of second pads and the corresponding second through holes onto the first surface is mirror-symmetric to the first leads connected between the first group of first pads and the corresponding first through holes.
[0091] In each row of through holes, the first through holes and the second through holes are arranged alternately. Figure 6 As shown, Figure 6 Schematic diagram of projection of the third solder sub-area and the third fan-out sub-area onto the first surface. The shaded ones are the first through holes, and the unshaded ones are the second through holes. In each row of through holes, each group of first through holes and each group of second through holes are arranged alternately. Signal crosstalk in the leads on the same surface can be avoided.
[0092] like Figure 5 As shown, the first group of second pads, the second group of second pads, the third group of second pads and the fourth group of second pads are respectively Figure 5 The second pads of each group may include at least one second pad, for example, two second pads.
[0093] The projections of the first group of second pads (group 5), the second group of second pads (group 6), the third group of second pads (group 7) and the fourth group of second pads (group 8) onto the first surface coincide with the first group of first pads (group 1), the second group of second pads (group 2), the third group of second pads (group 3) and the fourth group of first pads (group 4), respectively, as shown in FIG. Figure 6 That is, the first pad on the first surface and the second pad on the second surface in the pad region can be arranged at the same position in the pad region.
[0094] The projection 2061 of the second leads between the first group of second pads (group 5) and the corresponding second through holes on the first surface is mirror-symmetric to the first leads 1063 between the fourth group of first pads (group 4) and the corresponding first through holes.
[0095] The projection 2063 of the second lead between the fourth group of second pads (group 8) and the corresponding second through hole on the first surface is mirror-symmetric to the first lead 1061 between the first group of first pads group 1 and the corresponding first through hole.
[0096] By mirror-symmetrically arranging the second leads corresponding to the first group of second solder pads and the first leads corresponding to the fourth group of first solder pads, and mirror-symmetrically arranging the second leads corresponding to the fourth group of second solder pads and the first leads corresponding to the first group of first solder pads, the complexity of the manufacturing process of the printed circuit board can be further reduced.
[0097] In addition, the second lead between the third group of second pads (group 7) and the corresponding second through hole is a fourth curve, and the fourth curve is located in the fourth lead channel.
[0098] The projection 2062 of the fourth curve onto the first surface does not coincide with the second curve 1062 and has a different extension direction from the second curve.
[0099] That is, the fourth curve and the second curve 1062 are both arranged at the center of the fan-out region. In order to avoid signal interference, the fourth curve and the second curve may be arranged in different extension directions.
[0100] In some embodiments, each row of multiple through holes includes multiple groups of first through holes and multiple groups of second through holes, and each group of first through holes and each group of second through holes, as well as different groups of first through holes and different groups of second through holes are shielded by multiple grounding holes.
[0101] Please refer to Figure 7 , Figure 7 A partial structural diagram of the fan-out area with shielding holes. Figure 7 This is a schematic diagram of the structure of the first fan-out sub-area, and other fan-out sub-areas are similar. Figure 7 In the first fan-out region, ground shielding holes 107 may be used for two adjacent groups of through holes 1012 or 2012 .
[0102] In order to save the area occupied by the ground shielding holes 107, in the first row of through holes (row 1) and the second row of through holes (row 2), a plurality of ground shielding holes 107 arranged in a C shape are provided for each group of through holes.
[0103] In the third row of through holes, multiple rows of ground shielding holes 107 arranged in a vertical direction may be used to achieve a better shielding effect.
[0104] In some embodiments, each group of first through holes and each group of second through holes respectively include two differential lead through holes, and the two differential lead through holes are used to transmit differential signals.
[0105] In these embodiments, a group of first pads corresponding to each group of first through holes may include two first pads, and a group of second pads corresponding to each group of second through holes may include two second pads. Each group of first pads is connected to a pair of differential signal output pins of a connector. Each group of second pads is respectively connected to a pair of differential signal output pins of a connector. It can be understood that the first leads corresponding to the two pads in each group of first pads transmit differential signals, and the two first leads can be parallel to each other to achieve a better differential signal transmission effect. Similarly, the second leads corresponding to the two pads in each group of second pads are parallel to each other.
[0106] In some embodiments, please refer to Figure 8 , Figure 8 This is a schematic diagram of the lead fan-out corresponding to a row of pads close to the positioning holes.
[0107] For a row of first pads close to the positioning holes 30 , the shapes of the positioning holes and the fan-out regions of the row of pads can be used to set lead channels and multiple rows of through holes.
[0108] The pad area may include a first pad sub-area and a second pad sub-area that are symmetrical. The first pad sub-area 1010 is taken as an example for description.
[0109] The plurality of first pads in the first pad sub-region 1010 are divided into a first pad group 1, a second pad group 2, a third pad group 3 and a fourth pad group 4. The first fan-out sub-region 103 corresponding to the first pad sub-region is disposed on one side of the row of first pads away from other rows of pads.
[0110] The corresponding first fan-out sub-region 103 may be provided with multiple rows of through holes (such as through holes shown in rows 1, 2 and 3), and the multiple rows of through holes include the first through hole. The lead channels in the fan-out region 103 may include a seventh lead channel 108 close to the positioning hole, and an eighth lead channel 109 arranged in the middle of the first fan-out sub-region 103.
[0111] The first leads corresponding to the first group of first solder pads (group 1) in the row of first solder pads are routed using the blank area between the row of solder pads and the positioning holes.
[0112] The second group of first pads (Group 2) may be provided with first leads through the seventh lead channel 108, and the first through holes corresponding to the second group of first pads may be provided in the third row of through holes (Row 3).
[0113] The first leads corresponding to the third group 3 of first pads in the row of first pads are routed using the blank area between the row of pads and the through-hole area.
[0114] The fourth group of first pads 4 may be provided with first leads through the eighth lead channel 109 , and the first through holes corresponding to the fourth group of first pads may be provided in the third row of through holes 3 .
[0115] Please refer to Fig. 9 , Fig. 9 Schematic diagram of the structure of an electronic device provided by an embodiment of the present disclosure. The electronic device includes a printed circuit board 91 and a connector 92. The printed circuit board 91 can be as follows: Figures 1 to 8 The printed circuit board shown in the embodiment shown. The connector 92 can be a multi-channel connector. A plurality of first pads 1011 can be provided on the first surface 911 of the printed circuit board 91, and a second pad 2011 can be provided on the second surface 912 of the printed circuit board 91. The first pad 1011 can be connected to the pin of the connector 92 corresponding to the first surface, and the second pad 2011 can be connected to the pin of the connector 92 corresponding to the second surface. The technical solution of this solution is re-recorded as follows:
[0116] In a first aspect, according to one or more embodiments of the present disclosure, there is provided a printed circuit board, comprising:
[0117] At least two pad regions, each pad region extending along a first direction;
[0118] At least two fan-out areas, each fan-out area corresponds to a pad area one-to-one, and the fan-out area is arranged adjacent to the corresponding pad area;
[0119] For each pad area, a row of first pads is arranged in the pad area on the first surface of the printed circuit board, and a plurality of first pads in each row of first pads are arranged along a first direction; wherein each row of first pads is fixedly connected to a row of pins of the connector; and the connector includes at least one row of pins;
[0120] Each fan-out region includes multiple rows of through holes and multiple lead channels, and multiple through holes in each row of through holes are arranged along a first direction; the multiple rows of through holes include first through holes corresponding to each first pad one by one;
[0121] For each first pad, the first pad is connected to the corresponding first through hole via a first lead, and the first lead passes through a target lead channel corresponding to the first pad; the first lead is arranged on the first surface, and the first lead is a curve; wherein the target lead channel is one of the multiple lead channels.
[0122] According to one or more embodiments of the present disclosure, at least one pad region includes a plurality of pad regions arranged along a second direction, and the first direction and the second direction are perpendicular to each other;
[0123] Each pad region includes a row of first pads arranged on the first surface.
[0124] According to one or more embodiments of the present disclosure, for each pad area, the pad area includes a symmetrical first pad sub-area and a second pad sub-area, and the fan-out area corresponding to the pad area includes a symmetrical first fan-out sub-area and a second fan-out sub-area, wherein:
[0125] The first pad distribution in the first pad sub-region is mirror-symmetrical to the first pad distribution in the second pad sub-region; and
[0126] The distribution of the lead channels in the first fan-out sub-region and the first leads in the lead channels are mirror-symmetrical to the distribution of the lead channels in the second fan-out sub-region and the distribution of the first leads in the lead channels.
[0127] According to one or more embodiments of the present disclosure, the first fan-out sub-region includes a first wiring channel, a second wiring channel, and a third wiring channel, wherein:
[0128] The first lead channel is located at the center of the first fan-out sub-region, and the second lead channel and the third lead channel are located at two edge regions of the first fan-out sub-region;
[0129] A width of the second lead channel and a width of the third lead channel are smaller than a width of the first lead channel.
[0130] According to one or more embodiments of the present disclosure, the first solder sub-region includes a first group of first solder pads, a second group of first solder pads, a third group of first solder pads, and a fourth group of first solder pads arranged along a first direction;
[0131] The second lead channel includes a first sub-channel, a second sub-channel and a third sub-channel, wherein the first sub-channel is composed of a blank area between the first group of first pads and an area where a row of through holes adjacent to the first pad area is located;
[0132] The second sub-channel is composed of a first edge region of the first fan-out sub-region extending along the second direction;
[0133] The third subchannel is composed of a blank area between an area where a group of first through holes corresponding to the first group of first pads are located and an area where a row of through holes adjacent to the group of first through holes are located; the first subchannel and the third subchannel extend along the first direction.
[0134] According to one or more embodiments of the present disclosure, the third lead channel includes a fourth sub-channel, a fifth sub-channel and a sixth sub-channel, wherein:
[0135] The fourth sub-channel is composed of a blank area between the fourth group of first pads and an area where a row of through holes adjacent to the first pad area is located;
[0136] The fifth sub-channel is composed of a second edge region of the first fan-out sub-region extending along the second direction;
[0137] The sixth sub-channel is composed of a blank area between an area where a group of first through holes corresponding to the fourth group of first pads are located and an area where adjacent rows of through holes of the group of first through holes are located.
[0138] According to one or more embodiments of the present disclosure, the first lead channel is used to set the first leads corresponding to the second group of first pads.
[0139] According to one or more embodiments of the present disclosure, the plurality of rows of through holes arranged on one side of the first pad sub-region include a first row of through holes, a second row of through holes, and a third row of through holes arranged in the first fan-out sub-region, wherein the distances between the first row of through holes, the second row of through holes, and the third row of through holes and the pad region increase in sequence;
[0140] The first through hole corresponding to the first pad of the first group is located in the third row of through holes and is adjacent to the first edge area.
[0141] The first lead connecting the first group of first pads and the corresponding first through holes is a first curve, and the first curve is located in the second lead channel.
[0142] According to one or more embodiments of the present disclosure, the first through holes corresponding to the second group of first pads are located in the third row of through holes;
[0143] The first lead connecting the second group of first pads and the corresponding first through holes is a second curve, and the second curve is located in the first lead channel.
[0144] According to one or more embodiments of the present disclosure, the first through holes corresponding to the third group of first pads are located in the first row of through holes, and the first leads between the third group of first pads and the corresponding first through holes are arranged in the area between the first row of through holes and the third group of first pads.
[0145] According to one or more embodiments of the present disclosure, the first through holes corresponding to the fourth group of first pads are located in the second row of through holes;
[0146] The first lead connecting the fourth group of first pads and the corresponding first through holes is a third curve, and the third curve is located in the third lead channel.
[0147] According to one or more embodiments of the present disclosure, the present invention further includes:
[0148] For each pad area, a row of second pads is arranged in the pad area on the second surface of the printed circuit board, and a plurality of second pads in each row of second pads are arranged along the first direction; wherein each row of second pads is fixedly connected to a row of pins of the connector;
[0149] The multiple rows of through holes in each fan-out region include a second through hole corresponding to each second pad one by one;
[0150] Each fan-out area includes a plurality of lead channels located on the second surface. For each second pad, the second pad is connected to the corresponding second through hole via a second lead, and the second lead passes through a target lead channel in the second surface corresponding to the second pad. The second lead is arranged on the second surface, and the second lead is a curve. Each lead channel in the second surface corresponds to a lead channel in the first surface, and a projection of the lead channel in the second surface onto the first surface coincides with the lead channel corresponding to the first surface.
[0151] According to one or more embodiments of the present disclosure, a projection of each second solder pad in each row of second solder pads onto the first surface overlaps with a corresponding first solder pad in a row of first solder pads.
[0152] According to one or more embodiments of the present disclosure, the fan-out area in the second surface includes a symmetrical third fan-out sub-area and a fourth fan-out sub-area, and projections of the third fan-out sub-area and the fourth fan-out sub-area onto the first surface overlap with the first fan-out sub-area and the second fan-out sub-area, respectively;
[0153] For each third fan-out sub-region, the third fan-out sub-region includes a fourth lead channel, a fifth lead channel and a sixth lead channel, wherein,
[0154] The fourth lead channel, the fifth lead channel and the sixth lead channel respectively correspond to the first lead channel, the second lead channel and the second lead channel in the first fan-out sub-region of the first surface.
[0155] According to one or more embodiments of the present disclosure, each pad region includes a symmetrical third pad sub-region and a fourth pad sub-region in the second surface;
[0156] The plurality of second pads in each third pad sub-region are divided into a first group of second pads, a second group of second pads, a third group of second pads and a fourth group of second pads arranged along the first direction, wherein:
[0157] The projection of the second lead connected between the first group of second pads and the corresponding second through holes onto the first surface is mirror-symmetrical to the first lead connected between the fourth group of first and corresponding first through holes;
[0158] The projection of the second lead connecting the fourth group of second pads and the corresponding second through holes onto the first surface is mirror-symmetrical to the first lead connecting the first group of first pads and the corresponding first through holes;
[0159] The second lead between the third group of second pads and the corresponding second through holes is a fourth curve, and the fourth curve is located in the fourth lead channel.
[0160] The projection of the fourth curve onto the first surface does not overlap with the second curve, and the fourth curve and the second curve have different extending directions.
[0161] According to one or more embodiments of the present disclosure, each row of multiple through holes includes multiple groups of first through holes and multiple groups of second through holes, and each group of first through holes and each group of second through holes, as well as different groups of first through holes and different groups of second through holes are shielded by multiple grounding holes.
[0162] According to one or more embodiments of the present disclosure, each group of first through-holes and each group of second through-holes respectively include two differential lead through-holes, and the two differential lead through-holes are used to transmit differential signals.
[0163] In a second aspect, according to one or more embodiments of the present disclosure, there is provided an electronic device, including a printed circuit board and a connector, wherein the printed circuit board is the printed circuit board of the first aspect and various possible designs.
[0164] The above description is only a preferred embodiment of the present disclosure and an explanation of the technical principles used. Those skilled in the art should understand that the scope of disclosure involved in the present disclosure is not limited to the technical solutions formed by a specific combination of the above technical features, but should also cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the above disclosed concept. For example, the above features are replaced with the technical features with similar functions disclosed in the present disclosure (but not limited to) by each other to form a technical solution.
[0165] In addition, although each operation is described in a specific order, this should not be understood as requiring these operations to be performed in the specific order shown or in a sequential order. Under certain circumstances, multitasking and parallel processing may be advantageous. Similarly, although some specific implementation details are included in the above discussion, these should not be interpreted as limiting the scope of the present disclosure. Some features described in the context of a separate embodiment can also be implemented in a single embodiment in combination. On the contrary, the various features described in the context of a single embodiment can also be implemented in multiple embodiments individually or in any suitable sub-combination mode.
[0166] Although the subject matter has been described in language specific to structural features and / or methodological logical actions, it should be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or actions described above. On the contrary, the specific features and actions described above are merely example forms of implementing the claims.
Claims
1. A printed circuit board, It is characterized in that include: At least two pad areas, each of the pad areas extending along a first direction; at least two fan-out regions, each of which corresponds to one of the pad regions one by one, and the fan-out region is disposed adjacent to the corresponding pad region; For each of the pad areas, a row of first pads is arranged in the pad area on the first surface of the printed circuit board, and a plurality of first pads in each row of the first pads are arranged along the first direction; wherein each row of the first pads is fixedly connected to a row of pins of a connector; and the connector includes at least one row of pins; Each of the fan-out regions includes a plurality of rows of through holes and a plurality of lead channels, and the plurality of through holes in each row of through holes are arranged along the first direction; the plurality of rows of through holes include a first through hole corresponding to each of the first pads one by one; For each of the first pads, the first pad is connected to the corresponding first through hole via a first lead, and the first lead passes through a target lead channel corresponding to the first pad; the first lead is arranged on the first surface, and the first lead is a curve; wherein the target lead channel is one of the multiple lead channels.
2. The printed circuit board according to claim 1, It is characterized in that The at least two pad areas are arranged along a second direction, and the first direction and the second direction are perpendicular to each other; Each of the pad regions includes a row of the first pads arranged on the first surface.
3. The printed circuit board according to claim 1, It is characterized in that For each of the pad regions, the pad region includes a symmetrical first pad sub-region and a second pad sub-region, and the fan-out region corresponding to the pad region includes a symmetrical first fan-out sub-region and a second fan-out sub-region, wherein: The first pad distribution in the first pad sub-region is mirror-symmetrical to the first pad distribution in the second pad sub-region; and The distribution of the lead channels in the first fan-out sub-region and the first leads in the lead channels are mirror-symmetrical to the distribution of the lead channels in the second fan-out sub-region and the distribution of the first leads in the lead channels.
4. The printed circuit board according to claim 3, It is characterized in that The first fan-out sub-area includes a first lead channel, a second lead channel and a third lead channel, wherein: The first lead channel is located at the center of the first fan-out sub-region, and the second lead channel and the third lead channel are located at two edge regions of the first fan-out sub-region; A width of the second lead channel and a width of the third lead channel are smaller than a width of the first lead channel.
5. The printed circuit board according to claim 4, It is characterized in that The first solder sub-region includes a first group of first solder pads, a second group of first solder pads, a third group of first solder pads and a fourth group of first solder pads arranged along the first direction; The second lead channel includes a first sub-channel, a second sub-channel and a third sub-channel, wherein the first sub-channel is composed of a blank area between the first group of first pads and an area where a row of through holes adjacent to the first pad area is located; The second sub-channel is composed of a first edge region of the first fan-out sub-region extending along the second direction; The third sub-channel is composed of a blank area between an area where a group of first through holes corresponding to the first group of first pads are located and an area where a row of through holes adjacent to the group of first through holes are located; the first sub-channel and the third sub-channel extend along the first direction.
6. The printed circuit board according to claim 5, It is characterized in that The third lead channel includes a fourth sub-channel, a fifth sub-channel and a sixth sub-channel, wherein: The fourth sub-channel is composed of a blank area between the fourth group of first pads and an area where a row of through holes adjacent to the first pad sub-area is located; The fifth sub-channel is composed of a second edge region of the first fan-out sub-region extending along the second direction; The sixth sub-channel is composed of a blank area between an area where a group of first through holes corresponding to the fourth group of first pads are located and an area where adjacent rows of through holes of the group of first through holes are located.
7. The printed circuit board according to claim 5, It is characterized in that The first lead channel is used to set the first lead corresponding to the second group of first pads.
8. The printed circuit board according to claim 7, It is characterized in that The multiple rows of through holes arranged on one side of the first solder pad sub-region include a first row of through holes, a second row of through holes and a third row of through holes arranged in the first fan-out sub-region, wherein the distances between the first row of through holes, the second row of through holes and the third row of through holes and the solder pad region are increased in sequence; The first through hole corresponding to the first group of first pads is located in the third row of through holes and is adjacent to the first edge area. The first lead connecting the first group of first pads and the corresponding first through hole is a first curve, and the first curve is located in the second lead channel.
9. The printed circuit board according to claim 8, It is characterized in that The first through holes corresponding to the second group of first pads are located in the third row of through holes; The first lead connecting the second group of first pads and the corresponding first through holes is a second curve, and the second curve is located in the first lead channel.
10. The printed circuit board according to claim 8, It is characterized in that The first through holes corresponding to the third group of first pads are located in the first row of through holes, and the first leads between the third group of first pads and the corresponding first through holes are arranged in the area between the first row of through holes and the third group of first pads.
11. The printed circuit board according to claim 9, It is characterized in that The first through holes corresponding to the first pads of the fourth group are located in the second row of through holes; The first lead connecting the fourth group of first pads and the corresponding first through holes is a third curve, and the third curve is located in the third lead channel.
12. The printed circuit board according to claim 8, It is characterized in that Also includes: For each of the pad areas, a row of second pads is provided in the pad area on the second surface of the printed circuit board, and a plurality of second pads in each row of second pads are arranged along the first direction; wherein each row of second pads is fixedly connected to a row of pins of the connector; The multiple rows of through holes in each of the fan-out regions include a second through hole corresponding to each of the second pads one by one; Each of the fan-out areas includes a plurality of lead channels located on the second surface. For each second pad, the second pad is connected to the corresponding second through hole via a second lead, and the second lead passes through a target lead channel in the second surface corresponding to the second pad. The second lead is arranged on the second surface, and the second lead is a curve. Each lead channel in the second surface corresponds to a lead channel in the first surface, and a projection of the lead channel in the second surface onto the first surface coincides with the lead channel corresponding to the first surface.
13. The printed circuit board according to claim 12, It is characterized in that A projection of each second solder pad in each row of second solder pads onto the first surface overlaps with a corresponding first solder pad in a row of first solder pads.
14. The printed circuit board according to claim 13, It is characterized in that The fan-out area in the second surface includes a symmetrical third fan-out sub-area and a fourth fan-out sub-area, and projections of the third fan-out sub-area and the fourth fan-out sub-area onto the first surface overlap with the first fan-out sub-area and the second fan-out sub-area respectively; For each third fan-out sub-region, the third fan-out sub-region includes a fourth lead channel, a fifth lead channel and a sixth lead channel, wherein, The fourth lead channel, the fifth lead channel and the sixth lead channel respectively correspond to the first lead channel, the second lead channel and the second lead channel in the first fan-out sub-region of the first surface.
15. The printed circuit board according to claim 13, It is characterized in that Each pad region includes a symmetrical third pad sub-region and a fourth pad sub-region in the second surface; The plurality of second pads in each third pad sub-region are divided into a first group of second pads, a second group of second pads, a third group of second pads and a fourth group of second pads arranged along the first direction, wherein: The projection of the second lead connected between the first group of second pads and the corresponding second through holes onto the first surface is mirror-symmetrical to the first lead connected between the fourth group of first and corresponding first through holes; The projection of the second lead connecting the fourth group of second pads and the corresponding second through holes onto the first surface is mirror-symmetrical to the first lead connecting the first group of first pads and the corresponding first through holes; The second lead between the third group of second pads and the corresponding second through holes is a fourth curve, and the fourth curve is located in a fourth lead channel. The projection of the fourth curve onto the first surface does not overlap with the second curve, and the fourth curve and the second curve have different extending directions.
16. The printed circuit board according to any one of claims 1 to 15, It is characterized in that Each row of the plurality of through holes includes a plurality of groups of first through holes and a plurality of groups of second through holes, and each group of first through holes and each group of second through holes, as well as between different groups of first through holes and different groups of second through holes are shielded by a plurality of grounding holes.
17. The printed circuit board according to claim 16, It is characterized in that Each group of first through holes and each group of second through holes respectively include two differential lead through holes, and the two differential lead through holes are used to transmit differential signals.
18. An electronic device comprising a printed circuit board and a connector, in, The printed circuit board is the printed circuit board as claimed in any one of claims 1 to 17.
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