Firmware plaintext encryption method, chip, device, medium and product

Abstract

The present application discloses a firmware plaintext encryption method, chip, device, medium and product, belonging to the field of computer technology. The encryption method comprises: receiving firmware plaintext sent by a test device when the chip is powered on during the wafer test phase of the chip; encrypting the firmware plaintext based on an encryption key pre-stored in the chip to obtain firmware ciphertext, and storing the firmware ciphertext. By directly encrypting the firmware plaintext on the chip itself during the wafer test phase to obtain the firmware ciphertext and store it, the test efficiency of the chip during wafer test can be improved.

Description

Technical Field

[0001] The present application belongs to the field of computer technology, and in particular, relates to a firmware plaintext encryption method, chip, device, medium and product. Background Art

[0002] In the prior art, in order to improve the security of the firmware in the chip, it is necessary to encrypt the firmware of each chip with different keys. In addition, currently, the firmware plaintext can only be encrypted by other applications to obtain the encrypted firmware ciphertext and then written into the chip. However, due to the huge number of chips produced, the firmware ciphertext is currently mainly obtained by encrypting the firmware plaintext during the wafer testing stage of the chip through other applications, or by encrypting the firmware plaintext based on other applications before the wafer testing stage. The former will increase the wafer testing time of the chip and affect the wafer testing efficiency, and the latter will generate a large number of firmware ciphertexts, which is not conducive to the management of the firmware ciphertext. Summary of the invention

[0003] The embodiments of the present application provide a firmware plaintext encryption method, chip, device, medium and product, which can reduce the wafer testing time of the chip and improve the wafer testing efficiency.

[0004] In a first aspect, an embodiment of the present application provides a firmware plaintext encryption method, which is applied to a chip, including:

[0005] Receive the firmware plain text sent by the test equipment when the chip is powered on during the wafer test phase of the chip;

[0006] The firmware plaintext is encrypted based on an encryption key pre-stored in the chip to obtain a firmware ciphertext, and the firmware ciphertext is stored.

[0007] In a second aspect, an embodiment of the present application provides a chip, including:

[0008] A key storage module, the key storage module is used to store encryption keys and decryption keys, wherein different chips correspond to different encryption keys and decryption keys;

[0009] A firmware hardware encryption and decryption module, the firmware encryption and decryption module is electrically connected to the key storage module, and the firmware hardware encryption and decryption module is used to receive the firmware plaintext sent by the test equipment during the wafer test phase of the chip and when the chip is powered on, obtain the encryption key from the key storage module, and encrypt the firmware plaintext based on the encryption key to obtain the firmware ciphertext;

[0010] A firmware storage module, the firmware storage module is electrically connected to the firmware hardware encryption and decryption module, and the firmware storage module is used to store the decrypted ciphertext.

[0011] In a third aspect, an embodiment of the present application provides an electronic device, the device comprising:

[0012] a processor and a memory storing computer program instructions;

[0013] The processor is used to execute the firmware plaintext encryption method of the first aspect when executing computer program instructions.

[0014] In a fourth aspect, an embodiment of the present application provides a computer storage medium having computer program instructions stored thereon, and when the computer program instructions are executed by a processor, the firmware plaintext encryption method of the above-mentioned first aspect is implemented.

[0015] In a fifth aspect, an embodiment of the present application provides a computer program product, including a computer program, which, when processed by a processor, implements the firmware plaintext encryption method of the above-mentioned first aspect.

[0016] The embodiments of the present application provide a firmware plaintext encryption method, chip, device, medium and product. The chip encrypts the firmware plaintext based on a pre-stored encryption key to obtain firmware ciphertext and store the firmware ciphertext. Encrypting the firmware plaintext by the chip to obtain the firmware ciphertext can simplify the steps of encrypting the firmware plaintext during the wafer testing phase of the chip in the prior art, thereby improving the wafer testing efficiency of the chip. In addition, the firmware plaintext is encrypted based on the chip itself to obtain the firmware ciphertext, and no additional firmware ciphertext is generated outside the chip. There is no need for users to manage the firmware ciphertext additionally, thereby saving labor costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solution of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0018] Figure 1 A flowchart of a firmware plaintext encryption method provided for some embodiments of the present application.

[0019] Figure 2 A flowchart of another firmware plaintext encryption method provided for some embodiments of the present application.

[0020] Figure 3 A flowchart of another firmware plaintext encryption method provided for some embodiments of the present application.

[0021] Figure 4 A schematic diagram of the encryption process of a Feistel algorithm provided for some embodiments of the present application.

[0022] Figure 5 A schematic diagram of a chip device provided for some embodiments of the present application.

[0023] Figure 6 A schematic diagram of another chip device provided for some embodiments of the present application.

[0024] Figure 7 A schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0025] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, rather than to limit the present application. For those skilled in the art, the present application can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the present application by illustrating the examples of the present application.

[0026] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "include..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0027] Based on this, the embodiments of the present application provide a firmware plaintext encryption method, chip, device, medium and product, which can solve the above problems. The firmware plaintext encryption method provided by the embodiments of the present application is described in detail below.

[0028] In some embodiments, Figure 1 As shown, the embodiment of the present application provides a firmware plaintext encryption method, which is applied to a chip. The encryption method may include the following steps S110-S120:

[0029] S110: When the chip is powered on during the wafer testing phase of the chip, a firmware plain text sent by a testing device is received.

[0030] During the chip production process, the chip is often subjected to wafer (Chip Probing) testing. The test content of the above wafer testing may include testing chip logic and testing chip pins.

[0031] When the chip is powered on during the wafer test phase of the chip, that is, when the chip is connected to the power supply and can be tested normally, the chip can receive the firmware plaintext sent by the test equipment. The above firmware plaintext is an unencrypted application code that can be embedded in the hardware device for controlling the device or function.

[0032] Here, the chip may be connected to a test device to receive firmware plain text sent by the test device.

[0033] S120: Encrypt the firmware plaintext based on the encryption key pre-stored in the chip to obtain the firmware ciphertext, and store the firmware ciphertext.

[0034] The chip can encrypt the firmware plaintext based on the encryption key pre-stored in the chip to obtain the firmware ciphertext, and then store the firmware ciphertext. Here, the chip can use a preset data encryption algorithm, such as a symmetric encryption algorithm, to encrypt the firmware plaintext to obtain the firmware ciphertext. It is conceivable that the firmware ciphertext can be stored in a preset location, for example, it can be stored in a storage location different from the encryption key.

[0035] In some examples, the encryption key is a key sent by the test device to the chip. When testing the chip, the test device can obtain the chip identification of the chip, determine the encryption key corresponding to the chip identification, and send the encryption key to the chip.

[0036] The embodiment of the present application encrypts the firmware plaintext based on a pre-stored encryption key through the chip to obtain the firmware ciphertext and stores the firmware ciphertext. The firmware plaintext is directly encrypted by the chip to obtain the firmware ciphertext, which can reduce the complexity of the CP stage test program and reduce the test time, thereby improving the wafer testing efficiency of the chip.

[0037] It can be imagined that before the firmware plaintext is encrypted based on the encryption key to obtain the firmware ciphertext, the chip needs to receive the encryption key.

[0038] In some embodiments, Figure 2 As shown, step S120: encrypting the firmware plaintext based on the encryption key pre-stored in the chip, before obtaining the firmware ciphertext, the encryption method may further include the following steps S210-S220:

[0039] S210: receiving an encryption key sent by the test device, where the encryption key is an encryption key determined by the test device based on a preset key file, and different chips correspond to different encryption keys.

[0040] Here, the chip can receive the encryption key sent by the test device. The above encryption key can be a key obtained in advance by the test device from the key file. It can be imagined that when the same test device is connected to multiple chips for wafer testing, different chips receive different encryption keys sent by the same test device. By using different chips to correspond to different encryption keys, "one card, one key" can be achieved, thereby improving the security of the firmware in different chips.

[0041] S220: Store the encryption key.

[0042] After the chip receives the encryption key, it can store the encryption key in a preset storage location.

[0043] In some examples, before the above step S120, the chip can receive an encryption key and a decryption key sent by the test device and store the encryption key and the decryption key. The encryption key can be used to encrypt the firmware plaintext to obtain the firmware ciphertext, and the decryption key can be used to decrypt the firmware ciphertext to obtain the firmware plaintext.

[0044] In some examples, the wafer test phase may include a first test phase and a second test phase, the second test phase is after the first test phase, and in the case where the chip is powered on during the first test phase, the chip may receive an encryption key sent by the test equipment, store the encryption key, and then power off the chip. In the case where the chip is powered on during the second test phase, the chip may receive a firmware plaintext sent by the test equipment, encrypt the firmware plaintext using the encryption key to obtain a firmware ciphertext, store the firmware ciphertext, and then power off the chip.

[0045] The embodiment of the present application receives the encryption key sent by the test equipment during wafer testing and stores the encryption key, which can facilitate the chip to encrypt the firmware plaintext based on the encryption key to obtain the firmware ciphertext, and can meet the requirement of "one card one key", thereby improving the encryption security of the firmware plaintext.

[0046] After the chip completes the CP test phase, the chip usage phase will begin. The specific process is as follows.

[0047] In some embodiments, Figure 3 As shown, after storing the firmware ciphertext, the encryption method may further include the following steps S310-S320:

[0048] S310: During the chip usage phase, the firmware ciphertext is decrypted based on a pre-stored decryption key to obtain the firmware plaintext.

[0049] When the chip is in use, the chip can use a preset data decryption algorithm based on a pre-stored decryption key to decrypt the firmware encrypted file to obtain the firmware plaintext. Here, in the case where the data decryption algorithm is a symmetric encryption algorithm, the encryption key and the decryption key can be the same.

[0050] S320: Run the plain text firmware.

[0051] After decrypting the firmware ciphertext to obtain the firmware plaintext, the firmware plaintext can be run by the central processing unit (CPU) in the chip to detect the running status of the firmware plaintext during the use phase.

[0052] In the use phase of the chip, the embodiment of the present application decrypts the firmware ciphertext based on a pre-stored decryption key to obtain the firmware plaintext, and then runs the firmware plaintext. This enables the chip to decrypt the firmware ciphertext by itself during the use phase to obtain the firmware plaintext and run it, thereby saving the test time of the chip wafer test and realizing the normal operation of the firmware plaintext.

[0053] To further improve the security of chip data, a test protection model can be set in the chip. After the CP test is completed, the chip protection mode is used to prevent the chip from entering the CP test mode again to ensure that the data in the chip is not tampered with.

[0054] In some embodiments, receiving the firmware plain text sent by the test device includes:

[0055] The firmware plain text sent by the test equipment is received through the test interface included in the chip.

[0056] A dedicated test interface for CP testing can be set in the chip, and the firmware plaintext sent by the above test equipment can be received through the test interface. It is conceivable that during the CP test phase of the above chip, the chip can receive the encryption key, decryption key and firmware plaintext sent by the test equipment through the above test interface. After completing the CP test, the chip will start the chip protection mode, and the above test interface will not be enabled, so that the chip cannot enter the CP test mode again.

[0057] In some embodiments, when the above-mentioned CP test mode includes a first test phase and a second test phase, in the first test phase, the chip can receive encryption keys and decryption keys sent by the test device through the above-mentioned test interface, and in the second test phase, the chip can also receive firmware plaintext sent by the test device through the above-mentioned test interface. After completing the CP test, the above-mentioned test interface cannot be enabled again.

[0058] The embodiment of the present application sets a dedicated test interface in the chip so that in the CP test phase, the chip can only receive data sent by the test equipment through the test interface, thereby improving the security of data transmission. In addition, after the CP test is completed, the test interface set for the dedicated CP test phase can control the chip to be unable to re-enable the above test interface so that the chip cannot re-enter the CP test phase, thereby improving the data security in the chip.

[0059] In some embodiments, encrypting the firmware plaintext based on the encryption key pre-stored in the chip to obtain the firmware ciphertext includes:

[0060] The firmware plaintext is encrypted based on the encryption key using a preset data encryption algorithm to obtain the firmware ciphertext.

[0061] The firmware plaintext can be encrypted based on the encryption key through a preset data encryption algorithm, such as a symmetric addition algorithm, to obtain the firmware ciphertext. By setting the data encryption algorithm to encrypt the firmware plaintext, the test time during CP testing can be reduced and the test efficiency of CP testing can be improved.

[0062] In some embodiments, the data encryption algorithm comprises a Festo cipher algorithm.

[0063] Here, the chip can encrypt the above firmware plaintext based on the Feistel algorithm to obtain the firmware ciphertext. Figure 4 As shown, Figure 4 is a schematic diagram of an exemplary Feistel algorithm. By performing multiple rounds of encryption on the above firmware plaintext through the Feistel algorithm, the security of the firmware ciphertext can be improved. Figure 4 As shown, taking the first round of encryption as an example, the process of encrypting the firmware plaintext using the Festo cipher algorithm can be as follows:

[0064] Step 1: Divide the firmware plaintext into two groups according to the number of bytes, namely L0 and R0;

[0065] Step 2: Input the above L0 and R0 inputs into the first round of encryption operation on the left and right sides respectively;

[0066] Step 3: Use R0 directly as the output result L1 of the left encryption operation;

[0067] Step 4: Select the subkey of the first round of encryption operation from the encryption key and input it into the F function to obtain the result bit F(R0, K1);

[0068] Step 5, perform XOR operation on L0 and F(R0, K1) to obtain R1, that is, R1=L0⊕F(R0, K1);

[0069] It can be imagined that each subsequent round of encryption operation selects a different subkey to execute the above steps 1-5, and finally obtains the firmware ciphertext.

[0070] Here, in step 4, F(R0, K1) is obtained. The specific steps S1-S4 are as follows:

[0071] S1. Expand the byte of R0. For example, when R0 is 4 bits, expand it from 4 bits to 6 bits. The rule is to add one bit to the left and right of the 4 bits, the left side is bit 1, and the right side is bit 2. For example, expand 0010 to 100100.

[0072] S2, XOR the expanded R0 in the previous step S1 with the subkey Ki, for example, XOR the expanded 6 bits with the subkey Ki of this round, and the key is 6 bits;

[0073] S3, compress the XOR result of step S2, 6-4 line compression, the compression method is to perform nonlinear transformation through S box, and the S box design principle meets nonlinearity, avalanche and bit independence;

[0074] S4. Perform bit swapping on the compressed result of step S3 to disrupt the original sorting rule and obtain F(R0, K1).

[0075] The embodiment of the present application uses the Festo cryptographic algorithm to encrypt the firmware plaintext to obtain the firmware ciphertext, which can quickly encrypt the firmware plaintext, reduce the test time during the CP test of the chip, and help improve the test efficiency.

[0076] In some embodiments, the wafer test phase includes a first test phase and a second test phase, the first test phase includes a phase in which the test equipment control chip is powered on and powered off for the first time, and the second test phase includes a phase in which the test equipment control chip is powered on and powered off for the second time;

[0077] When the chip is powered on during the wafer test phase of the chip, before receiving the firmware plaintext sent by the test equipment, the encryption method also includes:

[0078] In the case where the chip is powered on for the first time during the first test phase of the chip, receiving an encryption key sent by the test equipment and storing the encryption key;

[0079] During the wafer test phase of the chip, when the chip is powered on, the firmware plain text sent by the test equipment is received, including:

[0080] In the second test phase of the chip, when the chip is powered on for the second time, the firmware plain text sent by the test equipment is received.

[0081] Here, the wafer test stage can be set to include a first test stage and a second test stage, both of which include a power-on stage and a power-off stage of the chip, and the first test stage includes the first power-on and first power-off stages of the test equipment controlling the chip, and the second test stage includes the second power-on and second power-off stages of the test equipment controlling the chip.

[0082] In the first test phase of the chip and when the chip is powered on for the first time, the chip can receive the encryption key sent by the test device and store the encryption key, and then the test device controls the chip to be powered off for the first time;

[0083] In the second test phase of the chip and when the chip is powered on for the second time, the chip can receive the firmware plaintext sent by the above-mentioned test equipment, encrypt the above-mentioned firmware plaintext based on the encryption key to obtain the firmware ciphertext, and store the above-mentioned firmware ciphertext.

[0084] In the embodiment of the present application, the CP test phase includes a first test phase and a second test phase. The first test phase is used to set the first power-on and first power-off phases of the test device control chip, and the second test phase is used to set the second power-on and second power-off phases of the test device control chip. The storage encryption key of the chip and the process of encrypting the firmware plaintext based on the encryption key to obtain the firmware ciphertext are implemented through the above-mentioned different test phases. The chip can encrypt the firmware plaintext to obtain the firmware ciphertext by itself during the CP test phase, thereby improving the CP test efficiency.

[0085] Based on the same inventive concept, an embodiment of the present application also provides a chip.

[0086] like Figure 5 As shown, an embodiment of the present application provides a chip, including:

[0087] A key storage module 501, the key storage module 501 is used to store encryption keys and decryption keys;

[0088] The firmware hardware encryption and decryption module 502 is electrically connected to the key storage module 501. The firmware hardware encryption and decryption module 502 is used to receive the firmware plaintext sent by the test equipment during the wafer test phase of the chip and when the chip is powered on, obtain the encryption key from the key storage module 501, and encrypt the firmware plaintext based on the encryption key to obtain the firmware ciphertext;

[0089] The firmware storage module 503 is electrically connected to the firmware hardware encryption and decryption module 502, and the firmware storage module 503 is used to store firmware ciphertext.

[0090] During the CP test phase of the chip, the key storage module 501 can be used to receive the confidential key and decryption key sent by the parameter device and store the encryption key and decryption key. In some examples, the encryption key and decryption key can be the same key. The firmware hardware encryption and decryption module 502 can be used to receive the firmware plaintext sent by the test device, obtain the encryption key from the key storage module 501, encrypt the firmware plaintext based on the encryption key, and obtain the firmware ciphertext. Here, the firmware hardware encryption and decryption module 502 can use the Feistel algorithm to encrypt the firmware plaintext to obtain the firmware ciphertext. The firmware hardware encryption and decryption module 502 can transmit the firmware ciphertext to the firmware storage module 503, and the firmware storage module 503 can store the firmware ciphertext.

[0091] In the embodiment of the present application, the encryption key and the decryption key are stored in the key storage module 501. When the chip receives the firmware plaintext sent by the test equipment, the firmware hardware encryption and decryption module 502 encrypts the firmware plaintext based on the pre-stored encryption key, obtains the firmware ciphertext and transmits it to the firmware storage module 503. The firmware ciphertext is stored in the firmware storage module 503. The above steps can directly encrypt the firmware plaintext through the chip to obtain the firmware ciphertext, which simplifies the steps of encrypting the firmware plaintext in the wafer test stage of the chip in the prior art and improves the wafer test efficiency of the chip. In some embodiments, such as Figure 5 As shown, the chip further includes a central processing unit 504, and the central processing unit 504 (CPU) is electrically connected to the firmware hardware encryption and decryption module 502;

[0092] The firmware hardware encryption and decryption module 502 is also used to obtain a decryption key from the key storage module 501 during the use phase of the chip, and decrypt the firmware ciphertext based on the decryption key to obtain the firmware plaintext;

[0093] The central processing unit 504 is used to run the firmware plain text.

[0094] Here, the above-mentioned firmware hardware encryption and decryption module 502 can obtain the decryption key from the key storage module 501 during the chip's usage phase, decrypt the firmware ciphertext based on the decryption key, and obtain the firmware plaintext. The firmware hardware encryption and decryption module 502 transmits the firmware plaintext to the central processing unit 504, and the central processing unit 504 can then run the above-mentioned firmware plaintext, and can detect whether the above-mentioned firmware plaintext can run normally on the CPU during the usage phase.

[0095] In the use stage of the chip, the embodiment of the present application obtains the decryption key from the key storage module 501 through the firmware hardware encryption and decryption module 502, decrypts the firmware ciphertext to obtain the firmware plaintext, and runs the firmware plaintext through the CPU. The chip can automatically decrypt the firmware ciphertext to obtain the firmware plaintext during the use stage and then run it automatically. Under the premise of improving the test efficiency of the CP test stage, the normal progress of the use stage is not affected, and the normal use of the subsequent chips can be guaranteed.

[0096] In some embodiments, the wafer test phase includes a first test phase and a second test phase; wherein the first test phase includes a phase in which the test equipment control chip is powered on and powered off for the first time, and the second test phase includes a phase in which the test equipment control chip is powered on and powered off for the second time;

[0097] The key storage module 50 is used to store encryption keys and decryption keys when the chip is powered on for the first time in the first test phase;

[0098] The firmware hardware encryption and decryption module 502 is used to receive the firmware plaintext sent by the test equipment when the chip is powered on for the second time in the second test phase, obtain the encryption key from the key storage module 501, and encrypt the firmware plaintext based on the encryption key to obtain the firmware ciphertext;

[0099] The firmware storage module 503 is used to store the firmware ciphertext when the chip is powered on for the second time in the second test phase.

[0100] It can be imagined that the above-mentioned wafer testing stage may include a first testing stage and a second testing stage. The above-mentioned first testing stage includes the stage of powering on and off the test equipment control chip for the first time, and the above-mentioned second testing stage includes the stage of powering on and off the test equipment control chip for the second time.

[0101] When the chip is powered on for the first time in the first test phase, the chip can receive the encryption key and decryption key sent by the test device, and store the encryption key and decryption key through the key storage module 501. Then the test device controls the chip to be powered off for the first time.

[0102] When the chip is powered on for the second time in the second test phase, the chip can receive the firmware plaintext sent by the test equipment, encrypt the firmware plaintext into firmware ciphertext through the firmware encryption and decryption module 502, and then the chip stores the firmware ciphertext through the firmware storage module 503.

[0103] In an embodiment of the present application, a wafer test stage is set to include a first test stage and a second test stage. In the first test stage, the chip stores an encryption key and a decryption key through a key storage module, and in the second test stage, the firmware plaintext is encrypting through a firmware hardware encryption and decryption module to obtain firmware ciphertext, and the firmware ciphertext is stored through a firmware storage module. This enables the chip to encrypt the firmware plaintext by itself in the wafer test stage to obtain firmware ciphertext, thereby improving the efficiency of wafer testing.

[0104] like Figure 6 As shown, Figure 6 A schematic diagram of another chip provided in an embodiment of the present application, such as Figure 6 As shown, the firmware hardware encryption and decryption module 502 may include a firmware hardware encryption unit 5021 and a firmware hardware decryption unit 5022. Figure 6 The above-mentioned firmware hardware encryption unit 5021 is respectively connected to the key storage module 501 and the firmware storage module 503, and the above-mentioned firmware hardware decryption unit 5022 is respectively connected to the key storage module 501, the firmware storage module 503 and the central processing unit 504. The firmware hardware encryption unit 5021 can be used to receive the firmware plaintext sent by the test equipment during the wafer testing stage of the chip and when the chip is powered on, obtain the encryption key from the key storage module 501, encrypt the firmware plaintext based on the encryption key, and obtain the firmware ciphertext; the firmware hardware decryption unit 5022 can be used to obtain the decryption key from the key storage module 501 during the use stage of the chip, decrypt the firmware ciphertext based on the decryption key, obtain the firmware plaintext, and transmit the above-mentioned firmware plaintext to the central processing unit 504.

[0105] It is conceivable that Figure 6 In the above-mentioned first test phase, the encryption key and the decryption key can be stored by the key storage module, and in the second test phase, the firmware plaintext can be encrypted by the firmware hardware encryption unit 5021 to obtain the firmware ciphertext.

[0106] In order to improve the security of the firmware in the chip and ensure that the chip cannot enter the CP test phase again during the chip's use phase, the connection between the firmware hardware encryption unit 5021 and the firmware storage module 503 will be cut off during the chip's use phase.

[0107] The embodiment of the present application improves the security of the firmware in the chip by setting two units in the firmware hardware encryption and decryption module 502, wherein the firmware hardware encryption unit is used only to encrypt the firmware plaintext in the CP testing phase to obtain the firmware ciphertext, and the firmware hardware decryption unit is used only to decrypt the firmware ciphertext in the use phase to obtain the firmware plaintext.

[0108] In some embodiments, the firmware hardware encryption and decryption module 502 encrypts the firmware plaintext based on the encryption key using a preset data encryption algorithm to obtain firmware ciphertext.

[0109] In some embodiments, the firmware hardware encryption and decryption module 502 includes a Feistel encryption module. The firmware hardware encryption and decryption module 502 encrypts the firmware plaintext by using the Feistel encryption algorithm included in the Feistel encryption module to obtain firmware ciphertext. It can be imagined that the firmware hardware encryption and decryption module 502 can reversely input the firmware ciphertext into the Feistel encryption module to decrypt the firmware ciphertext to obtain firmware plaintext.

[0110] The above-mentioned firmware hardware encryption and decryption module 502 encrypts the firmware plaintext to obtain the firmware ciphertext based on a preset data encryption algorithm, such as the Feistel algorithm included in the Feistel encryption module, or decrypts the firmware ciphertext to obtain the firmware plaintext. The encryption of the firmware plaintext or the decryption of the firmware ciphertext can be quickly realized, which can respectively improve the CP test efficiency and the usage phase efficiency of the chip, and at the same time can also improve the security of the firmware.

[0111] The chip of the above embodiment is used to implement the corresponding firmware plaintext encryption method in any of the above embodiments, and has the beneficial effects of the corresponding method embodiment, which will not be repeated here.

[0112] Figure 7 A schematic diagram of the hardware structure of an electronic device provided in an application embodiment.

[0113] The electronic device 600 may include a processor 601 and a memory 602 storing computer program instructions.

[0114] Specifically, the processor 601 may include a central processing unit (CPU), or an application specific integrated circuit (ASIC), or may be configured to implement one or more integrated circuits of the embodiments of the present application.

[0115] The memory 602 may include a large capacity memory for data or instructions. By way of example and not limitation, the memory 602 may include a hard disk drive (HDD), a floppy disk drive, a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive or a combination of two or more of these. In appropriate cases, the memory 602 may include a removable or non-removable (or fixed) medium. In appropriate cases, the memory 602 may be inside or outside the integrated gateway disaster recovery device. In a specific embodiment, the memory 602 is a non-volatile solid-state memory.

[0116] In certain embodiments, memory 602 includes a read-only memory (ROM). The ROM may be a mask-programmed ROM, a programmable ROM (PROM), an erasable PROM (EPROM), an electrically erasable PROM (EEPROM), an electrically alterable ROM (EAROM), or flash memory, or a combination of two or more of the above, where appropriate.

[0117] The memory may include a read-only memory (ROM), a random access memory (RAM), a magnetic disk storage medium device, an optical storage medium device, a flash memory device, an electrical, optical or other physical / tangible memory storage device. Thus, typically, the memory includes one or more tangible (non-transitory) computer-readable storage media (e.g., a memory device) encoded with software including computer-executable instructions, and when the software is executed (e.g., by one or more processors), it is operable to perform the operations described with reference to the method according to the first aspect of the present application.

[0118] The processor 601 implements any firmware plaintext encryption method in the above embodiments by reading and executing computer program instructions stored in the memory 602 .

[0119] In one example, the electronic device may further include a communication interface 603 and a bus 604. Figure 7 The processor 601, the memory 602, and the communication interface 603 are connected via a bus 604 and communicate with each other.

[0120] The communication interface 603 is mainly used to implement communication between various modules, devices, units and / or equipment in the embodiments of the present application.

[0121] Bus 604 includes hardware, software or both, and the components of online data traffic billing equipment are coupled to each other. For example, but not limitation, the bus may include accelerated graphics port (AGP) or other graphics bus, enhanced industrial standard architecture (EISA) bus, front-side bus (FSB), hypertransport (HT) interconnection, industrial standard architecture (ISA) bus, infinite bandwidth interconnection, low pin count (LPC) bus, memory bus, micro channel architecture (MCA) bus, peripheral component interconnect (PCI) bus, PCI-Express (PCI-X) bus, serial advanced technology attachment (SATA) bus, video electronics standard association local (VLB) bus or other suitable bus or two or more of these combinations. Where appropriate, bus 604 may include one or more buses. Although the present application embodiment describes and shows a specific bus, the present application considers any suitable bus or interconnection.

[0122] The electronic device of the above embodiment is used to implement the corresponding firmware plaintext encryption method in any of the above embodiments, and has the beneficial effects of the corresponding method embodiment, which will not be repeated here.

[0123] In addition, in combination with the firmware plaintext encryption method in the above embodiment, the embodiment of the present application can provide a computer storage medium for implementation. The computer storage medium stores computer program instructions; when the computer program instructions are executed by the processor, any firmware plaintext encryption method in the above embodiment is implemented.

[0124] In addition, in combination with the firmware plaintext encryption method in the above embodiments, the present application embodiment can provide a computer program product to implement. When the computer program product instructions are executed by a processor of an electronic device, any firmware plaintext encryption method in the above embodiments is implemented.

[0125] A person skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present application (including the claims) is limited to these examples. In line with the concept of the present application, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present application as described above, which are not provided in detail for the sake of simplicity.

[0126] The functional blocks shown in the structural block diagram described above can be implemented as hardware, software, firmware or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an application-specific integrated circuit (ASIC), appropriate firmware, a plug-in, a function card, etc. When implemented in software, the elements of the present application are programs or code segments used to perform the required tasks. The program or code segment can be stored in a machine-readable medium, or transmitted on a transmission medium or a communication link by a data signal carried in a carrier. "Machine-readable medium" may include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROMs, flash memories, erasable ROMs (EROMs), floppy disks, CD-ROMs, optical disks, hard disks, optical fiber media, radio frequency (RF) links, etc. The code segment can be downloaded via a computer network such as the Internet, an intranet, etc.

[0127] It should also be noted that the exemplary embodiments mentioned in this application describe some methods or devices based on a series of steps or devices. However, this application is not limited to the order of the above steps, that is, the steps can be performed in the order mentioned in the embodiment, or in a different order from the embodiment, or several steps can be performed simultaneously.

[0128] The above describes various aspects of the present application with reference to the flowcharts and / or block diagrams of the methods, devices (devices) and computer program products according to the embodiments of the present application. It should be understood that each box in the flowchart and / or block diagram and the combination of each box in the flowchart and / or block diagram can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device to produce a machine so that these instructions executed by the processor of the computer or other programmable data processing device enable the implementation of the functions / actions specified in one or more boxes of the flowchart and / or block diagram. Such a processor can be, but is not limited to, a general-purpose processor, a special-purpose processor, a special application processor, or a field programmable logic circuit. It can also be understood that each box in the block diagram and / or flowchart and the combination of boxes in the block diagram and / or flowchart can also be implemented by dedicated hardware that performs a specified function or action, or can be implemented by a combination of dedicated hardware and computer instructions.

[0129] The above is only a specific implementation of the present application. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working processes of the above-described devices, modules and units can refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here. It should be understood that the protection scope of the present application is not limited to this. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in the present application, and these modifications or replacements should be included in the protection scope of the present application.

Claims

1. A firmware plaintext encryption method, characterized in that: Applied to the wafer testing stage of the chip, the encryption method includes: When the chip is powered on during the wafer test phase of the chip, the firmware plain text sent by the test equipment is received through the test interface of the chip; The firmware plaintext is encrypted based on an encryption key pre-stored in the chip to obtain a firmware ciphertext, and the firmware ciphertext is stored; the encryption key is a key sent by the test equipment to the chip during the wafer test phase; after completing the wafer test, the chip starts the chip protection mode, the test interface cannot be enabled, and the chip cannot enter the wafer test mode again.

2. The firmware plaintext encryption method according to claim 1, characterized in that: Before encrypting the firmware plaintext based on the encryption key pre-stored in the chip to obtain the firmware ciphertext, the encryption method further includes: receiving an encryption key sent by the test device, wherein the encryption key is an encryption key determined by the test device based on a preset key file, and different chips correspond to different encryption keys; The encryption key is stored.

3. The firmware plaintext encryption method according to claim 1, characterized in that: After storing the firmware ciphertext, the encryption method further includes: During the use phase of the chip, the firmware ciphertext is decrypted based on a pre-stored decryption key to obtain the firmware plaintext; Run the firmware in plain text.

4. The firmware plaintext encryption method according to claim 1, characterized in that: The step of encrypting the firmware plaintext based on the encryption key pre-stored in the chip to obtain the firmware ciphertext includes: The firmware plaintext is encrypted based on the encryption key using a preset data encryption algorithm to obtain a firmware ciphertext.

5. The firmware plaintext encryption method according to claim 4, characterized in that: The data encryption algorithm includes the Festo cipher algorithm.

6. The firmware plaintext encryption method according to claim 1, characterized in that: The wafer test includes a first test phase and a second test phase; wherein the first test phase includes a phase in which the test device controls the chip to be powered on and powered off for the first time, and the second test phase includes a phase in which the test device controls the chip to be powered on and powered off for the second time; When the chip is powered on during the wafer testing phase of the chip, before receiving the firmware plaintext sent by the testing equipment, the encryption method further includes: In a first test phase of the chip when the chip is powered on for the first time, receiving an encryption key sent by the test device and storing the encryption key; The receiving of the firmware plain text sent by the test equipment when the chip is powered on during the wafer test phase of the chip includes: In the second test phase of the chip, when the chip is powered on for the second time, a firmware plain text sent by a test device is received.

7. A chip, characterized in that: include: A key storage module, the key storage module is used to store encryption keys and decryption keys, wherein the encryption keys and decryption keys corresponding to different chips are different; A firmware hardware encryption and decryption module, the firmware encryption and decryption module is electrically connected to the key storage module, and the firmware hardware encryption and decryption module is used to receive firmware plaintext sent by the test equipment through the test interface during the wafer test phase of the chip and when the chip is powered on, obtain the encryption key from the key storage module, and encrypt the firmware plaintext based on the encryption key to obtain firmware ciphertext; A firmware storage module, the firmware storage module is electrically connected to the firmware hardware encryption and decryption module, and the firmware storage module is used to store the firmware ciphertext; the encryption key is the key sent by the test equipment to the chip during the wafer test phase; after completing the wafer test, the chip starts the chip protection mode, the test interface cannot be enabled, and the chip cannot enter the wafer test mode again.

8. The chip according to claim 7, characterized in that: The chip also includes a central processing unit, and the central processing unit is electrically connected to the firmware hardware encryption and decryption module; The firmware hardware encryption and decryption module is also used to obtain the decryption key from the key storage module during the use phase of the chip, and decrypt the firmware ciphertext based on the decryption key to obtain the firmware plaintext; The central processing unit is used to run the firmware plaintext.

9. The chip according to claim 7, characterized in that: The wafer test phase includes a first test phase and a second test phase; wherein the first test phase includes a phase in which the test device controls the chip to be powered on and powered off for the first time, and the second test phase includes a phase in which the test device controls the chip to be powered on and powered off for the second time; The key storage module is used to store the encryption key and the decryption key when the chip is powered on for the first time in the first test phase; The firmware hardware encryption and decryption module is used to receive the firmware plaintext sent by the test device when the chip is powered on for the second time in the second test phase, obtain the encryption key from the key storage module, and encrypt the firmware plaintext based on the encryption key to obtain the firmware ciphertext; The firmware storage module is used to store the firmware ciphertext when the chip is powered on for the second time in the second test phase.

10. An electronic device, characterized in that: The device comprises: a processor, and a memory storing computer program instructions; The processor reads and executes the computer program instructions to implement the firmware plaintext encryption method according to any one of claims 1 to 6.

11. A readable storage medium, characterized in that: The readable storage medium stores computer program instructions, and when the computer program instructions are executed by a processor, the method for encrypting firmware plaintext according to any one of claims 1 to 6 is implemented.

12. A computer program product, comprising a computer program, characterized in that When the computer program is processed by a processor, the method for encrypting firmware plaintext as claimed in any one of claims 1 to 6 is implemented.

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