Current limiting circuit, chip and electronic device

Abstract

The invention provides a current limiting circuit, a chip and electronic equipment, and relates to the technical field of electronic circuits. The circuit comprises a current limiting branch, a voltage control branch and a linear adjustment branch. The first end of the voltage control branch and the first end of the linear adjustment branch are jointly connected to a voltage input end, the second end of the voltage control branch and the second end of the linear adjustment branch are jointly grounded through the first current source and the second current source respectively, and the third end of the voltage control branch is connected with the third end of the linear adjustment branch. The voltage of the second end of the linear adjustment branch is controlled; a first end of the current limiting branch is connected with a voltage input end through a first resistor of the voltage control branch, and a second end of the current limiting branch is connected with a voltage output end; the second end of the linear adjustment branch is connected with the third end of the current limiting branch so as to control the voltage output end to output stable target current. According to the invention, when the electronic equipment is powered on or abnormal, small current can be stably output.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic circuits, and in particular to a current limiting circuit, a chip and an electronic device. Background Art

[0002] When an electronic device is just powered on, the current inside the electronic device will change from zero to something. When the electronic device is suddenly connected to a large current, it may cause the electronic device to malfunction.

[0003] For this situation, the relevant technology adopts a method of opening the high current path after the internal components of the electronic device are stable or a method of cutting off the power supply path when an abnormality occurs. The former will cause the electronic device to take a long time to start up, and the latter will cause the electronic device to start up unevenly and the electronic device to be completely powered off and unable to work.

[0004] It can be seen that the related technology has imperfect power current management in the startup of electronic equipment.

[0005] It should be noted that the above statements are only used to provide background technical information related to the present application and do not necessarily constitute prior art. Summary of the invention

[0006] In view of this, the purpose of the present invention is to provide a current limiting circuit, a chip and an electronic device, which can specifically solve the problem of imperfect power supply current management in the startup of existing electronic devices.

[0007] Based on the above-mentioned purpose, in a first aspect, the present invention proposes a current limiting circuit, comprising: a current limiting branch, a voltage control branch and a linear adjustment branch; the first end of the voltage control branch and the first end of the linear adjustment branch are commonly connected to a voltage input end, the second end of the voltage control branch and the second end of the linear adjustment branch are commonly grounded through a first current source and a second current source respectively, the third end of the voltage control branch and the third end of the linear adjustment branch are connected to control the voltage at the second end of the linear adjustment branch; the first end of the current limiting branch is connected to the voltage input end through a first resistor of the voltage control branch, and the second end of the current limiting branch is connected to a voltage output end; the second end of the linear adjustment branch is connected to the third end of the current limiting branch to control the voltage output end to output a stable target current.

[0008] In some embodiments, the current limiting branch includes a first transistor, a source of the first transistor is connected to a first end of the current limiting branch, a gate of the first transistor is connected to a third end of the current limiting branch, and a drain of the first transistor is connected to the voltage output end.

[0009] In some embodiments, the voltage control branch includes a second transistor, the source of the second transistor is connected to the first end of the current limiting branch through a third resistor, the gate of the second transistor is connected to the third end of the linear adjustment branch, the gate of the second transistor is connected to the drain of the second transistor, and the drain of the second transistor is connected to the first current source.

[0010] In some embodiments, the linear adjustment branch includes a second resistor, a fourth resistor and a third transistor, the two ends of the second resistor and the fourth resistor connected in series are respectively connected to the first end of the linear adjustment branch and the source of the third transistor, the gate of the third transistor is the third end of the linear adjustment branch, and the drain of the third transistor is connected to the second current source.

[0011] In some embodiments, the current limiting circuit also includes a matching branch; the matching branch includes a fifth resistor, a fourth transistor and a third current source, one end of the fifth resistor is connected between the second resistor and the fourth resistor of the linear adjustment branch, the other end of the fifth resistor is connected to the source of the fourth transistor, the gate and the drain of the fourth transistor are connected, the drain of the fourth transistor is connected to the third current source, and the third current source is grounded; wherein the properties of the third resistor, the fourth resistor and the fifth resistor in the current limiting circuit are the same, and the properties include the type of resistor, the resistance value and the package size of the resistor.

[0012] In some embodiments, the current limiting circuit also includes a switch control circuit, the switch control circuit includes a bias module and a switch control module; the bias module is configured to provide a bias voltage for the switch control module under the control of a bias signal; the switch control module includes a pull-down unit and a switch unit, the switch control module is configured to control the current limiting branch to output the target current through the pull-down unit under the control of an external access signal and the bias voltage, and to control the conduction and disconnection of the current limiting branch, the voltage control branch and the linear adjustment branch through the switch unit.

[0013] In some embodiments, the switch unit includes a fifth transistor, a sixth transistor, a tenth transistor, an eleventh transistor and a twelfth transistor; the gate of the tenth transistor is an external access signal input terminal, the gate of the tenth transistor is also connected to the second end of the voltage control branch through the fifth transistor, and the gate of the tenth transistor is connected to the second end of the linear adjustment branch through the sixth transistor; the source of the tenth transistor is connected to the drain of the eleventh transistor, the source of the eleventh transistor is connected to the drain of the twelfth transistor, the source of the twelfth transistor is grounded, and the gate of the eleventh transistor and the gate of the twelfth transistor are connected to the bias module.

[0014] In some embodiments, the pull-down unit includes a sixth resistor, a seventh resistor, an eighth transistor and a ninth transistor; the first end of the sixth resistor, the source of the eighth transistor and the source of the ninth transistor are all connected to the power supply end, and the second end of the sixth resistor is respectively connected to the gate of the ninth transistor and the drain of the tenth transistor in the switching unit; the drain of the ninth transistor is respectively connected to one end of the seventh resistor and the gate of the eighth transistor, and the other end of the seventh resistor is grounded; the drain of the eighth transistor is connected to the gate of the first transistor in the current limiting branch.

[0015] In some embodiments, when the current limiting circuit includes a matching branch, the switch unit further includes a seventh transistor, and the gate of the tenth transistor is further connected to the matching branch through the seventh transistor.

[0016] In a second aspect, a chip is further provided, wherein the chip comprises the current limiting circuit described in any one of the first aspect.

[0017] According to a third aspect, an electronic device is provided, comprising the current limiting circuit according to any one of the first aspects.

[0018] In general, the present invention has at least the following beneficial effects:

[0019] A current limiting circuit is provided, which controls the voltage at the second end of the linear adjustment branch through a voltage control branch, and the voltage at the second end of the linear adjustment branch affects the voltage of the current limiting branch. Therefore, the voltage of the current limiting branch can be controlled by the voltage control branch, and the current limiting branch outputs a stable target current by setting the components in the circuit. Therefore, when an electronic device uses the current limiting circuit provided by the embodiment of the present application, it can stably output a small current when powered on or an abnormality occurs, providing the electrical device with a stable low-power power supply, maintaining a low power consumption state, and waiting for abnormal feedback.

[0020] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In the accompanying drawings, unless otherwise specified, the same reference numerals throughout the multiple drawings represent the same or similar parts or elements. These drawings are not necessarily drawn to scale. It should be understood that these drawings only depict some embodiments disclosed in accordance with the present invention and should not be regarded as limiting the scope of the present invention. In addition, the same reference numerals are used to represent the same parts throughout the drawings.

[0022] Figure 1 A circuit diagram of a current limiting circuit provided in an embodiment of the present application is shown;

[0023] Figure 2 Another circuit diagram of the current limiting circuit provided by this embodiment is shown;

[0024] Figure 3 Another circuit diagram of a current limiting circuit provided by this embodiment is shown;

[0025] Figure 4 Another circuit diagram of the current limiting circuit provided by this embodiment is shown;

[0026] Figure 5 A schematic diagram showing the structure of a chip provided by an embodiment of the present invention is shown;

[0027] Figure 6 A schematic structural diagram of an electronic device provided by an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0028] The following embodiments of the technical solution of the present application are described in detail in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present application, and are therefore only used as examples, and cannot be used to limit the scope of protection of the present application.

[0029] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by technicians in the technical field to which this application belongs; the terms used herein are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" in the specification and claims of this application and the above-mentioned figure descriptions and any variations thereof are intended to cover non-exclusive inclusions.

[0030] In the description of the embodiments of the present application, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "multiple" is more than two, unless otherwise clearly and specifically defined.

[0031] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0032] In the description of the embodiments of the present application, unless otherwise clearly specified and limited, technical terms such as "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can be the internal connection of two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of the present application can be understood according to the specific circumstances.

[0033] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0034] When an electronic device is just powered on, the current inside the electronic device will change from zero to something. When the electronic device is suddenly connected to a large current, it may cause the electronic device to malfunction.

[0035] In the current power management application scenarios, for this situation, the relevant technologies adopt a method of opening the high current path after the internal components of the electronic device are stable, or a method of cutting off the power supply path when an abnormality occurs. The former will cause the electronic device to take a long time to start up, and the latter will cause the electronic device to start up unevenly and cause electronic devices such as chargers or wireless headphones to be completely powered off and unable to work. It can be seen that the relevant technologies have imperfect power current management in the startup of electronic devices.

[0036] Based on the above problems, an embodiment of the present application provides a current limiting circuit, which controls the voltage at the second end of the linear adjustment branch through a voltage control branch, and the voltage at the second end of the linear adjustment branch affects the current limiting branch voltage. Therefore, the current limiting branch voltage can be controlled by the voltage control branch, and the current limiting branch outputs a stable target current through the setting of components in the circuit. Therefore, when an electronic device uses the current limiting circuit provided by an embodiment of the present application, it can stably output a small current when powered on or an abnormality occurs, providing the electrical device with a stable, low-power power supply, maintaining a low power consumption state, and waiting for abnormal feedback.

[0037] Embodiment 1

[0038] Figure 1 A circuit diagram of a current limiting circuit provided in an embodiment of the present application is shown, referring to Figure 1The current limiting circuit 100 includes a current limiting branch 101, a voltage control branch 102 and a linear adjustment branch 103. The first end of the voltage control branch 102 and the first end of the linear adjustment branch 103 are commonly connected to the voltage input terminal VIN, the second end of the voltage control branch 102 and the second end of the linear adjustment branch 103 are commonly grounded through the first current source I1 and the second current source I2 respectively, the third end of the voltage control branch 102 and the third end of the linear adjustment branch 103 are connected to control the voltage of the second end of the linear adjustment branch 103; the first end of the current limiting branch 101 is connected to the voltage input terminal VIN through the first resistor R1 of the voltage control branch 102, and the second end of the current limiting branch 101 is connected to the voltage output terminal VOUT; the second end of the linear adjustment branch 103 is connected to the third end of the current limiting branch 101 to control the voltage output terminal VOUT to output a stable target current I CLM .

[0039] In this embodiment, the first end of the current limiting branch 101 is connected to the voltage input terminal VIN through the first resistor R1 of the voltage control branch 102, and the second end of the current limiting branch 101 is connected to the voltage output terminal VOUT. Therefore, when an electronic device is connected Figure 1 After the circuit is formed, the voltage output terminal VOUT can provide current to the electronic device. When the current limiting branch 101 is turned on, the electronic device starts to power on, and the current gradually increases. CLM As the current increases, the potential of the first end (point A) of the current limiting branch 101 gradually decreases, and since the second end of the voltage control branch 102 is grounded through the first current source I1, the voltage control branch 102 is connected in series with the first current source I1, so the current of the voltage control branch 102 is fixed, and then the voltage of the voltage control branch 102 changes with the change of the potential at point A, so the voltage output from the voltage control branch 102 to the linear adjustment branch 103 can be changed, and the second end of the linear adjustment branch 103 is connected to the third end of the current limiting branch 101 (that is, the control end of the current limiting branch 101), which in turn causes I CLM The current decreases to control the voltage output terminal VOUT to output a stable target current I CLM .

[0040] In the embodiment of the present application, the current limiting branch 101 includes a first transistor M1, the source of the first transistor M1 is connected to the first end of the current limiting branch 101, the gate of the first transistor M1 is connected to the third end of the current limiting branch 101, and the drain of the first transistor M1 is connected to the voltage output end VOUT.

[0041] In this way, when the gate potential of M1 increases, the gate-source voltage difference V SG Reduce, the current I of M1 tube CLMReduce to achieve CLM (Current Limited Mode) current limitation.

[0042] In the embodiment of the present application, the voltage control branch 102 includes a second transistor M2, the source of the second transistor M2 is connected to the first end of the current limiting branch 101 through the third resistor R3, the gate of the second transistor M2 is connected to the third end of the linear adjustment branch 103, the gate of the second transistor M2 is connected to the drain of the second transistor M2, and the drain of the second transistor M2 is connected to the first current source I1.

[0043] The gate of the second transistor M2 is connected to the third end of the voltage control branch 102, that is, the gate of the second transistor M2 is connected to the drain. The M2 transistor adopts a self-biased MOS transistor. Due to the existence of the lower tail current source I1, the current I DS Fixed, under the premise of ignoring the body effect and channel length modulation effect, according to the saturation region MOS tube current formula:

[0044]

[0045] Among them, the drain-source voltage difference of M2 tube is equal to the gate-source voltage difference, that is, V DS1 =V GS1 , the drain-source current of M2 tube I DS2 Fixed, μ P , C ox , Vx HP , λ are fixed values, and the gate-source voltage difference V of M2 tube can be obtained SG2 is a fixed value, the source voltage of M2 tube V S2 The voltage decreases, so the gate voltage V G2 Decreases, and because the gate of the M2 tube is connected to the third end of the linear adjustment branch 103 , the voltage output to the linear adjustment branch 103 decreases. Therefore, the voltage of the linear adjustment branch 103 can be controlled by the voltage control branch 102 .

[0046] In the embodiment of the present application, the linear adjustment branch 103 includes a second resistor R2, a fourth resistor R4 and a third transistor M3, and two ends of the second resistor R2 and the fourth resistor R4 connected in series are respectively connected to the first end of the linear adjustment branch 103 and the source of the third transistor M3, the gate of the third transistor M3 is the third end of the linear adjustment branch 103, and the drain of the third transistor M3 is connected to the second current source I2.

[0047] Among them, Figure 1 It can be seen that the gates of M2 and M3 are connected, and the gate potentials of M2 and M3 are V G The gate-source voltage difference of M3 is V SG3 Increase, the current I of M3 tubeDS3 Increase, the drain voltage of M3 tube V D3 The voltage increases, that is, the gate potential of the M1 tube increases, resulting in a gate-source voltage difference V SG1 Reduce, the current I of M1 tube CLM Reduced to achieve CLM current limit.

[0048] Combine the following Figure 1 The principle of the current limiting circuit 100 of this embodiment will be described.

[0049] With I CLM As the current increases, the potential at point A decreases gradually. M2 is a self-biased MOS tube. Due to the existence of the lower tail current source I1, the current I DS2 Fixed, ignoring the body effect and channel length modulation effect, according to the saturation region MOS tube current formula, the gate-source voltage difference V of the M2 tube can be obtained: SG2 is a fixed value, the source voltage of M2 tube V S2 The voltage decreases, so the gate voltage V G2 The voltage decreases, and the gate potential V G The same, so the gate-source voltage difference of M3 tube is V SG3 Increase, the current I of M3 tube DS3 Increase, the drain voltage of M3 tube V D3 The voltage increases, that is, the gate potential of the M1 tube increases, resulting in a gate-source voltage difference V SG1 Reduce, the current I of M1 tube CLM Reduced to achieve CLM current limit.

[0050] This embodiment can not only realize I CLM , you can also CLM The target current is limited. Specifically, since the M2 and M3 tubes are connected in a mirror image and the currents are equal, both M2 and M3 are in the saturation region. Therefore, the V GS Equal, that is, V GS2 =V GS3 , V GS2 With V GS3 The expression is as follows:

[0051] V SG2 =V IN -(I CLM +I1)*R1-I1*R3-V G2

[0052] V SG3 =V IN -I2*R2-I2*R4-VG3

[0053] Since V G2 =V G3 , V SG2 =V SG3 , R3=R4, from which I can be calculated CLM The current is:

[0054]

[0055] In this way, the current I1 and I2 of the resistors R1 and R2 can be set to achieve the effect of I CLM restrictions.

[0056] In this embodiment, the fourth resistor R4 in the linear adjustment branch 103 is used to provide a voltage to ensure that V SG1 The voltage is greater than its threshold voltage, V SG1 The voltage expression is as follows:

[0057] V SG1 =(R DSON3 +R4)*I2

[0058] At the same time, resistor R4 can adjust the linear regulation rate (the amount of output voltage change caused by input voltage change when the load remains unchanged). GS1 The decrease can increase the linear regulation rate. The specific principle is as follows: If you need to maintain I CLM To keep the output constant, the M1 tube must be in the saturation zone. According to the characteristics of the saturation zone:

[0059] V DS >V GS -V TH

[0060] And since the source potential of M1 tube is point A potential V A The expression is:

[0061] V A =VIN-(I1+I CLM )*R1

[0062] V A is a constant value, then V GS1 The smaller the VOUT value is, the larger the linear regulation rate can be, and the smaller the V GS1 The way to reduce the resistance value of R4 is to reduce the linear regulation rate.

[0063] In addition, the on-resistance R of the M3 tube can be adjusted DSON3To adjust the linear regulation rate of the circuit, by adjusting the linear regulation rate of the circuit, the circuit's ability to perform linear processing of signals under specific conditions can be improved.

[0064] Embodiment 2

[0065] Figure 2 Another circuit diagram of the current limiting circuit provided in this embodiment is shown, Figure 2 As shown, the current limiting circuit 100 also includes a matching branch 104, the matching branch 104 includes a fifth resistor R5, a fourth transistor M4 and a third current source I3, one end of the fifth resistor R5 is connected between the second resistor R2 and the fourth resistor R4 of the linear adjustment branch 103, the other end of the fifth resistor R5 is connected to the source of the fourth transistor M4, the gate and the drain of the fourth transistor M4 are connected, the drain of the fourth transistor M4 is connected to the third current source I3, and the third current source I3 is grounded; wherein, the third resistor R3, the fourth resistor R4 and the fifth resistor R5 in the current limiting circuit 100 have the same properties, including the type of resistor, the resistance value and the package size of the resistor.

[0066] After adding the matching branch 104, the current I CLM The calculation formula becomes as follows:

[0067]

[0068] From the above formula, we can conclude that there is an extra I3 term in the calculation formula. If we maintain I CLM The size of R2 can be reduced by adjusting the current of I3, thereby reducing the size of resistor R2, thereby reducing the area cost caused by the resistor R2.

[0069] In addition, the third resistor R3, the fourth resistor R4 and the fifth resistor R5 of the present embodiment have the same properties, including the type of resistor, the resistance value and the package size of the resistor. In this way, R3 and R5 can be used as matching resistors to match R4, which can improve the consistency of circuit performance. It can be understood that temperature changes will affect the resistance value. Therefore, when the matching resistors are close in physical position and have similar temperature coefficients, the effects of temperature changes on them can offset each other, thereby reducing the impact of temperature on circuit performance. In addition, matching resistors will also reduce the impact of process variation (equipment aging, material inhomogeneity, environmental factors, etc.). These resistors are affected by the same process conditions during the manufacturing process, so the differences between matching resistors will be reduced, so adding resistors R3 and R5 improves the accuracy of circuit layout.

[0070] It can be seen from this that the configuration of the matching branch 104 can not only reduce the circuit area but also improve the circuit accuracy.

[0071] Embodiment 3

[0072] Figure 3 Another circuit diagram of a current limiting circuit provided by this embodiment is shown, Figure 3 As shown, in this embodiment, the current limiting circuit 100 further includes a switch control circuit, which includes a bias module 105 and a switch control module; the bias module 105 is configured to provide a bias voltage for the switch control module under the control of the bias signal SW2; the switch control module includes a pull-down unit 106 and a switch unit 107, and the switch control module is configured to control the current limiting branch 101 to output a target current I through the pull-down unit 106 under the control of the peripheral access signal SW_IN and the bias voltage. CLM , and, controlling the on / off of the current limiting branch 101 , the voltage control branch 102 and the linear adjustment branch 103 through the switch unit 107 .

[0073] When the bias signal SW2 is at a low level, the bias module 105 is turned on and can provide a bias voltage for the switch control module. When the bias signal SW2 is at a high level, the bias module 105 is turned off and does not provide a bias voltage.

[0074] The peripheral access signal SW_IN can be used as a device plug-in and unplug digital signal (if an external device is plugged in, it is a high level, if no external device is plugged in, it is a low level).

[0075] The pull-down unit 106 controls the current limiting branch 101 to output the target current I CLM , and by controlling the on / off of the current limiting branch 101, the voltage control branch 102 and the linear adjustment branch 103 through the switch unit 107, it is possible to maintain the output target current I of the current limiting branch 101 when the bias module 105 provides a bias voltage and an external device is inserted. CLM .

[0076] Specifically, the switch unit 107 includes a fifth transistor M5, a sixth transistor M6, a tenth transistor M10, an eleventh transistor M11 and a twelfth transistor M12; the gate of the tenth transistor M10 is an external device access signal input terminal, the gate of the tenth transistor M10 is also connected to the second end of the voltage control branch 102 through the fifth transistor M5, and the gate of the tenth transistor M10 is connected to the second end of the linear adjustment branch 103 through the sixth transistor M6; the source of the tenth transistor M10 is connected to the drain of the eleventh transistor M11, the source of the eleventh transistor M11 is connected to the drain of the twelfth transistor M12, the source of the twelfth transistor M12 is grounded, and the gate of the eleventh transistor M11 and the gate of the twelfth transistor M12 are connected to the bias module 105.

[0077] In an example, the bias module 105 includes a fourth current source I4, a fifth current source I5, a thirteenth transistor M13, a fourteenth transistor M14, a fifteenth transistor M15, a sixteenth transistor M16 and a seventeenth transistor M17, wherein the gates of M15 and M16 are both connected to the bias signal SW2, the sources of M15 and M16 are respectively connected to the fourth current source I4 and the fifth current source I5, the drain of M15 is connected to the drain of M14, the drain of M16 is connected to the drain of M17, the gate of M17, the drain of M17, the gate of M11, and the gate of M14 are connected to each other, the source of M14 is connected to the drain of M13, the source of M13 is grounded, and the gate of M13, the drain of M14, and the gate of M12 are connected to each other.

[0078] Among them, M11 and M12 are of common source and common gate structure, and bias is provided for M11 and M12 respectively through the fourth current source I4 and the fifth current source I5. This structure can improve the source impedance of M10, increase the shielding characteristics, and reduce the fluctuation of VDD on the drain of M12 through R6, M10, and M11, thereby reducing the influence of the fluctuation of VDD on the branch current where R6, M10, M11, and M12 are located, and the gate bias voltage of M5, M6, and M7 will be more stable.

[0079] M15, M16, and M10 are all switch MOS tubes, M17 is used to generate gate bias voltages for M14 and M11, and M14 and M13 are used to generate bias voltages for M12. The bias voltages serve as a saturation region to enable M11 and M12 to work normally.

[0080] Further, refer to Figure 3 The pull-down unit 106 includes a sixth resistor R6, a seventh resistor R7, an eighth transistor M8 and a ninth transistor M9; the first end of the sixth resistor R6, the source of the eighth transistor M8 and the source of the ninth transistor M9 are all connected to the power supply terminal VDD, the second end of the sixth resistor is respectively connected to the gate of the ninth transistor and the drain of the tenth transistor M10 in the switch unit 107; the drain of the ninth transistor M9 is respectively connected to one end of the seventh resistor R7 and the gate of the eighth transistor M8, and the other end of the seventh resistor R7 is grounded; the drain of the eighth transistor M8 is connected to the gate of the first transistor M1 in the current limiting branch 101.

[0081] Combine the following Figure 3 The operating principle of the circuit of this embodiment is described.

[0082] When the SW2 signal is at a low level and SW_IN is at a high level, M16 and M15 are turned on, the branch where the current sources I4 and I5 are located is turned on, M17, M14 and M13 provide bias voltage for M11 and M12, M11 and M12 are turned on, M10 is turned on, and then M5 and M6 are turned on, the voltage control branch 102 and the linear adjustment branch 103 are turned on, and the gate voltage of M1 can be controlled.

[0083] The branch where M10 is located pulls down the gate of M9 to turn on M9, so that the drain of M9, that is, the gate of M8, is pulled up by M9, so that M8 is turned off. At this time, the drain of M8, that is, the gate of M1, is pulled down by M6, so that M1 is turned on, and then the current limiting branch 101 outputs I stably. CLM .

[0084] When the SW2 signal is at a high level, M16 and M15 are turned off, the branch where the current sources I4 and I5 are located is turned off, so that M17 and M14, M13 are turned off, M11 and M12 are turned off, and M10 is turned off, that is, the entire bias circuit is turned off and no bias is provided.

[0085] When SW_IN is at a low level, the branch where M10 is located is turned off, and the gate of M9 is short-circuited to the power supply voltage through R6, presenting a turned-off state.

[0086] In this embodiment, the controllability of the circuit is increased by adding two digital control signals, SW2 and SW_IN.

[0087] Figure 4 Another circuit diagram of the current limiting circuit provided in this embodiment is shown. Figure 4 As shown, when the current limiting circuit 100 includes the matching branch 104, the switch unit 107 also includes a seventh transistor M7, and the gate of the tenth transistor M10 is also connected to the matching branch 104 through the seventh transistor M7. In this way, the conduction and shutoff of M7 can be controlled by M10, thereby controlling the conduction and shutoff of the matching circuit. Other circuit control logic and Figure 3 In order to avoid repetition, I will not go into details here.

[0088] The above is a current limiting circuit 100 provided in an embodiment of the present application. Through the circuit relationship between the current limiting branch 101, the voltage control branch 102 and the linear adjustment branch 103, a stable target current output can be achieved, so that a small current can still be output when the electronic device is powered on or an abnormality occurs, thereby preventing damage to the electronic device.

[0089] Furthermore, the linear adjustment branch 103 can reduce the circuit area, reduce the cost, and make the linear adjustment rate adjustable, thereby improving the circuit's ability to perform linear processing on signals under specific conditions.

[0090] Embodiment 4

[0091] Based on the same concept as the above current limiting circuit 100, Figure 5 As shown, this embodiment also provides a chip, and the chip 20 integrates the current limiting circuit 100 as any of the above embodiments, for example, Figure 1 , Figure 2 , Figure 3 or Figure 4 The current limiting circuit 100 is shown.

[0092] Specifically, the chip 20 can be a power management chip, the chip 20 can be a dedicated chip including the above-mentioned discrete devices, more specifically, the chip 20 can be an analog-digital hybrid chip, or an MCU integrated chip, as long as it can achieve the function of the above-mentioned current limiting circuit 100.

[0093] The chip provided in this embodiment is based on the same concept as the above current limitation, so it can at least achieve the beneficial effects that the above current limitation can achieve, and any implementation method of the above current limitation can be applied to the chip provided in this embodiment, which will not be repeated here.

[0094] Embodiment 5

[0095] Based on the same concept as the above current limiting circuit 100, Figure 6 As shown, this embodiment also provides an electronic device 30, on which the current limiting circuit 100 according to any of the above embodiments is integrated, for example, Figure 1 , Figure 2 , Figure 3 or Figure 4 The current limiting circuit shown.

[0096] The electronic device 30 may also be an electronic device including the chip 20 of the fourth embodiment, such as an electronic device having both analog signal processing and digital signal processing functions, for example, the electronic device is a mobile terminal, a smart wearable device, a virtual reality interactive device, etc.

[0097] The electronic device provided in this embodiment is based on the same concept as the above current limitation, so it can at least achieve the beneficial effects that the above current limitation can achieve, and any implementation method of the above current limitation can be applied to the electronic device provided in this embodiment, which will not be described in detail here.

[0098] It should be noted that:

[0099] In the above text, the term "comprises", "comprising" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprising a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element. In addition, it should be noted that the scope of the method and device in the embodiment of the present invention is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in reverse order according to the functions involved, for example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0100] The embodiments of the present invention are described above in conjunction with the accompanying drawings, which are only specific implementation modes of the present invention. However, the present invention is not limited to the above-mentioned specific implementation modes. The above-mentioned specific implementation modes are merely illustrative and not restrictive. Under the enlightenment of the present invention, ordinary technicians in this field can also make many forms without departing from the scope of protection of the purpose of the present invention and the claims, all of which are within the protection of the present invention.

Claims

1. A current limiting circuit, characterized in that: include: Current limiting branch, voltage control branch and linear adjustment branch; The first end of the voltage control branch and the first end of the linear adjustment branch are commonly connected to the voltage input end, the second end of the voltage control branch and the second end of the linear adjustment branch are commonly grounded through the first current source and the second current source respectively, and the third end of the voltage control branch is connected to the third end of the linear adjustment branch to control the voltage of the second end of the linear adjustment branch; The first end of the current limiting branch is connected to the voltage input end through the first resistor of the voltage control branch, and the second end of the current limiting branch is connected to the voltage output end; the second end of the linear adjustment branch is connected to the third end of the current limiting branch to control the voltage output end to output a stable target current.

2. The current limiting circuit according to claim 1, characterized in that: The current limiting branch includes a first transistor, a source of the first transistor is connected to a first end of the current limiting branch, a gate of the first transistor is connected to a third end of the current limiting branch, and a drain of the first transistor is connected to the voltage output end.

3. The current limiting circuit according to claim 1, characterized in that: The voltage control branch includes a second transistor, the source of the second transistor is connected to the first end of the current limiting branch through a third resistor, the gate of the second transistor is connected to the third end of the linear adjustment branch, the gate of the second transistor is connected to the drain of the second transistor, and the drain of the second transistor is connected to the first current source.

4. The current limiting circuit according to claim 1, characterized in that: The linear adjustment branch includes a second resistor, a fourth resistor and a third transistor, two ends of the second resistor and the fourth resistor connected in series are respectively connected to the first end of the linear adjustment branch and the source of the third transistor, the gate of the third transistor is the third end of the linear adjustment branch, and the drain of the third transistor is connected to the second current source.

5. The current limiting circuit according to claim 1, characterized in that: The current limiting circuit also includes a matching branch; The matching branch includes a fifth resistor, a fourth transistor and a third current source, one end of the fifth resistor is connected between the second resistor and the fourth resistor of the linear adjustment branch, the other end of the fifth resistor is connected to the source of the fourth transistor, the gate and the drain of the fourth transistor are connected, the drain of the fourth transistor is connected to the third current source, and the third current source is grounded; The third resistor, the fourth resistor and the fifth resistor in the current limiting circuit have the same properties, which include the type of resistor, the resistance value and the package size of the resistor.

6. The current limiting circuit according to any one of claims 1 to 5, characterized in that: The current limiting circuit further includes a switch control circuit, and the switch control circuit includes a bias module and a switch control module; The bias module is configured to provide a bias voltage to the switch control module under the control of a bias signal; The switch control module includes a pull-down unit and a switch unit. The switch control module is configured to control the current limiting branch to output the target current through the pull-down unit under the control of the external access signal and the bias voltage, and to control the conduction and shutdown of the current limiting branch, the voltage control branch and the linear adjustment branch through the switch unit.

7. The current limiting circuit according to claim 6, characterized in that: The switch unit includes a fifth transistor, a sixth transistor, a tenth transistor, an eleventh transistor and a twelfth transistor; The gate of the tenth transistor is an external device access signal input terminal, the gate of the tenth transistor is also connected to the second terminal of the voltage control branch through the fifth transistor, and the gate of the tenth transistor is connected to the second terminal of the linear adjustment branch through the sixth transistor; The source of the tenth transistor is connected to the drain of the eleventh transistor, the source of the eleventh transistor is connected to the drain of the twelfth transistor, the source of the twelfth transistor is grounded, and the gate of the eleventh transistor and the gate of the twelfth transistor are connected to the bias module.

8. The current limiting circuit according to claim 6, characterized in that: The pull-down unit includes a sixth resistor, a seventh resistor, an eighth transistor and a ninth transistor; The first end of the sixth resistor, the source of the eighth transistor and the source of the ninth transistor are all connected to the power supply terminal, and the second end of the sixth resistor is respectively connected to the gate of the ninth transistor and the drain of the tenth transistor in the switch unit; The drain of the ninth transistor is respectively connected to one end of the seventh resistor and the gate of the eighth transistor, and the other end of the seventh resistor is grounded; The drain of the eighth transistor is connected to the gate of the first transistor in the current limiting branch.

9. The current limiting circuit according to claim 8, characterized in that: In the case where the current limiting circuit includes a matching branch, the switch unit further includes a seventh transistor, and the gate of the tenth transistor is further connected to the matching branch through the seventh transistor.

10. A chip, characterized in that: The chip comprises the current limiting circuit according to any one of claims 1 to 9.

11. An electronic device, characterized in that: The electronic device comprises the current limiting circuit according to any one of claims 1 to 9.

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