Universal chip supporting concurrence of instruction set and mass data

Abstract

The invention relates to the technical field of data storage, in particular to a universal chip supporting concurrence of an instruction set and mass data, the chip comprises an external interface component, a bus, a storage module, a custom module and an instruction transmitting module, the universal chip comprises the fixed external interface component, the bus, the storage module and the instruction transmitting module, the universal chip comprises a fixed part and a custom module which can be customized by a user, and the custom module is realized through an FPGA, so that the universal chip can flexibly adapt to various custom functions and can also support concurrent processing of a large amount of data, and compared with a chip only using the FPGA, the fixed part in the universal chip can effectively guarantee the efficiency of the chip, and the cost of the universal chip is reduced. And the instruction transmitting module can support the processing of an instruction set, so that the flexibility and efficiency of the chip can be ensured at the same time.

Description

Technical Field

[0001] The present invention relates to the technical field of chip design, and in particular to a general chip supporting instruction sets and a large amount of data concurrency. Background Art

[0002] At present, the types of chips are gradually diversified, such as ASIC (Application Specific Integrated Circuit) chips, FPGA (Field Programmable Gate Array) chips, GPU (Graphics Processing Unit) chips, CPU (Central Processing Unit) chips, etc. Users can choose suitable chips according to the functions they need.

[0003] However, in addition to functional adaptation, users also have semi-customization needs. Semi-customization means that the hardware structure can be flexibly changed in real time according to real-time configuration needs. ASIC chips, as customized special chips, are not programmable and it is difficult to support the real-time configuration characteristics of semi-customization needs. GPU chips and CPU chips, as general-purpose chips, are difficult to meet the characteristics of customizable functions in semi-customization needs. Although FPGA chips support semi-customization, their speed and energy consumption are poor. In the existing technology, users can only weigh the flexibility and efficiency of the chip to select a suitable chip. Therefore, how to ensure the flexibility and efficiency of the chip at the same time has become a problem that needs to be solved urgently. Summary of the invention

[0004] In view of the above technical problems, the technical solution adopted by the present invention is: A general chip supporting instruction sets and large amounts of data concurrently comprises: an external interface component, a bus, a storage module, a custom module and an instruction transmission module.

[0005] The external interface component includes an external interface and its corresponding external interface module. The external interface component is used to move external data from the outside of the universal chip to the universal chip through the external interface under the control of the external interface module. The external interface component is connected to the bus.

[0006] The bus is used to support information transmission among the external interface component, the storage module, the custom module and the instruction transmitting module.

[0007] The storage module is used to store the external data and provide it to the custom module for use, and to store the internal data processed by the custom module. The storage module is connected to the bus.

[0008] The custom module is implemented by FPGA, the custom module is used to support user-defined functions, and the custom module is connected to the bus.

[0009] The instruction transmitting module is used to send the instruction corresponding to the custom function to the custom module for processing in the form of an instruction pipeline, and the instruction transmitting module is connected to the bus.

[0010] Compared with the prior art, the present invention has obvious beneficial effects. By means of the above technical solution, a general-purpose chip supporting instruction sets and large amounts of data concurrency provided by the present invention can achieve considerable technical advancement and practicality, and has wide industrial utilization value, and has at least the following beneficial effects: The present invention provides a universal chip supporting instruction sets and large amounts of data concurrently. The universal chip comprises: an external interface component, a bus, a storage module, a custom module and an instruction emission module. The external interface component comprises an external interface and its corresponding external interface module. The external interface component is used to move external data from the outside of the universal chip to the universal chip through the external interface under the control of the external interface module. The external interface component is connected to the bus. The bus is used to support information transmission between the external interface component, the storage module, the custom module and the instruction emission module. The storage module is used to store the external data and provide it to the custom module for use, as well as to store internal data processed by the custom module. The storage module is connected to the bus. The custom module is implemented by FPGA. The custom module is used to support user custom functions. The custom module is connected to the bus. The instruction emission module is used to send instructions corresponding to the custom functions to the custom module for processing in the form of an instruction pipeline. The instruction emission module is connected to the bus.

[0011] It can be seen that the universal chip contains fixed external interface components, buses, storage modules and instruction transmission modules, as well as custom modules that can be customized by users. The custom modules are implemented through FPGA, so that the universal chip can flexibly adapt to various custom functions and support concurrent processing of large amounts of data. Compared with using only FPGA chips, the fixed part of the universal chip can effectively guarantee the efficiency of the chip, and the instruction transmission module can support the processing of instruction sets, thereby ensuring the flexibility and efficiency of the chip at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0013] Figure 1 A schematic diagram of the architecture of a general chip supporting instruction sets and large amounts of data concurrency provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0014] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0015] This embodiment provides a general purpose chip that supports instruction sets and large amounts of data concurrently, characterized in that the general purpose chip includes: an external interface component, a bus, a storage module, a custom module, and an instruction transmission module, see Figure 1 , is a schematic diagram of the architecture of a general chip supporting instruction sets and large amounts of data concurrency provided by an embodiment of the present invention; The external interface component includes an external interface and a corresponding external interface module, the external interface component is used to move external data from the outside of the general chip to the general chip through the external interface under the control of the external interface module, and the external interface component is connected to the bus; The bus is used to support information transmission between the external interface component, the storage module, the custom module and the instruction transmission module; The storage module is used to store the external data and provide it to the custom module for use, and to store the internal data processed by the custom module, and the storage module is connected to the bus; The custom module is implemented by FPGA, the custom module is used to support the user's custom functions, and the custom module is connected to the bus; The instruction transmitting module is used to send the instruction corresponding to the custom function to the custom module for processing in the form of an instruction pipeline, and the instruction transmitting module is connected to the bus.

[0016] Among them, the custom module is implemented through a field programmable gate array (FPGA). The field programmable gate array (FPGA) has the characteristics of programmability, so the custom module can support user custom functions, and the field programmable gate array (FPGA) has parallel computing capabilities, so in scenarios with large amounts of concurrent data, the custom module is also more efficient in data processing.

[0017] The information transmitted by the bus may include addresses, data, signals, etc., and the instructions corresponding to the custom functions may include read instructions, write instructions, etc.

[0018] In one embodiment, the external interface component may also support moving internal data within the universal chip to the outside of the universal chip.

[0019] In a specific implementation, the external interface and its corresponding external interface module include at least one of a DDR interface and its corresponding DDR interface module, a PCIE interface and its corresponding PCIE interface module, and an ETH interface and its corresponding ETH interface module.

[0020] Among them, the external interface and its corresponding external interface module can be used to communicate with external devices, and the external devices may include DDR devices, PCIE devices, ETH devices, etc. It should be noted that the implementer can adjust the design of the external interface component according to actual needs, for example, according to the communication requirements with a certain other type of external device, add corresponding external interface and external interface module, or set multiple groups of corresponding external interface components according to the communication requirements with multiple types of external devices.

[0021] In a specific implementation, the storage module includes at least one of a cache memory, a random access memory, a local memory, and a dedicated memory.

[0022] Among them, the implementer can adjust the design of the memory in the storage module according to actual needs, for example, add corresponding memory according to the storage requirements of a certain other type of memory, or set multiple groups of corresponding memories according to the storage requirements of multiple types of memory.

[0023] For example, if the user's customized function is a parallel processing function corresponding to a parallel processing module in a GPU, the storage module should at least include a cache, a local memory, and a dedicated memory.

[0024] In a specific implementation, the storage module further includes a data migration controller.

[0025] Among them, a data movement controller (DMA) can be used to provide high-speed data transmission between an external device and a memory and between memories.

[0026] In a specific implementation, the custom module includes at least one first custom submodule and at least one second custom submodule, and the custom functions include first-category functions and second-category functions.

[0027] In one embodiment, the custom module may include only at least one first custom sub-module, or may include only at least one second custom sub-module.

[0028] In a specific implementation, the first custom submodule is connected to the bus, and the first custom submodule is used to support the corresponding first-category functions, which include at least one of communication functions, baseband encoding and decoding functions, and encryption and decryption functions.

[0029] Among them, the first type of functions supported by the first custom sub-module can be considered as functions that require more logical processing. In addition to the communication function, baseband encoding and decoding function, and encryption and decryption function provided in this embodiment, it can also include medium radio frequency function, video display function, network processing function, detection function, matrix calculation function, etc.

[0030] In a specific embodiment, the second custom sub-module is used to support the corresponding second-category functions, which include at least one of basic operation functions, access functions, comparison functions, data packing and / or unpacking functions, data compression and / or decompression functions, and matrix calculation functions.

[0031] Among them, the second type of functions supported by the second custom sub-module can be considered as functions that require less logical processing. In addition to the basic operation functions, access functions, comparison functions, data packing and / or unpacking functions, data compression and / or decompression functions, and matrix calculation functions provided in this embodiment, it can also include analysis functions, etc.

[0032] In a specific implementation, the custom module is programmed according to the custom function to support the custom function.

[0033] In this embodiment, the universal chip includes fixed external interface components, buses, storage modules and instruction transmission modules, as well as user-defined modules. The user-defined modules are implemented through FPGA, so that the universal chip can flexibly adapt to various custom functions and support concurrent processing of large amounts of data. Compared with using only FPGA chips, the fixed part of the universal chip can effectively ensure the efficiency of the chip, and the instruction transmission module can support the processing of instruction sets, thereby ensuring the flexibility and efficiency of the chip at the same time.

[0034] Although some specific embodiments of the present invention have been described in detail by way of example, it will be appreciated by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the present invention. It will also be appreciated by those skilled in the art that various modifications may be made to the embodiments without departing from the scope and spirit of the present invention. The scope of the present invention is defined by the appended claims.

Claims

1. A general-purpose chip that supports instruction sets and large amounts of data concurrently, characterized in that: The general chip includes: an external interface component, a bus, a storage module, a custom module and an instruction transmission module; The external interface component includes an external interface and a corresponding external interface module, the external interface component is used to move external data from the outside of the general chip to the general chip through the external interface under the control of the external interface module, and the external interface component is connected to the bus; The bus is used to support information transmission between the external interface component, the storage module, the custom module and the instruction transmission module; The storage module is used to store the external data and provide it to the custom module for use, and to store the internal data processed by the custom module, and the storage module is connected to the bus; The custom module is implemented by FPGA, the custom module is used to support the user's custom functions, and the custom module is connected to the bus; The instruction transmitting module is used to send the instruction corresponding to the custom function to the custom module for processing in the form of an instruction pipeline, and the instruction transmitting module is connected to the bus.

2. The general-purpose chip supporting instruction sets and large amounts of data concurrency according to claim 1, characterized in that: The external interface and its corresponding external interface module include at least one of a DDR interface and its corresponding DDR interface module, a PCIE interface and its corresponding PCIE interface module, and an ETH interface and its corresponding ETH interface module.

3. The general chip supporting instruction set and large amount of data concurrency according to claim 1, characterized in that: The storage module includes at least one of a cache memory, a random access memory, a local memory, and a dedicated memory.

4. The general chip supporting instruction set and large amount of data concurrency according to claim 3, characterized in that: The storage module also includes a data migration controller.

5. The general purpose chip supporting instruction set and large amount of data concurrency according to claim 1, characterized in that: The custom module includes at least one first custom submodule and at least one second custom submodule, and the custom functions include first-category functions and second-category functions.

6. The general purpose chip supporting instruction set and large amount of data concurrency according to claim 5, characterized in that: The first custom submodule is connected to the bus, and the first custom submodule is used to support the corresponding first-category functions, which include at least one of communication functions, baseband encoding and decoding functions, and encryption and decryption functions.

7. The general purpose chip supporting instruction set and large amount of data concurrency according to claim 5, characterized in that: The second custom submodule is used to support the corresponding second-category functions, which include at least one of basic operation functions, access functions, comparison functions, data packing and / or unpacking functions, data compression and / or decompression functions, and matrix calculation functions.

8. The general chip supporting instruction set and large amount of data concurrency according to claim 1, characterized in that: The custom module is programmed according to the custom function to support the custom function.

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