Data management method and device for impedance spectroscopy analysis, equipment and storage medium

Abstract

The invention discloses a data management method and device for impedance spectroscopy analysis, equipment and a storage medium, and the method comprises the steps: reading battery data collected by an electric metering chip under the condition of obtaining a data reading trigger event, and sequentially caching the battery data to a first storage unit and a second storage unit; and under the condition that a processing trigger event for operating the impedance spectroscopy analysis algorithm is obtained, the battery data are read from the third storage unit so as to operate the impedance spectroscopy analysis algorithm. Therefore, the battery data is transmitted to the impedance spectroscopy analysis algorithm in a multi-level cache mode, the processing period of the impedance spectroscopy analysis algorithm and the sampling rate of the electricity metering chip are coordinated in order, it can be guaranteed that the battery data with the high sampling rate can be timely and accurately transmitted, the battery data can also adapt to the long algorithm processing period, and on the premise that the function of the impedance spectroscopy analysis algorithm is guaranteed, the battery data can be accurately transmitted. CPU resources are properly occupied by an impedance spectroscopy analysis algorithm, so that the heating of the system is in a reasonable range.

Description

Technical Field

[0001] The present application relates to battery management technology, and in particular to a data management method, device, equipment, and storage medium for impedance spectrum analysis. Background Art

[0002] With the development of fast charging technology, existing technologies have supported high-power 150W fast charging solutions based on the programmable power supply (PPS) fast charging protocol. High-current fast charging can cause battery "damage" under certain conditions, such as battery lithium deposition. So how to monitor battery-related status? Battery electrochemical impedance spectroscopy provides an analytical approach. Electrochemical impedance spectroscopy is a method of studying electrode systems by using a small-amplitude sinusoidal potential (or current) as a perturbation electrical signal to make the electrode system produce an approximately linear response, and measuring the ratio of the AC potential to the current signal of the electrode system over a wide frequency range (this ratio is the impedance of the system).

[0003] Electrochemical impedance spectroscopy (EIS) analysis has become a powerful tool for studying complex chemical and electrochemical processes (such as corrosion). In particular, in the past two decades, it has been widely used in electrochemical energy systems (fuel cells, supercapacitors and secondary batteries), especially in predicting battery status (for example, battery state of charge (SOC) and battery health (SOH)) and determining factors that limit electrode performance (conductivity, charge transfer characteristics, passivation film characteristics, etc.). EIS has outstanding advantages in studying systems with interference from complex factors. The frequency range of impedance testing is very wide, so the measured impedance can reflect a variety of complex electrochemical properties: material transfer, rate constants, diffusion coefficients and dielectric constants. The high sampling frequency in the widescreen of impedance testing for some electronic devices can currently be as high as 1Khz, that is, sampling once every 1ms. With such a high sampling frequency, the cost of real-time processing of electronic devices (1ms ADC sampling + 1ms period real-time processing) is too high, and it has been occupying the central processing unit (Central Processing Unit, CPU) resources will cause serious heat generation, and in a multi-task scheduling system, strict 1ms CPU scheduling cannot be guaranteed. Therefore, the problems faced by high sampling frequency impedance spectrum analysis need to be solved urgently. Summary of the invention

[0004] The embodiments of the present application are intended to provide a data management method, device, equipment, and storage medium for impedance spectrum analysis.

[0005] The technical solution of this application is implemented as follows:

[0006] In a first aspect, a data management method for impedance spectroscopy analysis is provided, the method comprising:

[0007] In the case of obtaining a data reading trigger event, reading the electric metering chip to collect battery data, and caching the battery data in the first storage unit; wherein the battery data includes battery voltage and battery current;

[0008] When the data cache of the first storage unit ends, reading the battery data from the first storage unit;

[0009] Using the battery data to update historical data in the second storage unit for performing impedance spectrum analysis processing;

[0010] When a processing trigger event for executing an impedance spectrum analysis algorithm is acquired, battery data is read from the second storage unit to execute the impedance spectrum analysis algorithm.

[0011] In a second aspect, a data management device for impedance spectrum analysis is provided, the device comprising: a first processing unit, a first storage unit, a second processing unit, a second storage unit, and a third processing unit;

[0012] The first processing unit is used to read the battery data collected by the electricity metering chip and cache the battery data to the first storage unit when a data reading trigger event is obtained; wherein the battery data includes battery voltage and battery current;

[0013] The second processing unit is used to read the battery data from the first storage unit when the data cache of the first storage unit ends; and use the battery data to update the historical data used for impedance spectrum analysis in the second storage unit;

[0014] The third processing unit is further configured to read the battery data from the second storage unit to execute the impedance spectrum analysis algorithm when a processing trigger event for executing the impedance spectrum analysis algorithm is acquired.

[0015] In a third aspect, a data management device for impedance spectrum analysis is provided, comprising: a processor and a memory configured to store a computer program that can be run on the processor,

[0016] Wherein, the processor is configured to execute the steps of the aforementioned method when running the computer program.

[0017] In a fourth aspect, a computer-readable storage medium is provided, on which a computer program is stored, wherein the computer program implements the steps of the aforementioned method when executed by a processor.

[0018] In the embodiment of the present application, a data management method and device, equipment, and storage medium for impedance spectrum analysis are provided, the method comprising: in the case of obtaining a data reading trigger event, reading the battery data collected by the electric metering chip, and caching the battery data to the first storage unit; wherein the battery data includes the battery voltage and the battery current; the data caching of the first storage unit ends, and the battery data is read from the first storage unit; the historical data used for impedance spectrum analysis processing in the second storage unit is updated using the battery data; in the case of obtaining a processing trigger event for running the impedance spectrum analysis algorithm, the battery data is read from the second storage unit to run the impedance spectrum analysis algorithm. In this way, the data is transmitted to the impedance spectrum analysis algorithm through a multi-level cache method, and the processing cycle of the impedance spectrum analysis algorithm and the sampling rate of the electric metering chip are coordinated in an orderly manner, that is, the battery data with a high sampling rate can be transmitted in a timely and accurate manner, and can also adapt to a longer algorithm processing cycle. Under the premise of ensuring the function of the impedance spectrum analysis algorithm, the impedance spectrum analysis algorithm appropriately occupies CPU resources, so that the system heating is within a reasonable range. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is a first flow chart of the data management method for impedance spectrum analysis in an embodiment of the present application;

[0020] Figure 2 A schematic diagram of the structure of an Android operating system architecture provided in an embodiment of the present application;

[0021] Figure 3 This is a second flow chart of the data management method for impedance spectrum analysis in an embodiment of the present application;

[0022] Figure 4 This is a flowchart of the implementation of the data management method of the hidl layer in the embodiment of the present application;

[0023] Figure 5 The implementation process of the kernel layer data management method in the embodiment of this application is as follows: Figure 1 ;

[0024] Figure 6 The implementation process of the kernel layer data management method in the embodiment of this application is as follows: Figure 2 ;

[0025] Figure 7 The implementation process of the kernel layer data management method in the embodiment of this application is as follows: Figure 3 ;

[0026] Figure 8 The implementation process of the kernel layer data management method in the embodiment of this application is as follows: Figure 4 ;

[0027] Fig. 9 This is a schematic diagram of the composition structure of the data management device for impedance spectrum analysis in an embodiment of the present application;

[0028] Fig.10 Schematic diagram of the composition structure of the data management device for impedance spectrum analysis in the embodiment of the present application. DETAILED DESCRIPTION

[0029] In order to enable a more detailed understanding of the features and technical contents of the embodiments of the present application, the implementation of the embodiments of the present application is described in detail below in conjunction with the accompanying drawings. The attached drawings are for reference only and are not used to limit the embodiments of the present application.

[0030] Figure 1 FIG. 1 is a first flow chart of the data management method for impedance spectrum analysis in an embodiment of the present application. Figure 1 As shown, the method may include:

[0031] Step 101: when a data reading trigger event is obtained, reading the battery data collected by the electricity metering chip and caching the battery data in a first storage unit; wherein the battery data includes the battery voltage and the battery current;

[0032] In some embodiments, the method further includes: when it is determined that the electricity metering chip meets the high sampling rate execution condition, controlling the electricity metering chip to collect battery data at a first sampling frequency; when it is determined that the electricity metering chip does not meet the high sampling rate execution condition, controlling the electricity metering chip to collect battery data at a second sampling frequency; wherein the first sampling frequency is higher than the second sampling frequency. It should be noted that the second sampling rate can also be 0, that is, when the high sampling rate execution condition is not met, the battery data is not monitored.

[0033] That is to say, the sampling frequency of the electricity metering chip can be flexibly controlled under different battery usage conditions. The processing cycle of the impedance spectrum analysis algorithm of the electricity metering chip can also be flexibly controlled under different battery usage conditions.

[0034] Exemplarily, the high sampling rate execution condition includes: the electronic device is in a charging state, or the electronic device is in a fast charging state.

[0035] Furthermore, the high sampling rate execution condition also includes: the electronic device is in the screen-off state. In order to reduce the impact of the EIS algorithm operation on the normal operation of the electronic device, the high sampling rate function of the electricity metering chip can be started when the screen is off and the charging conditions specified by the fast charging protocol are met.

[0036] In some embodiments, the method includes: controlling the electricity metering chip to collect battery data at a first sampling frequency or a second sampling frequency by setting a value of a high sampling rate enable flag of the electricity metering chip.

[0037] Specifically, the high sampling rate enable flag of the electricity metering chip takes a first value, switching to the first sampling frequency; the high sampling rate enable flag of the electricity metering chip takes a second value, switching to the second sampling frequency.

[0038] In some embodiments, the electricity metering chip includes at least two storage units to store the ADC high sampling rate data of the electricity metering chip. Moreover, the size of the storage unit is positively correlated with the supported sampling frequency, and the sampling frequency can be increased by expanding the size of the electricity metering chip including the storage unit. It is also possible to expand the processing cycle of the EIS algorithm by expanding the size of the electricity metering chip including the storage unit, and exchange the space of the electricity metering chip for the processing time of the EIS algorithm.

[0039] It should be noted that the data reading trigger event is used to trigger the reading of battery data collected by the electricity metering chip. The data reading trigger event can be an interrupt signal sent by the electricity metering chip to obtain the battery data.

[0040] Exemplarily, the electricity metering chip includes a third storage unit and a fourth storage unit; when a data reading trigger event is obtained, the electricity metering chip is read to collect battery data, including: when the third storage unit of the electricity metering chip is full, an interrupt signal sent by the electricity metering chip is obtained; in response to the interrupt signal, the battery data is read from the third storage unit; when the fourth storage unit of the electricity metering chip is full, an interrupt signal sent by the electricity metering chip is obtained; in response to the interrupt signal, the battery data is read from the fourth storage unit. In other words, the interrupt signal is used to remind the data control device to read the battery data.

[0041] In some embodiments, in response to an interrupt signal, determining that the third storage unit is unread according to a read flag of the third storage unit, reading battery data from the third storage unit; setting the read flag of the third storage unit to a read flag;

[0042] Alternatively, the method further includes: responding to an interrupt signal, determining that the third storage unit has been read according to the read flag of the third storage unit, and reading battery data from the fourth storage unit; and setting the read flag of the third storage unit to an unread flag.

[0043] That is, the read flag is set to indicate which storage unit's data is to be read.

[0044] In some embodiments, the method further includes: when the third storage unit of the electricity metering chip is full, clearing the fourth storage unit of the electricity metering chip; when the fourth storage unit of the electricity metering chip is full, clearing the third storage unit of the electricity metering chip.

[0045] In some embodiments, when implementing the steps of the data management method for impedance spectrum analysis based on the Android operating system, the Kernel layer reads the battery data collected by the electricity metering chip and stores it in the first storage unit.

[0046] Step 102: when the data cache of the first storage unit is completed, reading the battery data from the first storage unit;

[0047] In some embodiments, reading the electricity metering chip to collect battery data and caching the battery data in a first storage unit includes: reading the electricity metering chip to collect battery data; assembling the read battery data into a preset first structure; wherein the first structure includes data length and battery data; when the first storage unit is empty, locking the first storage unit; caching data elements in the first storage unit; and unlocking the first storage unit after completing data caching in the first storage unit.

[0048] That is to say, the battery data can only be written when the first storage unit is empty, and when writing data to the first storage unit, the first storage unit needs to be locked first, that is, the operation permission of the first storage unit is obtained, and then the data is written. After writing is completed, the first storage unit is unlocked so that other units can obtain the operation permission of the first storage unit and read the data. In this way, data read and write conflicts are avoided.

[0049] Exemplarily, the first storage unit may be a first-in-first-out queue to ensure the timing of data.

[0050] In some embodiments, the method also includes: when the first storage unit is not empty, locking the first storage unit; reading the first structure from the first storage unit and storing it in the first buffer; when the first storage unit is empty, unlocking the first storage unit and setting a data preparation completion signal; determining that the data preparation is completed according to the data preparation completion signal; locking the first buffer; reading the first structure from the first buffer; unlocking the first buffer and setting a data reading completion signal.

[0051] That is to say, in the process of caching the data in the first storage unit into the second storage unit, the data needs to be first written into a preset first buffer area, and then read from and written into the buffer area.

[0052] In some embodiments, when implementing the steps of the data management method for impedance spectrum analysis based on the Android operating system, the hidl layer reads the battery data reported by the kernel layer and caches it in the second storage unit. The first buffer may include a buffer of the kernel layer, the first buffer may include a buffer of the hidl layer, or the first buffer may include a buffer of the kernel layer and a buffer of the hidl layer.

[0053] Step 103: using the battery data to update the historical data used for impedance spectrum analysis in the second storage unit;

[0054] It should be noted that the second storage unit stores the data required for running the impedance spectrum analysis algorithm.

[0055] In some embodiments, battery data is used to update battery data in a second storage unit for impedance spectrum analysis processing, including: when it is determined that the storage space of the second storage unit is sufficient based on the data length of the battery data cached in the first storage unit, the battery data is cached in the second storage unit for impedance spectrum analysis processing; when it is determined that the storage space of the second storage unit is insufficient based on the data length of the battery data cached in the first storage unit, at least part of the historical data in the second storage unit is deleted; and the battery data is cached in the second storage unit for impedance spectrum analysis processing.

[0056] That is, before caching data in the second storage unit, it is necessary to ensure that the second storage unit has sufficient storage space.

[0057] In some embodiments, using the battery data to update the battery data in the second storage unit for impedance spectrum analysis includes: preprocessing the battery data; and using the battery data to update the battery data in the second storage unit for impedance spectrum analysis.

[0058] Before performing EIS processing, the battery data is preprocessed to improve the data quality. Exemplarily, the preprocessing includes noise reduction processing, smoothing processing, etc.

[0059] Step 104: when a processing trigger event for running the impedance spectrum analysis algorithm is obtained, the battery data is read from the second storage unit to run the impedance spectrum analysis algorithm.

[0060] In some embodiments, the trigger event may be: the processing cycle of the impedance spectrum analysis algorithm until the EIS operation signal is obtained, or the data update of the second storage unit is completed.

[0061] By adopting the above technical solution, the data is transmitted to the impedance spectrum analysis algorithm through a multi-level cache method, and the processing cycle of the impedance spectrum analysis algorithm and the sampling rate of the electricity metering chip are coordinated in an orderly manner, which can ensure that the battery data with a high sampling rate can be transmitted in a timely and accurate manner, and can also adapt to the longer algorithm processing cycle. Under the premise of ensuring the function of the impedance spectrum analysis algorithm, the impedance spectrum analysis algorithm appropriately occupies CPU resources, so that the system heat generation is within a reasonable range.

[0062] The data management method for impedance spectrum analysis provided in the embodiment of the present application can be implemented based on the Android system. Figure 2 A schematic diagram of the composition structure of an Android operating system architecture provided for an embodiment of the present application, wherein the impedance spectrum analysis algorithm runs in the hidl layer, the hidl layer runs the user space of the application, and the kernel layer runs in the kernel space. The final destination of the Android operating system is the kernel space + user space.

[0063] In order to better reflect the purpose of this application, based on the above embodiments of this application, the data management method of impedance spectrum analysis based on the Android operating system is illustrated by way of example. Figure 3 As shown, the data management method for implementing impedance spectrum analysis based on the Android system may include:

[0064] Step 301: When a data read trigger event is obtained, the kernel layer reads the battery data collected by the electricity metering chip and caches the battery data in a first storage unit; wherein the battery data includes battery voltage and battery current;

[0065] Step 302: When the data cache of the first storage unit ends, the hidl layer reads the battery data from the first storage unit;

[0066] Step 303: the hidl layer uses the battery data to update the historical data used for impedance spectrum analysis in the second storage unit;

[0067] Step 304: when the hidl layer obtains the processing trigger event for running the impedance spectrum analysis algorithm, it reads the battery data from the second storage unit and executes the impedance spectrum analysis algorithm thread.

[0068] That is to say, the kernel layer reads the battery data collected by the electricity metering chip through the system bus and caches it in the first storage unit. The hidl layer reads the battery data from the first storage unit and caches it in the second storage unit. The hidl layer triggers the operation of the impedance spectrum analysis algorithm.

[0069] Specifically, the data management method for implementing impedance spectrum analysis based on the Android system may include:

[0070] 1. When the electronic device is powered on and initialized, the hidl layer initializes and establishes the eis algorithm thread, and then determines whether the eis algorithm thread execution conditions are met (for example, the execution conditions are the mobile phone screen off + fast charging protocol charging conditions). If the eis algorithm thread execution conditions are not met, the hidl layer disables the enable high-frequency sampling function (enable) of the fuel gauge chip by writing the eis_cmd node, and then the eis algorithm thread will be suspended, waiting for the eis algorithm thread execution conditions to be met, then the hidl layer turns on the enable high-frequency sampling function of the fuel gauge chip by writing the eis_cmd node, and the high-frequency sampling function will be reawakened. High-frequency sampling increases power consumption, and it is turned on by writing registers when needed, and turned off by writing registers when not needed. Figure 4 This is a flowchart for implementing the data management method of the hidl layer in an embodiment of the present application.

[0071] 2. When the thread of the impedance spectrum analysis algorithm is scheduled for execution because it meets the execution conditions, it will first set the attribute enable to true through the eis_cmd node and send it to the kernel to start high-frequency sampling. The kernel detects that the eis_cmd node has been written, and then determines the setting of enable. If enable is set to false, it will directly write the register to the I2C of the fuel gauge chip to turn off the ADC high-frequency sampling function; when it is equal to true, it will write the register to the I2C of the fuel gauge IC to enable the ADC high-frequency sampling function, and then the power meter chip will perform ADC sampling of the battery voltage and battery current according to the sampling frequency designed by its definition. The power meter chip stores the collected voltage and current in its buffer, and its buffer has areas A and B.

[0072] Figures 5 to 8 This is a flowchart of the implementation of the kernel layer data management method in the embodiment of the present application, such as Figure 5As shown, when collecting battery data, it will first determine whether the collected data fills the chip buffer A area. If not, the IC continues to sample; if it is full, it will determine whether the kernel layer has been notified to fetch data, that is, when flag_notify_to_ap is not equal to A, the chip will generate a hardware pulse interrupt signal of full data to AP to notify it to fetch data, and clear the chip buffer B and set the flag flag_notify_to_ap=A; if the chip buffer A is full, the chip will fill the generated data into buffer B. If the buffer B data is also full, the chip will also generate a hardware pulse interrupt signal of full data to AP to notify it to fetch data, and clear the chip buffer A and set the flag flag_notify_to_ap=B; the reason why two buffers are needed is that when another buffer is full and notifies AP to fetch data, it may not be very timely, and the IC cannot interrupt the recording of data, so two buffers are used for buffering.

[0073] 3. When the phone is turned on and initialized, it will register the IC data interrupt processing function, such as Figure 6 As shown, when the IC triggers a hardware interrupt, the software interrupt data_interrupt processing function will be executed, which will read the buffer area A and area B through I2C, and first determine whether the unread flag of A is equal to false. If it is equal to false, it means that A is not read, then it is necessary to read the register of the buffer of A through I2C, read the sampled data from the chip buffer to the kernel memory area at one time, and set the unread flag of A to true; if the unread flag of A is equal to true, it means that the register of the buffer of B needs to be read at this time, and the sampled data is read from the chip buffer to the kernel memory area at one time, and the unread flag of A is set to false. Then the length of the read data\battery voltage\battery current is processed into

[0074] data_size: actual data length

[0075] data_buf: the structure of actual data

[0076] At this time, data needs to be pushed into the kernel's eis fifo (corresponding to the first storage unit). The characteristic of eis fifo is that the data that enters first will be popped out first. Since the data reporting thread may be popping the stack at this time, the interrupt handler needs to lock eis fifo lock first, then push the structure into the stack, and then execute eis fifo unlock to unlock it. At this time, the data reporting thread may be sleeping, and there is data to be uploaded, so the data reporting thread needs to be woken up.

[0077] 4. Such as Figure 7 As shown, when the phone is turned on and initialized, a data reporting thread is also created. This thread will determine whether the eis_fifo heap is empty. If it is empty, the thread is blocked and waits to be awakened by the wake-up mechanism in the interrupt handler. If eis_fifo is not empty, the eis fifo lock operation is also performed, and then a structure data A in the form of dat_size+data_buf is taken out from the fifo heap, and then eis_fifo_unlock is executed to unlock, and then data A is copied to the kernel buffer position uploaded to HIDL, and then esi_data_ok is set to true, and the signal completion amount eis_ack is reset; then the wakeup upload waiting queue will be executed at this time, that is, the location where the kernel node of hidl reading the eis_data data file node is stuck will be awakened. Then wait for the semaphore eis_ack to be completed. When complete eis ack is executed, the data reporting thread will no longer wait and will recheck whether the eis fifo is empty. If it is empty, the thread will wait again. If it is not empty, it will continue to read the next data element (that is, battery data). If the data reporting thread has not received the eisack signal after waiting for 3s, it indicates that the interaction between hidl and the kernel through the eis_data data file node has timed out, and then it will no longer wait and continue to check the next data element of the fifo.

[0078] 5. As Figure 8 As shown, the eis algorithm thread subsequently reads the eis_data file node, which accesses the kernel. Eis_data_ok marks whether the kernel's data is ready. If the kernel has data ready, it returns the data to hidl. If the data is not ready, hidl will keep sleeping and waiting because of the kernel's wait_event_interruptible.

[0079] Eis_data_ok marks that the kernel data is ready, and it can return data to hidl. At this time, the first buffer will be locked (eis_data_lock), which means obtaining the operation permission of this memory area, and then the first structure of the first buffer will be copied to the buf read by hidl, and then the first buffer will be unlocked (eis_data_unlock), which means releasing the operation permission of this memory area. If the lock cannot be obtained, it will wait in place. Finally, the semaphore eis_ack is set to the complete state, indicating that the upload is completed.

[0080] 6. As Figure 4As shown, the EIS algorithm thread subsequently reads the eis_data file node, and this node will access the kernel. If there is data in the kernel, it will return the data to HIDL. If there is no data, HIDL will wait due to the kernel's wait_event_interruptible. If the kernel is indeed ready to provide data to HIDL, then HIDL reads the buf data returned by the kernel using the first structure:

[0081] data_size: xxx

[0082] data_buf: xxx

[0083] to parse. Data_size is the number of voltage-current pairs. The voltage-current pairs required by the EIS algorithm are consecutive len data. Therefore, the arrays of voltage and current in the EIS need to be shifted left by a positions to make room for the newly added data_size = a for storage. Then use the structure of the battery data:

[0084] Voltage: xxx

[0085] Current: xxx

[0086] to parse the data buf, that is, Volt_curr*p = data_buf (the data in the memory area remains unchanged, and different mapping methods will result in different results for mapping this section of memory. For example, when mapping with voltage and current, it will obtain the results of the fixed structure mapping). Then update the voltage-current pairs in the EIS one by one. That is, when i < data_size, Eis_voltage[len - a - i] = p[i].voltage, Eis_current[len - a - i] = p[i].current, and then i++ (i is used to control the update of the voltage-current data read this time. The increase of i means that the mapped memory area also moves accordingly). For example, when all the data is updated, the core algorithm for impedance spectrum analysis is executed. After this algorithm is executed, it will read the eis_data file node again and loop repeatedly.

[0087] Adopting the above technical solution can coordinate the calculation rate of the HIDL algorithm + the data update rate of the underlying chip. The impedance spectrum analysis algorithm of HIDL maintains a low execution rate and does not frequently occupy the CPU running time slice and generate heat. At the same time, the high-sampled data of the underlying IC can be accurately and timely transmitted to the HIDL algorithm for effective operation. On the premise of ensuring the impedance spectrum analysis function, while taking into account system heat generation + system fluency, it makes it possible to run the impedance spectrum analysis method with a high sampling rate on a mobile phone.

[0088] The data management method for impedance spectrum analysis provided in the embodiment of the present application can be applied to electronic devices that have the need for battery impedance spectrum analysis. The electronic devices may include devices such as mobile phones, tablet computers, laptop computers, PDAs, portable media players (PMPs), navigation devices, wearable devices, smart bracelets, cameras, etc. that have storage batteries.

[0089] To implement the method of the embodiment of the present application, based on the same inventive concept, the embodiment of the present application also provides a data management device for impedance spectrum analysis, such as Fig. 9 As shown, the data management device 90 for impedance spectrum analysis includes:

[0090] A first processing unit 901, a first storage unit 902, a second processing unit 903, a second storage unit 904 and a third processing unit 905;

[0091] The first processing unit 901 is used to read the battery data collected by the electricity metering chip and cache the battery data to the first storage unit 902 when a data reading trigger event is obtained; wherein the battery data includes the battery voltage and the battery current;

[0092] The second processing unit 903 is used to read the battery data from the first storage unit 902 after the data cache of the first storage unit 902 is completed; and the historical data used for impedance spectrum analysis processing in the second storage unit 904 is updated using the battery data;

[0093] The third processing unit 905 is further configured to read the battery data from the second storage unit 904 to run the impedance spectrum analysis algorithm when a processing trigger event for running the impedance spectrum analysis algorithm is obtained.

[0094] In some embodiments, the first processing unit 901 is used to control the electricity metering chip to collect battery data at a first sampling frequency when it is determined that the electricity metering chip meets the high sampling rate execution conditions; and to control the electricity metering chip to collect battery data at a second sampling frequency when it is determined that the electricity metering chip does not meet the high sampling rate execution conditions; wherein the first sampling frequency is higher than the second sampling frequency.

[0095] In some embodiments, the high sampling rate execution condition includes: the electronic device is in a charging state, or the electronic device is in a fast charging state.

[0096] In some embodiments, the first processing unit 901 is used to control the electricity metering chip to collect battery data at a first sampling frequency or to collect battery data at a second sampling frequency by setting a value of a high sampling rate enable flag of the electricity metering chip.

[0097] In some embodiments, the electricity metering chip includes a third storage unit and a fourth storage unit;

[0098] The first processing unit 901 is used to obtain an interrupt signal sent by the electricity metering chip when the third storage unit of the electricity metering chip is full; respond to the interrupt signal, and read battery data from the third storage unit; when the fourth storage unit of the electricity metering chip is full, obtain an interrupt signal sent by the electricity metering chip; respond to the interrupt signal, and read battery data from the fourth storage unit.

[0099] In some embodiments, the first processing unit 901 is used to respond to the interrupt signal, determine that the third storage unit is not read according to the read flag of the third storage unit, read the battery data from the third storage unit; set the read flag of the third storage unit to a read flag;

[0100] In some embodiments, the first processing unit 901 is used to respond to the interrupt signal, determine that the third storage unit has been read according to the read flag of the third storage unit, read the battery data from the fourth storage unit; and set the read flag of the third storage unit to an unread flag.

[0101] In some embodiments, when the third storage unit of the electricity metering chip is full, the fourth storage unit of the electricity metering chip is cleared;

[0102] When the fourth storage unit of the electricity metering chip is full, the third storage unit of the electricity metering chip is cleared.

[0103] In some embodiments, the first processing unit 901 is used to read the battery data collected by the electricity metering chip; assemble the read battery data into a preset first structure; wherein the first structure includes data length and battery data; when the first storage unit is empty, lock the first storage unit; cache the data elements to the first storage unit; after the data caching of the first storage unit is completed, unlock the first storage unit.

[0104] In some embodiments, the second processing unit 903 is used to lock the first storage unit when the first storage unit is not empty; read the first structure from the first storage unit and store it in the first buffer; when the first storage unit is empty, unlock the first storage unit and set a data preparation completion signal; determine that the data preparation is completed according to the data preparation completion signal; lock the first buffer; read the first structure from the first buffer; unlock the first buffer and set the data reading completion signal.

[0105] In some embodiments, the second processing unit 903 is further used to cache the battery data in the second storage unit for impedance spectrum analysis when it is determined that the storage space of the second storage unit is sufficient based on the data length of the battery data cached in the first storage unit; delete at least part of the historical data in the second storage unit when it is determined that the storage space of the second storage unit is insufficient based on the data length of the battery data cached in the first storage unit; and cache the battery data in the second storage unit for impedance spectrum analysis.

[0106] In some embodiments, the second processing unit 903 is further used to pre-process the battery data; and use the battery data to update the battery data in the second storage unit for impedance spectrum analysis.

[0107] In practical applications, the device can realize the functions of multiple units by software, hardware, or a combination of software and hardware, so that the device can execute the data management method for impedance spectrum analysis provided by any of the above embodiments. The technical effects of each technical solution of the device can refer to the technical effects of the corresponding technical solutions in the data management method for impedance spectrum analysis, and this application will not repeat them one by one.

[0108] Based on the hardware implementation of each unit in the data management device for impedance spectrum analysis, the embodiment of the present application also provides a data management device for impedance spectrum analysis, such as Fig.10 As shown, the data management device 100 for impedance spectrum analysis includes: a processor 1001 and a memory 1002 configured to store a computer program that can be run on the processor;

[0109] The processor 1001 is configured to execute the method steps in the aforementioned embodiment when running a computer program.

[0110] Of course, in practical applications, Fig.10 As shown, the various components in the device are coupled together through a bus system 1003. It can be understood that the bus system 1003 is used to realize the connection and communication between these components. In addition to the data bus, the bus system 1003 also includes a power bus, a control bus and a status signal bus. However, for the sake of clarity, various buses are marked as bus system 1003 in the figure.

[0111] In practical applications, the processor may be at least one of an application-specific integrated circuit (ASIC), a digital signal processing device (DSPD), a programmable logic device (PLD), a field-programmable gate array (FPGA), a controller, a microcontroller, and a microprocessor. It is understandable that for different devices, the electronic device used to implement the functions of the processor may also be other, and the embodiments of the present application do not specifically limit this.

[0112] The above-mentioned memory can be a volatile memory (volatile memory), such as a random access memory (RAM); or a non-volatile memory (non-volatile memory), such as a read-only memory (ROM), a flash memory, a hard disk (HDD) or a solid-state drive (SSD); or a combination of the above-mentioned types of memory, and provide instructions and data to the processor.

[0113] The above device can be a chip applied to electronic devices, such as a system on chip (SOC) of a mobile phone, for realizing impedance spectrum analysis of a mobile phone battery at a high sampling rate. Optionally, the device can also include an input interface. The processor can control the input interface to communicate with other devices or chips, and specifically, can obtain information or data sent by other devices or chips.

[0114] Optionally, the device may further include an output interface, wherein the processor may control the output interface to communicate with other devices or chips, and specifically, may output information or data to other devices or chips.

[0115] In an exemplary embodiment, the present application also provides a computer-readable storage medium, such as a memory including a computer program, and the computer program can be executed by a processor of a data management device for impedance spectroscopy analysis to complete the steps of the aforementioned method.

[0116] An embodiment of the present application also provides a computer program product, including computer program instructions.

[0117] Optionally, the computer program product can be applied to the data management device for impedance spectrum analysis in the embodiments of the present application, and the computer program instructions enable the computer to execute the corresponding processes implemented by the data management device for impedance spectrum analysis in the various methods of the embodiments of the present application. For the sake of brevity, they will not be repeated here.

[0118] The embodiment of the present application also provides a computer program.

[0119] Optionally, the computer program can be applied to the data management device for impedance spectrum analysis in the embodiments of the present application. When the computer program is run on a computer, the computer executes the corresponding processes implemented by the data management device for impedance spectrum analysis in the various methods of the embodiments of the present application. For the sake of brevity, they will not be described here.

[0120] It should be understood that the terms used in the present application are only for the purpose of describing specific embodiments, but are not intended to limit the present application. The singular forms of "a", "said" and "the" used in the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings. It should also be understood that the term "and / or" used in this article refers to and includes any or all possible combinations of one or more associated listed items. The expressions "having", "may have", "include" and "include", or "may include" and "may include" in this application can be used to indicate the presence of corresponding features (e.g., elements such as numerical values, functions, operations or components), but the presence of additional features is not excluded.

[0121] It should be understood that although the terms first, second, third, etc. may be used in this application to describe various information, such information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other and are not necessarily used to describe a specific order or sequence. For example, without departing from the scope of this application, first information may also be referred to as second information, and similarly, second information may also be referred to as first information.

[0122] The technical solutions described in the embodiments of the present application can be combined arbitrarily without conflict.

[0123] In the several embodiments provided in the present application, it should be understood that the disclosed methods, devices and equipment can be implemented in other ways. The embodiments described above are only schematic. For example, the division of units is only a logical function division. There may be other division methods in actual implementation, such as: multiple units or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the components shown or discussed can be through some interfaces, and the indirect coupling or communication connection of devices or units can be electrical, mechanical or other forms.

[0124] The units described above as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units; some or all of the units may be selected according to actual needs to achieve the purpose of the scheme of this embodiment.

[0125] In addition, all functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may be a separate unit, or two or more units may be integrated into one unit; the above-mentioned integrated units may be implemented in the form of hardware or in the form of hardware plus software functional units.

[0126] The above description is only a specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application.

Claims

1. A data management method for impedance spectroscopy analysis, characterized in that: The method comprises: In the case of obtaining a data reading trigger event, reading the electric metering chip to collect battery data, and caching the battery data in the first storage unit; wherein the battery data includes battery voltage and battery current; When the data cache of the first storage unit ends, reading the battery data from the first storage unit; Using the battery data to update historical data in the second storage unit for performing impedance spectrum analysis processing; When a processing trigger event for executing an impedance spectrum analysis algorithm is acquired, battery data is read from the second storage unit to execute the impedance spectrum analysis algorithm.

2. The method according to claim 1, characterized in that The method further comprises: When it is determined that the electricity metering chip meets the high sampling rate execution condition, controlling the electricity metering chip to collect the battery data at a first sampling frequency; When it is determined that the electricity metering chip does not meet the high sampling rate execution condition, controlling the electricity metering chip to collect the battery data at a second sampling frequency; The first sampling frequency is higher than the second sampling frequency.

3. The method according to claim 2, characterized in that The high sampling rate execution condition includes: the electronic device is in a charging state, or the electronic device is in a fast charging state.

4. The method according to claim 2, characterized in that: The method comprises: By setting the value of the high sampling rate enable flag of the electricity metering chip, the electricity metering chip is controlled to collect the battery data at the first sampling frequency or to collect the battery data at the second sampling frequency.

5. The method according to claim 1, characterized in that The electricity metering chip includes a third storage unit and a fourth storage unit; When a data reading trigger event is obtained, reading the battery data collected by the electricity metering chip includes: When the third storage unit of the electricity metering chip is full, an interrupt signal sent by the electricity metering chip is obtained; In response to the interrupt signal, reading the battery data from the third storage unit; When the fourth storage unit of the electricity metering chip is full, the interrupt signal sent by the electricity metering chip is obtained; In response to the interrupt signal, the battery data is read from the fourth storage unit.

6. The method according to claim 5, characterized in that The method further comprises: In response to the interrupt signal, determining that the third storage unit is unread according to a read flag of the third storage unit, and reading the battery data from the third storage unit; Setting the read flag of the third storage unit to a read flag; The method further comprises: In response to the interrupt signal, determining that the third storage unit has been read according to a read flag of the third storage unit, and reading the battery data from the fourth storage unit; The read flag bit of the third storage unit is set as an unread flag.

7. The method according to claim 5, characterized in that The method further comprises: When the third storage unit of the electricity metering chip is full, clearing the fourth storage unit of the electricity metering chip; When the fourth storage unit of the electricity metering chip is full, the third storage unit of the electricity metering chip is cleared.

8. The method according to claim 1, characterized in that: The reading of the electric metering chip to collect battery data and caching the battery data in a first storage unit includes: Read the electricity metering chip to collect battery data; Assembling the read battery data into a preset first structure; wherein the first structure includes data length and battery data; When the first storage unit is empty, locking the first storage unit; caching the data element in the first storage unit; The data cache of the first storage unit is completed, and the first storage unit is unlocked.

9. The method according to claim 8, characterized in that Reading the battery data from the first storage unit includes: When the first storage unit is not empty, locking the first storage unit; Reading the first structure from the first storage unit and storing it in a first buffer; When the first storage unit is empty, unlocking the first storage unit and setting a data preparation completion signal; Determining that data preparation is completed according to the data preparation completion signal; Locking the first buffer; Read the first structure from the first buffer; The first buffer is unlocked and a data read completion signal is set.

10. The method according to claim 1, characterized in that The method of updating the battery data in the second storage unit for performing impedance spectrum analysis processing by using the battery data includes: When it is determined that the storage space of the second storage unit is sufficient according to the data length of the battery data cached by the first storage unit, the battery data is cached in the second storage unit for performing impedance spectrum analysis processing; When it is determined based on the data length of the battery data cached in the first storage unit that the storage space of the second storage unit is insufficient, at least part of the historical data in the second storage unit is deleted; and the battery data is cached in the second storage unit for use in impedance spectrum analysis processing.

11. A data management device for impedance spectrum analysis, characterized in that: The device comprises: a first processing unit, a first storage unit, a second processing unit, a second storage unit and a third processing unit; The first processing unit is used to read the battery data collected by the electricity metering chip and cache the battery data to the first storage unit when a data reading trigger event is obtained; wherein the battery data includes battery voltage and battery current; The second processing unit is used to read the battery data from the first storage unit when the data cache of the first storage unit ends; and use the battery data to update the historical data used for impedance spectrum analysis in the second storage unit; The third processing unit is further configured to read the battery data from the second storage unit to execute the impedance spectrum analysis algorithm when a processing trigger event for executing the impedance spectrum analysis algorithm is acquired.

12. A data management device for impedance spectrum analysis, characterized in that: The device comprises: a processor and a memory configured to store a computer program capable of being executed on the processor, Wherein, the processor is configured to execute the steps of the method according to any one of claims 1 to 10 when running the computer program.

13. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 10 are implemented.

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