Interdigital capacitor based on heterogeneous integrated piezoelectric substrate

Abstract

The invention relates to an interdigital capacitor based on a heterogeneous integrated piezoelectric substrate. The interdigital capacitor structurally comprises the following steps: providing a piezoelectric film; the metal electrode is positioned above the piezoelectric film; the silicon dioxide functional layer is positioned below the piezoelectric film; the supporting substrate is positioned below the silicon dioxide functional layer; wherein the silicon dioxide functional layer is of an optional structure. Compared with the IPD capacitor integrated outside the chip, the interdigital capacitor provided by the invention has obvious advantages in the aspects of integration and microminiaturization.

Description

Technical Field

[0001] The invention belongs to the technical field of radio frequency filters, and in particular relates to an interdigital capacitor based on a heterogeneous integrated piezoelectric substrate. Background Art

[0002] With the development of communication technology, the performance indicators of RF filters are gradually approaching the limits of pure acoustic devices. Devices based on heterogeneous integrated substrates are also accompanied by problems such as out-of-band spurious modes. Therefore, LC+acoustic hybrid filters have become an important alternative for future RF filters due to their higher design freedom. At present, hybrid filters usually make capacitors and inductors on separate substrates and connect them together through packaging and acoustic parts. However, the device process is more complicated and the structural stability is lower because the IPD and acoustic module are connected externally. The prepared hybrid filter is larger in size and has a lower degree of miniaturization and integration.

[0003] The on-chip capacitor manufacturing method based on tangential selection has the following main disadvantages: the on-chip capacitor with a small area generally adopts the interdigital property, which is basically consistent with the structure of the interdigital transducer used in general surface acoustic wave devices. This means that in order to achieve a "clean" capacitance effect on the surface of the piezoelectric substrate, it is necessary to ensure that the transmission direction corresponding to the interdigital capacitor cannot effectively excite the surface acoustic wave; otherwise, the acoustic wave mode will cause the destruction of the in-band / out-of-band effect. At present, a typical practical example is to make an interdigital transducer in the 90°X direction of the Y-cut lithium niobate and lithium tantalate wafers. Due to the anisotropy of the piezoelectric tensor, the horizontal shear mode of the surface acoustic wave cannot be excited. Due to the change of the acoustic wave transmission characteristics in the heterogeneous wafer, this method cannot solve the problem of Rayleigh waves and longitudinal leakage waves outside the band; and on the surface of the piezoelectric substrate based on the X-cut material, it is difficult to achieve because there are always strong acoustic wave modes. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide an interdigital capacitor based on a heterogeneous integrated piezoelectric substrate. Compared with an off-chip integrated IPD capacitor, the interdigital capacitor has obvious advantages in integration and miniaturization. In addition, since the manufacture of the interdigital electrodes used in the capacitor can be carried out simultaneously with the surface acoustic wave device part, the process flow of the complete device is effectively simplified.

[0005] The present invention provides an interdigital capacitor based on a heterogeneous integrated piezoelectric substrate, wherein the interdigital capacitor structure comprises:

[0006] Providing a piezoelectric film;

[0007] Metal electrodes and bus bars located above the piezoelectric film;

[0008] a silicon dioxide functional layer located below the piezoelectric film;

[0009] a supporting substrate located below the silicon dioxide functional layer;

[0010] Wherein, the silicon dioxide functional layer is used to compensate for the thermal mismatch between the piezoelectric film and the supporting substrate, thereby improving the thermal stability of the subsequently manufactured device.

[0011] Preferably, the thickness of the metal electrode is 20-2000 nm.

[0012] Preferably, the material of the metal electrode and the bus bar includes one or more of aluminum, copper, gold, titanium, nickel, molybdenum and platinum.

[0013] Preferably, the material of the piezoelectric film includes one or more of lithium niobate, lithium tantalate, aluminum nitride and gallium nitride.

[0014] Preferably, the piezoelectric film has a thickness of 0.1-1.5 μm.

[0015] Preferably, the thickness of the silicon dioxide functional layer is 0.02-1.5 μm.

[0016] Preferably, the material of the support substrate includes one or more of silicon, sapphire, silicon carbide and diamond.

[0017] The purpose of the above structure of the present invention is to enable the electric field applied on the surface to make all the piezoelectric materials in the system reach coercive strength, so as to be destroyed during the periodic poling process. If this method is used on the surface of a piezoelectric single crystal, since the electric field excited by the interdigital electrodes is mainly concentrated on the surface, it is difficult to erase the piezoelectricity of the piezoelectric material deep in the piezoelectric wafer, and the resulting capacitive response will have obvious burrs.

[0018] The present invention can be manufactured together with a surface acoustic wave device, effectively simplifying the process flow of the overall device and reducing the size of the package. In addition, the density of the interdigital capacitor increases as the interdigital period decreases, so the interdigital capacitor manufactured by the method has an ultra-high capacitance density. Due to the difference in mechanism from conventional methods, it is basically not affected by the tangent of the piezoelectric material, and is basically ineffective when and only when the polarization axis of the material is parallel to the interdigital fingers on the surface (taking the z-axis polarized material as an example, the Euler angle is (90°, 90°, ±90°)). With respect to the direction of the polarization axis, the metallization rate of the interdigital electrode can be optimized. When the polarization axis is in the thickness direction, the metallization rate is reduced (such as 30%); when the polarization axis is in the plane, a larger metallization rate (such as 50%) is used.

[0019] Beneficial Effects

[0020] (1) Compared with the off-chip integrated IPD capacitor, the interdigital capacitor of the present invention has obvious advantages in integration and miniaturization. In addition, since the interdigital electrodes used in the capacitor can be manufactured simultaneously with the surface acoustic wave device, the process flow of the complete device is effectively simplified.

[0021] (2) Compared with on-chip capacitors based on in-plane orientation, the present invention has basically no requirements on the tangent direction of the piezoelectric material. In addition, it is difficult to achieve a clean and smooth capacitance response in the entire operating frequency band when manufacturing on-chip capacitors based on in-plane orientation on heterogeneous integrated piezoelectric substrates with more complex vibration modes. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is a structural schematic diagram of the present invention.

[0023] Figure 2 It is a schematic diagram of the preparation process of the present invention.

[0024] Figure 3 It is a schematic diagram of the polarization process circuit and the electric field inside the piezoelectric material of the present invention.

[0025] Figure 4 This is the polarization reversal effect of Example 1.

[0026] Figure 5 The capacitance Q value result of Example 1. DETAILED DESCRIPTION

[0027] The present invention will be further described below in conjunction with specific embodiments. It should be understood that these embodiments are only used to illustrate the present invention and are not intended to limit the scope of the present invention. In addition, it should be understood that after reading the content taught by the present invention, those skilled in the art can make various changes or modifications to the present invention, and these equivalent forms fall within the scope limited by the appended claims of the application equally.

[0028] Depend on Figure 1 As shown, the present invention provides an interdigital capacitor based on a heterogeneous integrated piezoelectric substrate, and the interdigital capacitor structure includes:

[0029] Providing a piezoelectric film;

[0030] Metal electrodes and bus bars located above the piezoelectric film;

[0031] a silicon dioxide functional layer located below the piezoelectric film;

[0032] a supporting substrate located below the silicon dioxide functional layer;

[0033] Wherein, the silicon dioxide functional layer is used to compensate for the thermal mismatch between the piezoelectric film and the supporting substrate, thereby improving the thermal stability of the subsequently manufactured device.

[0034] The preparation process of the structural heterogeneous integrated piezoelectric substrate includes the following steps:

[0035] ① Ion implantation: He implantation of piezoelectric crystals 2+ Ion implantation, after which the substrate is cleaned and the bonding surface is activated with O2.

[0036] ② Functional layer growth: Grow the silicon dioxide functional layer by magnetron sputtering, plasma enhanced chemical vapor deposition and other methods.

[0037] ③ Bonding: The piezoelectric film and the rigid substrate are bonded together through a bonding machine.

[0038] ④ Peeling off: After bonding, the bonded heterogeneous integrated substrate is annealed within a suitable temperature range. During annealing, the piezoelectric film is split at the ion implantation damage site, completing the peeling off.

[0039] ⑤Polishing: Perform chemical mechanical polishing on the surface of the heterogeneous integrated substrate to obtain a heterogeneous integrated substrate with low surface roughness.

[0040] Depend on Figure 2 As shown, the preparation process of the metal electrode of the structure includes the following steps:

[0041] S1, coating: spin coating photoresist on the surface of supporting substrate;

[0042] S2, photolithography: using deep ultraviolet (electron beam) exposure technology, using a mask to partially expose the photoresist (electron beam exposure can also be used to directly expose the photoresist without a mask);

[0043] S3, development: locally dissolving the photoresist by taking advantage of the difference in solubility of different parts of the photoresist before and after exposure;

[0044] S4, metal deposition: depositing metal of target thickness;

[0045] S5. Stripping: removing the residual photoresist on the substrate surface and the metal thereon to obtain patterned metal on the supporting substrate surface.

[0046] Polarization failure: Circuit diagram and the electric field generated by the electrode with a metallization rate of 30% in the material. Figure 3 As shown, a DC bias is applied between the ports of the interdigitated electrodes. After maintaining for a period of time (1-3 minutes), the bias is reversed (an electric field is applied to the material in the opposite direction). After ~10 reversals, the lattice structure of the material in the polarization reversal area is effectively destroyed, and the material loses its piezoelectricity.

[0047] Example 1

[0048] This embodiment is applied to 42°YX LiTaO3 / SiO2 / poly-Si / Si substrate, and the film thickness is 600nm, 500nm, 1μm, and 300μm respectively. In order to intuitively show the effect of polarization destruction, the surface acoustic wave resonator with a wavelength of 1μm and a metallization rate of 50% is directly subjected to a DC bias flip operation at 85°C. The absolute value of the DC bias is 32V, and the flip cycle is 5. The resonator admittance curve before and after the operation is compared. Figure 4 As shown in the figure, most of the piezoelectric resonance modes are effectively suppressed, and the far-end admittance curves have not changed much from the original curves, indicating that the electrode still maintains a high quality. Further increasing the flip voltage can further weaken the acoustic resonance response. The Q value curve of the capacitor is shown in Figure 5 As shown, the device can maintain a Q value of more than 50 at 3-4GHz.

[0049] Example 2

[0050] This embodiment is applied to an X-cut 40°Y LiNbO3 / SiC substrate, and the film thickness is 300nm. At this time, since the polarization axis of the material is in the plane and not parallel to the transducer, the proposed method can still be used. The effect is similar to that of Example 1. Most of the piezoelectric resonance modes are effectively suppressed, achieving a high-Q on-chip interdigital capacitor over a wide frequency range.

Claims

1. An interdigital capacitor based on a heterogeneous integrated piezoelectric substrate, characterized in that: The interdigital capacitor structure comprises: Providing a piezoelectric film; Metal electrodes and bus bars located above the piezoelectric film; a silicon dioxide functional layer located below the piezoelectric film; a supporting substrate located below the silicon dioxide functional layer; Wherein, the silicon dioxide functional layer is used to compensate for the thermal mismatch between the piezoelectric film and the supporting substrate.

2. The interdigital capacitor according to claim 1, characterized in that: The thickness of the metal electrode is 20-2000nm.

3. The interdigital capacitor according to claim 1, characterized in that: The materials of the metal electrodes and the busbars include one or more of aluminum, copper, gold, titanium, nickel, molybdenum, and platinum.

4. The interdigital capacitor according to claim 1, characterized in that: The material of the piezoelectric film includes one or more of lithium niobate, lithium tantalate, aluminum nitride, and gallium nitride.

5. The interdigital capacitor according to claim 1, characterized in that: The thickness of the piezoelectric film is 0.1-1.5 μm.

6. The interdigital capacitor according to claim 1, characterized in that: The thickness of the silicon dioxide functional layer is 0.02-1.5 μm.

7. The interdigital capacitor according to claim 1, characterized in that: The material of the support substrate includes one or more of silicon, sapphire, silicon carbide and diamond.

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