Pen and receiving circuit of pen

Abstract

The invention provides a pen and a receiving circuit of the pen. The pen includes: an electrode; a differentiating circuit that performs a differential operation on the signal received by the electrode; a [delta] [sigma] modulation unit that compares the output signal from the differentiating circuit with a reference potential and performs feedback processing on the comparison result; and a digital circuit that performs a correlation operation between an output signal from the [Delta] [Sigma] modulation unit and a known pattern.

Description

[0001] This application is a divisional application of an invention patent application with an international application date of May 10, 2019, an international application number of PCT / JP2019 / 018842, a national application number of 201980096243.0, and an invention name of "Method and pen for sending data from a sensor controller to a pen". Technical Field

[0002] The present invention relates to a method for sending data from a sensor controller to a pen and a pen. Background Art

[0003] A position detection system is known, which is composed of an active stylus pen (hereinafter referred to as the "pen") as a position indicator with a built-in power supply and a position detection device having a touch surface. In this position detection system, signals are sent and received between the position detection device and the pen via a sensor electrode group arranged directly below the touch surface. The signal sent from the position detection device to the pen (hereinafter referred to as the "uplink signal") has the function of synchronizing the pen with the position detection device and sending various instructions to the pen. On the other hand, the signal sent from the pen to the position detection device (hereinafter referred to as the "downlink signal") has the function of causing the position detection device to detect the position of the pen and sending data requested by the instruction to the position detection device.

[0004] An example of the above-mentioned position detection system is disclosed in Patent Document 1 and Non-Patent Document 1. In particular, Patent Document 1 discloses a pen that is configured to detect the falling edge and rising edge of a received signal and restore the waveform of an uplink signal based on the detected falling edge and rising edge, thereby being able to properly restore the waveform of an uplink signal even if low-frequency noise is superimposed on the uplink signal.

[0005] Prior art literature

[0006] Patent Literature

[0007] Patent Document 1: International Publication No. 2018 / 051388

[0008] Non-patent literature

[0009] Non-Patent Literature 1: Mutsumi Hamaguchi, Michiaki Takeda, and Masayuki Miyamoto, “240Hz-Reporting-Rate Mutual Capacitance Touch-Sensing Analog Front-End Enabling Multiple Active / Passive Styluses with 41dB / 32dB SNR for 0.5mmDiameter”, IEEE International Solid-State Circuits Conference, 2015, p.120-122 Summary of the invention

[0010] Problems to be solved by the invention

[0011] However, if rounding occurs in the waveform of the uplink signal, it may be difficult to detect the edge. Therefore, even with the technology described in Patent Document 1, it is impossible to restore the waveform of the uplink signal.

[0012] Therefore, one of the objects of the present invention is to provide a method and a pen that enable a pen to appropriately receive an uplink signal even if a blunting occurs in the waveform of the uplink signal.

[0013] Technical solutions to solve problems

[0014] The method of the present invention is a method for sending data from a sensor controller of a detection pen to the pen via a sensor electrode group, wherein the pen includes: a pen tip electrode, arranged near the pen tip; and an analog circuit, detecting the edge of a signal induced at the pen tip electrode; and a digital circuit, detecting the sending data by correlation operation between the output signal of the analog circuit and a known pattern, the sensor controller generates a pulse signal representing the sending data, and uses the main signal and the sub-signal of the pulse signal to send the pulse signal in a manner that emphasizes the edge, thereby sending the sending data via the sensor electrode group.

[0015] The pen of the present invention is a pen that receives and detects transmission data sent by a sensor controller of the pen via a sensor electrode group, wherein the pen includes: a pen tip electrode, which is arranged near the pen tip; a differential circuit, which detects the edge of the signal induced by the pen tip electrode; a ΔΣ modulator, which compares the output signal of the differential circuit using at least two reference potentials corresponding to positive and negative, respectively, and performs feedback processing on the comparison result; and a digital circuit, which detects the transmission data by correlating the output signal of the ΔΣ modulator with a known pattern.

[0016] Effects of the Invention

[0017] According to the method of the present invention, since the edge of the uplink signal is emphasized, even if blunting occurs in the waveform of the uplink signal, the possibility that the pen can detect the edge increases. Therefore, the pen can properly receive the uplink signal.

[0018] According to the pen of the present invention, even if blunting occurs in the waveform of the uplink signal, the edge can be reliably detected by the folding modulation performed by the ΔΣ modulation unit, so the possibility that the pen can detect the edge increases. Therefore, the pen can appropriately detect the uplink signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is a diagram showing the configuration of a position detection system 1 according to the first embodiment of the present invention.

[0020] Figure 2 (a) is a diagram showing a structural example of an uplink signal US, (b) is a diagram showing an example of an extended code corresponding to a preamble code P, (c) is a diagram showing a code chip string generated by the sensor controller 31 based on the transmission data replaced by the extended code, (d) is a diagram showing a pulse signal generated by the sensor controller 31 based on the code chip string shown in (c), and (e) is a diagram showing an example of a received waveform when the pen 2 receives the pulse signal shown in (d).

[0021] Figure 3 It is a diagram showing the detailed structure of the tablet computer 3.

[0022] Figure 4 2 is a diagram showing the internal structure of the pen 2 .

[0023] Figure 5 2 is a schematic block diagram showing the functional blocks of the pen 2 .

[0024] Figure 6(a) is a diagram showing a portion of a code chip string (Manchester-coded code chip string) generated by the extension processing unit 51, (b) is a diagram showing a pulse signal generated by the extension processing unit 51 based on the code chip string shown in (a), (c) is a diagram showing a delayed signal generated by the sending processing unit 52 based on the pulse signal shown in (b), and (d) and (e) are diagrams of mixed signals generated by the sending processing unit 52 based on the pulse signal shown in (b), respectively.

[0025] Figure 7 1 is a schematic circuit diagram showing a second modified example of the first embodiment of the present invention.

[0026] Figure 8 (a) to (c) are related to Figure 6 (a) to (c) are the same figures, and (d) is a figure showing a mixed signal transmitted by the second modification example of the first embodiment of the present invention.

[0027] Fig. 9 It is a diagram showing a plurality of sensor electrodes 30X according to a third modified example of the first embodiment of the present invention.

[0028] Fig.10 It is a diagram showing a plurality of sensor electrodes 30X and 30Y according to a fourth modified example of the first embodiment of the present invention.

[0029] Fig.11 1 is a diagram showing an uplink signal US transmitted by the sensor controller 31 according to a fourth modified example of the first embodiment of the present invention.

[0030] Fig.12 It is a diagram for explaining a fifth modified example of the first embodiment of the present invention.

[0031] Fig.13 It is a diagram showing the configuration of a receiving circuit 61 according to a second embodiment of the present invention.

[0032] Fig.14 (a) is a diagram specifically showing the circuit structure of the comparison circuit 82c according to the second embodiment of the present invention, and (b) is a diagram specifically showing the circuit structure of the comparison circuit 82c configured to compare the output signal IO with four reference potentials VTP, VTP0, VTN0, and VTN.

[0033] Fig.15(a) is a diagram showing an example of a code chip string sent by the sensor controller 31, (b) is a diagram showing an example of a received signal Rx observed in the pen 2 that receives the code chip string shown in (a), (c) is a diagram showing an example of an output signal CO obtained based on the received signal Rx shown in (b), (d) is a diagram showing a code chip string obtained based on the output signal CO shown in (c), (e) is a diagram showing a pattern stored in the pattern storage unit 73 corresponding to the code chip string shown in (a), and (f) is a diagram showing the pattern shown in (e) by a pulse signal.

[0034] Fig.16 (a) is a diagram showing an example of a pulse signal sent by the sensor controller 31, (b) is a diagram showing the output signal DO of the amplifier circuit 81 output in the pen 2 that receives the pulse signal shown in (a), (c) is a diagram showing the output signal IO of the adding circuit 82b corresponding to the output signal DO shown in (b), (d) is a diagram showing the output signal CO of the analog circuit 71 corresponding to the output signal IO shown in (c), (e) is a diagram showing a known pattern stored in the pattern storage unit 73 corresponding to the pulse signal shown in (a), and (f) is a diagram showing the output signal FO of the edge matching filter 87 corresponding to the output signal CO shown in (d) and the pattern shown in (e). DETAILED DESCRIPTION

[0035] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

[0036] Figure 1 1 is a diagram showing the configuration of a position detection system 1 according to a first embodiment of the present invention. As shown in the figure, the position detection system 1 is configured to include a pen 2 as an active stylus pen and a tablet computer 3 as a position detection device for detecting the pen.

[0037] The tablet computer 3 includes a touch surface 3a, a sensor electrode group 30 disposed just below the touch surface 3a, a sensor controller 31 connected to the sensor electrode group 30, and a main processor 32 that controls each part of the sensor controller 31 including the above-mentioned parts. In addition, the tablet computer 3 is connected to a charger 33 (AC adapter) and is configured to be operable by power supplied from a system power supply via the charger 33.

[0038] When the pen 2 approaches the touch surface 3 a , an electrostatic capacitance C is generated between the pen 2 and the sensor electrode group 30 . The pen 2 is configured to exchange charges (electrostatic coupling) through the electrostatic capacitance and can communicate with the sensor controller 31 .

[0039] The communication between the pen 2 and the sensor controller 31 is performed in both directions. Figure 1, an uplink signal US sent from the sensor controller 31 to the pen 2 is illustrated. The uplink signal US is a signal indicating an instruction (command) to the pen 2, and the pen 2 that receives the uplink signal US performs processing in accordance with the instruction indicated by the uplink signal US. In the case where the instruction is the transmission of data, the pen 2 obtains the indicated data and sends it to the sensor controller 31 via a downlink signal. The data sent in this way includes, for example, the unique ID of the pen 2, the pen pressure indicating the pressure applied to the pen tip of the pen 2, and the on / off information of the switch provided in the pen 2.

[0040] Figure 2 (a) is a diagram showing a structural example of an uplink signal US. As shown in the figure, the uplink signal US is composed of 6 transmission data, namely, 2 preamble codes P, 1-byte data D1 to D3, and an error detection code CRC. The sensor controller 31 uses a spreading code with an autocorrelation characteristic to spread these transmission data, thereby generating a pulse signal. Then, by sending the pulse signal via the sensor electrode group 30, the uplink signal US is sent.

[0041] Figure 2 (b) is a diagram showing an example of an extension code corresponding to the preamble code P. The sensor controller 31 stores in advance different extension codes for each content of the transmission data (P, "0000", "0001", etc.), and performs processing to replace the transmission data with the extension code corresponding to the content. In addition, although the figure shows an example in which the number of chips constituting one extension code is 20, the number of chips of the extension code is of course not limited to 20.

[0042] Figure 2 (c) is a diagram showing a chip string generated by the sensor controller 31 based on the transmission data replaced with the extension code. As shown in the figure, the sensor controller 31 replaces the "0" of the extension code with "10" and replaces the "1" with "01", thereby generating a chip string (Manchester code). This replacement is performed so that the chips with the same value do not continue for more than three times.

[0043] Figure 2 (d) indicates that the sensor controller 31 Figure 2 FIG. 3 is a diagram of a pulse signal generated by a chip string shown in (c). As shown in the diagram, the sensor controller 31 generates a pulse signal by associating "1" of the chip string with High and "0" with Low.

[0044] Figure 2 (e) indicates that pen 2 receives Figure 2 (d) is a diagram showing an example of a received waveform in the case of a pulse signal. As shown in this diagram, low-frequency noise may be superimposed on the pulse signal. Figure 1The low-frequency noise UN shown is an example of the low-frequency noise superimposed on the pulse signal, and is generated from the charger 33. In addition, the low-frequency noise may be superimposed on the pulse signal from various noise sources existing around the sensor controller 31.

[0045] If low-frequency noise is superimposed on the pulse signal, then Figure 2 As shown in (e), a blunting occurs in the received waveform. When the degree of the blunting increases, it becomes difficult to recover the uplink signal US in the pen 2. One of the objects of the present invention is to enable the pen 2 to properly receive the uplink signal US even in such a case.

[0046] Figure 3 3 is a diagram showing the detailed structure of the tablet computer 3. Figure 3 The structure and operation of the tablet computer 3 will be described in detail.

[0047] The sensor electrode group 30 includes a plurality of sensor electrodes 30X extending in the Y direction and a plurality of sensor electrodes 30Y extending in the X direction, and is configured to be electrostatically coupled with the pen tip electrode 21 (described later) of the pen 2 through these sensor electrodes 30X and 30Y. The transmission and reception of the uplink signal US and the downlink signal are realized via this electrostatic coupling. Hereinafter, when there is no need to particularly distinguish the sensor electrodes 30X and 30Y, they are sometimes simply referred to as the sensor electrodes 30.

[0048] like Figure 4 As shown, the sensor controller 31 is configured to include an MCU 40 , a logic unit 41 , a transmission unit 42 , a reception unit 43 , and a selection unit 44 .

[0049] The MCU 40 and the logic unit 41 are control units that control the sending and receiving operations of the sensor controller 31 by controlling the sending unit 42, the receiving unit 43, and the selecting unit 44. Specifically, the MCU 40 is a microprocessor that has a ROM and a RAM inside and operates based on a predetermined program. On the other hand, the logic unit 41 is configured to generate control signals for the sending unit 42, the receiving unit 43, and the selecting unit 44 based on the control of the MCU 40.

[0050] The MCU 40 has a function of receiving a downlink signal sent by the pen 2 via the receiving unit 43, generating a command cmd to be sent to the pen 2, and supplying it to the transmitting unit 42. The downlink signal includes a carrier signal without modulation, i.e., a position signal, and a data signal including data corresponding to the command cmd. When the MCU 40 receives the position signal from the pen 2, it calculates the position coordinates (x, y) of the pen 2 on the touch surface 3a based on the respective receiving intensities of the plurality of sensor electrodes 30X and 30Y constituting the sensor electrode group 30, and outputs it to the main processor 32. In addition, when the MCU 40 receives the data signal from the pen 2, it obtains the response data Res contained therein (specifically, the inherent ID, pen pressure, switch on / off information, etc.), and outputs it to the main processor 32.

[0051] The transmitting unit 42 is a circuit for generating an uplink signal US according to the control of the MCU 40 and the logic unit 41. Figure 4 As shown, the structure includes a code string holding unit 50, an expansion processing unit 51 and a transmission processing unit 52.

[0052] The code string holding unit 50 has a function of generating and holding the above-mentioned spreading code (spreading code having an autocorrelation characteristic) according to a control signal supplied from the logic unit 41. The code string holding unit 50 is configured to generate and store different spreading codes according to the content of the transmission data (P, "0000", "0001", etc.).

[0053] The extension processing unit 51 generates a command cmd supplied from the MCU 40. Figure 2 Specifically, the extension processing unit 51 first generates a pulse signal according to the command cmd. Figure 2 Then, for each of the plurality of transmission data constituting the uplink signal US, one of the extension codes held by the code string holding unit 50 is selected, and the transmission data is extended by the selected extension code. Thus, Figure 2 The extension processing unit 51 also performs the above-mentioned Manchester encoding to obtain Figure 2 Then, the obtained chip string is generated Figure 2 (d) illustrates an example pulse signal.

[0054] The transmission processing unit 52 is a functional unit that transmits the pulse signal generated by the extension processing unit 51 in a manner that emphasizes edges. In this embodiment, "transmitting in a manner that emphasizes edges" means that the pulse signal is transmitted in a manner that increases the number of rising edges and falling edges included in the pulse signal by various methods described later. The details will be described later. However, other methods may be used to transmit the pulse signal in a manner that emphasizes edges.

[0055] The receiving unit 43 is a circuit that receives a downlink signal transmitted from the pen 2 according to a control signal supplied from the logic unit 41. Specifically, it is configured to generate a digital signal by decoding the signal supplied from the selecting unit 44 and supply the digital signal to the MCU 40 as a received signal.

[0056] The selection unit 44 includes switches 54x and 54y and conductor selection circuits 55x and 55y.

[0057] The switches 54x and 54y are switch elements configured to be connected to a common terminal and one of the T terminal and the R terminal. The common terminal of the switch 54x is connected to the conductor selection circuit 55x, the T terminal is connected to the output end of the transmission unit 42, and the R terminal is connected to the input end of the reception unit 43. In addition, the common terminal of the switch 54y is connected to the conductor selection circuit 55y, the T terminal is connected to the output end of the transmission unit 42, and the R terminal is connected to the input end of the reception unit 43.

[0058] The conductor selection circuit 55x is a switch element for selectively connecting the plurality of sensor electrodes 30X to the common terminal of the switch 54x. The conductor selection circuit 55x is configured to be able to simultaneously connect a part or all of the plurality of sensor electrodes 30X to the common terminal of the switch 54x.

[0059] The conductor selection circuit 55y is a switch element for selectively connecting the plurality of sensor electrodes 30Y to the common terminal of the switch 54y. The conductor selection circuit 55y is also configured to be able to simultaneously connect a part or all of the plurality of sensor electrodes 30Y to the common terminal of the switch 54y.

[0060] Four control signals sTRx, sTRy, selX, and selY are supplied from the logic unit 41 to the selection unit 44. Specifically, the control signal sTRx is supplied to the switch 54x, the control signal sTRy is supplied to the switch 54y, the control signal selX is supplied to the conductor selection circuit 55x, and the control signal selY is supplied to the conductor selection circuit 55y. The logic unit 41 controls the selection unit 44 by using these control signals sTRx, sTRy, selX, and selY, thereby transmitting the uplink signal US and receiving the downlink signal transmitted by the pen 2.

[0061] More specifically, when transmitting the uplink signal US, the logic unit 41 controls the selection unit 44 in such a manner that all of the plurality of sensor electrodes 30Y (or all of the plurality of sensor electrodes 30X) or a predetermined number of each of the plurality of sensor electrodes 30X, 30Y located near the position derived previously for the pen 2 to be transmitted are connected to the output end of the transmission unit 42. On the other hand, when receiving the position signal, the logic unit 41 controls the selection unit 44 in such a manner that while the transmission of the position signal continues, all of each of the plurality of sensor electrodes 30X, 30Y (global scanning) or a predetermined number of each of the plurality of sensor electrodes 30X, 30Y located near the position derived by the immediately previous position signal for the pen 2 that transmitted the position signal (local scanning) are sequentially connected to the input end of the receiving unit 43. Thus, the MCU 40 can derive the position of the pen 2 based on the reception strength of the burst signal in each sensor electrode 30. When receiving a data signal, the logic unit 41 controls the selection unit 44 so that a specified number of the plurality of sensor electrodes 30X and 30Y located near the position derived by the immediately preceding position signal for the pen 2 that sent the data signal is connected to the input end of the receiving unit 43 .

[0062] The above describes the structure and operation of the tablet computer 3. Next, the structure and operation of the pen 2 will be described in detail.

[0063] Figure 4 2 is a diagram showing the internal structure of the pen 2. As shown in the figure, the pen 2 is configured to include a core 20, a pen tip electrode 21, a pen pressure detection sensor 23, a circuit board 24, and a battery 25. Although not shown in the figure, in addition, the pen 2 is also configured to include a switch that can be operated by the user on the side or bottom surface of the frame.

[0064] The core 20 is a rod-shaped member, and is arranged so that the pen axis direction of the pen 2 coincides with the length direction of the core 20. The pen tip electrode 21 is a conductor arranged near the pen tip, for example, composed of a conductive material embedded in the core 20. In other examples, the pen tip electrode 21 may be formed by coating the surface of the front end of the core 20 with a conductive material.

[0065] The writing pressure detection sensor 23 is physically connected to the core 20 and is configured to detect the writing pressure applied to the tip of the core 20. Specifically, as the writing pressure detection sensor 23, a variable capacitance capacitor whose capacitance changes according to the writing pressure can be used.

[0066] The pen tip electrode 21 is electrically connected to the circuit substrate 24, and plays the role of receiving the uplink signal US sent by the tablet computer 3 and supplying it to the circuit substrate 24, and sending the downlink signal supplied from the circuit substrate 24 to the tablet computer 3. In addition, here, the pen tip electrode 21 performs both transmission and reception, but the electrode for transmission and the electrode for reception can also be provided separately. The battery 25 is a power source for supplying operating power to each component in the circuit substrate 24.

[0067] Figure 5 2 is a schematic block diagram showing functional blocks of the pen 2 . The functional blocks shown in this figure are implemented by electronic circuits formed on the circuit board 24 .

[0068] like Figure 5 As shown, the pen 2 functionally includes a switch 60 , a receiving circuit 61 , a controller 62 , and a transmitting circuit 63 .

[0069] The switch 60 is a switch element configured to be connected to a common terminal and either a T terminal or an R terminal. The common terminal of the switch 60 is connected to the pen tip electrode 21, the T terminal is connected to the output end of the transmission circuit 63, and the R terminal is connected to the input end of the reception circuit 61. The connection state of the switch 60 is controlled by the controller 62. The controller 62 controls the switch 60 in a manner that connects the common terminal to the R terminal when receiving an uplink signal US from the sensor controller 31, and controls the switch 60 in a manner that connects the common terminal to the T terminal when sending a downlink signal (position signal or data signal) to the sensor controller 31.

[0070] The receiving circuit 61 is a circuit that obtains an uplink signal US by demodulating the signal received via the pen tip electrode 21 and the switch 60 and transmits the uplink signal US to the controller 62. Figure 5 As shown, an analog circuit 71 , a digital circuit 72 , and a mode storage unit 73 are provided inside the receiving circuit 61 .

[0071] The analog circuit 71 is configured to include an edge detection circuit that detects an edge included in a signal supplied from the switch 60 (a signal sensed by the pen tip electrode 21), and a waveform recovery circuit that recovers a waveform from the edge detected by the edge detection circuit. The specific structure of each circuit is not limited, but for example, the edge detection circuit can be composed of a differential circuit that generates a differential signal of the signal supplied from the switch 60, a positive direction pulse detection circuit that detects the rising edge of the differential signal, and a negative direction pulse detection circuit that detects the falling edge of the differential signal. In addition, the waveform recovery circuit can be composed of an SR latch circuit having an S input supplied with an output signal of the positive direction pulse detection circuit and an R input supplied with an output signal of the negative direction pulse detection circuit. The signal output from the waveform recovery circuit constitutes the output signal of the analog circuit 71, and ideally becomes a pulse signal generated by the expansion processing unit 51 of the sensor controller 31 (refer to Figure 2 (d)) A signal of the same waveform.

[0072] The digital circuit 72 is a circuit that detects transmission data transmitted from the sensor controller 31 by performing a correlation operation between the output signal of the analog circuit 71 and a known pattern stored in the pattern storage unit 73 .

[0073] Specifically, first, a plurality of chip strings are stored as known patterns in the pattern storage unit 73. Each chip string is a binary chip string consisting of a plurality of chips each taking a value of 0 or 1, and is obtained by the sensor controller 31 by performing Manchester encoding on a plurality of spread codes that may be used in the transmission of the uplink signal US.

[0074] The digital circuit 72 has a shift register set to a first-in-first-out mode capable of storing a chip string corresponding to one spreading code. Whenever the output signal of the analog circuit 71 of one chip is obtained, it is stored in the shift register. Then, whenever a new one chip is stored, the correlation between the chip string stored in the shift register at that time point and each of the plurality of known patterns stored in the pattern storage unit 73 is calculated. As a result, when the calculation result for a certain pattern is greater than a specified value, it is determined that the spreading code corresponding to the pattern is detected. The digital circuit 72 restores the uplink signal US based on the spreading codes detected in this way, and outputs it to the controller 62.

[0075] The controller 62 is a processor having a memory therein, and is configured to operate according to a program stored in the memory.

[0076] The actions performed by the controller 62 include processing corresponding to the uplink signal US supplied from the receiving circuit 61. Specifically, the controller 62 determines the transmission and reception arrangement of various signals based on the uplink signal US supplied from the receiving circuit 61, and performs processing to control the connection state of the switch 60 accordingly. That is, as described above, when receiving the uplink signal US from the sensor controller 31, the switch 60 is controlled so that the common terminal is connected to the R terminal, and when sending a signal (position signal or data signal) to the sensor controller 31, the switch 60 is controlled so that the common terminal is connected to the T terminal.

[0077] At the transmission timing of the position signal indicated by the determined transmission and reception schedule, the controller 62 performs processing to instruct the transmission of the position signal to the transmission circuit 63. In addition, when the instruction indicated by the uplink signal US supplied from the receiving circuit 61 is an instruction indicating the transmission instruction of various data (unique ID, pen pressure, switch on / off information, etc.), the controller 62 obtains the instructed data and performs processing to supply it to the transmission circuit 63 as transmission data at the transmission timing of the data signal indicated by the determined transmission and reception schedule.

[0078] The transmission circuit 63 includes an oscillation circuit for a predetermined carrier signal, and is configured to supply the carrier signal to the pen tip electrode 21 without modulation when the transmission of the position signal is instructed from the controller 62. On the other hand, when the transmission data is supplied from the controller 62, the carrier signal is modulated by the supplied transmission data and supplied to the pen tip electrode 21.

[0079] Next, Figure 3 The process of "transmitting in a manner that emphasizes edges" performed by the transmission processing unit 52 shown in the figure will be described in detail.

[0080] Figure 6 (a) is a diagram showing a part of a chip string (a chip string of Manchester coding) generated by the extension processing unit 51. Figure 6 (b) is a diagram showing a pulse signal (main signal) generated from the chip sequence by the spreading processing unit 51. The chip length T shown in the figure shows the time length of each chip constituting the spreading code before Manchester coding (the time length of 1 chip).

[0081] Figure 6 (c) and Figure 6 (d) respectively represent that the sending processing unit 52 Figure 6 FIG. 5 shows a diagram of a delayed signal (sub-signal) and a mixed signal generated by a pulse signal shown in (b). The transmission processing unit 52 receives the pulse signal from the expansion processing unit 51 and first generates a pulse signal by changing the edge timing of the pulse signal. Figure 6More specifically, the transmission processing unit 52 delays the pulse signal by a time shorter than half the chip length T / 2 (in Figure 6 In the example of (c), it is T / 4), thereby generating a delayed signal.

[0082] Next, the sending processing unit 52 sends Figure 6 The pulse signal shown in (b) and Figure 6 The delayed signal shown in (c) generates Figure 6 The mixed signal shown in (d) of FIG. The mixed signal generated in this way becomes a signal that includes two corresponding edges (for example, edges E1 and E2 shown in the figure) in a time shorter than half the chip length T / 2 starting from each edge of the pulse signal. In addition, although it is set to 2 times here, by increasing the number of delayed signals, it is also possible to include more than 3 corresponding edges. More preferably, it is preferred to include an even number of corresponding edges.

[0083] Here, if we observe Figure 6 As can be understood from (d) of FIG. 1 , the mixed signal generated by the transmission processing unit 52 of the present embodiment includes a return edge (for example, edge E3 shown in the figure) that is opposite to the corresponding edge in a time shorter than half the chip length T / 2 starting from each edge of the pulse signal. If the mixed signal is transmitted from the sensor electrode group 30 in this state, the edge detection circuit in the analog circuit 71 will also detect the return edge as an edge, and as a result, an erroneous waveform may be restored. Therefore, if Figure 6 As shown in (e), the transmission processing unit 52 may make the slope of the return edge gentler than the slope of each edge of the pulse signal. This reduces the possibility that the edge detection circuit in the analog circuit 71 detects the return edge as an edge, thereby reducing the possibility of restoring an erroneous waveform.

[0084] As described above, according to the method for transmitting the uplink signal US of the present embodiment, the edge of the uplink signal US can be emphasized by increasing the edge received by the pen 2. Therefore, even if a blunting occurs in the waveform of the uplink signal US, the possibility that the pen can detect the edge increases, so the pen 2 can properly receive the uplink signal US.

[0085] In addition, various modifications are conceivable in this embodiment. These modifications are described below one by one.

[0086] The first variant of the present embodiment is an example of transmitting a mixed signal by transmitting a main signal, i.e., a pulse signal, generated by the expansion processing unit 51, and a sub-signal generated by the transmission processing unit 52 based on the pulse signal from different sensor electrodes 30. The sensor controller 31 in this case is configured to supply the main signal and the sub-signal generated by the transmission processing unit 52 to different sensor electrodes 30. Therefore, the sub-signal of the present variant is another electrode signal transmitted from a sensor electrode 30 different from the main signal. However, as the content of the sub-signal, it is preferably set to be the same delayed signal as in the present embodiment. In this way, it is possible not to generate Figure 6 (D) or Figure 6 The mixed signal shown in (e) is used to send the mixed signal.

[0087] Figure 7 : is a schematic circuit diagram showing a second modification of the present embodiment. The signal source 51A shown in the figure represents a pulse signal (main signal) generated by the expansion processing unit 51, and the signal source 52A represents a sub-signal generated by the transmission processing unit 52. The tablet computer 3 of this modification is configured to transmit a main signal and a sub-signal by using both of the stacked sensor electrodes 30X and 30Y, thereby transmitting a mixed signal. Specifically, the main signal is transmitted from at least a part of the sensor electrode 30Y arranged in the first layer, and the sub-signal is transmitted from at least a part of the sensor electrode 30X arranged in the second layer different from the first layer.

[0088] The auxiliary signal of this modification is the same as the first modification, that is, other electrode signals, and its content can be the same delayed signal as in this embodiment, or can be a signal completely identical to the main signal. In the former case, as in this embodiment, the effect of increasing the edge received by the pen 2 can be obtained. In the latter case, since the same signal is sent from two layers, the effect of emphasizing the edge can be obtained compared to the case where the signal is sent from only one layer.

[0089] Figure 8 (d) is a diagram showing a mixed signal transmitted by this modification example when a delayed signal of a main signal is used as a sub-signal. Figure 8 (a) to (c) are related to Figure 6 The same figures (a) to (c) are shown in Figure 1. Figure 8 As shown in (d) of FIG. 1 , the mixed signal of this modification is a signal obtained by adding a pulse signal and a delayed signal. Figure 8 As can be understood from (d), the number of edges received by the pen 2 can be increased, and the edges of the uplink signal US can be emphasized. In addition, according to this modification, since the above-mentioned return edge is not generated, the possibility of restoring an erroneous waveform by the analog circuit 71 can be reduced.

[0090] This modification can also be appropriately applied to a case where the tablet computer 3 is a so-called embedded position detection device. The embedded method is a method in which an electrode (typically, a common electrode of a liquid crystal display or a negative electrode of an organic EL display) supplied with a potential required for driving pixels of a display device arranged overlapping with the sensor electrode group 30 is used as one of the sensor electrodes 30X and 30Y. Therefore, when this modification is applied to the embedded tablet computer 3, a main signal and a sub-signal are sent from one of the sensor electrodes 30X and 30Y, for example, a common electrode of a liquid crystal display, and the other main signal and a sub-signal are sent from the other. In this case, as in this modification, the effect of emphasizing the edge of the uplink signal US and the effect of reducing the possibility of restoring an erroneous waveform by the analog circuit 71 can be obtained.

[0091] Fig. 9 : is a diagram showing a plurality of sensor electrodes 30X of a third variant of the present embodiment. The tablet computer 3 of this variant classifies the plurality of sensor electrodes 30X into a plurality of first sensor electrodes belonging to the illustrated group G1 and a plurality of second sensor electrodes (sensor electrodes 30X belonging to group G2) arranged at positions that do not overlap with the plurality of first sensor electrodes when viewed from above. Furthermore, the transmission processing unit 52 is configured to transmit the above-mentioned pulse signal via the plurality of first sensor electrodes and, on the other hand, to transmit an inverted signal of the pulse signal via the plurality of second sensor electrodes. Thus, when the hand of a person holding the pen 2 contacts the touch surface 3a, the uplink signal US is caused by the hand of the person to change the ground potential of the pen 2, thereby preventing the pen 2 from failing to detect the uplink signal US.

[0092] Fig.10 : is a diagram showing a plurality of sensor electrodes 30X and 30Y according to a fourth modified example of the present embodiment. Fig.11 1 is a diagram showing an uplink signal US transmitted by the sensor controller 31 of this modification. Fig.10 The sensor controller 31 of this modification example first determines the region R where the uplink signal US is to be transmitted. Fig.10 , an example is depicted in which a part of the touch surface 3 a is set as the region R, but the entire touch surface 3 a may be set as the region R.

[0093] The sensor controller 31 that has determined the region R classifies the plurality of sensor electrodes 30 that pass through the region R into a plurality of groups so that the approaching sensor electrodes 30 belong to different groups as much as possible. Fig.10 An example of such classified groups is shown in FIG. 1. In this example, every other sensor electrode 30Y is classified into group A or group B, and every other sensor electrode 30X is classified into group C or group D.

[0094] exist Fig.11 In the figure, it is shown that the use Fig.10 The example of the case where groups A to D shown in the figure transmit uplink signals US. In addition, in order to simplify the explanation, the figure shows an example of transmitting five transmission data "8", "5", "7", "9", and "3" respectively through a chip string of 8 chips (a chip string obtained by Manchester encoding the four bits representing each transmission data), but in fact, the transmission is performed using an extended code in the same way as in the present embodiment.

[0095] The sensor controller 31 of this modified example is configured to divide the 8 chips constituting one transmission data into the first half 4 chips and the second half 4 chips. Fig.11 As shown in FIG. 1 , the four edges (rising edge U and falling edge D) of the pulse signal corresponding to the first four chips and the second four chips are respectively distributed to four groups A to D for transmission. Thus, the pen 2 located in the region R can receive all the edges, so it can receive the uplink signal US, but the pen 2 not located in the region R cannot receive some or all of the edges, so it cannot receive the uplink signal US (even if it can only receive part of it, it is used as a signal). Figure 2 The error detection result of the error detection code CRC shown in (a) of FIG. 1 is that the receivable part is also discarded). Therefore, according to this modification, the area within the touch surface 3a can be limited to send the uplink signal US. If this modification is applied, when multiple pens 2 are located within the touch surface 3a, for example, the uplink signal US can be sent by limiting the pen 2 to be sent.

[0096] Fig.12 is a diagram for explaining a fifth modified example of the present embodiment. Figure 6 (a) and (d) are the same.

[0097] Fig.12 The pulse signal shown in (b) represents Fig.12 The chip string shown in (a) can also be said to represent Fig.12 The code chip string shown in (c) of FIG. This means that two types of data can be sent with one pulse signal according to the processing method in pen 2. Therefore, in this modification, as a known mode used in the correlation operation in pen 2, two types of first and second modes described below are prepared, so that pen 2 can selectively receive two types of data.

[0098] The first mode is a mode in which the time length of one chip is relatively long. The digital circuit 72 ( Figure 5 ) By performing a coarse-grained correlation operation on the output signal of the analog circuit 71, Fig.12 (b) illustrates the pulse signal recovery Fig.12The code chip string shown in (a).

[0099] The second mode is a mode in which the time length of one chip is relatively short. The digital circuit 72 ( Figure 5 ) By performing fine-grained correlation operations on the output signal of the analog circuit 71, Fig.12 (b) illustrates the pulse signal recovery Fig.12 The code chip string shown in (c).

[0100] Thus, according to this modification, two patterns with different time lengths of one chip are prepared as known patterns used in correlation calculation in pen 2, so that the effect of enabling pen 2 to selectively receive two types of data through one uplink signal US can be obtained. In addition, this modification can also be configured to be stored in Figure 5 The time length per chip of the pattern in the pattern storage unit 73 shown is different for each pen 2. Thus, the sensor controller 31 can transmit mutually different data to the two pens 2 by one uplink signal US.

[0101] Next, the position detection system 1 of the second embodiment of the present invention is described. The position detection system 1 of this embodiment is different from the first embodiment in the method of receiving the uplink signal US in the receiving circuit 61. That is, in the receiving circuit 61 of this embodiment, ΔΣ modulation is performed in the analog circuit 71, and the correlation operation of the three values ​​of +1, 0, and -1 is performed in the digital circuit 72. Since other aspects are the same as the position detection system 1 of the first embodiment, the same reference numerals are marked on the same structure, and the following description will continue with a focus on the differences from the position detection system 1 of the first embodiment.

[0102] Fig.13 1 is a diagram showing the structure of the receiving circuit 61 of the present embodiment. As shown in the figure, the receiving circuit 61 of the present embodiment is configured as follows: Figure 5 In addition to the analog circuit 71 , the digital circuit 72 and the pattern storage unit 73 , the illustrated embodiment also includes a pulse density detection unit 74 and an MCU (Micro Control Unit) 75 .

[0103] The analog circuit 71 of the present embodiment is configured to include an input terminal and an R terminal of the switch 60 (see Figure 5) connected to the high-pass filter 80, an amplifier circuit 81 for amplifying the output signal of the high-pass filter 80, and a ΔΣ modulation unit 82. The high-pass filter 80 is a circuit configured to pass only frequency components above a cutoff frequency. The cutoff frequency of the high-pass filter 80 is configured to be controllable by the MCU 75. The amplifier circuit 81 is a circuit that amplifies the output signal of the high-pass filter 80 and supplies it to the ΔΣ modulation unit 82 as an output signal DO. The amplifier circuit 81 is composed of a variable gain amplifier whose amplification factor can be controlled by the MCU 75. The high-pass filter 80 and the amplifier circuit 81 are used as a detection device to sense the pen tip electrode 21 (refer to Figure 5 )’s edge differentiation circuit functions.

[0104] The ΔΣ modulation unit 82 is a functional unit that compares the output signal DO of the amplifier circuit 81 with at least two reference potentials VTP and VTN corresponding to positive and negative, respectively, and performs feedback processing on the comparison result. Fig.13 As shown, the circuit 82a includes a subtraction circuit 82a, an addition circuit 82b, a comparison circuit 82c, and delay circuits 82d and 82e.

[0105] The comparison circuit 82c is a circuit for comparing the output signal IO of the adding circuit 82b with a predetermined reference potential VTP, VTN (VTP=-VTN>0), and is configured to have three output terminals, namely, an output terminal for the comparison result, a positive side output terminal (+1), and a negative side output terminal (-1). The signal output from the output terminal for the comparison result constitutes the output signal CO of the analog circuit 71.

[0106] When the output signal IO of the adding circuit 82b exceeds the reference potential VTP, the comparison circuit 82c outputs +1 as the output signal CO, sets the potential of the positive output terminal to high, and sets the potential of the negative output terminal to low. In addition, when the output signal IO of the adding circuit 82b is lower than the reference potential VTN, the comparison circuit 82c outputs -1 as the output signal CO, sets the potential of the negative output terminal to high, and sets the potential of the positive output terminal to low. In other cases, the comparison circuit 82c outputs 0 as the output signal CO, and sets the potentials of the positive output terminal and the negative output terminal to zero. As a result of this processing performed by the comparison circuit 82c, the output signal CO becomes a three-value pulse signal that takes any value of +1, 0, and -1.

[0107] The comparison circuit 82c is configured to use a chip length ( Figure 6The sensor controller 31 operates at a shorter period (for example, T / 8) than the half of the chip length T (T / 2) shown in the figure. Therefore, the output signal CO becomes a pulse signal including multiple chips (for example, 4 chips) relative to one chip of the chip string sent by the sensor controller 31.

[0108] Fig.14 (a) is a diagram specifically showing the circuit structure of the comparison circuit 82c of the present embodiment. As shown in the figure, the comparison circuit 82c is configured to include a comparator CPa corresponding to positive, a comparator CPb corresponding to negative, and an output circuit 100. The output terminal of the comparator CPa is connected to the delay circuit 82d as the above-mentioned positive side output terminal (+1), and is connected to the output circuit 100. In addition, the output terminal of the comparator CPb is connected to the delay circuit 82e as the above-mentioned negative side output terminal (-1), and is connected to the output circuit 100.

[0109] The output signal IO of the adding circuit 82b is commonly supplied to one input terminal of each comparator CPa, CPb. On the other hand, the reference potentials VTP, VTN are respectively supplied to the other input terminals of each comparator CPa, CPb. In addition, each comparator CPa, CPb is configured to perform a comparison operation at a timing synchronized with a clock CK1 supplied from a clock circuit not shown. The clock CK1 is configured to be longer than the chip length ( Figure 6 The sensor oscillates with a period as short as half the chip length T (T / 2) shown in the figure, and as a result, the output signal CO becomes a pulse signal containing multiple chips (for example, 4 chips) relative to 1 chip of the chip string sent from the sensor controller 31, as described above.

[0110] The comparator CPa is configured to output a high level when the output signal IO of the adding circuit 82b is greater than the reference potential VTP, and to output a low level when it is not. In addition, the comparator CPb is configured to output a low level when the output signal IO of the adding circuit 82b is greater than the reference potential VTN, and to output a high level when it is not. Thus, the comparison result of the comparison circuit 82c is fed back to the subtraction circuit 82a in three values ​​(i.e., any one of +1, 0, and -1).

[0111] The output circuit 100 is a circuit that generates the output signal CO of the ΔΣ modulation unit 82 based on the outputs of the comparators CPa and CPb. Specifically, when the output of the comparator CPa is at a high level, the output signal CO is set to +1, when the output of the comparator CPb is at a high level, the output signal CO is set to -1, and in other cases, the output signal CO is set to 0. Thus, a three-value pulse signal, namely, the output signal CO, which takes any value of +1, 0, and -1 is realized.

[0112] Here, Fig.14 The comparison circuit 82c of (a) compares the output signal IO with two reference potentials VTP and VTN, but more reference potentials can also be used as comparison objects. If a specific example is given, the comparison circuit 82c can also compare the output signal IO with four reference potentials VTP, VTP0, VTN0, VTN (VTP=-VTN=2×VTP0=-2×VTN0>0). In this case, the comparison result of the comparison circuit 82c is fed back to the subtraction circuit 82a with 5 values ​​(i.e., any one of +2, +1, 0, -1, and -2). On the other hand, as described in detail later, even when the comparison circuit 82c compares with the four reference potentials VTP, VTP0, VTN0, and VTN, the output signal CO of the analog circuit 71 is output with 3 values ​​(i.e., any one of +1, 0, and -1). The following is a detailed explanation.

[0113] Fig.14 (b) is a diagram specifically showing the circuit structure of the comparison circuit 82c configured to compare the output signal IO with four reference potentials VTP, VTP0, VTN0, and VTN. As shown in the figure, the comparison circuit 82c in this case is configured to include two comparators CPa and CPc corresponding to positive, two comparators CPb and CPd corresponding to negative, and an output circuit 100. The output terminal of the comparator CPa is connected to the delay circuit 82d as the positive side output terminal (+2), and is connected to the output circuit 100. In addition, the output terminal of the comparator CPb is connected to the delay circuit 82e as the above-mentioned negative side output terminal (-2), and is connected to the output circuit 100. The output terminal of the comparator CPc is connected to the delay circuit 82d as the positive side output terminal (+1), and is connected to the output circuit 100, and the output terminal of the comparator CPd is connected to the delay circuit 82e as the above-mentioned negative side output terminal (-1), and is connected to the output circuit 100.

[0114] The output signal IO of the adding circuit 82b is commonly supplied to one input terminal of each comparator CPa to CPd. On the other hand, the reference potentials VTP, VTN, VTP0, and VTN0 are respectively supplied to the other input terminals of each comparator CPa to CPd. Each comparator CPa to CPd is similar to the comparator CPa in that it operates synchronously with the clock CK1. Fig.14 The same is true for (a).

[0115] The comparator CPa is configured to output a high level when the output signal IO of the adding circuit 82b is greater than the reference potential VTP, and output a low level otherwise. The comparator CPb is configured to output a low level when the output signal IO of the adding circuit 82b is greater than the reference potential VTN, and output a high level otherwise. The comparator CPc is configured to output a high level when the output signal IO of the adding circuit 82b is greater than the reference potential VTP0, and output a low level otherwise. The comparator CPd is configured to output a low level when the output signal IO of the adding circuit 82b is greater than the reference potential VTN0, and output a high level otherwise. Thus, the comparison result of the comparison circuit 82c is fed back to the subtraction circuit 82a in 5 values ​​(i.e., any one of +2, +1, 0, -1, and -2).

[0116] The output circuit 100 is configured to generate the output signal CO of the ΔΣ modulation unit 82 based on the outputs of the comparators CPa and CPb. Specifically, when the output of the comparator CPa is at a high level, the output signal CO is set to +1, when the output of the comparator CPb is at a high level, the output signal CO is set to -1, and in other cases, the output signal CO is set to 0. The outputs of the comparators CPc and CPd are not referenced in the generation of the output signal CO. Thus, although the feedback to the subtraction circuit 82a is 5-valued, a 3-value pulse signal, namely the output signal CO, which takes any value of +1, 0, and -1 is realized. By setting the output signal CO to 3 values ​​in this way, the scale of the circuit required for the correlation operation can be reduced.

[0117] Furthermore, the output circuit 100 may also refer to the outputs of the comparators CPc and CPd, so that the output signal CO is composed of a pulse signal of five values ​​(i.e., any one of +2, +1, 0, -1, and -2). In this way, when the output signal CO is set to five values, the digital circuit 72 (refer to Fig.13 ) can obtain the effect of being able to derive related values ​​while also considering the level value.

[0118] return Fig.13 The delay circuit 82d serves to delay the potential of the positive output terminal of the comparison circuit 82c by, for example, Δ times, and then feeds back the potential to the subtraction circuit 82a by, for example, 1 clock (1 chip of the output signal CO). Similarly, the delay circuit 82e serves to delay the potential of the negative output terminal of the comparison circuit 82c by, for example, -Δ times, and then feeds back the potential to the subtraction circuit 82a by, for example, 1 clock. In addition, the specific value of Δ is preferably a value equal to VTP in the case of 3-value feedback, and a value equal to VTP0 in the case of 5-value feedback.

[0119] The subtraction circuit 82a is a circuit that outputs a signal obtained by subtracting a potential corresponding to the output signal of the delay circuits 82d and 82e from the output signal DO of the amplifier circuit 81. According to this subtraction operation, when the output signal IO of one clock before exceeds the reference potential VTP, the potential level of the input signal of the addition circuit 82b decreases, and when the output signal IO of one clock before is lower than the reference potential VTN, the potential level of the input signal of the addition circuit 82b increases, so that the potential level of the output signal IO of the addition circuit 82b can be converged within a certain range.

[0120] The adding circuit 82b is a circuit that outputs a signal obtained by integrating the output signal of the subtracting circuit 82a. The output signal IO of the adding circuit 82b is a signal obtained by adding the output signal of the adding circuit 82b one clock ago to the output signal of the subtracting circuit 82a.

[0121] Fig.15 (a) represents the chip string sent by the sensor controller 31 ( Figure 2 An example of a chip string shown in (c) is shown in FIG. Fig.15 (b) is a diagram showing an example of a received signal Rx observed in pen 2 that receives the chip string. Fig.15 (c) is a diagram showing an example of an output signal CO obtained from the received signal Rx. Fig.15 (d) is a diagram showing a chip string obtained from the output signal CO. In addition, Fig.15 The received signal Rx shown in (b) is superimposed with low-frequency noise as a sine wave. As can be understood from these figures, the output signal CO when the received signal Rx is superimposed with low-frequency noise becomes a pulse signal that oscillates more violently than the received signal Rx. This means that the ΔΣ modulation unit 82 sensitively detects changes in the received signal Rx.

[0122] return Fig.13 The pattern storage unit 73 of this embodiment is configured to store a three-valued chip string consisting of a plurality of chips taking any value of +1, 0, and -1 as a known pattern for each of a plurality of spreading codes that the sensor controller 31 may use in transmitting the uplink signal US.

[0123] Fig.15 The (e) is the same as Fig.15 The chip sequence shown in (a) is stored in the pattern storage unit 73 in correspondence with the pattern, Fig.15 (f) is a diagram showing this mode using a pulse signal. Fig.15 (d) and Fig.15As can be understood from (e) of FIG. 1 , the pattern stored in the pattern storage unit 73 is a chip string including one chip for each chip of the output signal CO. Fig.15 (a) and Fig.15 As understood by (e), the pattern stored in the pattern storage unit 73 becomes a 3-valued code chip string constructed as follows: corresponding to the change of the transmitted code chip string from "+1" to "0", only one code chip becomes "-1", and corresponding to the change of the transmitted code chip string from "0" to "+1", only one code chip becomes "+1", and the other code chips become "0".

[0124] return Fig.13 The digital circuit 72 of this embodiment is configured to include an edge matching filter 87 and an uplink signal recovery unit 88.

[0125] The edge matched filter 87 has a first-in-first-out shift register that is set to be able to store a chip string corresponding to the number of chips corresponding to one spreading code, and each time the output signal CO of the analog circuit 71 of one chip is obtained, it is stored in the shift register. Then, each time a new chip is stored, the correlation between the chip string stored in the shift register at that time point and each of the plurality of known patterns stored in the pattern storage unit 73 is calculated, and the results are successively supplied to the uplink signal recovery unit 88 as the output signal FO.

[0126] When the output signal FO is greater than a predetermined value, the uplink signal recovery unit 88 determines that a spreading code corresponding to the pattern used in calculating the output signal FO is detected. Then, the uplink signal US is recovered based on the sequentially detected spreading codes and output to the controller 62.

[0127] The pulse density detection unit 74 is a functional unit that detects the pulse density of the output signal CO of the ΔΣ modulation unit 82 and notifies the result to the MCU 75. In addition, the MCU 75 is an integrated circuit (control circuit) constituting an embedded microprocessor, and plays a role in controlling the gain of the amplifier circuit 81 and the cutoff frequency of the high-pass filter 80 according to the pulse density notified from the pulse density detection unit 74.

[0128] Here, the gain control of the amplifier circuit 81 based on the pulse density is described. When the absolute value of the input signal of the ΔΣ modulation unit 82 (the output signal DO of the amplifier circuit 81) is too large, the output signal IO of the adder circuit 82b always exceeds the reference potential VTP or is lower than the reference potential VTN. Therefore, since the output signal CO is fixed to "+1" or "-1", the edge detection of the ΔΣ modulation unit 82 does not function. On the contrary, when the absolute value of the input signal of the ΔΣ modulation unit 82 (the output signal DO of the amplifier circuit 81) is too small, the state in which the output signal IO of the adder circuit 82b converges between the reference potential VTP and the reference potential VTN continues, and the output signal CO is fixed to "0", so the edge detection of the ΔΣ modulation unit 82 also does not function. Therefore, when the pulse density notified from the pulse density detection unit 74 is less than the specified value, the MCU 75 reduces or increases the gain of the amplifier circuit 81 according to the value of the output signal DO. When the gain of the amplifier circuit 81 is reduced, the potential level of the output signal DO decreases, so the output signal CO fixed to "+1" or "-1" can be released. In addition, when the gain of the amplifier circuit 81 is increased, the potential level of the output signal DO increases, so the output signal CO fixed to "0" can be released.

[0129] Fig.16 (a) is a diagram showing an example of a pulse signal transmitted by the sensor controller 31. Fig.16 (b) is a diagram showing an output signal DO of the amplifier circuit 81 outputted from the pen 2 that has received the pulse signal. Fig.16 (c) is a diagram showing an output signal IO of the adding circuit 82b corresponding to the output signal DO. Fig.16 (d) is a diagram showing the output signal CO of the analog circuit 71 corresponding to the output signal IO. Fig.16 The (e) is the same as Fig.16 The pulse signal shown in (a) corresponds to a known pattern stored in the pattern storage unit 73, Fig.16 (f) is expressed with Fig.16 (d) shows the output signal CO and Fig.16 The pattern shown in (e) is a diagram of the output signal FO of the edge-matched filter 87. Fig.13 The functions and effects of this embodiment will be described in detail with reference to these figures. Fig.16 (c) and Fig.16 (d) shows the use of Fig.14 The case of the comparison circuit 82c shown in (b).

[0130] like Fig.16As shown in (b), the output signal DO of the amplifier circuit 81 temporarily increases toward the positive side corresponding to the rising edge of the pulse signal sent by the sensor controller 31, and temporarily increases toward the negative side corresponding to the falling edge. This is because Fig.13 The high-pass filter 80 shown functions as a differentiating circuit.

[0131] like Fig.16 As shown in (c), the output signal IO of the adding circuit 82b becomes a signal that folds back according to exceeding the reference potential VTP, VTP0 and falling below the reference potential VTN0, VTN. By generating such a fold back, it can be said that the output signal IO becomes a signal after folding modulation (Signal Folding modulation). In this way, by performing folding modulation by the ΔΣ modulating unit 82, the dependence on the past signal becomes smaller, so according to the receiving circuit 61 of this embodiment, for example, compared with the receiving circuit 61 described in the first embodiment, it is possible to detect edges more reliably. In addition, compared with the type of ΔΣ modulating unit that feeds back the comparison result of the comparison circuit 82c to the subtraction circuit 82a as 2 values ​​(+1, 0) (that is, performs 1-bit ΣΔ modulation), it is possible to detect edges more reliably. This is because, in 1-bit ΣΔ modulation, 0 or +1 is always fed back, so it can only correspond to positive signals. However, if the comparison result of the comparison circuit 82c is fed back to the subtraction circuit 82a with an odd value such as 3 or 5, then in addition to being able to correspond to positive and negative signals, it can also correspond to no signal in the state of 0 (between VTP0 and VTN0).

[0132] In addition, as described here, as long as the feedback to the subtraction circuit 82a is performed with an odd value, it is not limited to Fig.14 The 3 values ​​shown in (a) or Fig.14 If the feedback corresponds to the value of 2m+1, for example, the comparison circuit 82c may be configured to include m comparators corresponding to positive and m comparators corresponding to negative.

[0133] In addition, if Fig.16 As shown in the example of (c) of FIG. 1 , if the comparison result of the comparison circuit 82c is fed back to the subtraction circuit 82a in five values ​​(+2, +1, 0, -1, -2), the dependency on the past signal becomes smaller than in the case of feeding back three values, so that the edge can be detected more reliably. In addition, according to the folding modulation, signal processing using a continuous-time integrator can be performed, so the effect of reducing signal loss can be obtained compared with the structure of processing using a multi-value AD disclosed in, for example, Non-Patent Document 1.

[0134] As described above, the output signal CO of the analog circuit 71 is a three-value pulse signal including a plurality of pulses for one chip of the chip string sent by the sensor controller 31, such as Fig.16 As shown in (d) of FIG. 1 , at the timing of generating each pulse, when the output signal IO exceeds the reference potential VTP, it becomes a signal including a pulse of +1, and when it falls below the reference potential VTN, it becomes a signal including a pulse of −1.

[0135] If Fig.16 (a) and Fig.16 As can be understood from the comparison with (d) of FIG. 1 , the output signal CO includes a plurality of pulses in addition to the pulse corresponding to the edge of the pulse signal sent by the sensor controller 31. Therefore, if the known pattern (a chip string obtained by Manchester encoding the spread code) used in the first embodiment is also used in this embodiment, it may not be possible to obtain an appropriate correlation operation result. However, in this embodiment, Fig.16 As shown in (e), a known pattern consisting of a 3-valued chip string is used. The 3 values ​​are constructed in the following manner: 1 chip is included for each chip of the output signal CO. Corresponding to the change of the transmitted chip string from "+1" to "0", only 1 chip becomes "-1", and corresponding to the change of the transmitted chip string from "0" to "+1", only 1 chip becomes "+1", and the other chips become "0". Therefore, even if the output signal CO contains pulses other than the pulses corresponding to the edges of the pulse signal, they will not be reflected in the result of the correlation operation. Therefore, according to the output signal CO obtained as a result of ΔΣ modulation, as shown in Fig.16 As shown in (f), appropriate correlation calculation results can be obtained.

[0136] As described above, according to the pen 2 of this embodiment, even if blunting occurs in the waveform of the uplink signal US, the edge can be reliably detected by the folding modulation performed by the ΔΣ modulation unit, so the possibility of the pen 2 being able to detect the edge increases. Therefore, the pen 2 can appropriately receive the uplink signal US.

[0137] In addition, since the correlation operation based on the three values ​​of +1, 0, and -1 is performed in the digital circuit 72, an appropriate correlation operation result can be obtained based on the output signal CO obtained as a result of ΔΣ modulation.

[0138] As mentioned above, although the preferred embodiment of the present invention has been described, the present invention is not limited to such embodiment at all, and the present invention can be implemented in various forms without departing from the gist of the present invention.

[0139] For example, the first and second embodiments may be used in combination. That is, the sensor controller 31 that transmits the uplink signal US in an edge-emphasized manner and the pen 2 that receives the uplink signal US using ΔΣ modulation and a three-value correlation operation may be used in combination. Thus, the pen can receive the uplink signal US more appropriately.

[0140] Description of symbols 1 Position detection system 2 pens 3. Tablet 3a Touch surface 20 cores 21 Pen tip electrode 23 Pen pressure detection sensor 24 Circuit board 25 Batteries 30 sensor electrode groups 30X, 30Y sensor electrodes 31 Sensor Controller 32 Main processor 33 Charger 41 Logic Department 42 Sending Department 43 Receiving Department 44 Selection Department 50 Code string holding unit 51 Extension Processing Unit 51A Signal source of the pulse signal generated by the expansion processing unit 51 52 Sending Processing Unit 52A Signal source of the delayed signal generated by the transmission processing unit 52 54x, 54y switch 55x, 55y conductor selection circuit 60 Switch 61 Receiving Circuit 62 Controller 63 Transmitting Circuit 71 Analog Circuits 72 Digital Circuits 73. Mode storage unit 74 Pulse density detection unit 80 High pass filter 81 Amplifier Circuit 82 ΔΣ modulation unit 82a Subtraction circuit 82b Adder Circuit 82c Comparison Circuit 82d, 82e Delay circuit 87 Edge Matched Filter 88 Uplink signal recovery unit 100 Output Circuit 101 Potential Generating Circuit ACa~ACd and circuit C Electrostatic Capacitance C1, Ca~Cd Capacitor elements CK1, CK2 clock cmd command CO analog circuit 71 output signal CPa~CPd Comparator DO amplifier circuit 81 output signal E1, E2 edge E3 Return edge FO is the output signal of the edge matched filter 87. IO The output signal of the adding circuit 82b OPa~OPd Operational Amplifier P Preamble R Region R1~R8、Ra~Rk、Rm、Rn resistance element Res Response data Rx Receive signal Sa~Si switch sTRx, sTRy, selX, selY control signals T Chip length of the spreading code UN Low frequency noise US uplink signal VDD High-side power supply potential VSS Low-side power supply potential Vref, VTP, VTP0, VTN0, VTN reference potential.

Claims

1. A pen comprising: electrode; A differential circuit performs a differential operation on the signal received by the electrode; a ΔΣ modulation unit that compares the output signal from the differential circuit with a reference potential and performs feedback processing on the comparison result; and The digital circuit performs correlation calculation between the output signal from the ΔΣ modulation unit and a known pattern.

2. The pen according to claim 1, wherein: The differentiating circuit detects edges of the signal received by the electrode.

3. The pen according to claim 1, wherein: The reference potential includes a reference potential corresponding to a positive potential and a reference potential corresponding to a negative potential.

4. The pen according to claim 1, wherein: The digital circuit detects data sent from an external sensor controller based on the correlation operation.

5. The pen according to claim 1, wherein: The known pattern is a 3-valued chip string.

6. The pen according to claim 5, wherein: The ΔΣ modulation unit performs folding modulation using two or more first comparators corresponding to positive and two or more second comparators corresponding to negative.

7. The pen according to claim 6, wherein: The output signal of the ΔΣ modulation unit is a three-value pulse signal. The digital circuit detects the transmission data by performing a correlation operation between the 3-value pulse signal and the 3-value chip string.

8. The pen according to claim 6, wherein: The output signal of the ΔΣ modulation unit is a 5-value pulse signal. The digital circuit detects the transmission data by performing a correlation operation between the five-value pulse signal and the three-value chip string.

9. The pen according to claim 1, wherein: The differential circuit includes a variable gain amplifier circuit. The pen further includes a control circuit that controls the gain of the amplifier circuit according to the pulse density of the output signal of the ΔΣ modulation unit.

10. A receiving circuit of a pen, wherein: Include: A differential circuit for performing a differential operation on the signal received by the electrode of the pen; a ΔΣ modulation unit that compares the output signal from the differential circuit with a reference potential and performs feedback processing on the comparison result; and The digital circuit performs correlation calculation between the output signal from the ΔΣ modulation unit and a known pattern.

11. The receiving circuit of the pen according to claim 10, wherein: The differentiating circuit detects edges of the signal received by the electrode.

12. The receiving circuit of the pen according to claim 10, wherein: The reference potential includes a reference potential corresponding to a positive potential and a reference potential corresponding to a negative potential.

13. The receiving circuit of the pen according to claim 10, wherein: The digital circuit detects data sent from an external sensor controller based on the correlation operation.

14. The receiving circuit of the pen according to claim 10, wherein: The known pattern is a 3-valued chip string.

15. The receiving circuit of the pen according to claim 14, wherein: The ΔΣ modulation unit performs folding modulation using two or more first comparators corresponding to positive and two or more second comparators corresponding to negative.

16. The receiving circuit of the pen according to claim 15, wherein: The output signal of the ΔΣ modulation unit is a three-value pulse signal. The digital circuit detects the transmission data by performing a correlation operation between the 3-value pulse signal and the 3-value chip string.

17. The receiving circuit of the pen according to claim 15, wherein: The output signal of the ΔΣ modulation unit is a 5-value pulse signal. The digital circuit detects the transmission data by performing a correlation operation between the five-value pulse signal and the three-value chip string.

18. The receiving circuit of the pen according to claim 10, wherein: The differential circuit includes a variable gain amplifier circuit. The receiving circuit of the pen further includes a control circuit that controls the gain of the amplifier circuit according to the pulse density of the output signal of the ΔΣ modulation unit.

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