Processing method for improving flatness of multi-layer PCB

Abstract

The invention discloses a processing method for improving the flatness of a multi-layer PCB. The processing method comprises the following steps: S1) manufacturing a semi-finished product A board part; the method specifically comprises the following steps of S11, board cutting; s12, manufacturing an inner layer of the plate A; (S13) pressing is carried out; s2) manufacturing a semi-finished product B plate part; the method specifically comprises the following steps: S21) cutting a board; s22, manufacturing an inner layer of the board B; s23), performing press fit; s24, post-processing the plate B; s25) manufacturing related patterns and hole belts; s26), carrying out browning; s3) pressing the plate A part and the plate B part; s4) processing an L00 layer; s41, X-Ray targeting and line cutting and grinding are carried out; (S42), post-treatment is carried out; and S43) testing and re-pressing are carried out. According to the invention, the flatness of the PCB multilayer board can be ensured, warping caused by different expansion and shrinkage coefficients in the PCB production process is avoided, and the yield of qualified products is improved.

Description

Technical Field

[0001] The invention belongs to the technical field of circuit boards, and in particular relates to a processing method for improving the flatness of a multi-layer PCB board. Background Art

[0002] At present, PCB design tends to be more complex and centralized. The material grade, density of board wiring, circuit grade and stacking of components on the board are becoming more and more complicated. From the initial single-sided plug-in to the current double-sided surface mounting, its production and processing technology is also becoming more complicated. The flatness of the PCB during mounting directly affects the pass rate of the product after mounting, so customers have also put forward more stringent requirements for the flatness of the PCB surface.

[0003] In the operating environment of millimeter-wave radar products, there are two types of signals: high-frequency signals and digital signals. In order to meet the transmission rate and loss requirements of high-frequency signals, high-frequency materials must be used; while other digital signals can meet the requirements with the use of low-cost FR4 materials. This leads to the mixed pressing process of two different materials. Millimeter-wave radar PCB is generally designed with 6 or 8 layers, of which L1 / 2 is the high-frequency signal layer, and L3 / 6 or L3 / 8 is the digital signal layer. However, due to the different filler and resin systems of the two materials, such as the attached Figure 2 As shown, the expansion and contraction coefficients during high-temperature pressing are different. After pressing, the product will bend toward the side with a larger shrinkage rate. On the other hand, due to the design of the holes, L3 to 6 needs to be pressed for the first time, and the thickness after pressing is about 50 mil. Due to the requirements of signal transmission, the thickness of the high-frequency material is 5 mil. The second BOOK stacking pressing is 5 mil high-frequency material and 50 mil L3 to 6 semi-finished products. The thickness of the two pressed materials is seriously uneven, causing the PCB to bend toward the thinner side after pressing, resulting in a very high defective rate. Summary of the invention

[0004] In order to solve the above technical problems, a technical solution adopted by the present invention is:

[0005] A processing method for improving the flatness of a multi-layer PCB board comprises the following steps:

[0006] S1): Making the semi-finished product A plate part;

[0007] The specific steps are as follows:

[0008] S11): Cutting: Cut the CCL to the required size according to the engineering design size to facilitate the next station operation;

[0009] S12): A board inner layer production: A board inner layer circuit is produced on the high-frequency substrate; wherein the copper foil thickness is 0.5-0.7 oz; wherein the high-frequency substrate is R5515;

[0010] S13): Lamination: Lamination of the copper-free substrate with the PP layer and the inner layer to obtain the A-board part; wherein the copper-free substrate is IT-158;

[0011] S2): Make the semi-finished product B board part;

[0012] The specific steps are as follows:

[0013] S21): Cutting: Cut the CCL to the required size according to the engineering design size to facilitate the next station operation;

[0014] S22): Making the inner layer of the B board: Making the inner layer circuit of the B board; the substrate can be covered with multiple layers of copper foil, and a pp layer is provided between every two layers of copper foil, and the first layer close to the substrate is defined as the first layer, and the thickness of the first layer of copper foil is 0.5-0.7oz, and the thickness of the subsequent layers is 0.33-0.43oz, wherein the substrate is IT-158;

[0015] S23): Laminating: Laminating the inner layer obtained in step 22 to obtain a B plate portion;

[0016] S24): Post-processing of plate B: X-Ray target shooting and cutting line;

[0017] S25): making relevant graphics and hole bands;

[0018] S26): browning;

[0019] S3): Pressing the A plate part and the B plate part together;

[0020] S4): Processing L 00 layer;

[0021] S41): X-Ray target shooting and cutting line;

[0022] S42): Post-processing: complete the outer layer design;

[0023] S43): Test and re-press: Test the design standards and total thickness at each location, and re-press in place according to the design requirements.

[0024] Furthermore, in step 12, the copper foil is HVLP2 copper foil, wherein the upper copper foil is electroplated, and specifically further comprises the following steps:

[0025] S121): inner layer pre-treatment;

[0026] S122): film pasting;

[0027] S123): LDI exposure;

[0028] S124): DES;

[0029] S125): AOI inspection;

[0030] S126): CCD punching;

[0031] S127): Inner layer browned.

[0032] Furthermore, the pressing parameters of step 13 are: pressure 300-350 psi, temperature rise rate 1.2±1.8°C / min, temperature 200-250°C.

[0033] Furthermore, in step 22, except for the first layer of copper foil, the remaining layers of copper foil are all electroplated, and specifically the following steps are also included:

[0034] S221): inner layer pre-treatment;

[0035] S222): film pasting;

[0036] S223): LDI exposure;

[0037] S224): DES;

[0038] S225): AOI inspection;

[0039] S226): CCD punching;

[0040] S227): Inner layer browned.

[0041] Furthermore, the pressing parameters of step 23 are: pressure 350-400 psi, temperature rise rate 1.5±2.1°C / min, temperature 200-250°C.

[0042] Furthermore, the step 42 specifically includes the following steps:

[0043] S421): Laser;

[0044] S422): drilling;

[0045] S423): electroplating;

[0046] S424): outer LDI circuit;

[0047] S425): Intermediate inspection;

[0048] S426): solder mask;

[0049] S427): text;

[0050] S428): Milling shape.

[0051] Furthermore, the pressing parameters of step 43 are: pressure 100-150 psi, temperature rise rate 1.7-2.3° C. / min, temperature 200-250° C.

[0052] Beneficial effects of the present invention:

[0053] The present invention can ensure the flatness of the PCB multilayer board, avoid warping caused by different expansion and contraction coefficients during the PCB production process, and improve the yield rate of qualified products. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] Figure 1 Schematic diagram of the compression structure principle of Example 1 of the present invention;

[0055] Figure 2 This is a schematic diagram of the warping during production of the present invention;

[0056] The parts in the accompanying drawings are marked as follows:

[0057] 1. Solder mask layer; 2. Copper foil layer; 3. High-frequency substrate layer; 4. PP layer; 5. Substrate layer. DETAILED DESCRIPTION

[0058] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings so that the advantages and features of the present invention can be more easily understood by those skilled in the art, thereby making a clearer and more definite definition of the protection scope of the present invention.

[0059] Example:

[0060] like Figure 1 to Figure 2 As shown, a processing method for improving the flatness of a multi-layer PCB board, taking a 6-layer millimeter wave radar PCB as an example, includes the following steps:

[0061] S1): Making the semi-finished product A plate part;

[0062] The specific steps are as follows:

[0063] S11): Cutting: Cut the CCL (Copper Clad Laminate) to the required size according to the engineering design size to facilitate the next station operation;

[0064] S12): A board inner layer production: A board inner layer circuit is produced on a high-frequency substrate; wherein the copper foil thickness is 0.5-0.7 oz; wherein the high-frequency substrate is R5515; specifically, the copper foil in step 12 is HVLP2 copper foil, wherein the upper copper foil is electroplated, and specifically further comprises the following steps:

[0065] S121): inner layer pre-treatment;

[0066] S122): film pasting;

[0067] S123): LDI (laser direct imaging) exposure;

[0068] S124): DES (developing, etching, stripping);

[0069] S125): AOI (Automated Optical Inspection);

[0070] S126): CCD (Charge-Coupled Device) punching;

[0071] S127): Inner layer browned.

[0072] S13): Lamination: The PP layer attached to the copper-free substrate is laminated with the inner layer to obtain the A-board part; wherein the copper-free substrate is IT-158; specifically, the lamination parameters of step 13 are: pressure 300-350psi, temperature rise rate 1.2±1.8℃ / min, temperature 200-250℃.

[0073] S2): Make the semi-finished product B board part;

[0074] The specific steps are as follows:

[0075] S21): Cutting: Cut the CCL to the required size according to the engineering design size to facilitate the next station operation;

[0076] S22): Making the inner layer of the B board: Making the inner layer circuit of the B board; the substrate may be covered with multiple layers of copper foil, and a pp layer is provided between every two layers of copper foil, and the first layer is defined as the first layer close to the substrate, and the thickness of the first layer of copper foil is 0.5-0.7oz, and the thickness of the subsequent layers is 0.33-0.43oz, wherein the substrate is IT-158; specifically, in the step 22, except for the first layer of copper foil, the remaining layers of copper foil are electroplated, and specifically the following steps are also included:

[0077] S221): inner layer pre-treatment;

[0078] S222): film pasting;

[0079] S223): LDI exposure;

[0080] S224): DES;

[0081] S225): AOI inspection;

[0082] S226): CCD punching;

[0083] S227): Inner layer browned.

[0084] S23): Laminating: Laminating the inner layer obtained in step 22 to obtain the B plate part; specifically, the laminating parameters of step 23 are: pressure 350-400 psi, temperature rise rate 1.5±2.1°C / min, temperature 200-250°C.

[0085] S24): B plate post-processing: X-Ray target shooting and grinding line cutting;

[0086] S25): making relevant graphics and hole bands;

[0087] S26): browning;

[0088] S3): Pressing the A plate part and the B plate part together;

[0089] S4): Processing L 00 layer;

[0090] S41): X-Ray target shooting and cutting line;

[0091] S42): Post-processing: completing the outer layer design; specifically, the step 42 specifically includes the following steps:

[0092] S421): Laser;

[0093] S422): drilling;

[0094] S423): electroplating;

[0095] S424): outer LDI circuit;

[0096] S425): Intermediate inspection;

[0097] S426): solder mask;

[0098] S427): text;

[0099] S428): Milling shape.

[0100] S43): Testing and re-pressing: Testing the design standards and total thickness of each part, and re-pressing in place according to the design requirements. Specifically, the pressing parameters of step 43 are: pressure 100-150psi, temperature rise rate 1.7-2.3℃ / min, temperature 200-250℃.

[0101] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent structural transformations made using the contents of the present invention's specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A processing method for improving the flatness of a multi-layer PCB, characterized in that: The following steps are involved: S1): Making the semi-finished product A plate part; The specific steps are as follows: S11): Cutting: Cut the CCL to the required size according to the engineering design size to facilitate the next station operation; S12): A board inner layer production: A board inner layer circuit is produced on the high-frequency substrate; wherein the copper foil thickness is 0.5-0.7 oz; wherein the high-frequency substrate is R5515; S13): Lamination: Lamination of the copper-free substrate with the PP layer and the inner layer to obtain the A-board part; wherein the copper-free substrate is IT-158; S2): Make the semi-finished product B board part; The specific steps are as follows: S21): Cutting: Cut the CCL to the required size according to the engineering design size to facilitate the next station operation; S22): Making the inner layer of the B board: Making the inner layer circuit of the B board; the substrate can be covered with multiple layers of copper foil, and a pp layer is provided between every two layers of copper foil, and the first layer close to the substrate is defined as the first layer, and the thickness of the first layer of copper foil is 0.5-0.7oz, and the thickness of the subsequent layers is 0.33-0.43oz, wherein the substrate is IT-158; S23): Laminating: Laminating the inner layer obtained in step 22 to obtain a B plate portion; S24): Post-processing of plate B: X-Ray target shooting and cutting line; S25): making relevant graphics and hole bands; S26): browning; S3): Pressing the A plate part and the B plate part together; S4): Processing L 00 layer; S41): X-Ray target shooting and cutting line; S42): Post-processing: complete the outer layer design; S43): Test and re-press: Test the design standards and total thickness at each location, and re-press in place according to the design requirements.

2. The method for improving the flatness of a multi-layer PCB according to claim 1, characterized in that: The copper foil in step 12 is HVLP2 copper foil, wherein the upper copper foil is electroplated, and specifically further comprises the following steps: S121): inner layer pre-treatment; S122): film pasting; S123): LDI exposure; S124): DES; S125): AOI inspection; S126): CCD punching; S127): Inner layer browned.

3. The method for improving the flatness of a multi-layer PCB according to claim 1, characterized in that: The pressing parameters of step 13 are: pressure 300-350 psi, temperature rise rate 1.2±1.8°C / min, temperature 200-250°C.

4. The method for improving the flatness of a multi-layer PCB according to claim 1, characterized in that: In the step 22, except for the first layer of copper foil, the remaining layers of copper foil are all electroplated, and specifically the following steps are also included: S221): inner layer pre-treatment; S222): film pasting; S223): LDI exposure; S224): DES; S225): AOI inspection; S226): CCD punching; S227): Inner layer browned.

5. The method for improving the flatness of a multi-layer PCB according to claim 1, characterized in that: The pressing parameters of step 23 are: pressure 350-400 psi, temperature rise rate 1.5±2.1°C / min, temperature 200-250°C.

6. The method for improving the flatness of a multi-layer PCB according to claim 3, characterized in that: The step 42 specifically includes the following steps: S421): Laser; S422): drilling; S423): electroplating; S424): outer LDI circuit; S425): Intermediate inspection; S426): solder mask; S427): text; S428): Milling shape.

7. The method for improving the flatness of a multi-layer PCB according to claim 1, characterized in that: The pressing parameters of step 43 are: pressure 100-150 psi, temperature rise rate 1.7-2.3° C. / min, temperature 200-250° C.

Images