Fabrication and processing of graphene-on-silicon electronic devices with SiO2 passivation layers

Through the three-step cleaning method of methylbenzene, ketone and alcohol and electron beam lithography plasma etching technology, the defects and layering problems of graphene on silicon wafers are solved, the electronic performance is improved, and the graphene field effect transistor is realized high-quality integration.

CN119278498APending Publication Date: 2025-01-07ARCHER MATERIALS LTD
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Patent Information

Application Number
CN202380038942.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2022-03-31
Filing Date
2023-03-31
Publication Date
2025-01-07

AI Technical Summary

Technical Problem

When integrating graphene into silicon wafers, defects and layering problems of graphene lead to deterioration of electronic performance, and the prior art is difficult to effectively solve on industrial scale, especially during lithography and resist treatment.

Method used

A three-step cleaning method of methylbenzene, ketone and alcohol is used to reduce defects and layering on the graphene layer. Combined with electron beam lithography and plasma etching, resist and residue are gradually removed to form high-quality graphene Field effect transistor.

Benefits of technology

It significantly reduces defects and delamination on the graphene layer, improves electron transmission performance, and achieves high-quality integration of graphene field effect transistors, suitable for the manufacturing of ISO 5 clean room environments.

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Abstract

The invention relates to fabrication and processing of graphene-on-silicon electronic devices with a SiO2 passivation layer.
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Description

Technical Field

[0001] The present invention relates broadly to the fabrication and processing of graphene-on-silicon electronic devices including a silicon dioxide passivation layer. Background Art

[0002] Graphene is a very promising material for electronic devices, especially graphene field effect transistors (gFETs). This includes analog applications, such as gas and biomolecule sensors, and digital applications (at certain low-dimensional sizes). However, at this point, graphene has not really moved beyond laboratory scale applications due to the lack of processes for integration into traditional silicon (Si) wafer production lines. The main issues with graphene processing and integration with Si are: transferring graphene from the growth substrate, protecting graphene during fabrication, and degradation of the electrical properties of graphene caused by the handling of polymer resists used in lithography.

[0003] Graphene is not usually grown on SiO2 substrates. This is a problem in manufacturing graphene-based semiconductor devices, because many electronic devices (i.e., integrated circuits and sensors) integrated into silicon technology require a thin layer of SiO2 as an insulating layer. This layer is necessary in activating the field effect, which is responsible for allowing the material to be used as a transistor. Since the direct growth of graphene on a silicon substrate is not easy to achieve, graphene is usually synthesized and then transferred to the SiO2 surface. This includes graphene layers removed from graphite, graphene synthesized by chemical vapor deposition (CVD), and chemically synthesized and separated graphene dispersed in a solution. Among them, graphene stripped from graphite usually produces the best quality graphene, however, the method is not industrially scalable and is mainly limited to research applications. Both CVD and chemically synthesized graphene are more suitable for scaled-up manufacturing. CVD usually includes growth on a metal catalyst (copper or nickel) and transfer to a Si wafer. Many transfer processes leave chemical residues or defects that adversely affect electronic properties (sometimes both) during use. Nonetheless, CVD is widely regarded as an advantageous process in graphene manufacturing because it results in uniform single-layer to very few-layer graphene batch-to-batch repeatability and reproducibility.

[0004] In order to effectively integrate CVD-grown graphene into gFETs, a method needs to be developed to prevent undesirable defects and delamination of graphene while maintaining the electronic properties. These two properties are inevitably linked because the broken sp 2 Key (through vacancy or sp 3 Bond defects) will lead to reduced electron transport through the graphene surface. Pristine graphene without defects and without substrate bonds simply scatters electrons through phonon interactions. However, once graphene is exposed from above (e.g., by a passivation layer or by breaking the sp 2These impurities also scatter electrons, thus reducing electron transport. Recent models have been able to relate electron mobility and electron transport directly to defect density, allowing defects to be calculated from electronic measurements via the following equation:

[0005] μ=α / η0

[0006] where μ is the electron mobility, η0 is the defect density, and α is 20.e 2 / h (which is approximately the conductivity value of the sample). Therefore, the reduction of defects can be directly measured electronically as an improvement in carrier mobility (i.e., lower sheet resistance).

[0007] There are several methods for quantifying the number of defects on a graphene sheet. The most effective is Raman spectroscopy. In addition to determining the number of graphene sheets on a surface, this technique can also determine if defects are present and in what form. The main forms of defects are vacancy defects, where a carbon atom is missing from the crystal lattice, and sp defects, where a carbon atom in the graphene is already bonded to another atom on the surface. 3 defects, disturbing the delocalized sp 2 Bonding. The standard spectrum of graphene is around 1600 cm -1 (G) shows a graphite peak at about 2650 cm -1 The 2D band is shown at about 1360 cm -1 (D) and about 1610cm -1 The additional peak at (D') carries information about the quantity and type of defects (the intensity of the peak indicates the number of defects, and the ratio between the intensities of D and D' indicates the nature of the defects). Information from Raman on graphene usually comes from the ratio of peak heights or areas. If the D / D' ratio is greater than 10, especially about 13, the defects may be due to sp 3 Defects. A ratio of about 7 is equivalent to vacancy defects (important for preventing removal from graphene), and a ratio of about 3.5 is a grain boundary or dislocation of the lattice. The relative height of the D peak gives a hint of how many defects are present. The D' peak is also very close to the G peak, which means that if more defects are present, there will be a change in the full width at half maximum (FWHM) before the D' peak is fully seen.

[0008] In the art, technicians generally try to prevent defects (ie, keep D and D' small to non-existent), and if a defect exists, the ratio between D and D' should be as small as possible to ensure that it is just a discontinuity or a small gap. 3 If this is the case, major problems may occur during processing, resulting in extensive delamination.

[0009] X-ray photoelectron spectroscopy (XPS) is another way to determine the number of defects in graphene. This can be done by examining the core carbon 1s spectrum. When compared to sp 3 The carbon-carbon sp bonds found in graphene are 284.8 eV compared to carbon-carbon / hydrogen bonds (284.8 eV for carbon and other elements and about 286 to 289 eV for carbon and other elements). 2 The bond has a lower binding energy, about 284 eV. With respect to XPS, the technician will expect to see a convolution of the 284.8 and 284 peaks. 284.8 will dominate due to the foreign carbon layer (which can only be removed in a vacuum by ion bombardment that will remove graphene). XPS should be expected to show less in the 286 and 289 peaks due to other carboxyl groups. In addition, XPS can determine and quantify the presence of other elements on the sample, providing higher accuracy in separating what chemical defects are and how much there are. XPS of the valence band can be used to calculate information about the band gap, allowing a direct correlation of the chemical and electronic properties of graphene.

[0010] Defects can also be directly observed and quantified by microscopic examination of the graphene surface. At high magnification, defects can be observed with an optical microscope as color changes. These defects can be offset according to the ratio of the defect area of ​​the graphene to the total area of ​​the graphene. For example, it was observed that for the method of the present invention, a skilled person can expect to see about 5% fewer defects relative to comparable methods used in the prior art.

[0011] Several strategies exist to reduce defects and delamination, including patterning with metals (particularly Ti and Au) and cleaning graphene (using vacuum heating and lasers and electron beams). While metal protection is effective in protecting during processing, post-processing packaging including plasma and laser cutting requires further photoresist-based lithography, which cannot be protected from use in these processes after manufacturing. At the same time, energy-intensive cleaning methods tend to introduce more undesirable defects while removing residues.

[0012] In order to fully integrate gFETs into silicon technology, the fabrication of gFETs must be compatible with a cleanroom environment. This means developing lithography methods that are compatible with light or electronic polymer resists, and using pristine graphene on Si with in-plane crystallinity (i.e., CVD). Further development of gFETs as sensing platforms (particularly biosensors utilizing liquid gates) requires electrode passivation and isolation to reduce crosstalk. This introduces another layer of complexity (and lithography) beyond just making graphene electrodes. Therefore, even if a sacrificial metal layer is used to protect the graphene during fabrication, the problem of reliably removing polymer resists and residues will need to be solved. The present invention attempts to overcome one or more current shortcomings of the prior art. Summary of the invention

[0013] The present invention provides a gFET manufacturing method suitable for an ISO 5 clean room environment and includes three cleaning process steps. Si is covered with a complete monolayer to a few layers (from 1 to 3) of graphene film (produced from CVD) for manufacturing. This (number of layers) is also important for the electronic structure because for graphene, the introduction of band gaps for more than one layer has been fully studied. During the manufacture of gFETs, the steps used can introduce contaminants and defects into the graphene surface, which remain and subsequently lead to delamination of the graphene layer. These contaminants and defects remain attached to the graphene surface and the resist layer used to transfer the graphene to the Si surface, so that the removal of the resist leads to the removal of contaminants and attached graphene. Since the graphene below these contaminants is removed, delamination occurs, leaving an incomplete graphene layer.

[0014] The inventors have discovered that the methods disclosed herein minimize or prevent delamination of graphene deposited on a substrate. It has also been discovered that the methods disclosed herein can be used to fabricate graphene field effect transistors (gFETs).

[0015] Regarding the method of the present invention, first, the graphene on Si is rinsed with methylbenzene (in one case, xylene), then rinsed with ketone (in one case, acetone), and finally rinsed in alcohol (in one case, isopropyl alcohol (IPA)). In addition, after photolithography, methylbenzene is used to remove polymer resists (such as PMMA), followed by cleaning with ketones and alcohols. The inventors have found that first cleaning with methylbenzene, such as xylene, is beneficial to prevent graphene delamination during resist removal after photolithography. This is mainly due to the removal of contaminants and defects associated with amorphous carbon deposition introduced during CVD of the graphene layer.

[0016] Thus, in one aspect, the present invention provides a method for minimizing or preventing graphene delamination and / or reducing defects in a graphene layer deposited on a SiO2 / Si substrate, the method comprising the steps of:

[0017] i) providing a SiO2 / Si wafer substrate;

[0018] ii) depositing a graphene layer grown by CVD (chemical vapor deposition) onto the surface of the wafer substrate by polymer deposition transfer;

[0019] iii) cleaning the graphene deposition layer with methylbenzene;

[0020] iv) cleaning the layer after step iii) with ketone; and

[0021] v) Cleaning the layer after step iv) with alcohol.

[0022] In a second aspect, the present invention further provides a method of manufacturing a graphene field effect transistor (gFET), the graphene field effect transistor comprising a graphene layer deposited on a SiO2 / Si substrate, and wherein the gFET is characterized by having at least one drain, source and gate electrode, the method comprising the steps of:

[0023] i) providing a SiO2 / Si wafer substrate;

[0024] ii) depositing a graphene layer grown by CVD (chemical vapor deposition) onto the surface of the wafer substrate by polymer deposition transfer;

[0025] iii) cleaning the deposited graphene with methylbenzene;

[0026] iv) subsequently cleaning the layer of step iii) with a ketone;

[0027] v) cleaning the layer after step iv) with alcohol;

[0028] vi) after step v), depositing a polymer resist on said layer;

[0029] vii) using electron beam lithography to define the areas on the wafer substrate where the graphene will remain;

[0030] viii) using O2 plasma etching to remove unwanted graphene;

[0031] ix) cleaning off any remaining resist using methylbenzene;

[0032] x) cleaning the remaining graphene layer with ketone;

[0033] xi) cleaning the graphene layer after step x) with alcohol;

[0034] xii) after step xi), depositing an adhesive layer comprising Ti or Cr onto the graphene surface layer;

[0035] xiii) after step xii), depositing a layer of metal electrode material onto the adhesive layer; and

[0036] xiv) removing the metal layer of step xiii) to form a gFET including at least one of a drain, a source and a gate.

[0037] With regard to the above two aspects, in certain embodiments, the methylbenzene is selected from xylene (o-xylene, m-xylene or p-xylene), toluene, trimethylol (1,2,3-trimethylbenzene), mesitylene (1,3,5-trimethylbenzene), pseudocumene (1,2,4-trimethylbenzene), tetramethylol (1,2,3,4-tetramethylbenzene), isodurene (1,2,3,5-tetramethylbenzene), durene (1,2,4,5-tetramethylbenzene) and hexamethylbenzene. In one embodiment, commercially available methylbenzene is sufficient. In one embodiment, commercially available methylbenzene contains minimal (i.e., less than 1%) metallic impurities. In a preferred embodiment, the methylbenzene is xylene.

[0038] About above-mentioned two aspects, in certain embodiments, ketone is selected from acetone, ethyl acetate, cyclohexanone, methyl ethyl ketone and diacetone.In one embodiment, commercially purchased ketone is sufficient.In one embodiment, commercially available ketone comprises minimum (that is, less than 1%) metallic impurities.In preferred embodiments, ketone is acetone.

[0039] About above-mentioned two aspects, in certain embodiments, alcohol is selected from isopropyl alcohol (IPA), ethanol, n-propyl alcohol, n-butyl alcohol, isobutyl alcohol, tert-butyl alcohol and n-amyl alcohol. In one embodiment, commercially available alcohol is enough. In one embodiment, commercially available alcohol contains minimum (i.e. less than 1%) metallic impurities. In a preferred embodiment, alcohol is isopropyl alcohol.

[0040] In certain embodiments of the first or second aspect, the one or more cleaning steps may be independently performed one or more times.

[0041] In certain embodiments, the polymer resist is selected from poly(methyl methacrylate) (PMMA), poly(α-methylstyrene-co-α-methylchloroacrylate) (CSAR62), ZEP520, and maN2403.

[0042] In an embodiment of the first aspect, the method comprises the following steps:

[0043] i) providing a SiO2 / Si wafer substrate;

[0044] ii) depositing a graphene layer grown by CVD (chemical vapor deposition) onto the surface of the wafer substrate by polymer deposition transfer;

[0045] iii) cleaning the graphene deposited layer with xylene;

[0046] iv) cleaning the layer after step iii) with acetone; and

[0047] v) Clean the layer after step iv) with isopropyl alcohol.

[0048] In an embodiment of the second aspect, the method comprises the following steps:

[0049] i) providing a SiO2 / Si wafer substrate;

[0050] ii) depositing a graphene layer grown by CVD (chemical vapor deposition) onto the surface of the wafer substrate by polymer deposition transfer;

[0051] iii) then cleaning the deposited graphene with xylene;

[0052] iv) cleaning the layer after step iii) with acetone;

[0053] v) cleaning the layer after step iv) with isopropyl alcohol;

[0054] vi) after step v), depositing a polymer resist on said layer;

[0055] vii) using electron beam lithography to define the areas on the wafer substrate where the graphene will remain;

[0056] viii) using O2 plasma etching to remove unwanted graphene;

[0057] ix) cleaning off any remaining polymer resist using xylene;

[0058] x) cleaning the remaining graphene layer with acetone;

[0059] xi) cleaning the graphene layer after step x) with isopropyl alcohol;

[0060] xii) after step xi), depositing an adhesive layer comprising Ti or Cr onto the graphene surface layer;

[0061] xiii) after step xii), depositing a layer of metal electrode material onto the adhesive layer; and

[0062] xiv) removing the metal layer of step xiii) to form a gFET including at least one of a drain, a source and a gate.

[0063] Method disclosed herein defines the step of providing a graphene layer, wherein the delamination of the layer is minimized. Therefore, these methods can be used to prepare electronic devices, wherein the manufacture of electronic devices includes the steps in the method disclosed herein. In certain embodiments, the electronic device can be selected from electronic circuits, electronic sensors, analog circuits, semiconductor chips and microfluidic delivery systems based on graphene. In certain embodiments, the electronic circuit based on graphene includes a graphene field effect transistor (gFET). In other embodiments, the electronic sensor is a sensor for gas or biomolecules. In specific embodiments, the analog circuit is an amplifier, an oscillator or a hybrid circuit. In certain embodiments, the microfluidic delivery system delivers gas and / or biomolecules. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] Figure 1 A gFET fabricated using a two-step acetone and IPA clean and acetone stripping. The graphene is torn apart over wide areas, exposing SiO2 (low contrast areas / light purple). This form of cleaning causes the graphene to delaminate and tear apart as the PMMA is removed (high contrast areas).

[0065] Figure 2 . Figure 1 Graphene covered Si die resistance measurement shown in . The overlay circle on the left side of the image highlights the location of the die and the location of the probes, while the overlay circle on the upper right side of the image highlights the output value of the resistance measurement on the multimeter. The value on the multimeter is too high for the measurement range, indicating a resistance of over 100 MΩ (effectively an electrical insulator) which is much greater than expected for graphene.

[0066] Figure 3 Steps for cleaning bare graphene on SiO2 1 cm x 1 cm die with acetone and IPA before coating and curing in PMMA. PMMA was then removed and the resulting die was imaged at a) the center and b) the edge.

[0067] Figure 4 .Reasons for graphene delamination. A piece of bare Si (high contrast rectangles / blue) with a passivation layer of SiO2 (low contrast rectangles / grey) is cleaned for graphene transfer (a). Graphene (dashed line) is transferred to the surface using a polymer (typically PMMA), after which the PMMA is removed (b). Contaminants, defects, and amorphous carbon from the synthesis and transfer remain on the graphene surface (c). These defects and contaminants are not removed by the acetone-IPA clean (d), and when the PMMA is deposited and cured, these points anchor the graphene to the PMMA (e). Subsequently, when the PMMA is removed, the anchor points remove the underlying graphene (f).

[0068] Figure 5Steps for cleaning bare graphene on SiO2 1cm x 1cm die with xylene, acetone and IPA before coating in PMMA and curing. PMMA was then removed and the resulting die was imaged at a) the center and b) the edge.

[0069] Figure 6 Raman spectra of graphene samples a) before cleaning and PMMA deposition, and b) after three-step washing, PMMA deposition, curing, and removal with three-step washing. The G band is located at 1598 cm -1 , and 2D is located at 2650cm -1 The D' peak is also very close to the G peak, which means that if defects increase, there will be a change in the full width at half maximum (FWHM) before the D' peak is fully seen. For example, for the present invention, the pre-cleaned graphene has a FWHM of 7.8 cm -1 The G peak FWHM of the present invention is 9.2 cm after cleaning and processing. -1 Given this small increase and the lack of any large D peak in the spectrum, it is likely that the processing has caused some small defects (very small D peak in the noise), which are probably related to grain formation (since a slight broadening of the G peak would be the result of a D' peak similarly in the noise, i.e. an AD / D' ratio of ~3.5).

[0070] Figure 7 . Figure 3 and 5 Comparison of resistance measurements of graphene-covered Si dies as seen in Figure 3. Here one can see the resistance for a) the two-step acetone-IPA and b) the three-step xylene-acetone-IPA cleaning methods. The left circle highlights the location of the die (and thus the location of the probe), while the upper right circle highlights the resistance measurement. The measurement shown in a) is too high for the measurement range, indicating resistances in excess of 100 MΩ (which is actually an electrical insulator) which is much greater than the expected resistance of graphene. For b), the resistance is detected in the KΩ range (although difficult to stabilize in the case of the measurement method used here), which is typical for graphene.

[0071] Figure 8 .A solution for graphene delamination is proposed. A piece of bare Si (dark contrast rectangles / blue) with a SiO2 (low contrast rectangles / grey) passivation layer is cleaned for graphene transfer (a). Graphene (dashed lines) is transferred to the surface using a polymer (typically PMMA), after which the PMMA is removed (b). Contaminants, defects, and amorphous carbon from the synthesis and transfer remain on the graphene surface, which is cleaned with xylene (c), followed by acetone and IPA to remove any further xylene residues (d). This reduces potential anchoring points for PMMA (e). Subsequently, when the PMMA is removed, the graphene remains mostly intact (f).

[0072] Fig. 9 Graphene on Si die after xylene-acetone-IPA cleaning, e-beam lithography, Au deposition, and xylene stripping. The images show three different magnifications, showing that a) gross graphene remains, b) graphene has been stripped from areas where gold was deposited, and c) graphene is continuous on the smallest scale with minor defects.

[0073] Fig.10 Graphene on a Si wafer after xylene-acetone-IPA cleaning, e-beam lithography, graphene etching, another round of xylene-acetone-IPA cleaning, e-beam lithography, metal deposition, and xylene stripping. This image shows that after multiple rounds of lithography, the graphene sheet remains connected to the metallic electrodes.

[0074] Fig.11 Graphene four-probe measurement device on Si die with corresponding IV traces after xylene-acetone-IPA cleaning, e-beam lithography, graphene etching, another round of xylene-acetone-IPA cleaning, e-beam lithography, metal deposition, and xylene stripping. This image shows that the graphene sheet remains connected to the metallic electrodes after multiple rounds of lithography. In this case, the device has had the polymer layer removed successfully and tested for current-voltage characteristics.

[0075] Fig.12 .A process for fabricating a gFET is presented. First, a graphene-covered Si bare die or wafer is cleaned in xylene, then in acetone and finally in IPA (a). Next, PMMA is spin-coated and cured (b). Electron beam lithography is then performed and the resist is developed (c). The sample is etched by O2 and the residual PMMA resist is removed in xylene, leaving small graphene sheets (d). Thereafter, the steps shown in (a) and (b) are repeated and another round of electron beam lithography and development is performed (e). Metal contacts are then deposited, which are typically an adhesive layer comprising Ti or Cr, followed by the electrode material, typically Au (f). The metal-covered resist is stripped off, leaving the drain, source and gate (g). This completes the gFET, however, a passivation layer is required to make it suitable for biosensing. Steps (a) and (b) are performed again before another electron beam lithography step and before the deposition of the dielectric material (h). The final stripping step leaves only the exposed graphene and gate electrodes (i). DETAILED DESCRIPTION

[0076] Currently, in the art, one of the most basic cleaning methods used in clean rooms is the use of ketones and alcohols. The inventors have found that additional cleaning with methylbenzene (eg xylene) can improve the graphene layer in terms of minimizing delamination and / or defects.

[0077] Throughout the specification and the claims that follow, unless the context requires otherwise, the word "comprise" and variations such as "comprising" and "containing", will be understood to imply the inclusion of stated integers or steps or groups of integers or steps but not the exclusion of any other integers or steps or groups of integers or steps.

[0078] As used herein, the terms "about" or "approximately" mean within an acceptable error range for the particular value as determined by one of ordinary skill in the art, which will depend in part on how the value is measured or determined, ie, the limitations of the measurement system.

[0079] Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. For the purposes of the present invention, the following terms are defined below.

[0080] In one aspect, the present invention provides a method for minimizing or preventing graphene delamination and / or reducing defects in a graphene layer deposited on a SiO2 / Si substrate, the method comprising the steps of:

[0081] i) providing a SiO2 / Si wafer substrate;

[0082] ii) depositing a graphene layer grown by CVD (chemical vapor deposition) onto the surface of the wafer substrate by polymer deposition transfer;

[0083] iii) cleaning the graphene deposition layer with methylbenzene;

[0084] iv) cleaning the layer after step iii) with ketone; and

[0085] v) Cleaning the layer after step iv) with alcohol.

[0086] In an embodiment, the SiO2 / Si wafer substrate includes a SiO2 insulating layer of about 100 nm to 400 nm, for example, about 100 nm, 150 nm, 200 nm, 250 nm, 300 nm, 350 nm, or about 400 nm (or any range between any two of the thicknesses).

[0087] Chemical vapor deposition (CVD) grown graphene is deposited on the wafer in a clean room environment (eg ISO 5 / class 100 type).

[0088] As used herein, "CVD-grown graphene" refers to the technology of graphene being deposited as a film from a vapor species onto a substrate (e.g., Cu or Ni foil) by chemical reaction. The process and type of various possible chemical reactions occurring in a CVD reactor are controlled by many complex factors, including system settings, reactor configuration, gas feedstock, gas ratio, reactor pressure and gas partial pressure, reaction temperature, growth time, temperature, etc. CVD is a widely used method for synthesizing few-layer and monolayer graphene films from the bottom up. A variety of different CVD methods can be obtained, which can be used for synthesizing materials based on graphene. According to the characteristics of process parameters (pressure, temperature, precursor properties, gas flow state, wall / substrate temperature, deposition time, and activation mode), these methods can be classified into seven main types based on the properties of temperature, pressure, wall / substrate, precursor, deposition time, gas flow state, and activation / power supply.

[0089] CVD grown graphene is generally considered to be high quality graphene, meaning that the single crystal material is free of contamination, wrinkles, cracks or other defects. A transfer step is required to deposit the graphene from the CVD grown graphene substrate onto the desired technical substrate, in this case a SiO2 / Si wafer substrate.

[0090] The transfer is facilitated by polymer deposition transfer with the aid of a polymer transfer agent such as polymethyl methacrylate (PMMA), poly(bisphenol A carbonate) or polyvinyl acetate (PVA).

[0091] As used herein, a polymer resist deposited on a graphene layer refers to a polymer resist that acts as a temporary mask to protect the underlying layer. In certain embodiments, the polymer resist is selected from poly(methyl methacrylate) (PMMA), poly(α-methylstyrene-co-α-chloroacrylate) (CSAR62), ZEP520, and maN2403.

[0092] After graphene transfer, delamination and / or defects are often observed on the deposited graphene layer, which reduces the quality of graphene that can be used for applications. Figure 3 c).

[0093] The sources of defects and causes of delamination usually come from the sacrificial CVD-grown graphene substrate (e.g., Cu foil); the etchant used to dissolve the sacrificial substrate (e.g., ammonium persulfate (APS)); and the supporting layer (usually an organic polymer, such as polymethyl methacrylate (PMMA)), which also favors defect formation and produces the most undesirable type of residues due to the compatibility interaction of the polymer with graphene. These defects have a deleterious effect on graphene, mainly involving undesirable doping that degrades the electrical and catalytic properties of graphene by creating charge scattering centers and charge gradients.

[0094] Graphene layers are typically one or two atoms thick, and as such, can easily crack and delaminate due to mechanical strain applied during cleaning and repeated transfers, as well as damage from sharp tools. This damage degrades the electrical properties and mechanical stability of graphene, leading to subsequent operational inefficiencies or even failures. Furthermore, the analysis of impure and damaged graphene makes it challenging to develop correct structure-property relationships.

[0095] The inventors have discovered that by cleaning the graphene deposit with a three-step process including methylbenzene, ketone and finally alcohol, the amount of defects and / or delamination can be minimized or avoided. With specific reference to the use of xylene, the inventors have recognized that it is generally used only as a developer in clean rooms because most polymers used are not very soluble in xylene compared to other cleaning agents (e.g., acetone) and stripping agents (e.g., N-methyl-2-pyrrolidone). Therefore, the use of xylene as a cleaning agent and solvent has been disregarded. The inventors have determined that xylene is excellent for removing amorphous carbon deposits and is effective in dissolving polymer resists (particularly with a thickness of about microns and below).

[0096] The term "xylenes" as used herein refers to dimethylbenzene and its three isomeric forms, namely 1,2-dimethylbenzene (o-xylene), 1,3-dimethylbenzene (m-xylene) and 1,4-dimethylbenzene (p-xylene). As used herein, reference to xylenes may refer to a single isomer of xylene, a mixture of two isomers of xylene, or a mixture of all three isomers of xylene.

[0097] The inventors have identified the following advantages of the defined method:

[0098] ○ Reduced degradation (i.e., delamination and / or defects) of graphene when patterned with polymer resists;

[0099] ○ Simpler than methods using a metal sacrificial layer (using fewer process steps and solvents);

[0100] ○ Current residue removal methods are more time-consuming and energy-intensive;

[0101] o The steps disclosed herein are easier to integrate into post-manufacturing processing (i.e., cutting);

[0102] ○ Xylene is not as strong a solvent as traditional removers / cleaners, so there is less risk of damage to the graphene;

[0103] ○ Reduces the importance of perfecting graphene synthesis and transfer methods because defective additives can be removed.

[0104] Specific steps of an embodiment of the present invention include:

[0105] a) Clean the graphene deposited layer with methylbenzene.

[0106] This can include washing the layer in methylbenzene (e.g., xylene) by dispersing and gently stirring for about 1 to about 5 minutes. This can be achieved by using a mechanical stirrer or manually rotating the solvent in the beaker. Cleaning can also be achieved mechanically, such as by wiping with methylbenzene or by suctioning the surface with pressure from an inert gas.

[0107] In certain embodiments, the layer is washed by being dispersed in methylbenzene. In certain embodiments, the layer is washed by gently stirring in methylbenzene. In certain embodiments, the layer is washed with methylbenzene by stirring the layer using a mechanical stirrer. In certain embodiments, the layer is washed with methylbenzene by manually rotating the methylbenzene in a suitable container. In other embodiments, the layer is washed for about 1 to about 5 minutes, for example, for about 1, about 2, about 3, about 4 or about 5 minutes.

[0108] In certain embodiments, the layer is washed with methylbenzene by mechanical means. In certain embodiments, the layer is washed with methylbenzene by pumping the surface of the layer with methylbenzene under pressure of an inert gas. In other embodiments, the layer is washed with methylbenzene by wiping the surface of the layer with methylbenzene.

[0109] b) Cleaning the layer after step iii) with a ketone.

[0110] This can include washing the layer in a ketone (e.g., acetone) by dispersing and gently stirring for about 1 to about 7 minutes. This can be accomplished by using a mechanical stirrer or manually rotating the solvent in a beaker. Cleaning can also be accomplished mechanically, such as by wiping with ketone or pumping the surface with pressure from an inert gas.

[0111] In certain embodiments, the layer is washed by dispersing in ketones. In certain embodiments, the layer is washed by gently stirring in ketones. In certain embodiments, the layer is washed with ketones by stirring with a mechanical stirrer. In certain embodiments, the layer is washed with ketones by manually rotating the ketones in a suitable container. In other embodiments, the layer is washed for about 1 to about 10 minutes, such as about 1, about 2, about 3, about 4, about 5, about 6, or about 7 minutes.

[0112] In certain embodiments, the layer is washed with ketone by mechanical means. In certain embodiments, the layer is washed with ketone by pumping the surface of the layer with ketone under pressure of an inert gas. In other embodiments, the layer is washed with ketone by wiping the surface of the layer with ketone.

[0113] c) Cleaning the layer after step iv) with alcohol.

[0114] This can include washing the layer in an alcohol (e.g., IPA) for about 1 to about 5 minutes by dispersion and gentle agitation. This can be accomplished by using a mechanical stirrer or manually rotating the solvent in a beaker. Cleaning can also be accomplished mechanically, such as by wiping with alcohol or pumping the surface with pressure from an inert gas.

[0115] In certain embodiments, the layer is washed by dispersing in an alcohol. In certain embodiments, the layer is washed by gently stirring in an alcohol. In certain embodiments, the layer is washed with an alcohol by stirring using a mechanical stirrer. In certain embodiments, the layer is washed with an alcohol by manually rotating the alcohol in a suitable container. In other embodiments, the layer is washed for a period of about 1 to about 5 minutes, such as about 1, about 2, about 3, about 4 to about 5 minutes.

[0116] In certain embodiments, the layer is washed with alcohol by mechanical means. In certain embodiments, the layer is washed with alcohol by pumping the surface of the layer with alcohol using pressure of an inert gas. In other embodiments, the layer is washed with alcohol by wiping the surface of the layer with alcohol.

[0117] After each of these cleaning steps, or after all three cleaning steps, the graphene deposition layer is optionally dried with an inert gas such as nitrogen. In certain embodiments, the method disclosed herein also includes a drying step. In certain embodiments, the graphene deposition layer is dried after cleaning with toluene. In other embodiments, the graphene deposition layer is dried after cleaning with ketone. In other embodiments, the graphene deposition layer is dried after cleaning with alcohol. In some embodiments, the graphene deposition layer is dried after each cleaning step. In certain embodiments, the graphene deposition layer is dried with nitrogen after cleaning with methylbenzene. In other embodiments, the graphene deposition layer is dried with nitrogen after cleaning with ketone. In other embodiments, the graphene deposition layer is dried with nitrogen after cleaning with alcohol.

[0118] Although not required, the graphene layer may be further subjected to high temperature annealing or additional ICP-based cleaning.

[0119] As mentioned above, Raman spectroscopy can be used to quantify the number of defects on a deposited graphene layer. In this regard, after the three cleaning steps, the number of defects on the graphene layer at about 1600 cm-1 is significantly higher than that on an equivalent graphene deposited layer cleaned only by ketones and alcohols (e.g., acetone and IPA). -1 (e.g. 1605-1590cm -1 The intensity of the graphite peak at , i.e., the G peak) is increased by at least 5% (see Figure 6 The defects in the graphene layer can be quantified by comparing the height of the D peak (about 1360 cm -1 ), the height of the 2D peak (about 2650cm -1), D / D' ratio (i.e. at about 1360 cm -1 and 1610cm -1 The ratio between the peaks at ) and the ratio between the D and G peaks, each of which is characteristic of graphene when analyzed by Raman spectroscopy.

[0120] In one embodiment, the D / D' ratio of the graphene layer after the three cleaning steps is less than 12 compared to an equivalent graphene deposited layer cleaned only by ketones and alcohols (eg, acetone and IPA).

[0121] In one embodiment, the D / D' ratio of the graphene layer after the three cleaning steps is less than 11 compared to an equivalent graphene deposited layer cleaned only by ketones and alcohols (eg, acetone and IPA).

[0122] In one embodiment, the D / D' ratio of the graphene layer after the three cleaning steps is less than 10 compared to an equivalent graphene deposited layer cleaned only by ketones and alcohols (eg, acetone and IPA).

[0123] In one embodiment, the D / D' ratio of the graphene layer after the three cleaning steps is less than 9 compared to an equivalent graphene deposited layer cleaned only by ketones and alcohols (eg, acetone and IPA).

[0124] In one embodiment, the D / D' ratio of the graphene layer after the three cleaning steps is less than 8 compared to an equivalent graphene deposited layer cleaned only by ketones and alcohols (eg, acetone and IPA).

[0125] In one embodiment, the D / D' ratio of the graphene layer after the three cleaning steps is less than 7 compared to an equivalent graphene deposited layer cleaned only by ketones and alcohols (eg, acetone and IPA).

[0126] In one embodiment, the D / D' ratio of the graphene layer after the three cleaning steps is less than 6 compared to an equivalent graphene deposited layer cleaned only by ketones and alcohols (eg, acetone and IPA).

[0127] In one embodiment, the D / D' ratio of the graphene layer after the three cleaning steps is less than 5 compared to an equivalent graphene deposited layer cleaned only by ketones and alcohols (eg, acetone and IPA).

[0128] In one embodiment, the D / D' ratio of the graphene layer after the three cleaning steps is less than 4 compared to an equivalent graphene deposited layer cleaned only by ketones and alcohols (eg, acetone and IPA).

[0129] In one embodiment, the D / D' ratio of the graphene layer after the three cleaning steps is less than 3 compared to an equivalent graphene deposited layer cleaned only by ketones and alcohols (eg, acetone and IPA).

[0130] In one embodiment, the D / D' ratio of the graphene layer after the three cleaning steps is less than 2 compared to an equivalent graphene deposited layer cleaned only by ketones and alcohols (eg, acetone and IPA).

[0131] In another embodiment, after the three cleaning steps, the graphene deposition layer is cleaned at about 1600 cm-1 compared to an equivalent graphene deposition layer cleaned only by ketones and alcohols (e.g., acetone and IPA). -1 The intensity of the graphite peak at φ increased by at least 2%.

[0132] In another embodiment, after the three cleaning steps, the graphene deposition layer is cleaned at about 1600 cm-1 compared to an equivalent graphene deposition layer cleaned only by ketones and alcohols (e.g., acetone and IPA). -1 The intensity of the graphite peak at φ increased by at least 3%.

[0133] In another embodiment, after the three cleaning steps, the graphene deposition layer is cleaned at about 1600 cm-1 compared to an equivalent graphene deposition layer cleaned only by ketones and alcohols (e.g., acetone and IPA). -1 The intensity of the graphite peak at φ increased by at least 4%.

[0134] In another embodiment, after the three cleaning steps, the graphene deposition layer is cleaned at about 1600 cm-1 compared to an equivalent graphene deposition layer cleaned only by ketones and alcohols (e.g., acetone and IPA). -1 The intensity of the graphite peak at φ increased by at least 5%.

[0135] In another embodiment, after the three cleaning steps, the graphene deposition layer is cleaned at about 1600 cm-1 compared to an equivalent graphene deposition layer cleaned only by ketones and alcohols (e.g., acetone and IPA). -1 The intensity of the graphite peak at φ increased by at least 6%.

[0136] Other peaks that are unique to graphene can also be used to characterize the properties of the graphene and the extent of any defects that are present. For example, the peak at about 2650 cm -1 In this regard, compared to an equivalent graphene deposited layer cleaned only by ketones and alcohols (e.g., acetone and IPA), after the three cleaning steps, the peak at about 2650 cm -1 (e.g. 2655-2645cm -1 ) increases by at least 2%.

[0137] In another embodiment, after the three cleaning steps, the graphite peak at about 2650 cm -1 The strength at the point where the sintering takes place is increased by at least 3%.

[0138] In another embodiment, after the three cleaning steps, the graphite peak at about 2650 cm -1 The strength at the site increased by at least 4%.

[0139] In another embodiment, after the three cleaning steps, the graphite peak at about 2650 cm -1 The strength at the point where the load is increased by at least 5%.

[0140] In another embodiment, after the three cleaning steps, the graphite peak at about 2650 cm -1 The strength at the site is increased by at least 6%.

[0141] In another embodiment, after the three cleaning steps, the graphite peak at about 2650 cm -1 The strength at the site increased by at least 7%.

[0142] In certain embodiments, after the three cleaning steps, the graphene deposition layer is cleaned at about 1600 cm-1, compared to an equivalent graphene deposition layer cleaned only by ketones and alcohols (e.g., acetone and IPA). -1 and about 2650cm -1 The intensity of the graphite peak at each position increased by at least 3%.

[0143] In certain embodiments, after the three cleaning steps, the graphene deposition layer is cleaned at about 1600 cm-1, compared to an equivalent graphene deposition layer cleaned only by ketones and alcohols (e.g., acetone and IPA). -1 and about 2650cm -1 The intensity of the graphite peak at each position increased by at least 4%.

[0144] In certain embodiments, after the three cleaning steps, the graphene deposition layer is cleaned at about 1600 cm-1, compared to an equivalent graphene deposition layer cleaned only by ketones and alcohols (e.g., acetone and IPA). -1 and about 2650cm -1 The intensity of the graphite peak at each position increased by at least 5%.

[0145] Defects can also be determined using electronic measurements, specifically, the conductivity and mobility of the prepared graphene can be used to determine the number of total defects through the relationship μ = α / η0. For measurements of graphene sheets, μ and α can be measured in a four-probe configuration. Once these values ​​are determined, the defect density n0 can be calculated.

[0146] In certain embodiments, the XPS data will have information about the carbon compounds (ie, how the graphene is arranged and what is on top of it) and about other elements (particularly nitrogen and oxygen).

[0147] In this application, the inventors focused on the ratio of CC to C=C bonds, and the number of carbons at higher binding energies (ie, looking for a decrease in the number of compounds between 286 and 289 eV), while the penetration depth of XPS is about 5 nm.

[0148] In addition, for the present application, the inventors observed that the total nitrogen and oxygen percentages were lower (i.e., lower atomic and / or weight percentages) than in graphene layers cleaned by comparable means. Oxygen and nitrogen also exist in such a state: whether they are bound to the carbon or just adsorbed. This information can also be obtained from XPS. Measurements can be made to show whether these other elements are "electronically connected" to the graphene.

[0149] In certain embodiments, resistance measurements of graphene deposits cleaned with methylbenzene (after removal of PMMA) show resistances close to graphene of 450 ohms / cm 2 Resistances in the range (squares are typically 1 cm x 1 cm), in contrast to resistances in excess of 100 MΩ when toluene (eg xylene) cleaning is not part of the processing step.

[0150] These methods are or have the potential to be used in combination with and / or produce:

[0151] ○ Graphene-based electronic circuits;

[0152] ○Graphene field-effect transistor (gFET);

[0153] ○ gFETS as the basis for electronic sensors (gas / biomolecules);

[0154] ○Analog circuits (amplifiers, oscillators, and hybrid circuits);

[0155] ○Device miniaturization to increase the number of devices on a chip;

[0156] ○ Different graphene devices integrated into a single semiconductor chip;

[0157] o Having a microfluidic delivery system for gases / biomolecules; and

[0158] o Potential on-chip compatibility for device miniaturization and multiplexing.

[0159] For example, the present invention also provides a method for manufacturing a graphene field effect transistor (gFET), the graphene field effect transistor comprising a graphene layer deposited on a SiO2 / Si substrate, and wherein the gFET is characterized by having at least one drain, source and gate electrode, the method comprising the following steps:

[0160] i) providing a SiO2 / Si wafer substrate;

[0161] ii) depositing a graphene layer grown by CVD (chemical vapor deposition) onto the surface of the wafer substrate by polymer deposition transfer;

[0162] iii) then cleaning the graphene layer with methylbenzene;

[0163] iv) cleaning the layer after step iii) with ketone;

[0164] v) cleaning the layer after step iv) with alcohol;

[0165] vi) after step v), depositing a polymer resist on said layer;

[0166] vii) using electron beam lithography to define the areas on the wafer substrate where the graphene will remain;

[0167] viii) using O2 plasma etching to remove unwanted graphene;

[0168] ix) cleaning off any remaining polymer resist using methylbenzene;

[0169] x) cleaning the remaining graphene layer with ketone;

[0170] xi) cleaning the graphene layer after step x) with alcohol;

[0171] xii) after step xi), depositing an adhesive layer comprising Ti or Cr on the graphene surface layer;

[0172] xiii) after step xii), depositing a layer of metal electrode material onto the adhesive layer; and

[0173] xiv) removing the metal layer of step xiii) to form a gFET including at least one of a drain, a source and a gate.

[0174] Reference in this specification to any prior publication (or information derived therefrom) or any known content is not and should not be taken as an acknowledgement or approval or any form of suggestion that the prior publication (or information derived therefrom) or known content forms part of the common general knowledge in the field to which this specification relates.

[0175] Those skilled in the art will appreciate that the invention described herein is susceptible to variations and modifications other than those specifically described. It should be understood that the present invention includes all such variations and modifications that fall within the spirit and scope of the present invention. The present invention also includes all steps, features, compositions and compounds mentioned or indicated in this specification, either individually or collectively, and any and all combinations of any two or more of the steps or features.

[0176] Example

[0177] The following examples are illustrative of the present disclosure and should not be construed as limiting in any way the general nature of the disclosure throughout this specification.

[0178] Overall process

[0179] CVD grown graphene on Si wafers (with 300nm SiO2 insulating layer) was introduced into a clean room (ISO 5 / class 100). Graphene was grown on copper foil. The two-step process was to first heat the copper foil at ~1000°C for one hour at 1 atm or slightly lower in an Ar-hydrogen flow (hydrogen ~2.5%). Subsequently, graphene was grown for 15 minutes by adding 500ppm of methane to the Ar hydrogen mixture.

[0180] The wafer was cut into approximately 1 cm × 1 cm squares for all experiments using a diamond scriber. First, the die was washed in xylene for 3 minutes with gentle stirring. Then, the die was placed in acetone for another 5 minutes with gentle stirring to remove any organic residues. Finally, isopropyl alcohol (IPA) was used for a 3 minute rinse (again with gentle stirring) to remove any additional residues. The die was then dried with a stream of N2. 950A4 polymethyl methacrylate (PMMA) electron beam resist was spin coated (Polos spin coater SPIN 150i) on top of the graphene on the die.

[0181] To demonstrate the effectiveness of xylene in cleaning, separate processes were also performed, including washing with acetone and IPA alone (for the same time and under the same conditions) before spin coating with a similar PMMA layer.

[0182] Lithography was performed using an Elionix F-125 electron beam lithography system. The electron beam voltage was set to 125 keV, and the pattern dose range was from 1250 μC.cm for electrodes and markers (1 nA beam size). -2and 300μC.cm for graphene patterning -2 (beam size of 3 nA) changes. Development of PMMA was performed using methyl isobutyl ketone (MiBK) in IPA at a ratio of 1:3 (MiBK:IPA). PMMA was first developed in MiBK:IPA (40 s for markers and electrode patterns, 120 s for graphene patterns) before rinsing in IPA (20 s for markers and electrode patterns, 60 s for graphene patterns). The die was then dried in a stream of N2.

[0183] The design of markers, graphene, and electrode layouts was done with Klayout and converted into .con files using Beamer software.

[0184] The area was defined by photolithography, and then the exposed graphene was etched from the surface to form graphene squares (15 μm × 25 μm and 2 μm × 4 μm in size). Once this was achieved, a reactive ion etcher (Southbay Technologies) was used to etch the graphene using O2 plasma. Plasma was generated at 50 W RF power in 30 mT O2 for a period of 1 minute. This process was performed before Au marker deposition (ensuring that Au was deposited directly on the SiO2 layer), and the graphene sheets were separated into multiple devices (after photolithography for graphene patterning).

[0185] Deposition of Au layers for markers and electrodes was achieved using an electron beam evaporator (AJA International). A 30 nm thick Au layer was deposited on the markers (after plasma etching) and electrode photolithographic patterns (deposition rate 1 A / s). A 10 nm Ti adhesion layer was first deposited before Au deposition (deposition rate 0.5 A / s).

[0186] Example 1 - Preparation and characterization of graphene layers

[0187] Before photolithography and metallization, the graphene on SiO2 was cleaned with acetone and IPA (xylene-free). After stripping the residual gold and PMMA layers, the graphene was found to have been torn off and removed from the SiO2 substrate (see Figure 1 ), leaving the graphene primarily around the gold electrodes. While it appears that the electrodes hold the graphene to the substrate, this appears to cause the graphene to tear apart as it is removed along with the PMMA. The overall removal of the graphene was confirmed electrically by resistance measurements (see Figure 2 ). These measurements support the fact that there is a negligible amount of graphene remaining on the surface due to the high resistance (departing in the range of >100 MΩ).

[0188] The failure point that occurred during PMMA deposition and curing was determined. Before PMMA was spin-coated and cured, the substrate was cleaned with acetone and IPA. After curing, the PMMA was removed using acetone. The results of the removal can be seen in Figure 3 Seen in.

[0189] The image shows that in the center of the Si die, no graphene remains (see Figure 3 a). Some graphene is still visible around the edges (see Figure 3 b); however, it is clear that acetone removes graphene together with PMMA. The reason for this could be due to interactions between defective amorphous carbon on graphene. The curing step could then improve the bonding between PMMA and graphene at the expense of the bonding between graphene and SiO2. Given that some graphene remains around the gold (see Figure 1 ), during photolithography, an electron beam releases graphene from PMMA. A brief scheme of the tearing and delamination process can be found in Figure 4 Seen in.

[0190] To remove the amorphous carbon, the process was altered to include xylene before the acetone and IPA treatment steps. The goal was to remove any amorphous carbon with the xylene, while the acetone was used to remove organic residues. An IPA clean was further used to remove residues left behind by the acetone. PMMA was then deposited, cured, and then removed. The results can be seen in Figure 5 The surface is mostly uniform except for some scratches, indicating that the graphene layer remains uniform and intact. Figure 5 b) shows more scratches in the surface, but clearly highlights how much more graphene is present compared to the process involving only the acetone and IPA reaction. Raman spectroscopy (see Figure 6 ) confirmed that the graphene remained present after this process (see Figure 6 b) Raman spectra before and after washing and PMMA deposition and removal (see Figure 6 A) shows that graphene has not undergone major changes. In the D and D' regions (1360 and 1610 cm -1 ), indicating the absence of defects due to cleaning and PMMA removal, while the G and 2D regions (corresponding to 1600 and 2650 cm -1 ) are almost identical in shape and ratio.

[0191] Figure 7A comparison between resistance measurements performed on a graphene covered Si die after PMMA removal is shown. The xylene cleaned graphene shows a resistance in the range close to that of graphene, while when xylene is not included in the treatment step, the resistance is again over 100 MΩ. In the absence of xylene treatment, the graphene has been removed, confirming that the xylene treatment method prevents delamination of the graphene. Figure 8 The flowchart in Figure 1 summarizes the proposed method. Figure 4 The difference between the flow charts shown in is that xylene is proposed to remove amorphous carbon growth and eliminate some defects caused during growth, transfer or storage.

[0192] Xylene-acetone-IPA cleaning was integrated into the photolithography process and Au electrodes were deposited on the graphene surface. Au was then removed with xylene at 80 °C. Figure 8 The results of this removal are shown. The graphene remains intact, except around the area where the Au was deposited (see Fig. 9 a). This tearing of graphene is due to the removal of Au (see Fig. 9 b), as shown by the pattern retained in the graphene. The possible reason for the tearing of the graphene is that the Au electrode becomes more tightly bound to the graphene during deposition due to the temperature of the introduced metal. High magnification images of the graphene show that it is continuous, however, there are some defects that need to be considered (when establishing a baseline or optimizing to reduce them).

[0193] Given that Au triggers graphene tearing, another process (with xylene-acetone-IPA cleaning) was performed that began with graphene etching (allowing for better contacts and SiO2, reducing the likelihood that graphene will be removed as the metal is removed) and then depositing contacts. The results can be seen in Fig.10 As can be seen in Figure 1, while there are positive aspects to this proposed process, such as the metal remains well bonded to the SiO2, and graphene has been well etched with the plasma. However, complications can arise during manufacturing. For example, reliability issues with the electron beam system can unexpectedly lead to uneven deposition of too much metal. This results in ineffective removal (also known as "stripping"). However, where the resist has been successfully removed, etched graphene sheets can be seen.

[0194] This process is used to create a four-probe graphene device to specifically test the electrical properties of graphene, including current and voltage (IV) measurements (which can be used to determine the resistance of graphene), as well as conductivity and electron mobility. This can be done in Fig.11 Preliminary IV measurements found the probe-to-probe resistance to be ~9.3 kΩ.

[0195] Example 2 - Preparation of gFET

[0196] This process can be used for the fabrication of gFETs (which can then in turn be used in the construction of biosensors and gas sensors). Fig.12 A process that can be applied to make gFETs is shown. Graphene on Si is first cleaned with a three-step xylene-acetone-IPA process. PMMA is then deposited, spin-coated and cured (under the conditions described above). Electron beam lithography is then used to define the areas where the desired graphene will remain before O2 plasma etching is used to remove most of the unwanted graphene. The remaining PMMA resist is then removed with xylene. This is followed by another round of lithography, starting again with the three-step cleaning process, after which PMMA is deposited and cured, and electron beam lithography is used to define the metal contact areas. The metal layer is then deposited using evaporation methods. There are usually two layers, a thinner adhesion layer (usually composed of Ti or Cr) and a thicker electrode layer (usually composed of Au). The resist-metal layer is then removed from the surface using xylene. In order to use as a liquid-gate gFET, surface passivation is required to prevent short circuits (and in the case of biosensors, to avoid crosstalk in multiplexed designs). This is achieved by another lithography process, and a dielectric material is deposited (e.g., SiN is preferably used to prevent ion transfer). When the resist and dielectric material are removed again with xylene, the only exposed non-dielectric areas are the gate electrode and graphene.

[0197] Reference in this specification to any prior publication (or information derived therefrom) or any known content is not and should not be taken as an acknowledgement or recognition or any form of suggestion that the prior publication (or information derived therefrom) or known content forms part of the common general knowledge in the field to which this specification relates. Throughout the specification and the claims that follow, unless the context requires otherwise, the word "comprise" and its variants such as "comprising" and "containing" should be understood to imply the inclusion of the stated integers or steps or groups of integers or steps, but not the exclusion of any other integers or steps or groups of integers or steps.

[0198] Throughout the specification and the claims that follow, unless the context requires otherwise, the phrase "consisting essentially of" and variations such as "consisting essentially of" will be understood to indicate that the recited elements are essential, i.e., essential elements of the invention. The phrase allows for the presence of other unrecited elements that do not materially affect the characteristics of the invention, but excludes other unspecified elements that affect the basic and novel characteristics of the defined method.

Claims

1. A method for minimizing or preventing graphene delamination and / or reducing defects in a graphene layer deposited on a SiO2 / Si substrate, the method comprising the following steps: i) providing a SiO2 / Si wafer substrate; ii) depositing a graphene layer grown by CVD (chemical vapor deposition) onto the surface of the wafer substrate by polymer deposition transfer; iii) cleaning the graphene deposition layer with methylbenzene; iv) cleaning the layer after step iii) with ketone; and v) Cleaning the layer after step iv) with alcohol.

2. A method of manufacturing a graphene field effect transistor (gFET), the graphene field effect transistor comprising a graphene layer deposited on a SiO2 / Si substrate, and wherein the gFET is characterized by having at least one drain, source and gate electrode, The method comprises the following steps: i) providing a SiO2 / Si wafer substrate; ii) depositing a graphene layer grown by CVD (chemical vapor deposition) onto the surface of the wafer substrate by polymer deposition transfer; iii) then cleaning the graphene deposited layer with methylbenzene; iv) cleaning the layer after step iii) with ketone; v) cleaning the layer after step iv) with alcohol; vi) after step v), depositing a polymer resist on said layer; vii) using electron beam lithography to define the areas on the wafer substrate where the graphene will remain; viii) using O2 plasma etching to remove unwanted graphene; ix) cleaning off any remaining polymer resist using methylbenzene; x) cleaning the remaining graphene layer with ketone; xi) cleaning the graphene layer after step x) with alcohol; xii) after step xi), depositing an adhesive layer comprising Ti or Cr on the graphene surface layer; xiii) after step xii), depositing a layer of metal electrode material onto the adhesive layer; as well as xiv) removing the metal layer of step xiii) to form a gFET including at least one of a drain, a source and a gate electrode.

3. The method according to claim 1 or 2, wherein the methylbenzene is selected from the group consisting of xylene (o-xylene, m-xylene or p-xylene), toluene, mesitylene (1,2,3-trimethylbenzene), mesitylene (1,3,5-trimethylbenzene), pseudocumene (1,2,4-trimethylbenzene), tetramethylbenzene (1,2,3,4-tetramethylbenzene), isodurene (1,2,3,5-tetramethylbenzene), durene (1,2,4,5-tetramethylbenzene) or hexamethylbenzene.

4. The process according to claim 1 or 2, wherein the methylbenzene is xylene.

5. The process according to any one of claims 1 to 4, wherein the ketone is selected from acetone, ethyl acetate, cyclohexanone, methyl ethyl or diacetone.

6. The process according to any one of claims 1 to 4, wherein the ketone is acetone.

7. The method according to any one of claims 1 to 6, wherein the alcohol is selected from isopropyl alcohol (IPA), n-propyl alcohol, n-butyl alcohol, isobutyl alcohol, tert-butyl alcohol or n-pentanol.

8. The method according to any one of claims 1 to 6, wherein the alcohol is isopropyl alcohol (IPA).

9. The method according to any one of claims 2 to 8, wherein the polymer resist is PMMA.

10. The graphene layer prepared according to the method of claim 1.

11. A graphene field effect transistor (gFET) prepared according to the method of any one of claims 2 to 9. 12 . The graphene field effect transistor according to claim 11 , wherein the resistance of the graphene deposition layer is within a characteristic range of graphene.

13. The graphene field effect transistor according to claim 11 or 12, wherein the resistance of the graphene deposition layer is about 450 ohms / cm 2 .

14. An electronic device comprising a graphene layer as defined in claim 10.

15. The electronic device of claim 14, wherein the device is selected from the group consisting of graphene-based electronic circuits, electronic sensors, analog circuits, semiconductor chips, and microfluidic delivery systems.

16. The electronic device of claim 15, wherein the graphene-based electronic circuit comprises a graphene field effect transistor (gFET).

17. The electronic device according to claim 15, wherein the electronic sensor is a sensor for gas or biomolecules.

18. The electronic device according to claim 15, wherein the analog circuit is an amplifier, an oscillator or a mixing circuit.

19. The electronic device according to claim 15, wherein: The microfluidic delivery system delivers gases and / or biomolecules.