Circuit structure

Abstract

The invention provides a circuit structure. The circuit structure comprises a capacitor structure and a local sealing ring arranged on the periphery of the capacitor structure in a surrounding mode. The capacitor structure comprises at least two metal layers stacked from bottom to top and an isolation dielectric layer located between the two adjacent metal layers, and the isolation dielectric layer comprises a low-dielectric-constant dielectric material; the local sealing ring comprises at least two metal rings stacked from bottom to top and a connecting ring for connecting two adjacent metal rings; wherein one metal layer of the capacitor structure corresponds to one metal ring, the corresponding metal layer and metal ring are located on the same layer, one isolation dielectric layer of the capacitor structure corresponds to one connecting ring, the corresponding isolation dielectric layer and connecting ring are located on the same layer, and the connecting ring completely surrounds the corresponding isolation dielectric layer. Therefore, the local sealing ring can effectively prevent water vapor from laterally diffusing into the low-dielectric-constant dielectric material in the capacitor structure, and the problem of product failure caused by the change of the capacitance value of the capacitor structure can be avoided.

Description

Technical Field

[0001] The invention relates to the technical field of integrated circuits, and in particular to a circuit structure. Background Art

[0002] Capacitors are a common electronic component in IC integrated circuits. The capacitance of a capacitor is provided by a flat plate capacitor formed by positive / negative metal plates and a dielectric in the middle. The capacitance formula of a flat plate capacitor is C=(k×S)÷d, where k is the dielectric constant of the dielectric material, S is the area of ​​the flat plate capacitor, and d is the distance of the flat plate capacitor. Therefore, maintaining the stability of the dielectric constant k of the dielectric material is crucial to the stability of the capacitance of the capacitor.

[0003] As the process node shrinks, in order to reduce the parasitic RC of metal traces, the k value of the dielectric between metals is also decreasing. Low K material is a dielectric material with a low dielectric constant. The structural characteristics of Low K material make it easier to absorb water in a humid environment. After absorbing water, the dielectric constant k value of Low K material will increase, making the capacitance value of the capacitor larger, which will cause the capacitance value of the capacitor to fluctuate, and then cause product failure. Summary of the invention

[0004] One of the purposes of the present invention is to provide a circuit structure that can effectively prevent water vapor from laterally diffusing into a capacitor structure including a low-dielectric-constant dielectric material, thereby avoiding capacitance value variations of the capacitor structure and improving product reliability.

[0005] In order to achieve the above-mentioned purpose, the present invention provides a circuit structure. The circuit structure includes a capacitor structure and a local sealing ring arranged around the periphery of the capacitor structure; the capacitor structure includes at least two metal layers stacked from bottom to top and an isolation dielectric layer located between two adjacent metal layers, and the isolation dielectric layer includes a low-dielectric constant dielectric material; the local sealing ring includes at least two metal rings stacked from bottom to top and a connecting ring connecting two adjacent metal rings; wherein, one of the metal layers of the capacitor structure corresponds to one of the metal rings, the corresponding metal layers and the metal rings are located in the same wiring layer and the metal rings are arranged around the corresponding metal layers, one of the isolation dielectric layers of the capacitor structure corresponds to one of the connecting rings, the corresponding isolation dielectric layers and the connecting rings are located in the same dielectric layer and the connecting rings fully surround the corresponding isolation dielectric layers, and the local sealing rings are used to prevent water vapor from laterally diffusing into the low-dielectric constant dielectric material in the capacitor structure.

[0006] Optionally, the number of metal rings of the local sealing ring is equal to the number of metal layers of the capacitor structure, and / or the number of connecting rings of the local sealing ring is equal to the number of isolation dielectric layers of the capacitor structure.

[0007] Optionally, the number of metal rings of the local sealing ring is greater than the number of metal layers of the capacitor structure, and / or the number of connecting rings of the local sealing ring is greater than the number of isolation dielectric layers of the capacitor structure. In this embodiment, the height of the local sealing ring is greater than the height of the capacitor structure as a whole, which better prevents the lateral diffusion of water vapor. The local sealing ring more comprehensively surrounds the capacitor structure to better prevent the external water vapor from diffusing laterally to the capacitor structure.

[0008] Optionally, the ring width of the metal ring is greater than or equal to the ring width of the connecting ring. In this embodiment, the ring width of the metal ring of the local sealing ring is greater than that of the connecting ring in the top view plane, so that the size of the connecting ring is closer to the design rule and the manufacturing process is less difficult.

[0009] Optionally, the capacitor structure includes at least one electrode plate located in the metal layer; the electrode plate is connected to the lead-out wiring layer located above or below the local sealing ring through a contact plug jumper, and is connected to the lead-out wiring of the lead-out wiring layer; in this way, the lead-out electrode plate will at least not affect the closure of all metal rings corresponding to all metal layers of the capacitor structure, so that the local sealing ring can better block the lateral diffusion of water vapor into the capacitor structure.

[0010] Optionally, the lead-out wiring layer is not affected by water vapor. In this embodiment, by selecting to lead out the electrode plate through a contact plug jumper to a lead-out wiring of a wiring layer not affected by water vapor to couple the electrode plate to an external circuit, it is possible to avoid leading out wiring from a local sealing ring, thereby ensuring the overall airtightness of the local sealing ring.

[0011] Optionally, the capacitor structure includes at least one electrode plate located in the metal layer; at least one metal ring of the local sealing ring has a circuit opening, and the electrode plate is connected to a lead-out line passing through the circuit opening. In this embodiment, the electrode plate is led out to the outside by making an opening in the metal ring of the local sealing ring, thereby reducing the complexity of wiring, and the size range of the circuit opening is controlled by the manufacturing process to ensure the overall airtightness of the local sealing ring. In addition, there is no need for an additional wiring layer above or below the capacitor structure, so that the overall number of wiring layers is relatively small, and in the absence of an additional wiring layer above or below the capacitor structure, the need for an electrode plate of the lead-out capacitor structure can be met.

[0012] Optionally, the capacitor structure is an interdigitated MOM capacitor; each metal layer of the interdigitated MOM capacitor includes a first electrode plate, a second electrode plate, a plurality of first interdigitated strips and a plurality of second interdigitated strips, the first electrode plate and the second electrode plate are arranged opposite to each other, the plurality of first interdigitated strips and the plurality of second interdigitated strips are arranged in parallel and alternately, one end of each of the first interdigitated strips is connected to the first electrode plate, and one end of each of the second interdigitated strips is connected to the second electrode plate; the first electrode plates of two adjacent metal layers are electrically connected by a contact plug penetrating the isolation dielectric layer, and the second electrode plates of two adjacent metal layers are electrically connected by a contact plug penetrating the isolation dielectric layer.

[0013] Optionally, the first electrode plate and the second electrode plate of the top metal layer of the interdigital MOM capacitor are connected with the lead-out wiring of the lead-out wiring layer above the local sealing ring by contact plugs respectively; or, the first electrode plate and the second electrode plate of the bottom metal layer of the interdigital MOM capacitor are both connected with the lead-out wiring of the lead-out wiring layer below the local sealing ring by contact plugs; or, the first electrode plate of the top metal layer of the interdigital MOM capacitor is connected with the lead-out wiring of the lead-out wiring layer above the local sealing ring by contact plugs, and the second electrode plate of the bottom metal layer of the interdigital MOM capacitor is connected with the lead-out wiring of the lead-out wiring layer below the local sealing ring by contact plugs. The electrode plate of the interdigital MOM capacitor drawn in this way at least does not affect the closure of all metal rings corresponding to all metal layers of capacitor structure, so that the effect of local sealing ring blocking water vapor lateral diffusion into capacitor structure is better.

[0014] Optionally, the capacitor structure is a sandwich-type MOM capacitor; the metal layer includes a top metal layer, a bottom metal layer, and an intermediate metal layer located between the top metal layer and the bottom metal layer, the top metal layer and the bottom metal layer are electrically connected and both serve as outer electrode plates of the sandwich-type MOM capacitor, at least one of the intermediate metal layers serves as an inner electrode plate of the sandwich-type MOM capacitor, and an edge of the outer electrode plate laterally extends beyond an edge of the inner electrode plate.

[0015] Optionally, the outer electrode plate of the sandwich MOM capacitor is connected to the lead-out wiring layer above or below the local sealing ring by a contact plug jumper, and is connected to the lead-out routing of the lead-out wiring layer; and / or the inner electrode plate of the sandwich MOM capacitor is connected to the lead-out routing of the line opening in a metal ring passing through the local sealing ring. The outer electrode plate and the inner electrode plate of the sandwich MOM capacitor are drawn out in this way, which has the least influence on the closure of the local sealing ring, and the size range of the line opening in the metal ring is controlled by the manufacturing process, which helps to ensure the overall airtightness of the local sealing ring.

[0016] Optionally, the capacitor structure is a multi-layer circuit structure, and each metal layer of the capacitor structure includes multiple circuits; two circuits located in two adjacent metal layers and close to each other and the isolation dielectric layer between the two circuits constitute a parasitic capacitor; low dielectric constant dielectric material is filled between the multiple circuits in the same metal layer, and two circuits located in the same metal layer and close to each other and the low dielectric constant dielectric material between the two circuits constitute a parasitic capacitor; the local sealing ring is used to prevent the capacitance of the parasitic capacitor from changing.

[0017] Optionally, the capacitor structure is a MIM capacitor.

[0018] The circuit structure provided by the present invention comprises a capacitor structure and a local sealing ring arranged around the periphery of the capacitor structure; the capacitor structure comprises at least two metal layers stacked from bottom to top and an isolation dielectric layer located between two adjacent metal layers, the isolation dielectric layer comprising a low dielectric constant dielectric material; the local sealing ring comprises at least two metal rings stacked from bottom to top and a connecting ring connecting the two adjacent metal rings; wherein, one metal layer of the capacitor structure corresponds to one metal ring, the corresponding metal layer and the metal ring are located in the same wiring layer and the metal ring is arranged around the corresponding metal layer, one isolation dielectric layer of the capacitor structure corresponds to one connecting ring, the corresponding isolation dielectric layer and the connecting ring are located in the same dielectric layer and the connecting ring fully surrounds the corresponding isolation dielectric layer, so that the connecting ring fully isolates the side wall of the isolation dielectric layer, and the local sealing ring composed of the metal ring and the connecting ring can be used as a wall of the capacitor structure, which can effectively prevent water vapor from laterally diffusing into the low dielectric constant dielectric material in the capacitor structure, and can prevent the low dielectric constant dielectric material from changing the dielectric constant due to water absorption, which helps to avoid the problem of product failure caused by the change of the capacitance value of the capacitor structure, and improves the reliability of the product. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A top view of a metal layer of a circuit structure provided in one embodiment of the present invention.

[0020] Figure 2 for Figure 1 The circuit structure shown is a cross-sectional view along the AB line.

[0021] Figure 3 The circuit structure provided by an embodiment of the present invention is as follows Figure 1 Cross-sectional view at the position indicated by line CD.

[0022] Figure 4 A circuit structure provided for another embodiment of the present invention is as follows Figure 1 Cross-sectional view at the position indicated by line CD.

[0023] Figure 5 A cross-sectional view of a circuit structure provided in one embodiment of the present invention.

[0024] Figures 6 to 8 It is a cross-sectional view of the electrode plates of the interdigital MOM capacitor in different embodiments of the present invention.

[0025] Fig. 9 FIG. 1 is a top view of the electrode plates of an interdigitated MOM capacitor according to an embodiment of the present invention.

[0026] Fig.10 A top view of an electrode plate of an interdigital MOM capacitor according to another embodiment of the present invention.

[0027] Fig.11 1. It is a top view of the inner electrode plate of a sandwich-type MOM capacitor according to one embodiment of the present invention.

[0028] Description of the drawings: 10-capacitor structure; 101-first electrode plate; 102-second electrode plate; 103-first interdigitated strip; 104-second interdigitated strip; 105-external electrode plate; 106-inner electrode plate; 11-metal layer; 12-isolation dielectric layer; 20-local sealing ring; 201-metal ring; 201a-line outlet; 202-connecting ring; 30-contact plug; 40-lead-out wiring layer; 401-lead-out wiring. DETAILED DESCRIPTION

[0029] The circuit structure proposed by the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer according to the following description. It should be noted that the accompanying drawings are all in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0030] In the description of the present application, it should be understood that the terms "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation or be constructed in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more features. In the description of the present application, "multiple" means two or more, and at least two means that it can be two or more, unless otherwise clearly and specifically defined.

[0031] Figure 1 A top view of a metal layer of a circuit structure provided in one embodiment of the present invention. Figure 2 for Figure 1 The circuit structure shown is a cross-sectional view along the AB line. Figure 3 The circuit structure provided by an embodiment of the present invention is as follows Figure 1 The cross-sectional view at the position indicated by line CD. Figures 1 to 3 As shown, the circuit structure provided in this embodiment includes a capacitor structure 10 and a local sealing ring (mini seal ring) 20 .

[0032] The capacitor structure 10 includes at least two metal layers 11 stacked from bottom to top and an isolation dielectric layer 12 located between two adjacent metal layers 11, wherein the isolation dielectric layer 12 includes a low dielectric constant dielectric material; a local sealing ring 20 is arranged around the periphery of the capacitor structure 10, and includes at least two metal rings 201 stacked from bottom to top and a connecting ring 202 connecting two adjacent metal rings 201; wherein, one metal layer 11 of the capacitor structure 10 corresponds to one metal ring 201, the corresponding metal layer 11 and the metal ring 201 are located in the same wiring layer and the metal ring 201 is arranged around the corresponding metal layer 11, one isolation dielectric layer 12 of the capacitor structure 10 corresponds to one connecting ring 202, the corresponding isolation dielectric layer 12 and the connecting ring 202 are located in the same dielectric layer and the connecting ring 202 fully surrounds the corresponding isolation dielectric layer 12, and the local sealing ring 20 is used to prevent water vapor from laterally diffusing into the low dielectric constant dielectric material in the capacitor structure 10.

[0033] In this embodiment, Figure 3 As shown, the number of metal rings of the local sealing ring 20 is equal to the number of metal layers of the capacitor structure 10, and / or the number of connecting rings of the local sealing ring 20 is equal to the number of isolation dielectric layers of the capacitor structure 10. Figure 3 As shown, the number of layers of the metal ring 201 and the metal layer 11 are both 5, and the number of layers of the connecting ring 202 and the isolation dielectric layer 12 are both 4, but not limited thereto. When the number of metal rings of the local sealing ring 20 is equal to the number of metal layers of the capacitor structure 10, the top metal ring of the local sealing ring 20 and the top metal layer of the capacitor structure 10 are located in the same wiring layer, and the bottom metal ring of the local sealing ring 20 and the bottom metal layer of the capacitor structure 10 are located in the same wiring layer.

[0034] Figure 4 A circuit structure provided for another embodiment of the present invention is as follows Figure 1 In other embodiments, as shown in FIG. Figure 4As shown, the number of metal rings of the local sealing ring 20 may be greater than the number of metal layers of the capacitor structure 10, and / or the number of connecting rings of the local sealing ring 20 may be greater than the number of isolation dielectric layers of the capacitor structure. When the number of metal rings of the local sealing ring 20 is greater than the number of metal layers of the capacitor structure 10, the top metal ring of the local sealing ring 20 and the top metal layer of the capacitor structure 10 may be located in the same wiring layer and the bottom metal ring of the local sealing ring 20 is located below the bottom metal layer of the capacitor structure 10; or, the top metal ring of the local sealing ring 20 may be located above the top metal layer of the capacitor structure 10 and the bottom metal ring of the local sealing ring 20 and the bottom metal layer of the capacitor structure 10 are located in the same wiring layer; or, the top metal ring of the local sealing ring 20 may be located above the top metal layer of the capacitor structure 10 and the bottom metal ring of the local sealing ring 20 is located below the bottom metal layer of the capacitor structure 10. In this embodiment, the height of the local sealing ring 20 is greater than the height of the capacitor structure 10 as a whole (for example, at Figure 2 The local sealing ring 20 more completely surrounds the capacitor structure 10 to better prevent external water vapor from diffusing laterally toward the capacitor structure 10.

[0035] It should be noted that, in this embodiment, the corresponding metal layer 11 and metal ring 201 are located in the same wiring layer and can be formed in the same process step. The metal layer 11 and the metal ring 201 can be made of the same material, such as copper or aluminum, but not limited thereto.

[0036] The connection ring 202 can be formed in the same process step as the contact plug in the corresponding isolation dielectric layer 12. The material of the connection ring 202 and the material of the contact plug can be the same, for example, both include tungsten or copper.

[0037] The isolation dielectric layer 12 includes a low dielectric constant dielectric material, including but not limited to silicon oxynitride or titanium nitride, etc. The isolation dielectric layer 12 may be a single-layer structure including a single material layer, or a multi-layer structure including multiple material layers.

[0038] refer to Figures 1 to 4 As shown, in the present application, the connecting ring 202 seals the isolation dielectric layer 12 in the X direction and the Y direction, so that the local sealing ring 20 can effectively prevent water vapor from laterally diffusing into the isolation dielectric layer including the low dielectric constant dielectric material, wherein the XY plane can be parallel to the top surface of the metal ring and the top surface of the connecting ring.

[0039] In some embodiments of the present application, the metal layer of the capacitor structure may also be filled with a low-k dielectric material, and the local sealing ring 20 may also prevent water vapor from diffusing into the low-k dielectric material in the metal layer, thereby preventing the capacitance of the capacitor structure from changing. The low-k dielectric material in the metal layer includes, but is not limited to, silicon oxide or silicon oxynitride.

[0040] In some embodiments of the present application, reference Figure 3 As shown, the ring width D1 of the metal ring 201 may be greater than the ring width D2 of the connecting ring 202. In this embodiment, the local sealing ring 20 is Figure 1 The ring width of the metal ring on the XY plane shown in FIG. 20 is larger than the connecting ring, so that the size of the connecting ring 202 is closer to the design rule, which helps to achieve the position alignment of the connecting ring 202 and the metal ring 201, and the manufacturing process is less difficult. In some embodiments of the present application, reference Figure 6 As shown, the ring width D1 of the metal ring 201 may also be equal to the ring width D2 of the connecting ring 202 .

[0041] Exemplarily, the ring widths of all metal rings 201 may be equal, and the ring widths of all connecting rings 202 may be equal, but this is not limited thereto.

[0042] In some embodiments of the present application, Figure 1 and Figure 3 As shown, the capacitor structure 10 may be an interdigitated MOM (Metal Oxide Metal) capacitor.

[0043] Specifically, each metal layer 11 of the interdigital MOM capacitor includes a first electrode plate 101, a second electrode plate 102, a plurality of first interdigital bars 103 and a plurality of second interdigital bars 104, the first electrode plate 101 and the second electrode plate 102 are arranged relative to each other, a plurality of first interdigital bars 103 and a plurality of second interdigital bars 104 are arranged in parallel and alternately, one end of each first interdigital bar 103 is connected to the first electrode plate 101, and one end of each second interdigital bar 104 is connected to the second electrode plate 102. The first electrode plates 101 of two adjacent metal layers 11 can be electrically connected by a contact plug 30 that penetrates the isolation dielectric layer 12, and the second electrode plates 102 of two adjacent metal layers 11 can be electrically connected by a contact plug 30 that penetrates the isolation dielectric layer 12.

[0044] In the multiple metal layers of the interdigitated MOM capacitor, the layout of the electrode plates and the interdigitated strips in different metal layers can be alternating. Figure 1As shown, the first electrode plate 101 and the second electrode plate 102 can be extended along the Y direction, and the first interdigitated strips 103 and the fourth interdigitated strips 104 can be extended along the X direction; in the even-numbered metal layers, the first electrode plate 101 and the second electrode plate 102 can be extended along the X direction, and the first interdigitated strips 103 and the fourth interdigitated strips 104 can be extended along the Y direction.

[0045] In the interdigital MOM capacitor, the metal layer is filled with insulating material. Specifically, the insulating material is filled between the first electrode plate 101, the second electrode plate 102, the multiple first interdigital strips 103 and the multiple second interdigital strips 104 of the same metal layer. The insulating material can be a low dielectric constant dielectric material.

[0046] Need to prove, interdigital MOM capacitor comprises the interdigital bars of mutual cross coupling, has formed the first electrode plate and the second electrode plate of capacitor on the same metal layer, has also formed the upper and lower plates of capacitor between different metal layers.Interdigital MOM capacitor not only has capacitance in adjacent two metal layers, also has capacitance in the sidewall of the same metal layer, has just greatly increased the coupling capacitance per unit area like this, so interdigital MOM capacitor has larger capacitance density.

[0047] Figure 5 A cross-sectional view of a circuit structure provided by an embodiment of the present invention. In some embodiments of the present application, reference Figure 5 As shown, the capacitor structure is a sandwich-type MOM capacitor. Figure 5 As shown, the metal layer of described capacitor structure 10 can comprise top metal layer, bottom metal layer and the intermediate metal layer between top metal layer and bottom metal layer, described top metal layer and described bottom metal layer are electrically connected by contact plug 30 and all as outer electrode plate 105 of sandwich type MOM capacitor, at least one intermediate metal layer is as inner electrode plate 106 of sandwich type MOM capacitor, the edge of outer electrode plate 105 lateral direction exceeds the edge of inner electrode plate 106, namely the outer electrode plate 105 of sandwich type MOM capacitor wraps inner electrode plate 106 inside.

[0048] like Figure 5 As shown, two or more intermediate metal layers can be electrically connected through contact plugs 30 to serve as inner electrode plates 106; some intermediate metal layers can also be connected to the top metal layer and / or the bottom metal layer through contact plugs 30 to serve as outer electrode plates 105, wherein the intermediate metal layers serving as outer electrode plates can be interspersed between the intermediate metal layers serving as inner electrode plates. In a sandwich-type MOM capacitor, adjacent metal layers are isolated by an isolation dielectric layer 12, and at least some of the metal layers can also be filled with insulating materials, and both the insulating materials and the isolation dielectric layer 12 can include low-k dielectric materials.

[0049] It should be noted that the sandwich-type MOM capacitor only forms capacitance between different metal layers, and its capacitance density is lower than that of the interdigital MOM capacitor. However, the inner electrode plate of the sandwich-type MOM capacitor is wrapped in the outer electrode plate, so the parasitic capacitance is lower and the capacitance value accuracy is higher.

[0050] In some embodiments of the present application, the capacitor structure 10 can also be a multi-layer circuit structure, and each metal layer of the capacitor structure 10 includes multiple circuits; two circuits located in two adjacent metal layers and close to each other and the isolation dielectric layer between the two circuits can constitute a parasitic capacitor; low dielectric constant dielectric material is filled between multiple circuits in the same metal layer, and two circuits located in the same metal layer and close to each other and the low dielectric constant dielectric material between the two circuits can constitute a parasitic capacitor; the local sealing ring 20 is used to prevent water vapor from laterally diffusing into the low dielectric constant dielectric material in the capacitor structure 10, which can prevent the capacitance of the parasitic capacitor in the multi-layer circuit structure from changing, thereby improving the stability of the multi-layer circuit structure.

[0051] In some embodiments of the present application, the capacitor structure may also be a MIM (Metal-Insulator-Metal) capacitor. Exemplarily, the MIM capacitor may include an upper electrode and a lower electrode located in two adjacent metal layers and an isolation dielectric layer located between the upper and lower electrodes, wherein the isolation dielectric layer includes a low dielectric constant dielectric material.

[0052] As described above, in some embodiments of the present application, the capacitor structure 10 includes at least one electrode plate located in the metal layer. The electrode plate can be connected to the lead-out wiring layer 40 above or below the local sealing ring 20 through a contact plug jumper and connected to the lead-out wiring of the lead-out wiring layer 40 to achieve the lead-out of the electrode plate, that is, the electrode plate jumps upward or downward to the wiring layer outside the local sealing ring 20 (such as Figure 6-7 The lead-out wiring layer 40 is led out by the method of the “lead-out wiring layer 40” shown in the figure, so that the lead-out electrode plate at least does not affect the closure of all metal rings 201 corresponding to all metal layers 101 of the capacitor structure 10, so that the local sealing ring 20 has a better effect of blocking the lateral diffusion of water vapor into the capacitor structure. Exemplarily, the lead-out wiring is located in the wiring layer above the local sealing ring 20 or in the wiring layer below the local sealing ring 20.

[0053] Furthermore, the lead-out wiring layer 40 is not affected by water vapor. In this embodiment, a wiring layer that is not affected by water vapor can be selected as the lead-out wiring layer 40 through experiments, and the electrode plate is led out to the lead-out wiring of the wiring layer that is not affected by water vapor through a contact plug jumper to couple the electrode plate to an external circuit outside the local sealing ring 20 (not shown in the figure), so as to avoid leading out the wiring from the opening of the metal ring 201 of the local sealing ring 20, thereby ensuring the overall airtightness of the local sealing ring 20.

[0054] In some embodiments, at least one metal ring 201 of the local sealing ring 20 has a line opening, and the electrode plate is connected to the lead-out wiring passing through the line opening to realize the lead-out of the electrode plate. At this time, the lead-out wiring and the metal ring 201 with the line opening are in the same wiring layer. In this embodiment, the electrode plate is led out and coupled to an external circuit (not shown) by making an opening in the metal ring 201 of the local sealing ring 20, so that the wiring complexity can be reduced, and the size range of the line opening is controlled by the manufacturing process to ensure the overall airtightness of the local sealing ring 20. In addition, there is no need for an additional wiring layer above or below the capacitor structure, so that the overall number of wiring layers is small. It is worth noting that if there are other wiring lines in the wiring layer above or below the local sealing ring 20 or there is no wiring layer above or below the local sealing ring 20, the electrode plate cannot be led out in an upward or downward manner, and can only be led out by making an opening in the metal ring 201 of the local sealing ring 20.

[0055] Figures 6 to 8 1 is a cross-sectional view of the electrode plate of the interdigital MOM capacitor in different embodiments of the present invention. Exemplary, for the interdigital MOM capacitor, such as Figure 6 As shown, the first electrode plate 101 and the second electrode plate 102 of the top metal layer of the interdigital MOM capacitor are connected to the lead-out wiring 401 of the lead-out wiring layer 40 located above the local sealing ring 20 through the contact plug 30, for example, the top metal layer of the interdigital MOM capacitor is in the wiring layer M2, and the first electrode plate 101 and the second electrode plate 102 of the top metal layer are respectively led out through the lead-out wiring 401 in the wiring layer M3 (that is, the wiring layer M3 is used as the lead-out wiring layer 40). Or, as Figure 7 As shown, the first electrode plate 101 and the second electrode plate 102 of the bottom metal layer of the interdigital MOM capacitor are connected to the lead-out wiring 401 of the lead-out wiring layer 40 located below the local sealing ring 20 through the contact plug 30. For example, the bottom metal layer of the interdigital MOM capacitor is in the wiring layer M1, and the first electrode plate 101 and the second electrode plate 102 of the bottom metal layer are led out through the wiring layer M0 (that is, the wiring layer M0 is used as the lead-out wiring layer 40). Or, Figure 8As shown, the first electrode plate 101 of the top metal layer of the interdigital MOM capacitor is connected with the lead-out wiring 401 of the lead-out wiring layer 40 above the local sealing ring 20 by the contact plug 30, the second electrode plate 102 of the bottom metal layer of the interdigital MOM capacitor is connected with the lead-out wiring 401 of the lead-out wiring layer 40 below the local sealing ring 20 by the contact plug 30, for example, the top metal layer of the interdigital MOM capacitor is in the wiring layer M2, the bottom metal layer is in the wiring layer M1, the first electrode plate 101 of the top metal layer is led out by the wiring layer M3 (as the lead-out wiring layer 40), and the second electrode plate 102 of the bottom metal layer is led out by the wiring layer M0 (as the lead-out wiring layer 40). The electrode plate of the interdigital MOM capacitor drawn out in this way at least does not affect the closure of all metal rings 201 corresponding to all metal layers of the capacitor structure, so that the local sealing ring 20 blocks the lateral diffusion of water vapor into the capacitor structure.

[0056] Fig. 9 FIG. 1 is a top view of the electrode plate of the interdigital MOM capacitor according to an embodiment of the present invention. Fig. 9 As shown, at least one metal ring 201 of the local sealing ring 20 may have a line opening 201a, and the first electrode plate 101 and the second electrode plate 102 on the same wiring layer as the metal ring 201 may be respectively connected to the lead-out trace 401 passing through the corresponding line opening 201a, so that the lead-out of the first electrode plate 101 and the second electrode plate 102 can be realized.

[0057] It should be noted that the size of the circuit opening 201a provided in the metal ring 201 is determined by the minimum metal spacing design rule of the wiring layer in the corresponding process and the line width of the lead-out trace. For example, the minimum metal spacing of the 22nm process is 50nm, and the width of the circuit opening can be designed to be as close as possible to the line width of the lead-out trace plus 2 50nm; the minimum metal spacing of the 55nm process is 100nm, and the width of the circuit opening can be designed to be as close as possible to the line width of the lead-out trace plus 2 100nm.

[0058] Fig.10 FIG. 1 is a top view of an electrode plate of an interdigital MOM capacitor in another embodiment of the present invention. Fig.10 As shown, a metal ring 201 of the local sealing ring 20 may have a circuit opening 201a, and the first electrode plate 101 and the second electrode plate 102 on the same wiring layer as the metal ring 201 are respectively connected to the corresponding lead-out wiring 401, and the lead-out wiring 401 corresponding to the first electrode plate 101 and the second electrode plate 102 are both led out through the circuit opening 102, that is, the two lead-out wirings 401 are led out through the same circuit opening 201a.

[0059] For sandwich type MOM capacitors, for example, refer to Figure 5 As shown, the outer electrode plate 105 of the sandwich-type MOM capacitor can be connected to the lead-out wiring layer 40 located above or below the local sealing ring 20 through the contact plug 30 and connected to the lead-out trace 401 of the lead-out wiring layer 40. Fig.11 FIG. 1 is a top view of the inner electrode plate of a sandwich-type MOM capacitor according to an embodiment of the present invention. Fig.11 As shown, the inner electrode plate 106 of the sandwich MOM capacitor is connected to the lead-out wiring 401 that passes through the line opening 201a in a metal ring 201 of the local sealing ring 20. The outer electrode plate 105 and the inner electrode plate 106 of the sandwich MOM capacitor are led out in this way, which has the least influence on the closure of the local sealing ring 20, and the size range of the line opening 201a in the metal ring is controlled by the manufacturing process, which helps to ensure the overall airtightness of the local sealing ring 20.

[0060] The circuit structure provided by the present invention includes a capacitor structure 10 and a local sealing ring 20 arranged around the periphery of the capacitor structure 10; the capacitor structure 10 includes at least two metal layers 11 stacked from bottom to top and an isolation dielectric layer 12 located between two adjacent metal layers 11, and the isolation dielectric layer 12 includes a low dielectric constant dielectric material; the local sealing ring 20 includes at least two metal rings 201 stacked from bottom to top and a connecting ring 202 connecting two adjacent metal rings 201; wherein one metal layer 11 of the capacitor structure corresponds to one metal ring 201, the corresponding metal layer 11 and the metal ring 201 are located in the same wiring layer and the metal ring 201 is arranged around the corresponding metal layer 11, and the capacitor structure 10 includes at least two metal layers 11 stacked from bottom to top and an isolation dielectric layer 12 located between two adjacent metal layers 11, and the isolation dielectric layer 12 includes a low dielectric constant dielectric material; the local sealing ring 20 includes at least two metal rings 201 stacked from bottom to top and a connecting ring 202 connecting two adjacent metal rings 201; wherein, one metal layer 11 of the capacitor structure corresponds to one metal ring 201, the corresponding metal layer 11 and the metal ring 201 are located in the same wiring layer and the metal ring 201 is arranged around the corresponding metal layer 11, and the capacitor structure 10 includes at least two metal layers 11 stacked from bottom to top and an isolation dielectric layer 12 located between two adjacent metal layers 11, and the isolation dielectric layer 12 includes at least two metal rings 201 stacked from bottom to top and a connecting ring 202 connecting two adjacent metal rings 201; wherein, one metal layer 11 of the capacitor structure corresponds to one metal ring 201, the corresponding metal layer 11 and the metal ring 201 are located in the same wiring layer and the metal ring 201 is arranged around the corresponding metal layer 11, and the capacitor structure One isolation dielectric layer 12 of the capacitor structure corresponds to one connecting ring 202, and the corresponding isolation dielectric layer 12 and the connecting ring 202 are located in the same dielectric layer and the connecting ring 202 completely surrounds the corresponding isolation dielectric layer 12, so that the connecting ring 202 completely isolates the side wall of the isolation dielectric layer 12, and the local sealing ring composed of the metal ring 201 and the connecting ring 202 can be used as a wall of the capacitor structure, which can effectively prevent water vapor from laterally diffusing into the low dielectric constant dielectric material in the capacitor structure 10, and can prevent the low dielectric constant dielectric material from changing its dielectric constant due to water absorption, which helps to avoid the problem of product failure caused by changes in the capacitance value of the capacitor structure and improve the reliability of the product.

[0061] The above description is only a description of the preferred embodiment of the present invention, and is not any limitation on the scope of rights of the present invention. Any technical personnel in this field can make possible changes and modifications to the technical solution of the present invention by using the methods and technical contents disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the protection scope of the technical solution of the present invention.

Claims

1. A circuit structure, characterized in that: include: A capacitor structure comprising at least two metal layers stacked from bottom to top and an isolation dielectric layer located between two adjacent metal layers, wherein the isolation dielectric layer comprises a low dielectric constant dielectric material; A local sealing ring, which is arranged around the periphery of the capacitor structure, and the local sealing ring includes at least two metal rings stacked from bottom to top and a connecting ring connecting two adjacent metal rings; Among them, one of the metal layers of the capacitor structure corresponds to one of the metal rings, the corresponding metal layers and the metal rings are located in the same wiring layer and the metal rings are arranged around the corresponding metal layers, one of the isolation dielectric layers of the capacitor structure corresponds to one of the connecting rings, the corresponding isolation dielectric layers and the connecting rings are located in the same dielectric layer and the connecting rings fully surround the corresponding isolation dielectric layers, and the local sealing ring is used to prevent water vapor from laterally diffusing into the low dielectric constant dielectric material in the capacitor structure.

2. The circuit structure according to claim 1, characterized in that: The number of metal rings of the local sealing ring is equal to the number of metal layers of the capacitor structure, and / or the number of connecting rings of the local sealing ring is equal to the number of isolation dielectric layers of the capacitor structure.

3. The circuit structure according to claim 1, characterized in that: The number of metal rings of the local sealing ring is greater than the number of metal layers of the capacitor structure, and / or the number of connecting rings of the local sealing ring is greater than the number of isolation dielectric layers of the capacitor structure.

4. The circuit structure according to claim 1, characterized in that: The ring width of the metal ring is greater than or equal to the ring width of the connecting ring.

5. The circuit structure according to claim 1, characterized in that: The capacitor structure includes at least one electrode plate located in the metal layer. The electrode plate is connected to a lead-out wiring layer located above or below the local sealing ring through a contact plug jumper and is connected to a lead-out wiring of the lead-out wiring layer.

6. The circuit structure according to claim 5, characterized in that: The lead-out wiring layer is not affected by water vapor.

7. The circuit structure according to claim 1, characterized in that: The capacitor structure includes at least one electrode plate located in the metal layer, at least one metal ring corresponding to the local sealing ring has a line opening, and the electrode plate is connected to a lead-out line passing through the line opening.

8. The circuit structure according to claim 1, characterized in that: The capacitor structure is an interdigitated MOM capacitor; each metal layer of the interdigitated MOM capacitor includes a first electrode plate, a second electrode plate, a plurality of first interdigitated strips and a plurality of second interdigitated strips, the first electrode plate and the second electrode plate are arranged opposite to each other, the plurality of first interdigitated strips and the plurality of second interdigitated strips are arranged in parallel and alternately, one end of each of the first interdigitated strips is connected to the first electrode plate, and one end of each of the second interdigitated strips is connected to the second electrode plate; the first electrode plates of two adjacent metal layers are electrically connected by a contact plug penetrating the isolation dielectric layer, and the second electrode plates of two adjacent metal layers are electrically connected by a contact plug penetrating the isolation dielectric layer.

9. The circuit structure according to claim 8, characterized in that: The first electrode plate and the second electrode plate of the top metal layer of the interdigital MOM capacitor are respectively connected to the lead-out wiring of the lead-out wiring layer above the local sealing ring through contact plugs; or, the first electrode plate and the second electrode plate of the bottom metal layer of the interdigital MOM capacitor are both connected to the lead-out wiring of the lead-out wiring layer below the local sealing ring through contact plugs; or, the first electrode plate of the top metal layer of the interdigital MOM capacitor is connected to the lead-out wiring of the lead-out wiring layer above the local sealing ring through contact plugs, and the second electrode plate of the bottom metal layer of the interdigital MOM capacitor is connected to the lead-out wiring of the lead-out wiring layer below the local sealing ring through contact plugs.

10. The circuit structure according to claim 1, characterized in that: The capacitor structure is a sandwich-type MOM capacitor; the metal layer includes a top metal layer, a bottom metal layer and an intermediate metal layer located between the top metal layer and the bottom metal layer, the top metal layer and the bottom metal layer are electrically connected and both serve as external electrode plates of the sandwich-type MOM capacitor, at least one of the intermediate metal layers serves as an internal electrode plate of the sandwich-type MOM capacitor, and the edge of the external electrode plate laterally extends beyond the edge of the internal electrode plate.

11. The circuit structure according to claim 10, characterized in that: The outer electrode plate of the sandwich-type MOM capacitor is connected to a lead-out wiring layer located above or below the local sealing ring through a contact plug jumper and is connected to a lead-out routing of the lead-out wiring layer; and / or the inner electrode plate of the sandwich-type MOM capacitor is connected to a lead-out routing of a line opening in a metal ring passing through the local sealing ring.

12. The circuit structure according to claim 1, characterized in that: The capacitor structure is a multi-layer circuit structure, and each metal layer of the capacitor structure includes multiple circuits; two circuits located in two adjacent metal layers and close to each other and the isolation dielectric layer between the two circuits constitute a parasitic capacitor; low-dielectric constant dielectric material is filled between multiple circuits in the same metal layer, and two circuits located in the same metal layer and close to each other and the low-dielectric constant dielectric material between the two circuits constitute a parasitic capacitor; the local sealing ring is used to prevent the capacitance of the parasitic capacitor from changing.

13. The circuit structure according to claim 1, characterized in that: The capacitor structure is a MIM capacitor.

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