Control circuit of ring oscillator and ring oscillation device

Through the feedback dynamic adjustment technology of the ring oscillator control circuit, the problem of frequency instability of the ring oscillator is solved, and higher frequency accuracy and stability are achieved.

CN119298883APending Publication Date: 2025-01-10BCD (SHANGHAI) MICRO ELECTRONICS LTD
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Patent Information

Application Number
CN202411745595.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-29
Publication Date
2025-01-10

AI Technical Summary

Technical Problem

The output clock signal frequency of existing ring oscillators has large distribution and poor accuracy, making it difficult to maintain stability, and is greatly affected by device parameters and power supply voltage.

Method used

Design a control circuit for a ring oscillator, including a reference voltage generation module, an operational amplifier and a feedback control module, dynamically adjust the power supply voltage through feedback, ensure that the frequency is within a stable range, reduce the frequency distribution, and improve frequency accuracy.

Benefits of technology

It improves the frequency stability and reliability of the output signal of the ring oscillator, reduces the impact of device parameters on frequency, and enhances frequency accuracy.

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Abstract

The invention discloses a control circuit of a ring oscillator and a ring oscillation device, and relates to the field of oscillation signals. A power supply supplies power supply voltage to the ring oscillator through a reference voltage generation module and an operational amplifier; and meanwhile, the feedback control module regulates and controls the voltage of the normal phase input end of the operational amplifier according to the real-time condition of the frequency of the output signal of the ring oscillator, so that the power supply voltage output to the ring oscillator by the operational amplifier is influenced. The frequency of the output signal of the ring oscillator is adjusted by regulating and controlling the power supply voltage, feedback control over the output signal of the ring oscillator is formed, and the frequency of the output signal of the ring oscillator is kept within a stable small range through feedback dynamic adjustment. Therefore, the stability and reliability of the frequency of the output signal of the ring oscillator are improved, the frequency distribution of the output signal of the ring oscillator is reduced, the influence of factors such as device parameters on the frequency of the output signal of the ring oscillator is avoided, and the frequency precision is improved.
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Description

Technical Field

[0001] The invention relates to the field of oscillation signals, and in particular to a control circuit of a ring oscillator and a ring oscillation device. Background Art

[0002] With the widespread application of ring oscillators, users have higher and higher requirements for ring oscillators. Currently, ring oscillators are generally implemented by connecting multiple inverters in series. The device parameters such as the gate capacitance, source-drain on-resistance, and threshold voltage of the transistors inside each inverter will affect the size of the final output frequency of the ring oscillator. At the same time, the size of the power supply voltage of the ring oscillator will also affect the size of the final output frequency of the ring oscillator. The device parameters will change due to the influence of process parameters, and the power supply voltage will also vary due to different application scenarios. The changes in these parameters will cause the frequency of the clock signal output by the ring oscillator to have a large distribution and poor accuracy. How to improve the accuracy and stability of the frequency of the clock signal output by the ring oscillator has become a technical problem that needs to be solved urgently. Summary of the invention

[0003] The purpose of the present invention is to provide a control circuit and a ring oscillator device for a ring oscillator, which can maintain the frequency of the output signal of the ring oscillator within a small stable range through feedback dynamic adjustment, thereby improving the stability and reliability of the frequency of the output signal of the ring oscillator, reducing the frequency distribution of the output signal of the ring oscillator, and avoiding the influence of factors such as device parameters on the frequency of the output signal of the ring oscillator, thereby improving the frequency accuracy.

[0004] In order to solve the above technical problems, the present invention provides a control circuit of a ring oscillator, comprising:

[0005] A reference voltage generating module, whose input end is connected to a power supply, and is used to generate a reference voltage based on the power supply;

[0006] an operational amplifier, the inverting input terminal of which is connected to the output terminal of the reference voltage generating module, the output terminal of which is connected to the power supply terminal of the ring oscillator, and the operational amplifier is used to amplify the difference between the inverting voltage received by the inverting input terminal and the positive voltage received by the positive input terminal, and provide a power supply voltage for the ring oscillator based on the difference;

[0007] A feedback control module, wherein the input end is connected to the output end of the ring oscillator, and the output end is connected to the non-inverting input end of the operational amplifier, and is used to adjust the non-inverting voltage output to the non-inverting input end of the operational amplifier based on the frequency of the output signal of the ring oscillator, so as to control the frequency of the output signal of the ring oscillator to be stable within a preset frequency range.

[0008] Optionally, the control circuit further includes:

[0009] A grounding capacitor has a first end connected to the output end of the operational amplifier and the power supply end of the ring oscillator respectively, and a second end connected to the ground.

[0010] Optionally, the ring oscillator includes N inverters connected in series, N is an odd number greater than 3, the power supply terminals of the inverters are connected to the output terminals of the operational amplifier, the ground terminals are grounded, and the output terminal of the last inverter connected in series is connected to the input terminal of the first inverter connected in series.

[0011] Optionally, for any two inverters connected in series in the ring oscillator, the ring oscillator further includes:

[0012] A delay resistor, a first end of which is connected to an output end of an inverter;

[0013] The delay capacitor has a first end connected to the second end of the delay resistor and the input end of another inverter respectively, and a second end connected to the ground.

[0014] Optionally, the ring oscillator further includes:

[0015] A power supply resistor, a first end of which is connected to the output end of the operational amplifier, and a second end of which is connected to the power supply end of the inverter;

[0016] A grounding resistor has a first end connected to the grounding terminal of the inverter and a second end connected to the ground.

[0017] Optionally, the feedback control module includes:

[0018] A pull-up resistor, a first end of which is connected to a preset voltage;

[0019] A first capacitor, a first end of which is grounded;

[0020] A first control switch, a first end of which is respectively connected to the second end of the first capacitor, the second end of the pull-up resistor and the non-inverting input end of the operational amplifier;

[0021] A second capacitor, a first end of which is grounded;

[0022] A second control switch, a first end of which is respectively connected to the second end of the first control switch and the second end of the second capacitor, and a second end of which is grounded;

[0023] The non-overlapping control module has an input end connected to the output end of the ring oscillator, a first output end connected to the control end of the first control switch, and a second output end connected to the control end of the second control switch.

[0024] Optionally, the non-overlapping control module includes:

[0025] A first inverter, an input end of which is connected to an output end of the ring oscillator;

[0026] A second inverter, an input end of which is connected to an output end of the first inverter;

[0027] a first NOT gate, a first input terminal connected to the output terminal of the second inverter;

[0028] A third inverter, an output end of which serves as a first output end of the non-overlapping control module;

[0029] a fourth inverter, an input end of which is connected to the output end of the ring oscillator;

[0030] A second NOT gate, wherein a first input end is respectively connected to the output end of the first NOT gate and the input end of the third inverter, and a second input end is connected to the output end of the fourth inverter;

[0031] a fifth inverter, whose input terminal is respectively connected to the second input terminal of the first NOT gate and the output terminal of the second NOT gate;

[0032] The sixth inverter has an input end connected to the output end of the fifth inverter, and an output end serving as the second output end of the non-overlapping control module.

[0033] Optionally, the control circuit further includes:

[0034] The frequency jitter control circuit has an output end connected to the pull-up resistor or the reference voltage generating module, and is used to periodically change the frequency of the output signal of the ring oscillator by adjusting the resistance value of the pull-up resistor or the magnitude of the reference voltage.

[0035] Optionally, the pull-up resistor includes a plurality of sub-resistors connected in series;

[0036] The frequency jitter control circuit includes a controller and a plurality of parallel switches connected in parallel at both ends of the sub-resistors, wherein the parallel switches are connected in parallel with the sub-resistors in a one-to-one correspondence;

[0037] The controller is used to control the on or off of each of the parallel switches based on a preset method, so as to periodically change the frequency of the output signal of the ring oscillator by adjusting the resistance value of the pull-up resistor.

[0038] To solve the above technical problem, the present invention also provides a ring oscillator device, including a ring oscillator and a control circuit of the ring oscillator as described above, wherein the power supply end of the ring oscillator is connected to the output end of the control circuit of the ring oscillator.

[0039] The present invention provides a control circuit of a ring oscillator, including a reference voltage generation module, an operational amplifier and a feedback control module. The power supply provides a power supply voltage for the ring oscillator through the reference voltage generation module and the operational amplifier. At the same time, the feedback control module adjusts the voltage of the non-phase input terminal of the operational amplifier according to the real-time situation of the frequency of the output signal of the ring oscillator, thereby affecting the power supply voltage outputted from the operational amplifier to the ring oscillator. The frequency of the output signal of the ring oscillator is adjusted by adjusting the power supply voltage, forming feedback control of the output signal of the ring oscillator. The frequency of the output signal of the ring oscillator is kept within a small stable range through dynamic feedback adjustment, thereby improving the stability and reliability of the frequency of the output signal of the ring oscillator, reducing the frequency distribution of the output signal of the ring oscillator, and avoiding the influence of factors such as device parameters on the frequency of the output signal of the ring oscillator, thereby improving the frequency accuracy.

[0040] The present invention also provides a ring oscillator device having the same beneficial effects as the control circuit of the ring oscillator. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the prior art and the drawings required for use in the embodiments are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0042] Figure 1 A schematic diagram of the structure of a control circuit of a ring oscillator provided by the present invention;

[0043] Figure 2 A schematic structural diagram of a ring oscillating device provided by the present invention;

[0044] Figure 3 A schematic diagram of the structure of a ring oscillator using the first frequency reduction method provided by the present invention;

[0045] Figure 4 A schematic diagram of the structure of a ring oscillator using the second frequency reduction method provided by the present invention;

[0046] Figure 5 A schematic diagram of the structure of a ring oscillator using the third frequency reduction method provided by the present invention;

[0047] Figure 6 A waveform diagram of an output signal of a non-overlapping control module provided by the present invention;

[0048] Figure 7 A structural schematic diagram of a non-overlapping control module provided by the present invention;

[0049] Figure 8 A schematic diagram of a frequency waveform of a frequency jitter method provided by the present invention;

[0050] Fig. 9 A schematic diagram of a frequency waveform of another frequency jittering method provided by the present invention;

[0051] Fig.10 A schematic diagram of a frequency waveform of a clock signal without a frequency jitter function provided by the present invention;

[0052] Fig.11 A schematic structural diagram of another ring oscillator provided by the present invention. DETAILED DESCRIPTION

[0053] The core of the present invention is to provide a control circuit and a ring oscillator device for a ring oscillator, which can maintain the frequency of the output signal of the ring oscillator within a small stable range through feedback dynamic adjustment, thereby improving the stability and reliability of the frequency of the output signal of the ring oscillator, reducing the frequency distribution of the output signal of the ring oscillator, and avoiding the influence of factors such as device parameters on the frequency of the output signal of the ring oscillator, thereby improving the frequency accuracy.

[0054] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0055] Please refer to Figure 1 , Figure 1 A schematic diagram of the structure of a control circuit of a ring oscillator provided by the present invention; please refer to Figure 2 , Figure 2 A schematic diagram of the structure of a ring oscillator device provided by the present invention; To solve the above technical problems, the present invention provides a control circuit of a ring oscillator OSC, comprising:

[0056] A reference voltage generating module 1, whose input terminal is connected to the power supply VDD, and is used to generate a reference voltage based on the power supply VDD;

[0057] An operational amplifier TCA, whose inverting input terminal is connected to the output terminal of the reference voltage generating module 1, and whose output terminal is connected to the power supply terminal of the ring oscillator OSC, is used to amplify the difference between the inverting voltage received by the inverting input terminal and the positive voltage received by the positive input terminal, and provide the power supply voltage VDD_SUB for the ring oscillator OSC based on the difference;

[0058] The feedback control module 3 has an input end connected to the output end of the ring oscillator OSC, and an output end connected to the non-inverting input end of the operational amplifier TCA, and is used to adjust the non-inverting voltage output to the non-inverting input end of the operational amplifier TCA based on the frequency of the output signal of the ring oscillator OSC, so as to control the frequency of the output signal of the ring oscillator OSC to be stable within a preset frequency range.

[0059] It is understandable that the clock signal output by the ring oscillator OSC will change with the change of the power supply voltage VDD_SUB. The higher the power supply voltage VDD_SUB of the ring oscillator OSC is, the greater the frequency of the output signal of the ring oscillator OSC will be. The power supply terminal of the ring oscillator OSC is connected to the output terminal of the operational amplifier TCA. Its power supply voltage VDD_SUB depends on the voltage levels of the two input terminals of the operational amplifier TCA. The inverting input terminal of the operational amplifier TCA will be maintained at the reference voltage VREF_REG. The output terminal of the feedback control module 3 is connected to the non-inverting input terminal of the operational amplifier TCA to provide a voltage for the non-inverting input terminal. This voltage will be controlled by the feedback control module 3. When the frequency of the clock signal output by the ring oscillator OSC is too large, it means that the power supply voltage VDD_SUB of the power supply terminal of the ring oscillator OSC is too large. At this time, the feedback control module 3 needs to reduce the voltage of the non-inverting input terminal of the operational amplifier TCA, thereby reducing the output of the output terminal of the operational amplifier TCA. voltage, that is, reducing the power supply voltage VDD_SUB of the ring oscillator OSC, and controlling the reduction of the frequency of the clock signal output by the ring oscillator OSC by reducing the power supply voltage VDD_SUB of the ring oscillator OSC; when the frequency of the clock signal output by the ring oscillator OSC is too small, it means that the power supply voltage VDD_SUB at the power supply end of the ring oscillator OSC is too small. At this time, the feedback control module 3 needs to increase the voltage of the non-inverting input end of the operational amplifier TCA, thereby increasing the voltage output by the output end of the operational amplifier TCA, that is, increasing the power supply voltage VDD_SUB of the ring oscillator OSC, and controlling the increase of the frequency of the clock signal output by the ring oscillator OSC by increasing the power supply voltage VDD_SUB of the ring oscillator OSC.

[0060] It should be noted that the feedback control module 3 will dynamically adjust the voltage of the non-phase input terminal of the operational amplifier TCA in real time according to the frequency of the output signal of the ring oscillator OSC detected, and the feedback closed-loop control formed by the feedback control module 3 is used to realize the process of dynamically adjusting the output signal of the ring oscillator OSC. The specific implementation method of the feedback control module 3 is not particularly limited in this application, and the accuracy and adjustment frequency of each adjustment of the feedback control module 3 are not particularly limited in this application, and can be set and adjusted according to the specific working conditions of the ring oscillator OSC in actual applications. In the case of high precision requirements, the frequency of the clock signal output by the ring oscillator OSC needs to be stable at a certain frequency value. In the case of low precision requirements, the frequency of the clock signal output by the ring oscillator OSC only needs to be stable in a small frequency range to ensure a smaller frequency distribution. The specific type and implementation method of the preset frequency range in which the frequency of the output signal of the final ring oscillator OSC needs to be stable are not particularly limited in this application, which can be a frequency range of about one frequency value or a frequency range containing multiple frequency values.

[0061] It is not difficult to understand that the reference voltage generating module 1 needs to provide a stable reference voltage for the inverting input terminal of the operational amplifier TCA based on the power supply VDD, control the voltage of the inverting input terminal of the operational amplifier TCA to remain unchanged, and ensure that the feedback control module 3 can control the final output power supply voltage VDD_SUB only by adjusting the voltage of the non-inverting input terminal of the operational amplifier TCA. The specific type and implementation method of the reference voltage generating module 1 are not particularly limited in this application, and can be implemented by a voltage divider or the like; the specific setting value of the reference voltage generated by it is not particularly limited in this application. Under normal circumstances, the value of the reference voltage is lower than the voltage of the power supply VDD.

[0062] It can be understood that by setting a feedback closed-loop control loop for the output signal of the ring oscillator OSC formed by the feedback control module 3 and the non-phase input terminal of the operational amplifier TCA, it is possible to dynamically adjust the frequency of the clock signal output by the ring oscillator OSC, thereby ensuring that the frequency of the clock signal output by the ring oscillator OSC is within a certain preset frequency range, avoiding the situation where the frequency distribution is too large, improving the accuracy of the ring oscillator OSC frequency, and realizing a high-performance ring oscillator.

[0063] The present invention provides a control circuit of a ring oscillator OSC, comprising a reference voltage generation module 1, an operational amplifier TCA and a feedback control module 3. A power supply VDD provides a power supply voltage VDD_SUB for the ring oscillator OSC through the reference voltage generation module 1 and the operational amplifier TCA. Meanwhile, the feedback control module 3 adjusts the voltage at the non-phase input terminal of the operational amplifier TCA according to the real-time situation of the frequency of the output signal of the ring oscillator OSC, thereby affecting the power supply voltage VDD_SUB output by the operational amplifier TCA to the ring oscillator OSC. The frequency of the output signal of the ring oscillator OSC is adjusted by adjusting the power supply voltage VDD_SUB, thereby forming feedback control of the output signal of the ring oscillator OSC. The frequency of the output signal of the ring oscillator OSC is kept within a small stable range through dynamic feedback adjustment, thereby improving the stability and reliability of the frequency of the output signal of the ring oscillator OSC, reducing the frequency distribution of the output signal of the ring oscillator OSC, and avoiding the influence of factors such as device parameters on the frequency of the output signal of the ring oscillator OSC, thereby improving the frequency accuracy.

[0064] Based on the above embodiments:

[0065] As an optional embodiment, the control circuit further includes:

[0066] The grounding capacitor C0 has a first end connected to the output end of the operational amplifier TCA and the power supply end of the ring oscillator OSC respectively, and a second end connected to the ground.

[0067] It is not difficult to understand that, considering that the output end of the operational amplifier TCA will be directly connected to the power supply end of the ring oscillator OSC, a grounded capacitor C0 can be further added to the output end of the operational amplifier TCA to play the role of energy storage, bypass and filtering. The grounded capacitor C0 can effectively realize the power supply filtering process, and at the same time, it can stabilize the power supply voltage VDD_SUB by utilizing its own energy storage, and bypass the pulsation caused in the circuit to the ground. The specific type and implementation method of the grounded capacitor C0 are not particularly limited in this application.

[0068] Specifically, a grounding capacitor C0 connected to the output end of the operational amplifier TCA can be further added. The grounding capacitor C0 can effectively improve the stability of the power supply voltage VDD_SUB output to the ring oscillator OSC. The structure is simple and easy to implement. The devices used are small in size and low in cost, which is conducive to the simple implementation of the entire control circuit.

[0069] Please refer to Figure 3 , Figure 3A schematic structural diagram of a ring oscillator adopting the first frequency reduction method provided by the present invention; as an optional embodiment, the ring oscillator OSC includes N inverters connected in series, N is an odd number greater than 3, the power supply terminals of the inverters are connected to the output terminals of the operational amplifier TCA, the ground terminals are grounded, and the output terminal of the last inverter connected in series is connected to the input terminal of the first inverter connected in series.

[0070] Furthermore, in order to improve the working stability of the ring oscillator OSC loop, especially when a non-overlapping controller is set in the feedback control module 3, in order to achieve the timing stability of the non-overlapping controller during the startup process, the ring oscillator OSC needs to be frequency-reduced. There are many ways to implement the frequency reduction process. The first solution is to adjust the setting level of the inverter in the ring oscillator OSC. Generally, the inverter in the ring oscillator OSC is 3 levels. By increasing the inverter from 3 levels to N levels, the frequency reduction of the ring oscillator OSC is achieved by increasing the level of the inverter. The specific value of N is not particularly limited in this application. The frequency reduction requirement of the ring oscillator OSC can be determined according to the actual application situation, and then the value of N can be adjusted appropriately. The power supply end of the ring oscillator OSC is also the power supply end of all the inverters therein. Figure 3 As shown, the ring oscillator OSC is provided with N inverters including INV1, INV2, INV3 to INVN.

[0071] Specifically, adding frequency reduction processing to the ring oscillator OSC can effectively improve the performance of the entire control circuit and the ring oscillator OSC, improve the working stability of the entire ring oscillation system, and ensure the stable operation of the ring oscillator OSC.

[0072] Please refer to Figure 4 , Figure 4 A schematic diagram of the structure of a ring oscillator using the second frequency reduction method provided by the present invention; as an optional embodiment, for any two inverters connected in series in the ring oscillator OSC, the ring oscillator OSC further includes:

[0073] A delay resistor, a first end of which is connected to an output end of an inverter;

[0074] The delay capacitor has a first end connected to the second end of the delay resistor and the input end of another inverter respectively, and a second end connected to the ground.

[0075] It is not difficult to understand that if you want to achieve frequency reduction processing of the ring oscillator OSC, you can also add an RC delay circuit composed of a delay resistor and a delay capacitor between the inverters in the ring oscillator OSC, and use the delay effect of the RC delay circuit to achieve frequency reduction of the ring oscillator OSC. The specific types and implementation methods of the delay resistor and the delay capacitor are not specifically limited in this application. The resistance value of the delay resistor and the capacitance value of the delay capacitor can be appropriately selected according to the actual circuit and frequency reduction requirements. Figure 4 As shown, N delay resistors including resistor R1, resistor R2, resistor R3 to resistor RN are provided, and N delay capacitors including capacitor C11, capacitor C12, capacitor C13 to capacitor C1N are provided.

[0076] Specifically, the frequency reduction processing of the ring oscillator OSC can also be achieved by adding an RC delay circuit. The circuit structure is simple and easy to implement. Adding the frequency reduction processing of the ring oscillator OSC can effectively improve the performance of the entire control circuit and the ring oscillator OSC, improve the working stability of the entire ring oscillation system, and ensure the stable operation of the ring oscillator OSC.

[0077] Please refer to Figure 5 , Figure 5 A schematic diagram of the structure of a ring oscillator using the third frequency reduction method provided by the present invention; as an optional embodiment, the ring oscillator OSC further includes:

[0078] A power supply resistor, a first end of which is connected to the output end of the operational amplifier TCA, and a second end of which is connected to the power supply end of the inverter;

[0079] A grounding resistor has a first end connected to the grounding terminal of the inverter and a second end connected to the ground.

[0080] It is not difficult to understand that if you want to achieve frequency reduction processing of the ring oscillator OSC, you can also add a resistor between the power supply and ground of the inverter in the ring oscillator OSC. Specifically, you can add a power resistor between the power supply terminal of the inverter and the power supply voltage VDD_SUB, and add a ground resistor between the ground terminal of the inverter and the ground. The specific type and implementation method of the power resistor and the ground resistor are not particularly limited in this application, and the specific resistance value can also be appropriately selected according to actual needs. Figure 5 As shown, N power supply resistors including resistor R11, resistor R21, resistor R31 to resistor RN1 are provided, and N grounding resistors including resistor R12, resistor R22, resistor R32 to resistor RN2 are provided.

[0081] It should be noted that the above embodiments provide three methods of frequency reduction processing, and two or three of these methods can be selected at the same time for use in combination, or only one of them can be selected for use alone. There are other implementation methods for frequency reduction processing, which are not limited to the three embodiments proposed in this application.

[0082] Specifically, the frequency reduction processing of the ring oscillator OSC can also be achieved by increasing the power supply resistance and the grounding resistance. The circuit structure is simple and easy to implement. Adding the frequency reduction processing of the ring oscillator OSC can effectively improve the performance of the entire control circuit and the ring oscillator OSC, improve the working stability of the entire ring oscillation system, and ensure the stable operation of the ring oscillator OSC.

[0083] As an optional embodiment, the feedback control module 3 includes:

[0084] A pull-up resistor Rpull-up, a first end of which is connected to a preset voltage;

[0085] A first capacitor C1, a first end of which is grounded;

[0086] A first control switch K1, a first end of which is respectively connected to the second end of the first capacitor C1, the second end of the pull-up resistor Rpull-up and the non-inverting input end of the operational amplifier TCA;

[0087] A second capacitor C2, a first end of which is grounded;

[0088] A second control switch K2, a first end of which is respectively connected to the second end of the first control switch K1 and the second end of the second capacitor C2, and a second end of which is grounded;

[0089] The non-overlapping control module has an input end connected to the output end of the ring oscillator OSC, a first output end connected to the control end of the first control switch K1, and a second output end connected to the control end of the second control switch K2.

[0090] It can be understood that the feedback control module 3 specifically includes a pull-up resistor Rpull-up, a first capacitor C1, a second capacitor C2, a first control switch K1, a second control switch K2 and a non-overlapping control module. The pull-up resistor Rpull-up will use the preset voltage connected to itself to pull up the positive phase input terminal of the operational amplifier TCA, and provide a voltage for the positive phase input terminal of the operational amplifier TCA. The non-overlapping control module will generate two non-overlapping control signals CLK_K1 and CLK_K2 according to the clock signal CLK_IN output by the ring oscillator OSC, thereby controlling the first The control switch K1 and the second control switch K2 are alternately turned on. When the first control switch K1 is turned on and the second control switch K2 is turned off, the turned-on first control switch K1 controls the first capacitor C1 and the second capacitor C2 to achieve charge averaging. When the first control switch K1 is turned off and the second control switch K2 is turned on, the second capacitor C2 is discharged through the turned-on second control switch K2 to reduce its own charge. When the first control switch K1 is turned on again and the second control switch K2 is turned off, the charge averaging between the two capacitors will cause the voltage at the non-inverting input terminal of the operational amplifier TCA to drop. The specific types and implementation methods of the first capacitor C1, the second capacitor C2, the first control switch K1, the second control switch K2, and the non-overlapping control module are not particularly limited in this application. The capacitance of the first capacitor C1 and the second capacitor C2 can also be adjusted according to the actual circuit conditions. The first control switch K1 and the second control switch K2 can be implemented by switching devices such as MOS tubes (Metal Oxide Semiconductor Field Effect Transistors).

[0091] It should be noted that the present application does not make any special restrictions on the specific implementation of the preset voltage, and the preset voltage can be directly implemented by reusing the power supply VDD or the reference voltage, or by using an independent voltage. Figure 2As shown, it is arranged between the power supply VDD and the positive input terminal of the operational amplifier TCA, and the power supply VDD is connected to the positive input terminal of the operational amplifier TCA through the pull-up resistor Rpull-up to provide a voltage for the positive input terminal, so that the power supply VDD is used to maintain the power supply of the positive input terminal of the operational amplifier TCA; the operational amplifier TCA can effectively amplify the difference between the reference voltage and the voltage of the second end of the pull-up resistor Rpull-up, and realize the process of using the power supply VDD to power the ring oscillator OSC, and at the same time, the two input terminals are used to cooperate with the feedback control structure to realize the controllable process of the power supply voltage VDD_SUB output to the ring oscillator OSC; the specific type and implementation method of the pull-up resistor Rpull-up and the operational amplifier TCA are not particularly limited in this application, and the resistance value of the pull-up resistor Rpull-up can be set and adjusted according to the specific voltage conditions of the power supply VDD and the power supply voltage VDD_SUB required by the ring oscillator OSC.

[0092] It is not difficult to understand that, taking the preset voltage directly reuses the power supply VDD as an example, when the ring oscillator OSC is just started, the power supply VDD just starts to charge the first capacitor C1, and the voltage at the non-inverting input terminal of the operational amplifier TCA is relatively high. After amplification by the operational amplifier TCA, the power supply voltage VDD_SUB output to the ring oscillator OSC is relatively large, and the frequency of the output signal of the ring oscillator OSC is high. At this time, due to the high frequency of the output signal of the ring oscillator OSC, the frequency of the control signal output by the non-overlapping control module will also be relatively high, and the operating frequency of the first control switch K1 and the second control switch K2 will also be relatively high. The higher the operating frequency of the two control switches, the more energy released by the second capacitor C2 during the whole process, the lower the voltage at the non-inverting input terminal of the operational amplifier TCA, and the power supply voltage VDD_SUB output after amplification by the operational amplifier TCA becomes lower, which in turn causes the frequency of the clock signal output by the ring oscillator OSC to become lower. After dynamic balance is achieved, the voltage at the non-inverting input terminal of the operational amplifier TCA reaches a stable value and finally approaches the reference voltage.

[0093] After reaching dynamic equilibrium, the frequency Freq of the clock signal output by the ring oscillator OSC is expressed as:

[0094] ;

[0095] Wherein, VDD is the voltage value of the power supply VDD, VREF_REG is the voltage value of the reference voltage, and VREF_REG=k*VDD, 0 <k<1,R pullup is the resistance of the pull-up resistor Rpull-up, C 2is the capacitance of the second capacitor C2. It is not difficult to find from the formula that the frequency of the clock signal output by the ring oscillator OSC is only related to the resistance of the pull-up resistor Rpull-up and the capacitance of the second capacitor C2, and has nothing to do with other process parameters and the power supply voltage VDD_SUB. After the total resistance value of the pull-up resistor Rpull-up changes, the frequency of the clock signal output by the ring oscillator OSC will be inversely proportional to the total resistance value of the pull-up resistor Rpull-up. When realizing the frequency jitter function, the control method for the resistance value of the pull-up resistor Rpull-up can be designed based on this formula.

[0096] Specifically, in order to achieve higher precision circuit design, the present invention adopts a non-overlapping controller design to control the voltage at the non-inverting input terminal of the operational amplifier TCA, further improving the frequency accuracy. The oscillation frequency of the clock signal output by the ring oscillator OSC is not affected by the power supply voltage VDD_SUB, and the stability is greatly improved.

[0097] Please refer to Figure 6 , Figure 6 A waveform diagram of an output signal of a non-overlapping control module provided by the present invention; please refer to Figure 7 , Figure 7 A schematic diagram of the structure of a non-overlapping control module provided by the present invention. As an optional embodiment, the non-overlapping control module includes:

[0098] A first inverter U1, an input end of which is connected to an output end of the ring oscillator OSC;

[0099] A second inverter U2, an input end of which is connected to an output end of the first inverter U1;

[0100] A first NOT gate U11, a first input terminal of which is connected to an output terminal of the second inverter U2;

[0101] A third inverter U3, an output end of which serves as a first output end of the non-overlapping control module;

[0102] A fourth inverter U4, an input end of which is connected to an output end of the ring oscillator OSC;

[0103] A second NOT gate U12, a first input end of which is respectively connected to the output end of the first NOT gate U11 and the input end of the third inverter U3, and a second input end of which is connected to the output end of the fourth inverter U4;

[0104] A fifth inverter U5, an input end of which is respectively connected to the second input end of the first NOT gate U11 and the output end of the second NOT gate U12;

[0105] The sixth inverter U6 has an input end connected to the output end of the fifth inverter U5 , and an output end serving as a second output end of the non-overlapping control module.

[0106] It is not difficult to understand that the non-overlap control module specifically includes a first inverter U1, a second inverter U2, a first NOT gate U11, a third inverter U3, a fourth inverter U4, a second NOT gate U12, a fifth inverter U5 and a sixth inverter U6. Taking the first control switch K1 as a PMOS tube and the second control switch K2 as an NMOS tube as an example, CLK_IN is an oscillation signal input to the non-overlap control module, that is, a clock signal output by the ring oscillator OSC, CLK_K1 and CLK_K2 are two output control signals, there is no overlap between the CLK_K1 and CLK_K2 signals, and there is a dead time Td between the edges. Figure 6 The following are typical waveforms of the control module without overlap. Figure 7 The figure shows a typical circuit diagram of a non-overlapping control module, wherein the parasitic delay of the inverter is recorded as Tpd1, and the parasitic delay of the logic NOT gate is recorded as Tpd2. The circuit implementation and control timing of the non-overlapping control module are not limited to the implementation provided in this embodiment. There are many implementation methods for non-overlapping control circuits or dead zone control circuits, and there are also many implementation methods for non-overlapping control timing.

[0107] Specifically, the non-overlapping control module can be implemented by a combination circuit of an inverter and a logic NOT gate. The entire circuit structure is simple and easy to implement. It can effectively output two non-overlapping control signals, which is conducive to the simple implementation of the entire control circuit.

[0108] Please refer to Figure 8 , Figure 8 A frequency waveform diagram of a frequency jitter method provided by the present invention; please refer to Fig. 9 , Fig. 9 This is a frequency waveform diagram of another frequency jitter method provided by the present invention; please refer to Fig.10 , Fig.10 A frequency waveform diagram of a clock signal without a frequency jitter function provided by the present invention; as an optional embodiment, the control circuit further includes:

[0109] The frequency jitter control circuit has an output end connected to the pull-up resistor Rpull-up or the reference voltage generation module 1, and is used to periodically change the frequency of the output signal of the ring oscillator OSC by adjusting the resistance value of the pull-up resistor Rpull-up or the size of the reference voltage.

[0110] It is not difficult to understand that in order to further improve the EMC (Electro Magnetic Compatibility) performance, a frequency jitter function can also be added to the control circuit. Frequency jitter refers to the fact that the frequency of the clock signal output by the ring oscillator OSC is not fixed, but will change periodically within a certain frequency range. If you want to achieve frequency jitter of the clock signal output by the ring oscillator OSC, you need to achieve jitter of the power supply voltage VDD_SUB output to the ring oscillator OSC. Therefore, you can control the resistance value of the pull-up resistor Rpull-up or the size of the reference voltage output by the reference voltage generation module 1 to affect the voltage at the positive input or the negative input of the operational amplifier TCA, respectively, so as to achieve jitter of the power supply voltage VDD_SUB of the ring oscillator OSC. The present application does not make any special restrictions on the type and implementation of the specific frequency jitter control circuit. There are also many options for the specific method of frequency jittering of the clock signal, including the following: Figure 8 The triangle wave shown, such as Fig. 9 There are many forms of pseudo-random waves shown in the figure. Different frequency jitters will have different performances and can be selected according to actual application requirements. This application does not make any special restrictions here. Fig.10 As shown, when there is no frequency jitter control, the frequency of the clock signal output by the ring oscillator OSC is usually stable at a frequency value.

[0111] It should be noted that there are many ways to control the resistance of the pull-up resistor Rpull-up and the reference voltage output by the reference voltage generation module 1. The pull-up resistor Rpull-up can be implemented by a programmable resistor to facilitate the regulation of the resistance; the reference voltage can be adjusted by adjusting the voltage divider resistor of the reference voltage generation module 1, etc. This application does not make any special restrictions here. When the clock signal needs to be kept as Figure 8 When the frequency jittering mode of the triangular wave is shown, the reference voltage generating module 1 can be controlled to generate the following Figure 8 The dithered reference voltage of the triangle wave is shown implemented.

[0112] Specifically, after adding the frequency jitter function, the influence of the interference signal on the clock signal output by the ring oscillator OSC can be offset to a certain extent. Especially when the clock signal is used for communication, it can effectively improve the anti-interference and confidentiality of the communication process and ensure the accuracy of the clock signal; at the same time, it can also improve the EMI (Electromagnetic Interference) and EMC performance of the entire ring oscillator system.

[0113] Please refer to Fig.11 , Fig.11 A schematic diagram of the structure of another ring oscillator device provided by the present invention; as an optional embodiment, the pull-up resistor Rpull-up includes a plurality of sub-resistors connected in series;

[0114] The frequency jitter control circuit includes a controller and a plurality of parallel switches connected in parallel at both ends of the sub-resistors, and the parallel switches are connected in parallel with the sub-resistors in a one-to-one correspondence;

[0115] The controller is used to control the on or off of each parallel switch based on a preset method, so as to periodically change the frequency of the output signal of the ring oscillator OSC by adjusting the resistance value of the pull-up resistor Rpull-up.

[0116] It is understandable that frequency jitter control can be achieved by adjusting the resistance value of the pull-up resistor Rpull-up, such as Fig.11 As shown, the pull-up resistor Rpull-up can be set to a resistor array composed of a string of sub-resistors, and each sub-resistor in the resistor array is controlled by parallel switches such as K1, K2, ... Kn-1, Kn-2, etc. The frequency jitter controller can adjust the total resistance of the pull-up resistor Rpull-up by adjusting the number of on and off of the parallel switches, thereby achieving the frequency jitter of the clock signal finally output. The specific control method of the controller is not specifically limited in this application, and can be set according to the specific frequency jitter method. The type, resistance value, specific implementation method of each sub-resistor and the specific type and implementation method of each parallel switch are not specifically limited in this application. There are also multiple options for the number of sub-resistors and parallel switches, which are not limited to the one-to-one corresponding quantity relationship proposed in this embodiment, and can be flexibly adjusted according to actual application requirements.

[0117] Specifically, by setting the pull-up resistor Rpull-up to the form of multiple sub-resistors and flexibly adjusting the number of sub-resistors connected to the circuit, the resistance value of the pull-up resistor Rpull-up can be regulated, thereby realizing the function of frequency jitter. The entire circuit structure is simple and easy to implement.

[0118] To solve the above technical problem, the present invention further provides a ring oscillator device, including a ring oscillator and a control circuit of the ring oscillator as described above, wherein the power supply end of the ring oscillator is connected to the output end of the control circuit of the ring oscillator.

[0119] For an introduction to a ring oscillator device provided by the present invention, please refer to the embodiment of the control circuit of the ring oscillator described above, and the present invention will not be described in detail here.

[0120] It should also be noted that, in this specification, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device including the element.

[0121] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A control circuit for a ring oscillator, characterized in that: include: A reference voltage generating module, whose input end is connected to a power supply, and is used to generate a reference voltage based on the power supply; an operational amplifier, the inverting input terminal of which is connected to the output terminal of the reference voltage generating module, the output terminal of which is connected to the power supply terminal of the ring oscillator, and the operational amplifier is used to amplify the difference between the inverting voltage received by the inverting input terminal and the positive voltage received by the positive input terminal, and provide a power supply voltage for the ring oscillator based on the difference; A feedback control module, wherein the input end is connected to the output end of the ring oscillator, and the output end is connected to the non-inverting input end of the operational amplifier, and is used to adjust the non-inverting voltage output to the non-inverting input end of the operational amplifier based on the frequency of the output signal of the ring oscillator, so as to control the frequency of the output signal of the ring oscillator to be stable within a preset frequency range.

2. The control circuit of the ring oscillator according to claim 1, characterized in that: The control circuit further comprises: A grounding capacitor has a first end connected to the output end of the operational amplifier and the power supply end of the ring oscillator respectively, and a second end connected to the ground.

3. The control circuit of the ring oscillator according to claim 1, characterized in that: The ring oscillator includes N inverters connected in series, where N is an odd number greater than 3, the power supply terminals of the inverters are connected to the output terminals of the operational amplifiers, the ground terminals are grounded, and the output terminal of the last inverter connected in series is connected to the input terminal of the first inverter connected in series.

4. The control circuit of the ring oscillator according to claim 3, characterized in that: For any two inverters connected in series in the ring oscillator, the ring oscillator further includes: A delay resistor, a first end of which is connected to an output end of an inverter; The delay capacitor has a first end connected to the second end of the delay resistor and the input end of another inverter respectively, and a second end connected to the ground.

5. The control circuit of the ring oscillator according to claim 4, characterized in that: The ring oscillator further comprises: A power supply resistor, a first end of which is connected to the output end of the operational amplifier, and a second end of which is connected to the power supply end of the inverter; A grounding resistor has a first end connected to the grounding terminal of the inverter and a second end connected to the ground.

6. The control circuit of the ring oscillator according to any one of claims 1 to 5, characterized in that: The feedback control module comprises: A pull-up resistor, a first end of which is connected to a preset voltage; A first capacitor, a first end of which is grounded; A first control switch, a first end of which is respectively connected to the second end of the first capacitor, the second end of the pull-up resistor and the non-inverting input end of the operational amplifier; A second capacitor, a first end of which is grounded; A second control switch, a first end of which is respectively connected to the second end of the first control switch and the second end of the second capacitor, and a second end of which is grounded; The non-overlapping control module has an input end connected to the output end of the ring oscillator, a first output end connected to the control end of the first control switch, and a second output end connected to the control end of the second control switch.

7. The control circuit of the ring oscillator according to claim 6, characterized in that: The non-overlap control module comprises: A first inverter, an input end of which is connected to an output end of the ring oscillator; A second inverter, an input end of which is connected to an output end of the first inverter; a first NOT gate, a first input terminal connected to the output terminal of the second inverter; A third inverter, an output end of which serves as a first output end of the non-overlapping control module; a fourth inverter, an input end of which is connected to the output end of the ring oscillator; A second NOT gate, wherein a first input end is respectively connected to the output end of the first NOT gate and the input end of the third inverter, and a second input end is connected to the output end of the fourth inverter; a fifth inverter, whose input terminal is respectively connected to the second input terminal of the first NOT gate and the output terminal of the second NOT gate; The sixth inverter has an input end connected to the output end of the fifth inverter, and an output end serving as the second output end of the non-overlapping control module.

8. The control circuit of the ring oscillator according to claim 6, characterized in that: The control circuit further comprises: The frequency jitter control circuit has an output end connected to the pull-up resistor or the reference voltage generating module, and is used to periodically change the frequency of the output signal of the ring oscillator by adjusting the resistance value of the pull-up resistor or the magnitude of the reference voltage.

9. The control circuit of the ring oscillator according to claim 8, characterized in that: The pull-up resistor includes a plurality of sub-resistors connected in series; The frequency jitter control circuit includes a controller and a plurality of parallel switches connected in parallel at both ends of the sub-resistors, wherein the parallel switches are connected in parallel with the sub-resistors in a one-to-one correspondence; The controller is used to control the on or off of each of the parallel switches based on a preset method, so as to periodically change the frequency of the output signal of the ring oscillator by adjusting the resistance value of the pull-up resistor.

10. A ring oscillator, characterized in that: The invention comprises a ring oscillator and a control circuit of the ring oscillator as claimed in any one of claims 1 to 9, wherein a power supply terminal of the ring oscillator is connected to an output terminal of the control circuit of the ring oscillator.