Manufacturing method of display panel, display panel, mask plate and display device

Abstract

The invention provides a manufacturing method of a display panel, the display panel, a mask plate and a display device.The manufacturing method of the display panel comprises the steps that a back plate is provided, the back plate comprises a display area and a peripheral area, the peripheral area comprises an electrostatic protection area, and the electrostatic protection area is provided with an electrostatic protection circuit; forming a light-emitting device layer in the display area of the back plate; forming an inorganic packaging layer on one side, far away from the back plate, of the light-emitting device layer based on a mask plate containing a first opening region and a second opening region; wherein the first opening area exposes the electrostatic protection area, and the second opening area at least exposes the display area; the first opening area and the second opening area are arranged at intervals. According to the embodiment of the invention, targeted packaging of the electrostatic protection circuit in the electrostatic protection area is realized, water vapor can be effectively isolated based on the inorganic packaging layer covering the electrostatic protection circuit, the anti-corrosion performance of the electrostatic protection circuit is improved, and the adaptability of the display panel to a high-temperature and high-humidity environment is enhanced.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a method for manufacturing a display panel, a display panel, a mask plate and a display device. Background Art

[0002] Electrostatic damage is a common cause of failure in semiconductor devices. Electrostatic damage can lead to the breakdown of insulating media, causing threshold voltage drift or short circuits between the gate and source and drain electrodes. Display panels based on semiconductor technology are also facing the threat of electrostatic damage. Electrostatic discharge can have a serious impact on the performance and life of display devices. Therefore, it is crucial to ensure the effectiveness of electrostatic protection measures for display devices.

[0003] In the related art, electrostatic protection is usually performed on the display panel based on an electrostatic protection circuit. However, when the display panel operates in a high temperature and high humidity environment, the electrostatic protection circuit is at risk of being corroded, resulting in failure of the display panel. Summary of the invention

[0004] The present application provides a method for manufacturing a display panel, a display panel, a mask plate and a display device, which are used to solve the problem in the prior art that an electrostatic protection circuit of a display panel is corroded, resulting in failure of the display panel.

[0005] According to a first aspect of the present application, a method for manufacturing a display panel is provided, the method comprising:

[0006] Providing a back panel, the back panel comprising a display area and a peripheral area, the peripheral area comprising an electrostatic protection area, and an electrostatic protection circuit is arranged in the electrostatic protection area;

[0007] forming a light emitting device layer in the display area of ​​the back panel;

[0008] Based on a mask plate containing a first opening area and a second opening area, an inorganic packaging layer is formed on the side of the light-emitting device layer away from the back plate; wherein the first opening area exposes the electrostatic protection area, and the second opening area exposes at least the display area; the first opening area and the second opening area are spaced apart.

[0009] In a possible implementation, the spacing distance between the first opening area and the second opening area is N1, where N1 is ≥ 1500 μm.

[0010] In a possible implementation, the peripheral area further includes: a bending area between the display area and the electrostatic protection area, and the spacing distance between the orthographic projection of the first opening area on the back plate and the bending area is N2, and N2≥200 μm.

[0011] In another possible implementation, the peripheral area further includes: a fan-out line area and a test circuit area located on a side of the bending area away from the display area, the test circuit area is adjacent to the electrostatic protection area, and the first opening area exposes the test circuit area and the fan-out line area.

[0012] In another possible implementation, the peripheral area further includes: a touch wiring area and an integrated circuit binding area, the touch wiring area is located on both sides of the electrostatic protection area along the first direction, and the integrated circuit binding area is located on the side of the electrostatic protection area away from the display area; the orthographic projection of the non-opening area of ​​the mask on the back panel covers the touch wiring area and the integrated circuit binding area.

[0013] In another possible implementation, the mask includes a first solid material area surrounding the first opening area, a second solid material area surrounding the second opening area, and a half-engraved area outside the first solid material area and the second solid material area; the thickness of the solid material area is greater than the thickness of the half-engraved area.

[0014] In another possible implementation, the thickness of the solid material area is N3, and 100 μm≤N3≤200 μm, and the thickness of the half-engraved area is N4, and 50 μm≤N4≤100 μm.

[0015] In another possible implementation, the mask plate includes a first mask plate, the inorganic encapsulation layer includes a first inorganic encapsulation sublayer, and the inorganic encapsulation layer is formed on a side of the light-emitting device layer away from the back plate based on the mask plate including the first opening area and the second opening area, including:

[0016] Aligning the first mask plate with the back plate;

[0017] The first inorganic encapsulation material is deposited on a side of the light-emitting device layer away from the back plate through the first opening area and the second opening area on the first mask plate to form a first inorganic encapsulation sublayer covering the display area and the electrostatic protection area.

[0018] In another possible implementation, the mask plate includes a second mask plate, the inorganic encapsulation layer includes a second inorganic encapsulation sublayer, and after forming the first inorganic encapsulation sublayer covering the display area and the electrostatic protection area, the method further includes:

[0019] Aligning the second mask plate with the back plate;

[0020] Depositing the second inorganic encapsulation material on the side of the first inorganic encapsulation sublayer away from the backplane through the first opening area and the second opening area on the second mask plate to form a second inorganic encapsulation sublayer covering the display area and the electrostatic protection area;

[0021] The inner diameter of the first opening area of ​​the second mask is larger than the inner diameter of the first opening area of ​​the first mask; the inner diameter of the second opening area of ​​the second mask is larger than the inner diameter of the second opening area of ​​the first mask.

[0022] In another possible implementation, the electrostatic protection zone includes: a metal layer and a passivation layer stacked on the metal layer, and the thickness of the passivation layer is N5 in a direction perpendicular to the backplane.

[0023] According to a second aspect of an embodiment of the present application, a display panel is provided, the display panel comprising:

[0024] A back panel, the back panel includes a display area and a peripheral area, the peripheral area includes an electrostatic protection area, and an electrostatic protection circuit is provided in the electrostatic protection area;

[0025] The light emitting device layer is arranged in the display area of ​​the back panel;

[0026] The inorganic packaging layer is arranged on the side of the light-emitting device layer away from the back plate; the inorganic packaging layer covers the electrostatic protection circuit area and the display area; the inorganic packaging layer covering the display area is spaced apart from the inorganic packaging layer covering the electrostatic protection area.

[0027] According to a third aspect of the present application, a mask is provided, which is used to prepare the display panel of the second aspect of the present application, and the mask includes:

[0028] A first opening area is used to form an inorganic encapsulation layer covering the electrostatic protection circuit area on a side of the light emitting device layer away from the back plate; and

[0029] The second opening area is used to form an inorganic encapsulation layer covering the display area on a side of the light-emitting device layer away from the back plate; the first opening area and the second opening area are arranged at intervals.

[0030] According to a fourth aspect of the present application, a display device is provided, which includes the display panel of the second aspect of the present application.

[0031] The beneficial effects of the technical solution provided by this application are:

[0032] The manufacturing method of the display panel, the display panel, the mask plate and the display device provided by the present application can form an inorganic encapsulation layer on the side of the light-emitting device layer away from the back plate through a mask plate containing a first opening area and a second opening area, wherein the first opening area exposes the electrostatic protection area, and the second opening area exposes at least the display area; the first opening area and the second opening area are arranged at intervals. The embodiment of the present application realizes the targeted encapsulation of the electrostatic protection circuit in the electrostatic protection area, can effectively isolate water vapor based on the inorganic encapsulation layer covering the electrostatic protection circuit, improve the anti-corrosion performance of the electrostatic protection circuit, and enhance the adaptability of the display panel to high temperature and high humidity environments.

[0033] At the same time, since the first opening area and the second opening area are arranged at intervals, the packaging layer avoids the routing area or the bending area between the electrostatic protection circuit area and the display area, which can avoid the influence of the organic packaging layer covering the electrostatic protection circuit on the routing area, and can also avoid the organic packaging layer being bent and causing the film layer to fall off; the present application encapsulates the display panel by adding a mask template in the first opening area, thereby improving the corrosion resistance of the display panel without modifying the mask template, saving material consumption and reducing improvement costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, a brief introduction will be given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0035] Figure 1 A schematic diagram of a process for manufacturing a display panel provided in an embodiment of the present application;

[0036] Figure 2 A schematic diagram of a partial planed surface of a peripheral area of ​​a display panel in a method for manufacturing a display panel provided in an embodiment of the present application;

[0037] Figure 3 A partial cross-sectional schematic diagram corresponding to a display area of ​​a display panel in a method for manufacturing a display panel provided in an embodiment of the present application;

[0038] Figure 4 A partial cross-sectional view of a mask plate and a corresponding display panel in a method for manufacturing a display panel provided in an embodiment of the present application;

[0039] Figure 5 A cross-sectional view of a film layer in an electrostatic protection zone in a method for manufacturing a display panel provided in an embodiment of the present application;

[0040] Figure 6 A partial cross-sectional view of a display panel after being bent in a method for manufacturing a display panel provided in an embodiment of the present application;

[0041] Figure 7 A partial cross-sectional schematic diagram corresponding to a display area of ​​another display panel in a method for manufacturing a display panel provided in an embodiment of the present application;

[0042] Figure 8 A schematic diagram of a partition structure of a peripheral area of ​​a display panel in a method for manufacturing a display panel provided in an embodiment of the present application;

[0043] Fig. 9A partial schematic diagram of a mask in a method for manufacturing a display panel provided in an embodiment of the present application;

[0044] Fig.10 A partial cross-sectional view of a mask in a method for manufacturing a display panel provided in an embodiment of the present application;

[0045] Fig.11 A cross-sectional view of a film layer of another electrostatic protection zone in a method for manufacturing a display panel provided in an embodiment of the present application. DETAILED DESCRIPTION

[0046] Hereinafter, embodiments of the present application will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present application. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessary confusion of the concepts of the present application.

[0047] Various structural schematic diagrams according to embodiments of the present application are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified and some details may be omitted for the purpose of clear expression. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships therebetween are only exemplary, and may deviate in practice due to manufacturing tolerances or technical limitations, and those skilled in the art may further design regions / layers with different shapes, sizes, and relative positions according to actual needs.

[0048] In the context of the present application, when a layer / element is referred to as being "on" another layer / element, the layer / element may be directly on the other layer / element or an intervening layer / element may exist between them. In addition, if a layer / element is "on" another layer / element in one orientation, the layer / element may be "under" the other layer / element when the orientation is reversed.

[0049] In recent years, the development of displays has shown a trend of high integration and low cost. In particular, for products with higher PPI (Pixels Per Inch, the number of pixels per inch diagonal), there are more wiring and vias in the peripheral area, the wiring density is high, and the equipment stability requirements are high.

[0050] The ESD (Electro-Static discharge) circuit in the display panel is a protection circuit used to release static electricity in the display panel to prevent normal circuits from being damaged by static electricity. It can also be used to transmit VGH (Gate High Voltage), VGL (Gate Low Voltage) and Data signals.

[0051] The inventors found that when the display panel operates in a high temperature and high humidity environment, the voltage difference between the VGH, VGL and Data signals is large. When the display device leaks electricity, it will cause electrochemical corrosion to the electrostatic protection circuit, resulting in failure of the display panel with bright lines, film shedding, and black screen.

[0052] Based on the above technical problems, the inventive concept of the present application is: by forming an inorganic encapsulation layer on the side of the light-emitting device layer away from the backplane based on a mask plate containing a first opening area and a second opening area, wherein the first opening area exposes the electrostatic protection area, and the second opening area exposes at least the display area; the first opening area and the second opening area are arranged at intervals. The embodiment of the present application realizes the targeted encapsulation of the electrostatic protection circuit in the electrostatic protection area, and can effectively isolate water vapor based on the inorganic encapsulation layer covering the electrostatic protection circuit, improve the anti-corrosion performance of the electrostatic protection circuit, and enhance the adaptability of the display panel to high temperature and high humidity environments.

[0053] The following is a detailed description of the technical solution of the present application and how the technical solution of the present application solves the above-mentioned technical problems with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described below in conjunction with the accompanying drawings.

[0054] In an embodiment of the present application, a method for manufacturing a display panel is provided. Figure 1 As shown, the method includes:

[0055] S101, providing a back panel, the back panel including a display area and a peripheral area, the peripheral area including an electrostatic protection area, and an electrostatic protection circuit is provided in the electrostatic protection area.

[0056] Among them, Figure 2 FIG. 2 is a partial cross-sectional view of the peripheral area of ​​the display panel. The backplane 202 may include a substrate 201 and a driving circuit layer 210, wherein the driving circuit layer 210 is at least partially located in the peripheral area. The peripheral area includes an electrostatic protection area, and an electrostatic protection circuit 212 is provided in the electrostatic protection area.

[0057] Specifically, a base substrate may be provided, and a driving circuit layer may be formed on one side of the base substrate, wherein the driving circuit layer includes a plurality of pixel driving circuits.

[0058] Optionally, the substrate substrate may be a flexible substrate. The flexible substrate may include, for example, a PET (Polyethyleneterephthalate) substrate, a PEN (Polyethylene naphthalate twoformic acid glycol ester) substrate, or a PI (Polyimide) substrate. In this case, the display panel may be a flexible display panel.

[0059] For another example, the substrate may be a rigid substrate, which may include, for example, a glass substrate, a PMMA (Polymethyl methacrylate) substrate, a silicon substrate, etc. In this case, the display panel may be a rigid display panel.

[0060] It should be noted that the substrate may be a one-layer structure or a multi-layer structure. For example, the substrate may include at least one flexible substrate and at least one buffer layer, and the flexible substrate and the buffer layer are alternately stacked.

[0061] Alternatively, if Figure 3 FIG. 1 is a schematic diagram of a partial cross-section corresponding to a display area of ​​a display panel. The method of forming a driving circuit layer may include:

[0062] An active layer 230, a first gate insulating layer (GI1) 231, a first gate metal layer 232 (Gate1), a second gate insulating layer 233 (GI2), a second gate metal layer 234 (Gate2), an interlayer insulating layer 235 (ILD), a first source-drain metal layer 236 (SD1), a passivation layer 237 (Passivation, PVX), a first flat layer 238 (PLN1), a second source-drain metal layer 239 (SD2) and a second flat layer 240 (PLN2) can be formed in sequence from bottom to top on a layer of the substrate. These functional layers are configured to form transistors, capacitors and a plurality of signal lines for pixel driving in a pixel driving circuit. For example, the plurality of signal lines may include: a power signal line, a data signal line, a reset signal line, a scan signal line, an enable signal line and an initialization signal line, etc. For details, please refer to the relevant technology and will not be described in detail here. It should be noted that, Figure 3 The functional layers of the driving circuit layer shown are for illustration only. In other examples, the driving circuit layer may also include more or fewer functional layers. For example, it may also include more source-drain metal layers such as a third source-drain metal layer (SD3). The specific configuration is based on actual product needs, and this embodiment does not impose any limitation on this.

[0063] For example, the first gate metal layer 232 (Gate1 layer) can be configured to form the gate of each transistor in the pixel driving circuit. In some examples, the first gate metal layer 232 (Gate1) can also be configured to form the first capacitor plate of the capacitor in the pixel driving circuit. For example, the gate pattern of the transistor can be used as the first capacitor plate at the same time, or the first capacitor plate can be set in the first gate metal layer 232 (Gate1). The specific structure is set according to actual needs, and this embodiment does not limit this.

[0064] The second gate metal layer 234 (Gate2) can be configured to form a second capacitor plate of a capacitor in a pixel driving circuit. The first capacitor plate and the second capacitor plate are arranged relative to each other to form a capacitor in the pixel driving circuit. The first source-drain metal layer 236 (SD1) is configured to form the first and second electrodes, i.e., the source and drain electrodes, of each transistor in the pixel driving circuit. The second source-drain metal layer 239 (SD2) can be configured to form an anode 251 connection portion, a power signal line, a data signal line, etc. The anode 251 connection portion is configured to connect the pixel driving circuit with the anode 251 of the corresponding light-emitting device 250.

[0065] S102, forming a light-emitting device layer in the display area of ​​the back panel.

[0066] The light-emitting device layer may include a plurality of light-emitting devices, and each light-emitting device is connected to a pixel driving circuit of a driving circuit layer.

[0067] like Figure 2 As shown, the light emitting device layer 220 is also partially located in the peripheral area.

[0068] Optionally, the display area may include: a plurality of pixels distributed in an array, each pixel including a plurality of sub-pixels, each sub-pixel may display a single color, such as a red sub-pixel displays red, a green sub-pixel displays green, and a blue sub-pixel displays blue. The brightness (grayscale) of sub-pixels of different colors in each pixel may be adjusted, and multiple colors may be displayed through color combination and superposition, thereby realizing full-color display of the display panel.

[0069] Each sub-pixel may include a light-emitting device and a pixel driving circuit for driving the light-emitting device. For example, the light-emitting device may be an organic light-emitting diode, a micro organic light-emitting diode (Micro Organic Light-Emitting Diode, Micro OLED), a quantum dot organic light-emitting diode (Quantum Dot Light Emitting Diodes, QLED), etc. For example, a red sub-pixel may include a light-emitting device for emitting red light, a green sub-pixel may include a light-emitting device for emitting green light, and a blue sub-pixel may include a light-emitting device for emitting red light.

[0070] Optionally, the pixel driving circuit may include electronic components such as multiple transistors and capacitors. For example, each pixel driving circuit may include three transistors and one capacitor, forming a 3T1C (i.e., a driving transistor, two switching transistors and one capacitor). It may also include more than three transistors and at least one capacitor, such as a 4T1C (i.e., a driving transistor, three switching transistors and one capacitor), a 5T1C (i.e., a driving transistor, four switching transistors and one capacitor) or a 7T1C (i.e., a driving transistor, six switching transistors and one capacitor), etc. Among them, the transistor may be a thin film transistor (Thin Film Transistor, referred to as TFT), a field effect transistor (metal oxide semiconductor, referred to as MOS) or other switching devices with the same characteristics.

[0071] It can be understood that the transistor may include a control electrode, a first electrode, and a second electrode. The control electrode is the gate of the transistor, the first electrode is one of the source and drain of the transistor, and the second electrode is the other of the source and drain of the transistor. Since the source and drain of the transistor may be symmetrical in structure, the source and drain may be structurally indistinguishable, so the source of the transistor is called the first electrode, and may also be called the second electrode.

[0072] like Figure 3 As shown, the display area may include: a driving circuit layer and a light-emitting device layer sequentially stacked on one side of the base substrate 201. The driving circuit layer is configured to form a plurality of pixel driving circuits distributed in an array at least in a first direction and a second direction. The light-emitting device layer is configured to form a light-emitting device 250 for each sub-pixel. The light-emitting device layer and the driving circuit layer together constitute a plurality of pixels arranged on the base substrate 201.

[0073] Optionally, the method of forming a light emitting device layer may include:

[0074] A pixel defining layer 241 and a plurality of light emitting devices 250 are sequentially formed on a layer of the driving circuit layer away from the base substrate. The pixel defining layer 241 has a plurality of pixel openings, and each pixel opening defines the position of one light emitting device 250.

[0075] For example, taking the OLED light-emitting device 250 as an example, along the direction away from the base substrate 201, the light-emitting device 250 may include an anode 251, an organic light-emitting functional layer 252, and a cathode 253 which are sequentially stacked. The organic light-emitting functional layer 252 includes a light-emitting material layer. Of course, in addition to the light-emitting material layer, the organic light-emitting functional layer 252 may also include one or more of a hole injection layer, a hole transport layer, an electron blocking layer, an electron injection layer, an electron transport layer, and a hole blocking layer, which are specifically arranged according to actual needs, and this embodiment does not limit this.

[0076] For example, the structure of the anode 251 can be a composite structure composed of a transparent conductive oxide film / metal film / transparent conductive oxide film stacked in sequence. The material of the transparent conductive oxide film is, for example, any one of ITO (Indiumtin oxide) and IZO (Indium zinc oxide), and the material of the metal film is, for example, any one of gold (Au), silver (Ag), nickel (Ni) and platinum (Pt). For another example, the structure of the anode 251 can also be a single-layer structure, and the material of the single-layer structure can be any one of ITO, IZO, Au, Ag, Ni, and Pt.

[0077] Each pixel opening exposes a portion of the anode 251 of the corresponding light-emitting device 250 , and at least a portion of the organic light-emitting functional layer 252 is located in the corresponding pixel opening and is electrically connected to the corresponding anode 251 .

[0078] For example, the cathodes 253 of the light emitting devices 250 may be electrically connected to each other to form an integrated structure. For example, the material of the cathode 253 may be any one of aluminum (Al), silver (Ag) and magnesium (Mg), or any one of magnesium-silver alloy and aluminum-lithium alloy.

[0079] For example, the light emitting device layer may further include a PS layer (Photo Spacer), and the PS layer may be disposed on the pixel defining layer 241 .

[0080] In the embodiment of the present application, a thin film encapsulation layer may be formed on a layer of the light emitting device layer away from the substrate substrate. The thin film encapsulation layer may include an organic encapsulation layer and an inorganic encapsulation layer. Optionally, the thin film encapsulation layer 260 may include a first inorganic encapsulation sublayer 261, an organic encapsulation layer 262, and a second inorganic encapsulation sublayer 263 that are stacked. For example, the first inorganic encapsulation sublayer 261 and the second inorganic encapsulation sublayer 263 may be made of an inorganic insulating material such as nitride, oxide, oxynitride, nitrate, carbide, or any combination thereof. The organic encapsulation layer 262 may be made of an organic insulating material such as acrylic, hexamethyldisiloxane, polyacrylate, polycarbonate, polystyrene, etc.

[0081] Specifically, the organic encapsulation layer may be coated on the side of the first inorganic encapsulation sublayer away from the base substrate by inkjet printing; wherein the encapsulation step of the inorganic encapsulation layer will be described in detail below.

[0082] S103, forming an inorganic encapsulation layer on a side of the light-emitting device layer away from the back plate based on a mask plate having a first opening area and a second opening area.

[0083] Specifically, based on a mask having a first opening area and a second opening area, inorganic material can be deposited on a side of the light-emitting device layer away from the back plate to form an inorganic encapsulation layer.

[0084] The first opening area exposes the electrostatic protection area, and the second opening area exposes at least the display area; the first opening area and the second opening area are arranged at intervals. The first opening area can be square or circular, or other shapes, which are not specifically limited in the embodiments of the present application.

[0085] like Figure 4 As shown in FIG. 1 , it is a partial cross-sectional view of a mask plate and a corresponding display panel. A whole large-size mask plate corresponds to a display motherboard, which can be divided into multiple display panels, and each display panel corresponds to at least two openings of the mask plate. The second opening area 271 of the mask plate 270 corresponds to the exposed display area, and the first opening area 272 corresponds to the electrostatic protection circuit 212 exposed in the electrostatic protection area. In other words, the encapsulation layer of the display panel includes a thin film encapsulation layer 260 covering the display area, and a target encapsulation layer 265 covering the electrostatic protection area.

[0086] Optionally, the electrostatic protection zone includes an electrical test pin anti-static unit, a row scanning circuit signal anti-static unit, and a data line anti-static unit. The ESD circuit transmits VGH & VGL signals through the SD line, and transmits the Data signal given by the IC through the Gate (scan line selection signal) line and the SD line. Figure 5 As shown, it is a cross-sectional view of the film layer of the electrostatic protection zone. A TLD (touch inter layer dielectric) layer 2801 and a TOC (touch-control organic) layer 2802 are arranged above the target packaging layer; the main water-blocking layer of the entire electrostatic protection zone includes a PVX layer 237, a target packaging layer 265, and the TLD layer 2801 on the upper side.

[0087] Optionally, the display panel having a COE (Color Filter On Encapsulation, the color filter is located on the encapsulation layer) structure may further include a color filter layer. The color filter layer may be formed on the side of the thin film encapsulation layer 260 away from the base substrate 201. For example, the color filter layer may include a plurality of color filter units. Each color filter unit corresponds to at least one sub-pixel setting, for example, a red sub-pixel corresponds to a red color filter unit, a green sub-pixel corresponds to a green color filter unit, and a blue sub-pixel corresponds to a blue color filter unit.

[0088] It should be noted that, in some examples, the color filter layer can also be provided independently of the display panel by preparing the color filter layer on another opposite substrate and then bonding the opposite substrate to the display panel. This embodiment does not limit this.

[0089] like Figure 6 As shown, Figure 2 A partial cross-sectional view of the display panel after bending. After an inorganic encapsulation layer is formed on the side of the light-emitting device layer 220 away from the backplane, a touch layer 280 can be formed on the side of the inorganic encapsulation layer away from the backplane 202 based on the FMLOC (Flexible Multi-Layer On Cell) process. Then, a polarizer (POL) layer 281, an optical adhesive (OCA) layer 282 and a cover glass (CG) 283 are formed in sequence on the side of the touch layer away from the backplane. Then, an MCL (Metal Cover Layer) adhesive layer 284 is set in the bending area to protect the bending area. Finally, based on the bending area, the peripheral area of ​​the display panel is bent to the opposite side of the light-emitting surface of the display area to form Figure 6 The bent display panel is shown. Figure 6 As shown, the side of the back plate 202 away from the light-emitting surface may also include a protective film 287, a heat dissipation film 285, a support pad 286, etc.

[0090] The embodiment of the present application forms an inorganic encapsulation layer on the side of the light-emitting device layer away from the backplane through a mask having a first opening area and a second opening area, wherein the first opening area exposes the electrostatic protection area, and the second opening area exposes at least the display area; the first opening area and the second opening area are arranged at intervals. The embodiment of the present application realizes targeted encapsulation of the electrostatic protection circuit in the electrostatic protection area, can effectively isolate water vapor based on the inorganic encapsulation layer covering the electrostatic protection circuit, improve the anti-corrosion performance of the electrostatic protection circuit, and enhance the adaptability of the display panel to high temperature and high humidity environments.

[0091] A possible implementation method is provided in an embodiment of the present application, where the spacing distance between the first opening area and the second opening area may be N1, where N1 ≥ 1500 μm.

[0092] In the embodiment of the present application, since the first opening area and the second opening area are arranged at intervals, the packaging layer can avoid the routing area or the bending area between the electrostatic protection circuit area and the display area, thereby avoiding the influence of the organic packaging layer covering the electrostatic protection circuit on the routing area, and avoiding the organic packaging layer being bent and causing the film layer to fall off; the present application encapsulates the display panel by adding a mask template with a new first opening area, thereby improving the corrosion resistance of the display panel without modifying the mask template, saving material consumption and reducing improvement costs.

[0093] A possible implementation method is provided in an embodiment of the present application, wherein the peripheral area further includes: a bending area between the display area and the electrostatic protection area, and the spacing distance between the orthographic projection of the first opening area on the back panel and the bending area is N2, and N2 ≥ 200 μm.

[0094] like Figure 2 As shown, the bending area is located between the display area and the electrostatic protection area. Due to the limitation of the wiring space in the peripheral area, the electrostatic protection area is close to the bending area. The inorganic layer is easy to crack when it is bent, causing it to fall off the backplane, and causing a large number of particle impurities, etc., which has a significant adverse effect on the subsequent touch structure process and equipment chamber of the TSP (Touch Sensor Panel). In order to avoid the above situation, a certain spacing distance is set between the orthographic projection of the first opening area on the backplane and the bending area to ensure the stability and reliability of the inorganic encapsulation layer.

[0095] A possible implementation method is provided in an embodiment of the present application, wherein the peripheral area further includes: a fan-out line area and a test circuit area located on a side of the bending area away from the display area, the test circuit area is adjacent to the electrostatic protection area, and the first opening area exposes the test circuit area and the fan-out line area.

[0096] like Figure 7 As shown, on the side of the bending area away from the display area, i.e., the lower PAD (pad) area, the first fan-out area, the electrostatic protection area, the test circuit area and the second fan-out area are sequentially arranged, wherein the first fan-out area and the second fan-out area correspond to the first Fanout line 211 and the second Fanout line 214 respectively, and the test circuit area corresponds to the test circuit 213; a target inorganic packaging layer 266 covering the above-mentioned first fan-out area, the electrostatic protection area, the test circuit area and the second fan-out area can be formed based on the first opening deposition, which can enhance the corrosion resistance of the lower PAD area without affecting the original circuit performance, thereby effectively increasing the yield of the display panel.

[0097] For example, Figure 7 As shown, on the side of the second fan-out area away from the bending area, an IC circuit 215 and an FPC (Flexible Printed Circuit) circuit 216 are provided. In the embodiment of the present application, after the inorganic packaging layer is formed on the side of the light-emitting device layer away from the backplane, the base film on the display panel can be bound to the IC circuit 215 based on the COP (Chip On Pi) binding process, and then the FPC circuits 216 corresponding to each IC circuit 215 are sequentially bound to the base film based on the FOP (FPC On COP) binding process to achieve electrical connection inside the display panel.

[0098] A possible implementation method is provided in an embodiment of the present application, and the above-mentioned peripheral area also includes: a touch routing area and an integrated circuit binding area, the touch routing area is located on both sides of the electrostatic protection area along the first direction, and the integrated circuit binding area is located on the side of the electrostatic protection area away from the display area; the orthographic projection of the non-opening area of ​​the mask plate on the back plate covers the touch routing area and the integrated circuit binding area.

[0099] like Figure 8 As shown, it is a schematic diagram of the partition structure of the peripheral area of ​​the display panel. The first direction runs through the electrostatic protection area 82, the test circuit area 83, the integrated circuit binding area 84 and the flexible circuit board binding area 85. The touch wiring area 81 is located on both sides of the electrostatic protection area 82; wherein, the touch wiring area 81 may include the Tx&Rx (transmit and receive) wiring of the TSP process, and the integrated circuit binding area 84 includes the IC (integrated circuit) and the electrical test needle. If an additional water-blocking layer is added to the touch wiring area 81, it will affect the exposure of the Tx&Rx wiring, so the opening of the mask needs to avoid this area; and the integrated circuit binding area 84 usually has IC and electrical test needles, and IC binding and other processes are required to realize the signal transmission of the display panel, so the opening of the mask also needs to avoid this area.

[0100] In the embodiment of the present application, the above-mentioned touch wiring area 81 and the integrated circuit binding area 84 are covered by the orthographic projection of the non-opening area of ​​the mask plate on the backplane. When the inorganic material is deposited based on the mask plate, the inorganic material will avoid the above-mentioned two areas, thereby avoiding the impact on subsequent TSP processes and IC binding processes, and effectively enhancing the effectiveness and accuracy of inorganic packaging.

[0101] A possible implementation method is provided in an embodiment of the present application, wherein the mask plate includes a first solid material area surrounding a first opening area, a second solid material area surrounding a second opening area, and a half-engraved area outside the first solid material area and the second solid material area; the thickness of the solid material area is greater than the thickness of the half-engraved area.

[0102] like Fig. 9 As shown in FIG. 1 , it is a partial schematic diagram of a mask template, which is usually symmetrical in shape, or symmetrical in shape, to facilitate the stability of the mask template. Fig.10 As shown, Fig. 9 The mask template shown is a partial cross-sectional view along the Y-axis direction. The mask template opening can be fully half-engraved around to form a convex structure: the first solid material area 94 is arranged around the first opening area 95, the second solid material area 92 is arranged around the second opening area 91, and the non-opening area outside the first solid material area and the second solid material area is the half-engraved area 93.

[0103] In an embodiment of the present application, the mask plate corresponds to a motherboard of a display panel, which includes multiple backboards, each of which can correspond to two opening areas. The metal thickness of the solid material area can be the thickness of a conventional mask plate, and the amount of metal in the half-engraved area is less than that in the solid material area, which can effectively reduce the weight of the mask plate itself and reduce the sagging amount of the mask plate, thereby avoiding the shadow effect of the mask plate.

[0104] A possible implementation method is provided in an embodiment of the present application, where the thickness of the solid material area is N3, and 100 μm≤N3≤200 μm, and the thickness of the half-engraved area is N4, and 50 μm≤N4≤100 μm.

[0105] In the embodiment of the present application, the solid material area is located around the opening area, which can play a good supporting role and prevent the mask from sagging. Due to the reduction in the amount of metal in the half-engraved area, the weight of the mask itself is reduced, which further reduces the sagging of the mask and prevents the shadow effect during packaging. The stability and accuracy of the inorganic packaging layer are further enhanced, and the yield rate of the display panel is improved.

[0106] A possible implementation method is provided in an embodiment of the present application. The mask plate includes a first mask plate, and the inorganic encapsulation layer includes a first inorganic encapsulation sublayer.

[0107] Based on a mask having a first opening area and a second opening area, an inorganic encapsulation layer is formed on a side of the light-emitting device layer away from the back plate, comprising:

[0108] S201, aligning the first mask plate and the back plate.

[0109] S202, depositing a first inorganic encapsulation material on a side of the light-emitting device layer away from the back plate through a first opening area and a second opening area on the first mask plate to form a first inorganic encapsulation sublayer covering the display area and the electrostatic protection area.

[0110] A possible implementation method is provided in an embodiment of the present application, where the mask plate includes a second mask plate, and the inorganic encapsulation layer includes a second inorganic encapsulation sublayer.

[0111] After forming a first inorganic encapsulation sublayer covering the display area and the electrostatic protection area, the method further includes:

[0112] S301, aligning the second mask plate and the back plate.

[0113] S302, depositing a second inorganic encapsulation material on a side of the first inorganic encapsulation sublayer away from the backplane through the first opening area and the second opening area on the second mask plate to form a second inorganic encapsulation sublayer covering the display area and the electrostatic protection area.

[0114] The inner diameter of the first opening area of ​​the second mask is larger than the inner diameter of the first opening area of ​​the first mask; the inner diameter of the second opening area of ​​the second mask is larger than the inner diameter of the second opening area of ​​the first mask.

[0115] like Figure 4 As shown, when the first mask plate is aligned with the back plate, the second opening area 271 corresponds to the display area of ​​the display panel, and the first opening area 272 corresponds to the electrostatic protection area. The electrostatic protection area is provided with an electrostatic protection circuit 212, and inorganic materials can be deposited through the opening to form a target encapsulation layer 265 covering the electrostatic protection circuit 212 and a thin film encapsulation layer 260 covering the display area.

[0116] In some embodiments, Figure 3 As shown, after forming the first inorganic encapsulation sublayer 261, an organic encapsulation layer 262 can be formed on a layer of the first inorganic encapsulation sublayer 261 away from the backplane based on an inkjet printing process; then the second mask plate is aligned with the backplane, and the second inorganic encapsulation material is deposited on the side of the organic encapsulation sublayer away from the backplane through the first opening area and the second opening area on the second mask plate, so as to form a second inorganic encapsulation sublayer 263 covering the display area and the electrostatic protection area; wherein, on the side of the bending area away from the electrostatic protection area, there is also a retaining wall (Dam) 264 formed by accumulation of organic materials, and Dam serves as a barrier layer for the inkjet-printed organic layer in TFE (Thin Film Encapsulation), and is composed of several organic layers, and the width of the lower organic layer in each organic layer is greater than the width of the upper organic layer.

[0117] In the embodiment of the present application, the openings of the first mask plate and the second mask plate corresponding to the display area and the electrostatic protection area can be rectangular, square, fan-shaped or other anisotropy, which is not specifically limited in the embodiment of the present application. The opening sizes of the first mask plate and the second mask plate can be completely consistent, or the opening of the second mask plate is slightly larger than the first mask plate, that is, the inner diameter of the first opening area of ​​the second mask plate is larger than the inner diameter of the first opening area of ​​the first mask plate; the inner diameter of the second opening area of ​​the second mask plate is larger than the inner diameter of the second opening area of ​​the first mask plate. The above-mentioned two-layer mask plate opening inconsistency scheme can extend the invasion path of water vapor. The non-opening area of ​​the mask plate is blocked by Invar (invar steel) material, and the gas-phase inorganic layer is uniformly deposited on the lower light-emitting device layer away from the backplane through the first opening area and the second opening area, which plays an anti-corrosion role on the display area and the electrostatic protection circuit, thereby reducing the occurrence of film layer shedding, two points, black screen and other faults of the display panel product, and improving the yield and stability of the product.

[0118] A possible implementation method is provided in an embodiment of the present application. The electrostatic protection zone includes: a metal layer and a passivation layer stacked on the metal layer. The thickness of the passivation layer is N5 in a direction perpendicular to the backplane.

[0119] In the embodiment of the present application, the electrostatic protection zone includes an electrical test pin anti-static unit, a row scanning circuit signal anti-static unit and a data line anti-static unit. The ESD circuit transmits VGH & VGL signals through the SD line, and transmits the data signal given by the IC through the Gate line and the SD line. The film layer cross-section of the ESD area is shown in FIG. Fig.11 As shown in the figure, the main water-blocking layer of the entire electrostatic protection zone includes a PVX layer 237 (thickness to ) and the upper TLD layer 2801 (thickness is about).

[0120] Without affecting the subsequent TSP exposure and MDL (module, module) assembly process, the embodiment of the present application can thicken the SiNX film material of the original inorganic water-blocking layer PVX layer 237 in the electrostatic protection area or the entire backplane area, and the thickness of the SiNX film can be increased by conventional Increase to around The above does not require any additional process flow, and the mask template does not need to be changed. It has low cost, quick results, and the shortest schedule. When forming the passivation layer, the exposure amount and other exposure parameters of the PVX mask can be adjusted to enhance the ESD circuit corrosion resistance, thereby reducing the occurrence of film peeling, bright lines, black screens and other faults in display panel products. This solution will not affect the client's assembly of the entire machine.

[0121] An embodiment of the present application provides a display panel, which includes:

[0122] The back panel 202 includes a display area and a peripheral area. The peripheral area includes an electrostatic protection area. An electrostatic protection circuit 212 is provided in the electrostatic protection area.

[0123] The light emitting device layer 220 is arranged in the display area of ​​the back panel;

[0124] The light emitting device layer 220 may also be partially disposed in the peripheral area.

[0125] The inorganic packaging layer is arranged on the side of the light-emitting device layer away from the back panel; the inorganic packaging layer covers the electrostatic protection circuit area and the display area; wherein the inorganic packaging layer includes a target packaging layer 265 covering the electrostatic protection area, and a first inorganic packaging sublayer 261 and a second inorganic packaging sublayer 263 covering the display area.

[0126] Optionally, the inorganic encapsulation layer covering the display area is spaced apart from the inorganic encapsulation layer covering the electrostatic protection area.

[0127] Specifically, the inorganic encapsulation layer may be formed by deposition based on a mask plate containing a first opening area and a second opening area; wherein the first opening area exposes the electrostatic protection area, and the second opening area exposes at least the display area; and the first opening area and the second opening area are spaced apart.

[0128] The embodiment of the present application realizes the targeted packaging of the electrostatic protection circuit in the electrostatic protection zone, can effectively isolate water vapor based on the inorganic packaging layer covering the electrostatic protection circuit, improve the anti-corrosion performance of the electrostatic protection circuit, and enhance the adaptability of the display panel to high temperature and high humidity environments. At the same time, since the inorganic packaging layer covering the display area and the inorganic packaging layer covering the electrostatic protection zone are arranged at intervals, the packaging layer can avoid the routing area or bending area between the electrostatic protection circuit area and the display area, and can avoid the influence of the organic packaging layer covering the electrostatic protection circuit on the routing area, and can also avoid the organic packaging layer from being bent and causing the film layer to fall off; the present application packages the display panel by adding a mask template in the first opening area, and improves the anti-corrosion ability of the display panel without modifying the mask template, saving material consumption and reducing improvement costs.

[0129] The present application embodiment provides a mask plate, which is used to prepare the display panel of the second aspect of the present application, and the mask plate includes:

[0130] A first opening area is used to form an inorganic encapsulation layer covering the electrostatic protection circuit area on a side of the light emitting device layer away from the back plate; and

[0131] The second opening area is used to form an inorganic encapsulation layer covering the display area on a side of the light-emitting device layer away from the back plate; the first opening area and the second opening area are arranged at intervals.

[0132] like Figure 4 As shown in FIG. 1 , it is a partial cross-sectional view of a mask plate and a corresponding display panel. A whole large-size mask plate corresponds to a display motherboard, which can be divided into multiple display panels, and each display panel corresponds to at least two openings of the mask plate. The second opening area 271 of the mask plate 270 corresponds to the exposed display area, and the first opening area 272 corresponds to the electrostatic protection circuit 212 exposed in the electrostatic protection area. In other words, the encapsulation layer of the display panel includes a thin film encapsulation layer 260 covering the display area, and a target encapsulation layer 265 covering the electrostatic protection area.

[0133] The embodiment of the present application forms an inorganic encapsulation layer on the side of the light-emitting device layer away from the backplane through a mask having a first opening area and a second opening area, wherein the first opening area exposes the electrostatic protection area, and the second opening area exposes at least the display area; the first opening area and the second opening area are arranged at intervals. The embodiment of the present application realizes targeted encapsulation of the electrostatic protection circuit in the electrostatic protection area, can effectively isolate water vapor based on the inorganic encapsulation layer covering the electrostatic protection circuit, improve the anti-corrosion performance of the electrostatic protection circuit, and enhance the adaptability of the display panel to high temperature and high humidity environments.

[0134] At the same time, since the first opening area and the second opening area are arranged at intervals, the packaging layer avoids the routing area or the bending area between the electrostatic protection circuit area and the display area, which can avoid the influence of the organic packaging layer covering the electrostatic protection circuit on the routing area, and can also avoid the organic packaging layer being bent and causing the film layer to fall off; the present application encapsulates the display panel by adding a mask template in the first opening area, thereby improving the corrosion resistance of the display panel without modifying the mask template, saving material consumption and reducing improvement costs.

[0135] A display device is also provided in an embodiment of the present application. The display device includes the above-mentioned display panel in the embodiment of the present application.

[0136] In an embodiment of the present application, a device for manufacturing a display panel is provided, including a memory, a processor, and a computer program stored in the memory, and the processor executes the above computer program to implement the steps of the method for manufacturing a display panel. Compared with the related art, the following can be achieved: In an embodiment of the present application, an inorganic encapsulation layer is formed on the side of the light-emitting device layer away from the backplane through a mask plate containing a first opening area and a second opening area, wherein the first opening area exposes the electrostatic protection area, and the second opening area exposes at least the display area; the first opening area and the second opening area are arranged at intervals. In an embodiment of the present application, targeted encapsulation of the electrostatic protection circuit in the electrostatic protection area can be achieved, and water vapor can be effectively isolated based on the inorganic encapsulation layer covering the electrostatic protection circuit, thereby improving the anti-corrosion performance of the electrostatic protection circuit and enhancing the adaptability of the display panel to high temperature and high humidity environments.

[0137] At the same time, since the first opening area and the second opening area are arranged at intervals, the packaging layer avoids the routing area or the bending area between the electrostatic protection circuit area and the display area, which can avoid the influence of the organic packaging layer covering the electrostatic protection circuit on the routing area, and can also avoid the organic packaging layer being bent and causing the film layer to fall off; the present application encapsulates the display panel by adding a mask template in the first opening area, thereby improving the corrosion resistance of the display panel without modifying the mask template, saving material consumption and reducing improvement costs.

[0138] In the above description, the technical details such as the patterning of each layer are not described in detail. However, those skilled in the art should understand that various technical means can be used to form layers, regions, etc. of desired shapes. In addition, in order to form the same structure, those skilled in the art can also design methods that are not completely the same as the methods described above. In addition, although the various embodiments are described above separately, this does not mean that the measures in the various embodiments cannot be used in combination to advantage.

[0139] Although the preferred embodiments of the present application have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present application.

[0140] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

Claims

1. A method for manufacturing a display panel, characterized in that: The method comprises: Providing a backplane, the backplane comprising a display area and a peripheral area, the peripheral area comprising an electrostatic protection area, and an electrostatic protection circuit is provided in the electrostatic protection area; forming a light emitting device layer in the display area of ​​the backplane; Based on a mask plate containing a first opening area and a second opening area, an inorganic encapsulation layer is formed on a side of the light-emitting device layer away from the backplane; wherein the first opening area exposes the electrostatic protection area, and the second opening area exposes at least the display area; the first opening area and the second opening area are spaced apart.

2. The method according to claim 1, characterized in that The spacing distance between the first opening area and the second opening area is N1, and N1 is greater than or equal to 1500 μm.

3. The method according to claim 1, characterized in that The peripheral area further includes: a bending area between the display area and the electrostatic protection area, and the spacing distance between the orthographic projection of the first opening area on the back plate and the bending area is N2, and N2≥200 μm.

4. The method according to claim 1, characterized in that The peripheral area further includes: a fan-out line area and a test circuit area located on a side of the bending area away from the display area. The test circuit area is adjacent to the electrostatic protection area. The first opening area exposes the test circuit area and the fan-out line area.

5. The method according to claim 1, characterized in that The peripheral area also includes: a touch wiring area and an integrated circuit binding area, the touch wiring area is located on both sides of the electrostatic protection area along the first direction, and the integrated circuit binding area is located on the side of the electrostatic protection area away from the display area; the orthographic projection of the non-opening area of ​​the mask on the back plate covers the touch wiring area and the integrated circuit binding area.

6. The method according to claim 1, characterized in that The mask plate includes a first solid material area surrounding the first opening area, a second solid material area surrounding the second opening area, and a half-engraved area outside the first solid material area and the second solid material area; the thickness of the solid material area is greater than the thickness of the half-engraved area.

7. The method according to claim 1, characterized in that The thickness of the solid material area is N3, and 100 μm≤N3≤200 μm; the thickness of the half-engraved area is N4, and 50 μm≤N4≤100 μm.

8. The method according to claim 1, characterized in that The mask plate includes a first mask plate, the inorganic encapsulation layer includes a first inorganic encapsulation sublayer, and the inorganic encapsulation layer is formed on a side of the light-emitting device layer away from the back plate based on the mask plate having the first opening area and the second opening area, including: Aligning the first mask plate with the back plate; A first inorganic encapsulation material is deposited on a side of the light-emitting device layer away from the backplane through a first opening area and a second opening area on the first mask plate to form a first inorganic encapsulation sublayer covering the display area and the electrostatic protection area.

9. The method according to claim 8, characterized in that The mask plate includes a second mask plate, the inorganic encapsulation layer includes a second inorganic encapsulation sublayer, and after forming the first inorganic encapsulation sublayer covering the display area and the electrostatic protection area, the method further includes: Aligning the second mask plate with the back plate; Depositing a second inorganic encapsulation material on a side of the first inorganic encapsulation sublayer away from the backplane through the first opening area and the second opening area on the second mask plate to form a second inorganic encapsulation sublayer covering the display area and the electrostatic protection area; The inner diameter of the first opening area of ​​the second mask plate is larger than the inner diameter of the first opening area of ​​the first mask plate; the inner diameter of the second opening area of ​​the second mask plate is larger than the inner diameter of the second opening area of ​​the first mask plate.

10. The method according to claim 1, characterized in that The electrostatic protection zone includes: a metal layer and a passivation layer stacked on the metal layer, and the thickness of the passivation layer is N5 in a direction perpendicular to the backplane.

11. A display panel, characterized in that: The display panel comprises: A back plate, the back plate comprising a display area and a peripheral area, the peripheral area comprising an electrostatic protection area, and an electrostatic protection circuit is provided in the electrostatic protection area; A light emitting device layer, arranged in the display area of ​​the back panel; The inorganic packaging layer is arranged on the side of the light-emitting device layer away from the back plate; the inorganic packaging layer covers the electrostatic protection circuit area and the display area; the inorganic packaging layer covering the display area is spaced apart from the inorganic packaging layer covering the electrostatic protection area.

12. A mask, characterized in that: Applicable to preparing the display panel according to claim 11, the mask plate comprises: A first opening region is used to form an inorganic encapsulation layer covering the electrostatic protection circuit region on a side of the light-emitting device layer away from the back plate; and The second opening area is used to form an inorganic encapsulation layer covering the display area on a side of the light-emitting device layer away from the back plate; the first opening area is spaced apart from the second opening area. 13 . A display device, comprising the display panel according to claim 11 .

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