Multi-core heterogeneous SOC STR function implementation method and electronic equipment

Abstract

The invention discloses a multi-core heterogeneous SOC STR function implementation method and electronic equipment, a virtualization front end in a multi-core heterogeneous SOC supports a sleep mode, a virtualization rear end does not support the sleep mode, and the method comprises the following steps: when entering the sleep mode, stopping the current operation of the virtualization front end, and stopping the current operation of the virtualization rear end; executing the following steps on the virtualized back-end application: notifying the application needing to store data to stop the current operation, and storing the state when entering the sleep mode; performing backup storage on data needing to be stored by the application; in the process of executing the sleep mode, storing the states of operating systems of the virtualized front end and the virtualized rear end; when the virtual back end is recovered from the sleep mode, executing the following steps on the virtual back end: if the current state needs to be recovered from the sleep mode, recovering the backup stored data to the original position, so that the current state of the virtual back end is recovered to the state before the virtual back end enters the sleep mode; and recovering all operations of the virtualized front end. The method can ensure service continuity and data consistency.

Description

Technical Field

[0001] The present application relates to the field of multi-core heterogeneous system-on-chip, and in particular to a multi-core heterogeneous SOC STR function implementation method and electronic device. Background Art

[0002] With the growing demand for energy saving in electronic devices, "Suspend to RAM" (STR) or "sleep mode" has become a widely used energy-saving technology in computing devices. In the STR state, the system saves the current running state to the memory and shuts down most of the hardware to reduce energy consumption; when awakened, the system quickly returns to the state before sleep. However, in a multi-core heterogeneous SOC architecture, different processing domains run operating systems that support or do not support STR functions. For example, the AP domain runs an OS (Operating System) that supports full STR functions, such as Android or Yocto, while the R5 domain uses lightweight kernels such as FreeRTOS (Free Real-Time Operating System) or LK (Little Kernel) that do not have STR support capabilities.

[0003] When cross-domain collaboration is involved, such as EMMC (Embedded Multi-Media Card) storage control, it is particularly important to ensure the consistency of the front-end and back-end functions of virtualization after STR wakeup. If the virtualization front-end runs on a domain that supports STR, and the virtualization back-end runs on a domain that does not support STR, it may cause state synchronization problems, affecting service continuity and data consistency. Summary of the invention

[0004] The purpose of the embodiments of the present application is to provide a multi-core heterogeneous SOC STR function implementation method and electronic device, which can ensure the consistency of virtualization front-end and back-end functions after STR wake-up.

[0005] In order to achieve the above-mentioned purpose, an embodiment of the present application provides a method for realizing the STR function of a multi-core heterogeneous SOC, which is applied to a multi-core heterogeneous SOC having a virtualized front end and a virtualized back end, wherein the operating system of the virtualized front end supports the sleep mode, and the operating system of the virtualized back end does not support the sleep mode, and the method includes: When entering sleep mode, the current operation of the virtualization front-end is stopped, and the following steps are performed on the application of the virtualization back-end: Notify the application that needs to save data to stop the current operation and save the state when entering the sleep mode; Backing up and saving the data that the application needs to save; During the execution of the sleep mode, the states of the operating system at the virtualization front end and the operating system at the virtualization back end are both saved; When resuming from hibernation mode, the following steps are performed on the virtualization backend: If it is determined that the current state needs to be restored from the sleep mode, the backup saved data is restored to the original location, so that the current state of the virtualization backend is restored to the state before entering the sleep mode; Resume all operations of the virtualization front-end.

[0006] Optionally, when backing up the data that the application needs to save, a backup area is set outside the operating system. The backup area will not be initialized by the operating system when the system is restarted, and the data that the application needs to save is saved in the backup area.

[0007] Optionally, before resuming from the sleep mode, a flag bit is set, and it is determined whether the current state needs to be resumed from the sleep mode according to the flag bit.

[0008] Optionally, when it is determined according to the identification bit that recovery from the sleep mode is required, the data stored in the backup area is restored to the original position.

[0009] Optionally, when it is determined according to the flag that there is no need to resume from the sleep mode, the data that the application needs to save is initialized, so that the operating system of the virtualization backend executes an initialization process.

[0010] Optionally, after restoring all operations of the virtualized front end, a synchronization mechanism is further included to ensure that data between the virtualized front end and the virtualized back end remain consistent.

[0011] Optionally, the synchronization mechanism adopts one of real-time status update, database synchronization and API call.

[0012] An embodiment of the present application further provides an electronic device, which includes a processor and a memory, wherein an executable program is stored in the memory, and the processor executes the executable program to perform the steps of the method described above. An embodiment of the present application further provides a storage medium, which carries one or more computer programs. When the one or more computer programs are executed by a processor, the steps of the method described above are implemented.

[0013] An embodiment of the present application also provides a chip, which uses a multi-core heterogeneous SOC with a virtualized front end and a virtualized back end. The multi-core heterogeneous SOC uses the method as described above to restore the current state of the virtualized back end to the state before entering the sleep mode, so as to ensure that the state of the virtualized back end in the multi-core heterogeneous SOC is consistent with the state of the virtualized front end after the sleep mode is restored.

[0014] The multi-core heterogeneous SOC STR function implementation method provided in the embodiment of the present application can significantly improve the energy efficiency ratio and user experience of the system by coordinating the sleep mode in a system with a virtualized front-end and a virtualized back-end; by notifying the application of the virtualized back-end to stop the current operation and back up the saved data before entering the sleep mode; when resuming from the sleep mode, the backed-up data is restored to the original location, thereby ensuring that the state of the virtualized back-end is consistent with that before entering the sleep mode, thereby ensuring the consistency and reliability of the data and preventing data loss or damage caused by sleep. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is a flow chart of a method for implementing a multi-core heterogeneous SOC STR function according to an embodiment of the present application; Figure 2 A schematic diagram of the entry process of a multi-core heterogeneous SOC STR with front-end and back-end used in the vehicle-mounted intelligent cockpit of an embodiment of the present application; Figure 3 A flowchart of a specific embodiment of the multi-core heterogeneous SOC STR function implementation method of the present application embodiment; Figure 4 This is a schematic diagram of the structure of a multi-core heterogeneous SOC STR function implementation device according to an embodiment of the present application; Figure 5 A schematic diagram of the structure of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0016] Various schemes and features of the present application are described herein with reference to the accompanying drawings. It should be understood that various modifications may be made to the embodiments of the present application. Therefore, the above description should not be considered as limiting, but only as an example of an embodiment. Other modifications within the scope and spirit of the present application will occur to those skilled in the art.

[0017] A multi-core heterogeneous SOC STR function implementation method provided in an embodiment of the present application is applied to a multi-core heterogeneous SOC with a virtualized front end and a virtualized back end, wherein the operating system of the virtualized front end supports the sleep mode, and the operating system of the virtualized back end does not support the sleep mode. The multi-core heterogeneous SOC STR function implementation method can restore the current state of the virtualized back end to the state before entering the sleep mode, thereby ensuring that the state of the virtualized back end is consistent with the state of the virtualized front end after STR wake-up.

[0018] A multi-core heterogeneous SOC refers to a system-on-a-chip (SOC) that integrates multiple different types of processing units, such as CPU (central processing unit), GPU (graphics processing unit), DSP (digital signal processor), and AI accelerator. This integration enables a single chip to perform a variety of tasks, from general computing to specialized data processing and graphics rendering. A multi-core heterogeneous SOC can improve the energy efficiency and performance of the overall system by assigning specific tasks to the processing unit that is most suitable for performing the task.

[0019] There are multiple processing areas inside the multi-core heterogeneous SOC, each of which can run an independent operating system and perform specific tasks. Virtualization technology can further optimize the processing and resource management of these tasks by dividing the front-end and the back-end, ensuring the flexibility and efficiency of the system. Among them, the virtualization front-end refers to the part directly facing the user, which is used to provide a user interface or application interface, and usually runs on an operating system that supports rich functions; the virtualization back-end refers to the part that does not directly interact with the user, and is responsible for the underlying hardware resource management and data processing. The virtualization front-end and back-end work closely together to ensure the continuity and consistency of the overall service. For example, in storage operations, the front-end virtual machine receives requests from users, and then passes these requests to the back-end virtual machine, which actually reads and writes data.

[0020] The following is a detailed description of the multi-core heterogeneous SOC STR function implementation method in conjunction with the accompanying drawings. Figure 1 Flow chart of the multi-core heterogeneous SOC STR function implementation method of the present application embodiment, as shown in Figure 1 As shown, the method comprises the following steps: S100, entering sleep mode: When entering sleep mode, the current operation of the virtualization front-end is stopped, and the following steps are performed on the application of the virtualization back-end: Notify the application that needs to save data to stop the current operation and save the state when entering the sleep mode; The data that needs to be saved by the application is backed up and saved.

[0021] In the embodiment of the present application, before entering the sleep mode, it is necessary to ensure that all activities of the virtualization front end have been stopped and its state is correctly saved. Specifically, it includes pausing the application, saving context information, and processing unfinished I / O operations. This ensures that the virtualization front end can be accurately restored to the previous state after waking up.

[0022] In the embodiment of the present application, a notification message of preparing to enter the sleep mode can be sent to the application of the virtualized backend through a preset API (Application Programming Interface) or a message delivery mechanism. The application of the virtualized backend responds to the notification message and saves necessary state information according to its own needs, such as data in the memory and the network connection status, so that it can continue to execute seamlessly when the sleep state is restored.

[0023] In the process of backing up and saving the data that the application needs to save, the integrity and consistency of the data need to be ensured. The data that needs to be saved can be copied to a safe memory area, which will not be closed in sleep mode and will not be initialized when the system is restarted.

[0024] In order to further ensure the reliability of the data to be saved, a verification mechanism can be used to verify the integrity of the data. For example, the verification mechanism can use CRC (Cyclic Redundancy Check). In addition, the data to be saved can also be compressed and encrypted to reduce storage space and improve security.

[0025] In addition, to ensure data security, methods such as identity authentication, data encryption, and logging can be used to protect the backed-up data.

[0026] S200, executing the sleep mode stage: During the execution of the sleep mode, the states of the operating system at the virtualization front end and the operating system at the virtualization back end are both saved.

[0027] Specifically, since the operating system of the virtualization front-end supports STR, there is no need to allocate additional memory for the virtualization front-end. When the virtualization front-end executes the sleep mode, its state will be saved to the memory of the physical host; and when resuming from the sleep mode, its state can be quickly restored directly from the memory without reloading the operating system and applications, thereby achieving fast wake-up.

[0028] Since the operating system of the virtualization backend does not support STR, it is necessary to allocate memory specifically for the virtualization backend in advance to save its state information. In addition, it is necessary to ensure that the memory area of ​​the virtualization backend will not be accessed by other processes or hardware to prevent data corruption.

[0029] When saving the state of the operating system of the virtualization backend, it is necessary to save the device state related to the virtual machine, such as configuration register values, buffer contents, etc., to ensure that it can continue to work normally when the sleep mode is restored.

[0030] In the embodiment of the present application, a transaction processing mechanism can be used to ensure that state saving is an atomic operation. All relevant data are either successfully saved or not saved at all, thereby avoiding inconsistency problems caused by partial data loss.

[0031] S300, recovery from sleep mode: When resuming from hibernation mode, the following steps are performed on the virtualization backend: If it is determined that the current state needs to be restored from the sleep mode, the backup saved data is restored to the original location, so that the current state of the virtualization backend is restored to the state before entering the sleep mode; Resume all operations of the virtualization front-end.

[0032] When the system wakes up from sleep mode, it first restores the state of the virtualized backend and then the state of the virtualized frontend. During the recovery process, the system reloads the previously saved data and restores the context information of all tasks to ensure the consistency of the virtualized frontend and backend.

[0033] In an embodiment of the present application, a wake-up source can be set to wake up the system under preset conditions. For example, the wake-up source can be a user key, a network event, or other triggering conditions. When these conditions are met, the system wakes up from the low power mode and returns to the previous state.

[0034] In one embodiment of the present application, in the above step S100, when backing up and saving the data that the application needs to save, a backup area can be set outside the operating system. The backup area will not be initialized by the operating system when the system is restarted, and the data that the application needs to save is saved in the backup area.

[0035] In a multi-core heterogeneous SOC architecture, in order to ensure that the data that the application needs to save can be correctly backed up when entering sleep mode and is still available after the system restarts, a backup area can be set in RAM. This backup area will not be initialized by the operating system when the system restarts, and it will still maintain power supply in sleep mode, and data will not be lost, thereby ensuring data stability and consistency.

[0036] You can also set up a backup area in NVM (Non-Volatile Memory), which is a memory that retains data even when the power is turned off. In addition, you can also set up a backup area in a dedicated hardware area provided by a multi-core heterogeneous SOC.

[0037] It is understandable that the choice of which method depends on the specific needs of the system, including the requirements for speed, capacity, data persistence and security. Through reasonable selection and implementation, it can be ensured that the application data saved when entering sleep mode is still available and can be restored correctly after the system restarts.

[0038] In one embodiment of the present application, before the above step S300, that is, before resuming from the sleep mode, it also includes setting a flag bit, and judging whether the current state needs to be restored from the sleep mode according to the flag bit.

[0039] In this embodiment, the flag bit is used to mark the state of the system before entering the sleep mode. By setting the flag bit, the state of the system before entering the sleep mode can be marked, so that when resuming, it can be quickly determined whether the system is indeed resumed from the sleep mode, which helps to distinguish between normal system startup and recovery from the sleep mode.

[0040] In addition, the identification bit can be stored in RAM or NVM. When stored in RAM, it is necessary to ensure that this part of RAM remains powered in sleep mode; when stored in NVM, the identification bit will not be lost even if the system is completely powered off. To reduce the possibility of misjudgment, the value of the identification bit can use a value that is not easily triggered by mistake, such as 0xDEADBEEF. Of course, the following methods can also be used to reduce the risk of misjudgment of the identification bit, for example, setting multiple identification bits, and only when all the identification bits match, it is considered to be restored from sleep mode; using randomly generated values ​​as the value of the identification bit; adding a check code to the identification bit, and checking when writing and reading the identification bit.

[0041] It should be noted that after resuming from sleep mode, the flag bit needs to be cleared to prevent the system from mistakenly thinking that it is still in the state of resuming from sleep mode when it is started next time.

[0042] In this embodiment, when it is determined according to the flag that recovery from the sleep mode is required, the data stored in the backup area is restored to the original position.

[0043] When it is determined according to the flag that it is not necessary to resume from the sleep mode, the data that the application needs to save is initialized, so that the operating system of the virtualization backend executes an initialization process.

[0044] In a multi-core heterogeneous SOC with a virtualized front-end and back-end, hibernation is essentially a power management state in which the system saves the data of the current running state to the storage device and shuts down most of the hardware to save power. When the system needs to start again, the data can be restored from the storage device to quickly return to the previous state. The setting of the flag is used to indicate whether the system needs to try to recover from the previous hibernation state. If the flag indicates that recovery is required, it means that the user wants the system to be able to recover to the state before the last hibernation. If the flag indicates that recovery is not required, it means that the system is starting for the first time or is starting a new session instead of continuing the old session. At this time, the application needs to be initialized.

[0045] Initialization usually involves resetting the application state, configuring environment variables, establishing necessary connections, etc., so that the application is in a state where it is ready but has not yet started to perform specific tasks. For the operating system of the virtualization backend, initialization also includes setting up network interfaces, checking the integrity of the file system, loading necessary drivers and services, etc., to ensure that the entire system can operate normally.

[0046] In one embodiment of the present application, after restoring all operations of the virtualized front end, it also includes setting a synchronization mechanism so that the data between the virtualized front end and the virtualized back end are consistent. The desired synchronization mechanism can be selected according to the specific application scenario, system architecture and business requirements. Among them, the synchronization mechanism can adopt one of real-time status update, database synchronization and API call. Real-time status update is an instant communication method, which allows the virtualized front end to immediately receive any changes in the virtualized back end. It has the characteristics of fast response and good user experience, and is suitable for application scenarios that require high interactivity. Database synchronization keeps the database content shared by the virtualized front and back ends consistent in a regular or on-demand manner, and can ensure data consistency and integrity. API calls have the characteristics of high flexibility, easy maintenance and expansion, and different levels of access control can be designed according to needs.

[0047] When the synchronization mechanism uses real-time status updates, it can be implemented through technologies such as the WebSocket protocol, SSE (Server-SentEvents) or Long Polling.

[0048] WebSocket provides a full-duplex communication channel, allowing the virtualized backend to actively push data to the virtualized frontend. It only requires one handshake, and the subsequent data transmission is real-time, which is very suitable for applications that require frequent interactions. The following uses the WebSocket protocol as an example to explain the implementation process of real-time status updates: The virtualized frontend creates a WebSocket object through JavaScript and connects to the virtualized backend.

[0049] The virtualized backend accepts the connection and maintains the connection.

[0050] When there is a new status update, the virtualized backend can directly send a message to the virtualized frontend through the established WebSocket connection.

[0051] After receiving the message, the virtualized front end can update the status display on the page according to the content.

[0052] When the synchronization mechanism uses database synchronization, it can be implemented using database replication technology, triggers, or stored procedures, etc. When the synchronization mechanism uses API calls, the virtualization front end can obtain the latest data or send instructions to the virtualization back end for processing by calling the API interface provided by the virtualization back end.

[0053] The following takes the multi-core heterogeneous SOC used in the in-vehicle smart cockpit as an example to specifically illustrate the multi-core heterogeneous SOC STR function implementation method provided in the embodiment of the present application.

[0054] The multi-core heterogeneous SOC used in the in-vehicle smart cockpit is usually provided with the first application domain AP1, the second application domain AP2, the safety processor safety, the multi-purpose processor mp and the information security processor sec. Among them, the first application domain AP1 is responsible for the car entertainment, and the second application domain AP2 is responsible for the car instrument. The safety processor safety is responsible for power management, the communication interface with the car body (usually CAN communication) and functional safety. Taking CAN communication as an example, the system needs to obtain car body information, such as vehicle speed, which can be accessed through the CAN communication function on the safety processor safety. The multi-purpose processor mp is responsible for sound, display, backlight and reversing backend management. Taking reversing as an example, when the driver shifts into reverse gear and needs to display the reversing image, the reversing image is displayed through the reversing backend on the multi-purpose processor mp. The information security processor sec includes the information security domain HSM, the storage service end EMMC and the OTA (Over-The-Air, wireless transmission) server. Taking the storage service as an example, other CPUs in the system want to read and write EMMC to play songs, and need to access through the storage service.

[0055] like Figure 2 As shown, the first application domain AP1 and the second application domain AP2 usually run the virtualization front end (whose OS supports STR), and the security processor safety, the multi-purpose processor mp and the information security processor sec usually run the virtualization back end (whose OS does not support STR). Considering that the virtualization front end is stopped first and the virtualization back end is stopped later when entering STR, the order of entering STR is: AP1 / AP2 ->safety ->mp ->sec.

[0056] When entering the sleep mode, the current operations of the first application domain AP1 and the second application domain AP2 are stopped, such as Figure 3 As shown, the following steps are performed for the application of the security processor safety, the multi-purpose processor mp and the information security processor sec: Notify the application that needs to save data to stop the current operation and save the state when entering sleep mode.

[0057] The data segment D1 to be saved is moved to the backup area for storage. The backup area is outside the OS and will not be initialized when the system is started next time.

[0058] During the execution of the sleep mode, the states of the operating systems of the first application domain AP1 and the second application domain AP2 and the operating systems of the security processor safety, the multi-purpose processor mp and the information security processor sec are all saved in the RAM.

[0059] When resuming from sleep mode, the following steps are performed for the security processor safety, the multi-purpose processor mp, and the information security processor sec: Determine whether the current state is the sleep mode. If so, copy the data in the backup area to overwrite the data segment D1, so that it can be restored to the state before entering the sleep mode, thereby ensuring that the state of the virtualization backend is consistent with the state of the virtualization frontend after the system starts; otherwise, initialize the data segment D1 to the default value and enter the initialization process.

[0060] All operations of the first application domain AP1 and the second application domain AP2 are restored.

[0061] A multi-core heterogeneous SOC STR function implementation method provided in an embodiment of the present application can significantly improve the energy efficiency ratio and user experience of the system by coordinating the sleep mode in a system with a virtualized front end and a virtualized back end, which is specifically manifested in the following aspects: When the system enters sleep mode, the state of the virtualization front-end operating system and the virtualization back-end operating system are saved to RAM, which can avoid the high energy consumption process required for complete shutdown and restart, thereby significantly reducing power consumption. When resuming from sleep mode, the system can quickly restore the state directly from RAM, reducing power consumption, extending battery life, and improving overall energy efficiency.

[0062] By saving the system state to RAM, the time to resume from sleep mode is greatly shortened, and the system can quickly resume to the previous working state without going through a long startup process. This not only improves the response speed of the device, but also ensures the consistency and integrity of the data, improving the user experience.

[0063] Before entering sleep mode, notify the application of the virtualization backend to stop the current operation and back up the saved data. When resuming from sleep mode, restore the backed-up data to the original location to ensure that the state of the virtualization backend is consistent with that before entering sleep mode. This mechanism can ensure data consistency and reliability and prevent data loss or damage caused by sleep.

[0064] A multi-core heterogeneous SOC STR function implementation method provided in an embodiment of the present application is suitable for situations where the virtualization front end supports the sleep mode but the virtualization back end does not. By coordinating the operations of the virtualization front end and the back end, unified sleep management across platforms can be achieved, thereby enhancing the compatibility and adaptability of the system.

[0065] Based on the same inventive concept, the embodiment of the present application also provides a multi-core heterogeneous SOC STR function implementation device, which is applied to a multi-core heterogeneous SOC with a virtualized front end and a virtualized back end, wherein the operating system of the virtualized front end supports the sleep mode, and the operating system of the virtualized back end does not support the sleep mode, such as Figure 4 As shown, it includes: A stop module is configured to stop the current operation of the virtualization front end when entering the sleep mode.

[0066] The first execution module is configured to execute the following steps on the application of the virtualized backend when entering the sleep mode: Notify the application that needs to save data to stop the current operation and save the state when entering the sleep mode; back up and save the data that the application needs to save.

[0067] The saving module is configured to save the states of the operating system of the virtualization front end and the operating system of the virtualization back end during the execution of the sleep mode.

[0068] The second execution module is configured to execute the following steps on the virtualized backend when resuming from the sleep mode: If it is determined that the current state needs to be restored from the sleep mode, the backup saved data is restored to the original location, so that the current state of the virtualization backend is restored to the state before entering the sleep mode.

[0069] The recovery module is configured to recover all operations of the virtualization front end when recovering from the sleep mode.

[0070] In the embodiment of the present application, before entering the sleep mode, it is necessary to ensure that all activities of the virtualization front end have been stopped and its state is correctly saved. Specifically, it includes pausing the application, saving context information, and processing unfinished I / O operations. This ensures that the virtualization front end can be accurately restored to the previous state after waking up.

[0071] In the embodiment of the present application, a notification message of preparing to enter the sleep mode can be sent to the application of the virtualized backend through a preset API (Application Programming Interface) or a message delivery mechanism. The application of the virtualized backend responds to the notification message and saves necessary state information according to its own needs, such as data in the memory and the network connection status, so that it can continue to execute seamlessly when the sleep state is restored.

[0072] In the process of backing up and saving the data that the application needs to save, the integrity and consistency of the data need to be ensured. The data that needs to be saved can be copied to a safe memory area, which will not be closed in sleep mode and will not be initialized when the system is restarted.

[0073] In order to further ensure the reliability of the data to be saved, a verification mechanism can be used to verify the integrity of the data. For example, the verification mechanism can use CRC (Cyclic Redundancy Check). In addition, the data to be saved can also be compressed and encrypted to reduce storage space and improve security.

[0074] In addition, to ensure data security, methods such as identity authentication, data encryption, and logging can be used to protect the backed-up data.

[0075] Specifically, since the operating system of the virtualization front-end supports STR, there is no need to allocate additional memory for the virtualization front-end. When the virtualization front-end executes the sleep mode, its state will be saved to the memory of the physical host; and when resuming from the sleep mode, its state can be quickly restored directly from the memory without reloading the operating system and applications, thereby achieving fast wake-up.

[0076] Since the operating system of the virtualization backend does not support STR, it is necessary to allocate memory specifically for the virtualization backend in advance to save its state information. In addition, it is necessary to ensure that the memory area of ​​the virtualization backend will not be accessed by other processes or hardware to prevent data corruption.

[0077] When saving the state of the operating system of the virtualization backend, it is necessary to save the device state related to the virtual machine, such as configuration register values, buffer contents, etc., to ensure that it can continue to work normally when the sleep mode is restored.

[0078] In the embodiment of the present application, a transaction processing mechanism can be used to ensure that state saving is an atomic operation. All relevant data are either successfully saved or not saved at all, thereby avoiding inconsistency problems caused by partial data loss.

[0079] When the system wakes up from sleep mode, it first restores the state of the virtualized backend and then the state of the virtualized frontend. During the recovery process, the system reloads the previously saved data and restores the context information of all tasks to ensure the consistency of the virtualized frontend and backend.

[0080] In an embodiment of the present application, a wake-up source can be set to wake up the system under preset conditions. For example, the wake-up source can be a user key, a network event, or other triggering conditions. When these conditions are met, the system wakes up from the low power mode and returns to the previous state.

[0081] Based on the same concept, the embodiment of the present application also provides an electronic device, such as Figure 5 As shown, it includes a processor and a memory, wherein an executable program is stored in the memory, and the processor executes the executable program to perform the steps of the method as described above. An embodiment of the present application further provides a storage medium, wherein the storage medium carries one or more computer programs, and when the one or more computer programs are executed by a processor, the steps of the method described above are implemented.

[0082] An embodiment of the present application also provides a chip, which adopts a multi-core heterogeneous SOC with a virtualized front end and a virtualized back end. The multi-core heterogeneous SOC adopts the method described above to restore the current state of the virtualized back end to the state before entering the sleep mode, so as to ensure that the state of the virtualized back end in the multi-core heterogeneous SOC is consistent with the state of the virtualized front end after the sleep mode is restored.

[0083] The storage medium in this embodiment may be included in the electronic device / system; or it may exist independently without being assembled into the electronic device / system. The above storage medium carries one or more programs, and when the above one or more programs are executed, the method according to the embodiment of the present application is implemented.

[0084] An embodiment of the present application also provides a vehicle, comprising a processing unit, which is capable of executing the steps of the method described in the above embodiment.

[0085] The vehicle in the embodiments of the present application may be "car", "vehicle" and "entire vehicle" or other similar terms including general motor vehicles, such as sedans, SUVs, MPVs, buses, trucks and other cargo or passenger vehicles, watercraft including various ships and boats, and aircraft, etc., including hybrid vehicles, electric vehicles, fuel vehicles, plug-in hybrid vehicles, fuel cell vehicles and other alternative fuel vehicles. Among them, hybrid vehicles refer to vehicles with two or more power sources, and electric vehicles include pure electric vehicles, extended-range electric vehicles, etc., which are not specifically limited in the present application.

[0086] It should be understood that in the embodiments of the present application, the processor may be a central processing unit (CPU), and the processor may also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc.

[0087] It should also be understood that the memory mentioned in the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM) and direct memory bus random access memory (Direct Rambus RAM, DR RAM).

[0088] It should be noted that when the processor is a general-purpose processor, DSP, ASIC, FPGA or other programmable logic device, discrete gate or transistor logic device, discrete hardware component, the memory (storage module) is integrated in the processor.

[0089] It should be noted that the memory described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0090] It should also be understood that the first, second, third, fourth and various numerical numbers involved in this document are only distinctions made for the convenience of description and are not intended to limit the scope of the present application.

[0091] It should be understood that the term "and / or" in this article is only a description of the association relationship of the associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0092] In the implementation process, each step of the above method can be completed by an integrated logic circuit of hardware in a processor or an instruction in the form of software. The steps of the method disclosed in conjunction with the embodiment of the present application can be directly embodied as a hardware processor for execution, or a combination of hardware and software modules in a processor for execution. The software module can be located in a storage medium mature in the art such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The storage medium is located in a memory, and the processor reads the information in the memory and completes the steps of the above method in conjunction with its hardware. To avoid repetition, it is not described in detail here.

[0093] In various embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0094] Those skilled in the art will appreciate that the various illustrative logical blocks (ILBs) and steps described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or in a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0095] In the several embodiments provided in the present application, it should be understood that the disclosed multi-core heterogeneous SOC STR function implementation method and electronic device can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units (or modules) is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0096] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0097] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0098] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line) or wireless (e.g., infrared, wireless, microwave, etc.) mode to another website site, computer, server or data center. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more available media integration. The available medium can be a magnetic medium, (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state hard disk), etc.

[0099] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A method for realizing a multi-core heterogeneous SOC STR function, characterized in that: Applied to a multi-core heterogeneous SOC having a virtualized front end and a virtualized back end, wherein the operating system of the virtualized front end supports a sleep mode, and the operating system of the virtualized back end does not support the sleep mode, the method comprises: When entering sleep mode, the current operation of the virtualization front-end is stopped, and the following steps are performed on the application of the virtualization back-end: Notify the application that needs to save data to stop the current operation and save the state when entering the sleep mode; Back up and save the data that the application needs to save; During the execution of the sleep mode, the states of the operating system at the virtualization front end and the operating system at the virtualization back end are both saved; When resuming from hibernation mode, the following steps are performed on the virtualization backend: If it is determined that the current state needs to be restored from the sleep mode, the backup saved data is restored to the original location, so that the current state of the virtualization backend is restored to the state before entering the sleep mode; Resume all operations of the virtualization front end.

2. The method according to claim 1, characterized in that When backing up the data that the application needs to save, a backup area is set outside the operating system. The backup area will not be initialized by the operating system when the system is restarted, and the data that the application needs to save is saved in the backup area.

3. The method according to claim 2, characterized in that Before resuming from the sleep mode, the method further includes setting a flag bit, and judging whether the current state needs to be resumed from the sleep mode according to the flag bit.

4. The method according to claim 3, characterized in that When it is determined according to the identification bit that recovery from the sleep mode is required, the data stored in the backup area is restored to the original position.

5. The method according to claim 3, characterized in that: When it is determined according to the flag that there is no need to resume from the sleep mode, the data that the application needs to save is initialized, so that the operating system of the virtualization backend executes the initialization process.

6. The method according to claim 1, characterized in that After all operations of the virtualized front end are restored, a synchronization mechanism is also included to make the data between the virtualized front end and the virtualized back end consistent.

7. The method according to claim 6, characterized in that The synchronization mechanism adopts one of real-time status update, database synchronization and API call.

8. An electronic device, characterized in that: The method comprises a processor and a memory, wherein an executable program is stored in the memory, and the processor executes the executable program to perform the steps of the method according to any one of claims 1 to 7.

9. A storage medium, characterized in that: The storage medium carries one or more computer programs, and when the one or more computer programs are executed by the processor, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A chip, characterized in that: A multi-core heterogeneous SOC having a virtualized front end and a virtualized back end is adopted, and the multi-core heterogeneous SOC adopts the method described in any one of claims 1 to 7 to restore the current state of the virtualized back end to the state before entering the sleep mode, so as to ensure that the state of the virtualized back end in the multi-core heterogeneous SOC is consistent with the state of the virtualized front end after the sleep mode is restored.

Images