Method for inhibiting generation of background carriers in compound semiconductor

By introducing low atomic number of homogeneous element dopants during compound semiconductor growth, the generation of background carriers is suppressed, and the problem of high background carrier concentration in compound semiconductor devices is solved, and the device's voltage resistance and dynamics are improved performance.

CN119325237APending Publication Date: 2025-01-17SUN YAT SEN UNIV
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Patent Information

Application Number
CN202411209677.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-08-30
Publication Date
2025-01-17

AI Technical Summary

Technical Problem

The existing compound wide bandgap semiconductor materials have high background carrier concentrations due to background donor type defects or impurities, which deteriorates the voltage resistance of the device, and the impurity compensation method will degrade the dynamic performance of the device.

Method used

During the growth of compound semiconductors, homogeneous elements with lower atomic numbers are introduced as dopants to inhibit background donor defects and impurities ionization, reduce background carrier concentration, and ensure the quality and conductivity of epitaxial layer.

Benefits of technology

Effectively suppress background carrier generation, improve the voltage resistance of the device, and realize high-quality and high hole concentration p-type semiconductor materials, improving the dynamic performance of the device.

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Abstract

The invention relates to the technical field of semiconductors, in particular to a method for inhibiting generation of background carriers in a compound semiconductor. Aiming at a compound semiconductor material formed by two different family elements, in the growth process of a compound semiconductor, a lower atomic number with a set concentration is introduced into a compound epitaxial layer, and family elements of stronger metallic elements in the compound semiconductor are used as doping agents; the background carrier concentration is reduced by suppressing generation of background donor defects and ionization of background donor impurities. While the quality of the epitaxial layer is ensured and the conduction performance such as the turn-on voltage and the conduction resistance is not degraded, the suppression of the generation of background carriers is realized. And by inhibiting generation of background donor defects and inhibiting ionization of background donor impurities, the method also has important significance for realizing high-quality and high-hole-concentration p-type semiconductor materials.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and more specifically, to a method for suppressing the generation of background carriers in a compound semiconductor. Background Art

[0002] The development of new semiconductor materials and devices, as well as the progress of related semiconductor physics technology, has promoted the birth of a new technological revolution and emerging industries. Compound wide bandgap semiconductors, due to their excellent material properties, can realize power devices with excellent characteristics such as high breakdown voltage, low on-resistance, and low switching loss, breaking through the theoretical performance limits of traditional silicon (Si) devices, and becoming the main research field of current semiconductor science and technology and semiconductor physics.

[0003] Since power electronic devices made of compound semiconductors are often used in high-frequency, high-voltage and high-temperature working environments, how to increase the breakdown voltage of the device and reduce the on-resistance has become the key to current research. Conventional compound wide-bandgap semiconductor materials, such as gallium nitride, usually have a certain concentration of n-type background carriers due to background donor defects or impurities, which deteriorates the voltage resistance of the device and limits the application of the device. The method of achieving low background carrier concentration epitaxial layer in the industry usually adopts the method of doping deep energy level acceptor impurities with appropriate concentrations and using impurity compensation to achieve high resistance, such as doping C or Fe in GaN materials to form high resistance. However, this technology generally deviates from the optimal growth conditions and leads to a decrease in the quality of the material crystal; at the same time, the trap effect introduced by deep energy level impurities will also degrade the dynamic performance of the device. Summary of the invention

[0004] In order to overcome the defect in the above-mentioned prior art that high resistance achieved by impurity compensation will degrade the dynamic performance of the device, the present invention provides a method for suppressing the generation of background carriers in compound semiconductors, which can suppress the generation of background carriers while ensuring the quality of the epitaxial layer and not degrading the conduction performance such as the turn-on voltage and on-resistance.

[0005] In order to solve the above technical problems, the technical solution adopted by the present invention is:

[0006] A method for suppressing the generation of background carriers in a compound semiconductor. For a compound semiconductor material formed by two elements of a non-same group, during the growth process of the compound semiconductor, a set concentration of a same group element with a lower atomic number and a stronger metallic element in the compound semiconductor is introduced into the compound epitaxial layer as a dopant to suppress the generation of background donor defects and the ionization of background donor impurities to reduce the background carrier concentration.

[0007] According to the above technical means, the present invention introduces a certain concentration of lower atomic number and the same group elements of the stronger metallic elements in the compound semiconductor into the compound epitaxial layer, and reduces the background carrier concentration by suppressing the generation of background donor defects and the ionization of background donor impurities, thereby ensuring the quality of the epitaxial layer and not degrading the conduction performance such as the turn-on voltage and the on-resistance, and realizing the suppression of the generation of background carriers. Suppressing the generation of background donor defects and suppressing the ionization of background donor impurities is also of great significance for achieving high-quality and high-hole-concentration p-type semiconductor materials.

[0008] In one embodiment, in the compound semiconductor, the ratio of the dominant strong metallic element atoms to the relatively low atomic number impurity elements of the same group is 1 / 10. 6 to 1 / 10.

[0009] In one of the embodiments, the method used for growing the compound semiconductor includes one or more of MOCVD, MBE, HVPE, ammonothermal method, high pressure melting method, sublimation method, and mobile heating method.

[0010] In one embodiment, the compound semiconductor includes a semiconductor formed of nitride, phosphide, arsenide, bismuth, oxide, sulfide, selenide, or telluride.

[0011] In one embodiment, the compound epitaxial layer has a thickness of 100 nm to 50 μm.

[0012] In one embodiment, the source of the same group element of the stronger metallic element in the introduced compound semiconductor with a lower atomic number is a metal compound.

[0013] In one of the embodiments, for a gallium-containing compound semiconductor, a dopant Al element is introduced when growing an epitaxial layer; for an indium-containing compound semiconductor, a dopant Ga element is introduced when growing an epitaxial layer.

[0014] In one embodiment, the molar flow rate of the introduced dopant is 10 -5 ~10 -1 mol / min, concentration is 10 17 cm -3 ~10 22 cm -3 .

[0015] The present invention also provides a method for preparing a gallium nitride semiconductor capable of suppressing the generation of background carriers, comprising the following steps:

[0016] S11. Select a substrate, place the substrate into a metal organic chemical vapor deposition MOCVD reaction chamber, introduce hydrogen into the reaction chamber, and pretreat the substrate at a preset temperature;

[0017] S12. The temperature of the pretreated substrate is lowered to a set temperature, TMGa and ammonia are introduced into the reaction chamber, and hydrogen is used as a carrier gas to grow a GaN buffer layer;

[0018] S13. Raise the temperature to the set temperature, introduce TMGa and ammonia into the reaction chamber, and use hydrogen as the carrier gas to grow a nitride epitaxial layer on the GaN buffer layer. When growing the nitride epitaxial layer, introduce Al element, and the molar flow rate of the dopant Al used is 10 -5 ~10 -1 mol / min, Al element concentration is 10 17 cm -3 ~10 22 cm -3 , and obtain the desired nitride epitaxial layer structure.

[0019] The present invention also provides a method for preparing a diode device capable of suppressing the generation of background carriers, comprising the following steps:

[0020] S21. Selecting a GaN substrate;

[0021] S22. The GaN substrate is placed in a metal organic chemical vapor deposition MOCVD reaction chamber, and hydrogen is introduced into the reaction chamber to pretreat the GaN substrate at a preset temperature;

[0022] S23. Raise the temperature to a preset temperature, introduce TMGa and ammonia into the reaction chamber, use hydrogen as the carrier gas, and grow a GaN epitaxial layer; when growing the GaN epitaxial layer, introduce Al element, and the molar flow rate of the dopant Al used is 10 -5 ~10 -1 mol / min, Al element concentration is 10 17 cm -3 ~10 22 cm -3 , obtaining the desired GaN epitaxial structure;

[0023] S24. Prepare a vertical conduction PN junction diode device based on the GaN epitaxial structure.

[0024] Compared with the prior art, the beneficial effect is as follows: the invention provides a method for suppressing the generation of background carriers in a compound semiconductor. When growing an epitaxial layer, a certain concentration of element impurities with a lower atomic number is introduced. Compared with not introducing impurities, the generation of background carrier concentration in the epitaxial layer is suppressed to a certain extent, thereby improving the withstand voltage of the device. The device functional layer is grown on the semiconductor epitaxial layer. When applied to the field of power electronic devices, the withstand voltage performance of the device can be greatly improved. At the same time, suppressing the generation of background donor defects and suppressing the ionization of background donor impurities is also of great significance for achieving high-quality p-type semiconductor materials with high hole concentration. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 This is the background carrier concentration distribution extracted from the CV characteristics of the SBD at different Al impurity concentrations in the epitaxial layer when the compound semiconductor is gallium nitride and the doping element is Al doping in Example 1.

[0026] Figure 2 This is the voltage-current curve measured at different Al impurity concentrations in the epitaxial layer when the compound semiconductor is gallium nitride and the doping element is Al doping in Example 1.

[0027] Figure 3 It is a schematic diagram of the actual device structure of the GaN epitaxial layer grown based on the method of the present invention in Example 2 and the self-supporting substrate gallium nitride vertical PND prepared on this basis.

[0028] Figure 4 It is a schematic diagram of the actual device structure of the GaN epitaxial layer grown based on the method of the present invention in Example 3 and the self-supporting substrate gallium nitride vertical SBD prepared on this basis.

[0029] Figure 5 It is a schematic diagram of the actual device structure of the GaN vertical PND prepared by growing the GaN epitaxial layer based on the method of the present invention in Example 4 and stripping the substrate thereon.

[0030] Figure 6 It is a schematic diagram of the actual device structure of the GaAs epitaxial layer grown based on the method of the present invention in Example 5 and the self-supporting substrate gallium arsenide vertical PND prepared on this basis.

[0031] Figure 7 It is a schematic diagram of the actual device structure of the InP epitaxial layer grown based on the method of the present invention in Example 6 and the self-supporting substrate indium phosphide vertical PND prepared on this basis. DETAILED DESCRIPTION

[0032] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. The present invention is described in one of the embodiments in combination with the specific implementation methods. Among them, the drawings are only used for exemplary descriptions, and only schematic diagrams are shown, not physical drawings, and cannot be understood as limitations on the present invention; in order to better illustrate the embodiments of the present invention, some parts of the drawings may be omitted, enlarged or reduced, and do not represent the size of the actual product; for those skilled in the art, it is understandable that some well-known structures and their descriptions in the drawings may be omitted.

[0033] In the description of the present invention, it should be understood that if the terms "upper", "lower", "left", "right" and the like indicate an orientation or positional relationship based on the orientation or positional relationship shown in the drawings, it is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, the terms describing the positional relationship in the drawings are only used for exemplary explanations and cannot be understood as limiting the present invention. For ordinary technicians in the field, the specific meanings of the above terms can be understood according to specific circumstances. In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only used for descriptive purposes, and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" can explicitly or implicitly include at least one of the features. In addition, the meaning of "and / or" appearing in the full text is to include three parallel schemes. Taking "A and / or B" as an example, it includes scheme A, or scheme B, or schemes that satisfy both A and B.

[0034] Embodiment 1:

[0035] This embodiment provides a method for suppressing background carrier generation in a compound semiconductor, wherein the compound is gallium nitride, and the introduced element with a lower atomic number is Al, comprising the following steps:

[0036] S1: Select substrate, the substrate is sapphire substrate;

[0037] S2: placing the sapphire substrate into a metal organic chemical vapor deposition (MOCVD) reaction chamber, introducing hydrogen into the reaction chamber, and pre-treating the sapphire substrate at a preset temperature of 980° C. for 300 seconds;

[0038] S3: lowering the temperature of the pre-treated sapphire substrate to 550°C, introducing TMGa and ammonia into the reaction chamber, using hydrogen as the carrier gas, and growing a GaN buffer layer with a thickness of 500 nm;

[0039] S4. Raise the temperature to 1090°C, introduce TMGa and ammonia into the reaction chamber, use hydrogen as the carrier gas, and grow a nitride epitaxial layer on the stress buffer layer, wherein when growing the nitride epitaxial layer, introduce Al element, and the molar flow rate of the dopant used is 10 -5 ~10 -1 mol / min, Al element concentration is 10 17 cm -3 ~10 22 cm -3 , and obtain the desired epitaxial structure, the thickness of the epitaxial layer is about 4μm.

[0040] like Figure 1 As shown, based on Example 1 of the present invention, the background carrier concentration relationship diagram extracted by SBD CV characteristics at different Al concentrations in the GaN epitaxial layer at different molar flow rates of trimethylaluminum. Compared with the unintentionally doped sample, Example 1 provides a sample with an Al doping concentration of 10 19 cm -3 When the background carrier concentration increases from 2×10 17 cm -3 Reduced to 8×10 15 cm -3 When the Al content reaches 10 21 cm -3 That is, when the Al / Ga ratio is 1 / 9, the background carrier concentration has dropped to an unmeasurable level. At the same time, the epitaxial layer is completely depleted as the concentration of the introduced Al element increases, indicating that the background carrier concentration has been significantly suppressed.

[0041] like Figure 2 As shown, based on Example 1 of the present invention, the voltage-current curves of the gallium nitride epitaxial layer at different Al impurity concentrations at different trimethylaluminum molar flow rates are measured. Compared with the unintentionally doped samples, Example 1 provides samples with Al doping concentrations of 10 19 cm -3 When the leakage current magnitude increases from 10 -2 A / cm 2 Down to 10 -5 A / cm 2 order of magnitude, and continue to increase the Al doping concentration to 10 21 cm -3 , the device leakage current is reduced to 10 -5 A / cm 2 It can be found that the introduction of increased Al concentration has a significant inhibitory effect on leakage.

[0042] Embodiment 2:

[0043] This embodiment provides a method for suppressing background carrier generation in a compound semiconductor, a vertical conduction PN junction diode device prepared on a gallium nitride self-supporting substrate, wherein the compound is gallium nitride, and the introduced element with a lower atomic number is Al, comprising the following steps:

[0044] S1: Select a substrate, which uses a GaN substrate;

[0045] S2: placing the GaN homogeneous substrate into a metal organic chemical vapor deposition MOCVD reaction chamber, introducing hydrogen into the reaction chamber, and pre-treating the substrate at a preset temperature of 980° C. for a pre-treatment time of 50 seconds;

[0046] S3: Raise the temperature to 1090°C, introduce TMGa and ammonia into the reaction chamber, and use hydrogen as the carrier gas to grow GaN epitaxial layer. When growing the nitride epitaxial layer, introduce Al element, and the molar flow rate of the dopant used is 10 -5 ~10 -1 mol / min, Al element concentration is 10 17 cm -3 ~10 22 cm -3 , the required epitaxial structure is obtained, and a vertical conduction PN junction diode device is prepared based on the epitaxial structure. Compared with the unintentionally doped GaN epitaxial layer, the introduction of Al impurities increases the expected breakdown voltage of the device by 200V to 1000V. The schematic diagram of the device structure is shown in Figure 3 shown.

[0047] Embodiment 3:

[0048] This embodiment provides a method for suppressing background carrier generation in a compound semiconductor, and prepares a SBD device of a gallium nitride self-supporting substrate, wherein the compound is gallium nitride, and the introduced element with a lower atomic number is Al, comprising the following steps:

[0049] S1: Select a substrate, which uses a GaN substrate;

[0050] S2: placing the GaN homogeneous substrate into a metal organic chemical vapor deposition MOCVD reaction chamber, introducing hydrogen into the reaction chamber, and pre-treating the substrate at a preset temperature of 980° C. for a pre-treatment time of 50 seconds;

[0051] S3: Raise the temperature to 1090°C, introduce TMGa and ammonia into the reaction chamber, and use hydrogen as the carrier gas to grow GaN epitaxial layer. When growing the nitride epitaxial layer, introduce Al element, and the molar flow rate of the dopant used is 10 -5 ~10 -1 mol / min, Al element concentration is 10 17 cm -3~10 22 cm -3 , and obtain the required epitaxial structure. The schematic diagram of the device structure is shown in Figure 4 shown.

[0052] Embodiment 4:

[0053] This embodiment provides a method for suppressing background carrier generation in a compound semiconductor, and prepares a PND device based on epitaxial growth on a sapphire substrate, wherein the compound is gallium nitride, and the introduced element with a lower atomic number is Al, comprising the following steps:

[0054] S1: Select substrate, the substrate is sapphire substrate;

[0055] S2: placing the sapphire substrate into a metal organic chemical vapor deposition (MOCVD) reaction chamber, introducing hydrogen into the reaction chamber, and pre-treating the sapphire substrate at a preset temperature of 980° C. for 300 seconds;

[0056] S3: lowering the temperature of the pre-treated sapphire substrate to 550°C, introducing TMGa and ammonia into the reaction chamber, using hydrogen as the carrier gas, and growing a GaN buffer layer with a thickness of 500 nm;

[0057] S4. Raise the temperature to 1090°C, introduce TMGa and ammonia into the reaction chamber, and use hydrogen as the carrier gas to grow a nitride epitaxial layer on the stress buffer layer. When growing the nitride epitaxial layer, Al element is introduced, and the molar flow rate of the dopant used is 10 -5 ~10 -1 mol / min, Al element concentration is 10 17 cm -3 ~10 22 cm -3 , and obtain the desired epitaxial structure, then peel off the sapphire substrate, transfer the device to a highly conductive substrate, such as heavily doped n-type Si, and prepare a vertically conductive PN junction diode device. The device structure diagram is shown in Figure 5 shown.

[0058] Embodiment 5:

[0059] This embodiment provides a method for suppressing background carrier generation in a compound semiconductor. A GaAs-based vertical conduction PN junction diode device is prepared on a gallium arsenide (GaAs) self-supporting substrate, wherein the compound is gallium arsenide, and the element with a lower atomic number introduced when growing a GaAs drift layer is Al. The schematic diagram of the device structure is shown in FIG. Figure 6 shown.

[0060] Embodiment 6:

[0061] This embodiment provides a method for suppressing background carrier generation in a compound semiconductor. An InP-based vertical conduction PN junction diode device is prepared on an InP self-supporting substrate, wherein the compound is InP, and the element with a lower atomic number introduced when growing the InP drift layer is Ga. The schematic diagram of the device structure is shown in FIG. Figure 7 shown.

[0062] Embodiment 7:

[0063] This embodiment provides a method for suppressing background carrier generation in a compound semiconductor, a GaP-based vertical conduction PN junction diode device prepared on a gallium phosphide (GaP) self-supporting substrate, wherein the compound is gallium phosphide, and the element with a lower atomic number introduced when growing a GaP drift layer is Al.

[0064] In summary, the present invention introduces a certain concentration of elements of the same group with lower atomic numbers compared to the stronger metallic elements during the process of growing the compound epitaxial layer of a stronger metallic element with a higher atomic number, thereby suppressing the generation of donor-type defects and the ionization of background donors, thereby ensuring the quality of the epitaxial layer and suppressing the background carrier concentration.

[0065] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0066] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the embodiments here. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the claims of the present invention.

Claims

1. A method for suppressing background carrier generation in a compound semiconductor, characterized in that: For compound semiconductor materials formed by two non-congener elements, during the growth process of the compound semiconductor, a set concentration of a lower atomic number and a stronger metallic element in the compound semiconductor is introduced into the compound epitaxial layer as a dopant to suppress the generation of background donor defects and the ionization of background donor impurities to reduce the background carrier concentration.

2. The method for suppressing background carrier generation in a compound semiconductor according to claim 1, characterized in that: In the compound semiconductor, the ratio of the dominant strong metallic element atoms to the relatively low atomic number impurity elements of the same group is 1 / 10 6 to 1 / 10.

3. The method for suppressing background carrier generation in a compound semiconductor according to claim 2, characterized in that: The method used for growing the compound semiconductor includes one or more of MOCVD, MBE, HVPE, ammonothermal method, high pressure melting method, sublimation method, and mobile heating method.

4. The method for suppressing background carrier generation in a compound semiconductor according to claim 2, characterized in that: The compound semiconductor includes semiconductors formed of nitrides, phosphides, arsenides, bismuthides, oxides, sulfides, selenides, and tellurides.

5. The method for suppressing background carrier generation in a compound semiconductor according to claim 2, characterized in that: The thickness of the compound epitaxial layer is 100nm-50μm.

6. The method for suppressing background carrier generation in a compound semiconductor according to claim 2, characterized in that: The source of the same group elements of the stronger metallic elements in the introduced compound semiconductors with lower atomic numbers is metal compounds.

7. The method for suppressing background carrier generation in a compound semiconductor according to any one of claims 2 to 6, characterized in that: For gallium-containing compound semiconductors, the dopant Al element is introduced when growing the epitaxial layer; for indium-containing compound semiconductors, the dopant Ga element is introduced when growing the epitaxial layer.

8. The method for suppressing background carrier generation in a compound semiconductor according to any one of claims 2 to 6, characterized in that: The molar flow rate of the introduced dopant is 10 -5 ~10 -1 mol / min, concentration is 10 17 cm -3 ~10 22 cm -3 .

9. A method for preparing a gallium nitride semiconductor capable of suppressing the generation of background carriers, characterized in that: The following steps are involved: S11. Select a substrate, place the substrate into a metal organic chemical vapor deposition MOCVD reaction chamber, introduce hydrogen into the reaction chamber, and pretreat the substrate at a preset temperature; S12. The temperature of the pretreated substrate is lowered to a set temperature, TMGa and ammonia are introduced into the reaction chamber, and hydrogen is used as a carrier gas to grow a GaN buffer layer; S13. Raise the temperature to the set temperature, introduce TMGa and ammonia into the reaction chamber, and use hydrogen as the carrier gas to grow a nitride epitaxial layer on the GaN buffer layer. When growing the nitride epitaxial layer, introduce Al element, and the molar flow rate of the dopant Al used is 10 -5 ~10 -1 mol / min, Al element concentration is 10 17 cm -3 ~10 22 cm -3 , and obtain the desired nitride epitaxial layer structure.

10. A method for preparing a diode device capable of suppressing background carrier generation, characterized in that: The following steps are involved: S21. Selecting a GaN substrate; S22. The GaN substrate is placed in a metal organic chemical vapor deposition MOCVD reaction chamber, and hydrogen is introduced into the reaction chamber to pretreat the GaN substrate at a preset temperature; S23. Raise the temperature to a preset temperature, introduce TMGa and ammonia into the reaction chamber, use hydrogen as the carrier gas, and grow a GaN epitaxial layer; when growing the GaN epitaxial layer, introduce Al element, and the molar flow rate of the dopant Al used is 10 -5 ~10 -1 mol / min, Al element concentration is 10 17 cm -3 ~10 22 cm -3 , obtaining the desired GaN epitaxial structure; S24. Prepare a vertical conduction PN junction diode device based on the GaN epitaxial structure.

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