RAID5 verification data power-down processing method and information processing equipment

Abstract

The invention provides an RAID5 verification data power failure processing method and information processing equipment, and relates to the technical field of data processing.The method comprises the following steps that in response to power failure, intermediate state verification data of a page strip which is not completely written is obtained; and judging whether the page strip in which the data is not written is enough to write the intermediate-state verification data, if so, directly writing the intermediate-state verification data into the page, in which the data is not written, of the page strip, and otherwise, after the page strip is fully written with the intermediate-state verification data, writing the rest of the intermediate-state verification data which is not written into the page, in which the verification data is stored, of the page strip. The method and the device are used for improving the speed of recovering the intermediate-state verification data of the page strip after power failure, providing protection for the data in the incomplete strip data, performing read recovery on the incomplete strip when a read error occurs, and not changing the data reconstruction process when the read error is processed, so that the data recovery efficiency is improved. Therefore, extra research and development cost and technical complexity are not introduced.

Description

Technical Field

[0001] The present application relates to the field of storage technology, and in particular to a RAID5 verification data power-off processing method and information processing equipment. Background Art

[0002] In order to improve the reliability of stored data, solid-state storage devices usually use RAID technology (such as RAID5) to organize and protect data on NAND flash memory. Therefore, even if some data fails to be read, the failed data can be restored through the verification data generated based on the RAID technology.

[0003] The NAND flash memory chip of the storage device includes one or more LUNs (logical units). Each LUN (logical unit) includes one or more Planes (layers). A Plane includes multiple physical blocks (Blocks). Each Plane (layer) has a physical block to construct a RAID stripe (RAID Stripe). Physical pages (Pages) with the same page number (page number) in the physical blocks (Blocks) belonging to the same RAID stripe constitute a Page Stripe (page stripe). When any data in the storage device is wrong, the data can be recovered using an XOR operation based on other data pages (including check pages) of the page stripe to which the wrong data belongs. In this way, user data is protected through RAID check data. Taking RAID5 as an example, each page stripe (page stripe) includes a page (page) as a parity page (page storing check data, referred to as a check page).

[0004] In order to make the best use of the data throughput bandwidth of the back-end NAND flash memory, when the storage device writes data to the NAND flash memory, it will send write commands to the NAND flash memory in a multi-plane program (multi-layer burning) operation mode. When each LUN (logical unit) has 4 Planes (layers), a single write command sent to the NAND flash memory carries 4 physical pages of data, which is called the granularity of the write command is 4 pages.

[0005] As an example, the stripe size is 31+1 (including 31 physical pages storing user data and 1 physical page storing check data). Figure 1 As shown in the figure, 32 LUNs are used to construct a stripe. The pages numbered nx (referred to as page nx) of Block m of each of the 32 LUNs form a page stripe. The page stripe includes 31+1, a total of 32 physical pages. Page nx of Block m of LUN 31 is used to store checksum data. Where x varies with the plane where the physical page is located, and n represents the physical page number in the physical block within the plane. Figure 1In the example, page n0 of Plane 0 of Block m of each of the 32 LUNs constitutes page stripe n0, page n1 of Plane 1 of Block m of each of the 32 LUNs constitutes page stripe n1, page n2 of Plane 2 of Block m of each of the 32 LUNs constitutes page stripe n2, and page n3 of Plane 3 of Block m of each of the 32 LUNs constitutes page stripe n3. As an example, in addition to physical pages n0-n3, other physical pages of LUN 31 are also used to store check data.

[0006] like Figure 1 As shown in the figure, taking 31 LUNs as an example, LUN 0 to LUN 30, a total of 31 LUNs, are used to store user data, and LUN 31 is used to store verification data. The write granularity is 4 pages, and each multi-plane program write command writes data to 4 physical pages, page i0 to page i3 (i is an integer greater than or equal to 0).

[0007] When reading data, if the read data is erroneous, the erroneous data can be restored by reading other data of the page stripe described by the physical page where the data is located and calculating XOR (exclusive OR) of all other read data.

[0008] When writing data, the written user data is written to each physical page of the page stripe. In addition, each user data is XORed with the data in the verification data buffer, and the result is retained in the verification data buffer to generate verification data for the page stripe. After all user data of the page stripe is written, the data in the verification data buffer is the verification data of the page stripe. The verification data must also be written to the page stripe.

[0009] When the host is about to lose power, if the data of a page stripe has not been completely written, if only three pages of user data have been written to the stripe at this time, after powering on again, the temporary verification data saved in the memory is lost, and user data cannot be directly written to the page stripe. Instead, the following steps need to be performed:

[0010] The first step is to read the three pages of user data written in the page stripe in sequence: Data_1_0 / Data_1_1 / Data_1_2;

[0011] The second step is to recalculate the check data of the three pages of data: Data_1_0XOR Data_1_1XOR

[0012] Data_1_2;

[0013] The third step is to write the generated verification data into the verification data buffer in the memory;

[0014] The fourth step is to respond to the host's write command and write the user data carried by the write command into other blank physical pages in the stripe; at the same time, perform an XOR operation on the user data carried by the write command and the verification data recovered from the verification data buffer to calculate the verification data of the page stripe.

[0015] In the above process, because the first to third steps are required to restore the verification data in the memory before power failure, a large delay is caused when the write command is processed after power failure and restart.

[0016] Some methods have been proposed to solve the above problem. For example, when the power is off, the page stripe is filled up (by actively filling data), so that the verification data is recorded on the page stripe. The disadvantage of this method is that the filling data increases the amount of data written to the NAND flash memory. If the power is frequently lost when a small amount of data is written to the page stripe, the amount of data written to the NAND flash memory will increase, which will accelerate the consumption of the life of the solid-state storage device.

[0017] Another method is to power off directly without filling up the page stripe when the power is off. After the next power-on, the data written into the page stripe is read and the check data is calculated. This method will increase the power-on initialization time if the page stripe is large.

[0018] Another approach is to not fill the page stripe when the power is off, but store the intermediate state check data when the power is off in a dedicated block of the NAND flash memory. The intermediate state check data is read out after the next power-on. This method requires additional management of the block storing the intermediate state check data, which increases complexity.

[0019] Another approach is to not fill up the page stripe when power is off, but store the intermediate state check data as user data in the current page stripe. At the next power-on, initialize the check data buffer in the memory with all 0s. After power-on, for the newly received host write command, write the data carried by the write command to the page stripe, and calculate the check data according to the existing process (by XORing the data carried by the write command with the data in the check data buffer). The advantage of this method is that when power is on, there is no need to read the data in the page stripe to calculate the intermediate state check data.

[0020] When writing data to NAND flash memory with a 4-page granularity using the Multi-Plane-Program command, the 4 physical pages being written belong to 4 page stripes. Data is written to these 4 page stripes at the same time. In the event of an abnormal power failure, if there are page stripes that are not fully filled, the number of them is also 4. However, there are inevitably some bad blocks in the NAND flash memory. This results in one or more of the 4 physical pages accessed by a single Multi-Plane-Program command possibly belonging to bad blocks, and thus no data needs to be written. Under normal circumstances, when constructing a page stripe, the position of the check page in the page stripe can be selected to ensure that when writing data to the check page, the corresponding 4 physical pages are all from good blocks. However, in the event of an abnormal power failure, it cannot be guaranteed that the 4 physical pages corresponding to the physical page at the position where the page stripe is being written are all from good blocks, and it is even impossible to find a position whose corresponding 4 physical pages are all from good blocks, which results in the inability to write the intermediate check data of the current 4 page stripes to the NAND flash memory using a single Multi-Plane-Program command. Moreover, the association between the intermediate check data and its user data in terms of physical address is destroyed, and the physical pages where the intermediate check data and the corresponding user data are located may no longer have the same physical page number, which in turn raises the problem of how to restore the intermediate check data after the next power-on, and how to use the intermediate check data to reconstruct the erroneous data when an error occurs in reading data.

[0021] There is a need to address one or more of the above technical issues. Summary of the invention

[0022] The purpose of the present application is to provide a RAID5 parity data power failure processing method, which is used to improve the speed of recovering the intermediate state parity data of the page stripe after power failure, and provide protection for the data in the incomplete stripe data. The method provided by the present application can easily reconstruct the read error data when a read error occurs in the incomplete stripe, and when a read error occurs, there is no need to change the data reconstruction process, thereby not introducing additional R&D costs and technical complexity.

[0023] To achieve the above-mentioned purpose, as a first aspect of the present application, the present application provides a RAID5 parity data power-off processing method, the method comprising the following steps:

[0024] In response to a power failure, obtaining intermediate state verification data of an incompletely written page stripe;

[0025] Determine whether the page stripe with unwritten data is sufficient to write the intermediate state verification data. If so, directly write the intermediate state verification data into the page of the page stripe with unwritten data. Otherwise, after the page stripe is fully written with the intermediate state verification data, the remaining unwritten intermediate state verification data is written into the page of the page stripe storing the verification data.

[0026] The RAID5 parity data power failure processing method as described above, wherein, in response to power-on, the intermediate parity data is restored.

[0027] In the above-mentioned RAID5 parity data power failure processing method, when the number of LUN pages provided by the LUNs of the intermediate parity data is greater than 4, 0 is written in the remaining pages.

[0028] The RAID5 check data power failure processing method as described above, wherein, according to the address of the page where the intermediate check data is written, the page where the intermediate check data is written is read into the check data buffer as the intermediate check data,

[0029] In response to receiving a write command to write data to the storage device, the data to be written is XORed with the intermediate state verification data in the verification data buffer to calculate new intermediate state verification data of the page stripe.

[0030] In the above-mentioned RAID5 parity data power-off processing method, in response to a RAID read error, when restoring the read error page, data of all pages in which the intermediate parity data is written are deleted.

[0031] As described above, in the RAID5 parity data power-off processing method, when recovering a read error page, if the page stripe to which the read error page belongs has been completely written, the data of all pages on which the intermediate parity data is written are discarded, and the remaining physical page data is used for XOR calculation to recover the read error page.

[0032] The RAID5 parity data power failure processing method as described above, wherein, obtaining the location of the page where the intermediate parity data is written on the LUN;

[0033] According to the different locations of the pages where the intermediate verification data is written on the LUN, a corresponding verification data recovery method is executed.

[0034] As a second aspect of the present application, the present application provides a method for processing power failure of RAID5 check data, which recovers the intermediate check data in response to power-on;

[0035] If the page where the intermediate checksum data is written exists on a single LUN, initialize the intermediate checksum data of the page stripe to all 0s and continue writing data to the page stripe. If the page where the intermediate checksum data is written exists on multiple LUNs,

[0036] The data of different pages into which the intermediate state verification data is written are read out to the verification data buffer of the corresponding page stripe.

[0037] The RAID5 verification data power-off processing method as described above, wherein, after power-on, when a read data error occurs during processing of a read command, the erroneous data is reconstructed.

[0038] In the above-mentioned RAID5 parity data power failure processing method, reconstructing the read error data includes:

[0039] Treat the page where the intermediate state verification data is written as normal data.

[0040] The RAID5 check data power failure processing method as described above, wherein the data of different pages in which the intermediate check data is written are read out to the check data buffer of the corresponding page stripe comprises:

[0041] Read [part n3] into the page stripe PS n1 check data buffer:

[0042] The intermediate state check data of page stripe PS n1 = [lun0 page n1]xor [lun1 page n1]xor [lun2page n1]xor [lun3 page n1]xor [lun4 page n1]xor [lun5page n1]xor [part n1]xor [part n3] = [part n3].

[0043] The RAID5 check data power failure processing method as described above, wherein the data of different pages in which the intermediate check data is written are read out to the check data buffer of the corresponding page stripe comprises:

[0044] Read [part n2] into the page stripe PS n2 check data buffer:

[0045] The intermediate state check data of page stripe PS n2 = [lun0 page n2]xor [lun1 page n2]xor [lun2page n2]xor [lun3 page n2]xor [lun4 page n2]xor [lun5page n2]xor [dummy] = [partn2].

[0046] The RAID5 check data power failure processing method as described above, wherein the data of different pages in which the intermediate check data is written are read out to the check data buffer of the corresponding page stripe comprises:

[0047] Read [part n3] into the page stripe PS n3 check data buffer:

[0048] The intermediate state check data of page stripe PS n3 = [lun0 page n3]xor[lun1 page n3]xor[lun2page n3]xor[lun3 page n3]xor[lun4 page n3]xor[lun5page n3] = [part n3].

[0049] In the above-mentioned RAID5 parity data power-off processing method, if the 4 part nx stored in the intermediate parity data saved when the storage device is powered off are distributed on 2 consecutive LUNs, the intermediate parity data of each page stripe when the storage device is powered on is obtained as follows:

[0050] The intermediate state check data of page stripe PS n0 = [part n1];

[0051] Intermediate state check data of page stripe PS n1 = [part n1] xor [part n2];

[0052] Intermediate state check data of page stripe PS n2 = [part n2] xor [part n3];

[0053] The intermediate state check data of page stripe PS n3 = [part n3].

[0054] In the above-mentioned RAID5 parity data power-off processing method, if the 4 part nxs of the intermediate parity data saved when the storage device is powered off are distributed on 3 consecutive LUNs, the intermediate parity data of each page stripe when the storage device is powered on is obtained as follows:

[0055] Intermediate state check data of page stripe PS n0 = [part n0]xor [part n0]xor [part n1]xor [part n2] = [part n1]xor [part n2];

[0056] Intermediate state check data of page stripe PS n1 = [part n1] xor [part n3];

[0057] Intermediate state check data of page stripe PS n2 = [part n2];

[0058] The intermediate state check data of page stripe PS n3 = [part n3].

[0059] In the above-mentioned RAID5 parity data power-off processing method, if the intermediate parity data saved when the storage device is powered off saves 4 part nx distributed on 4 consecutive luns, the intermediate parity data of each page stripe when the storage device is powered on is obtained as follows:

[0060] Intermediate state check data of page stripe PS n0 = [part n1]xor[part n2]xor[part n3];

[0061] Intermediate state check data of page stripe PS n1 = [part n1];

[0062] Intermediate state check data of page stripe PS n2 = [part n2];

[0063] The intermediate state check data of page stripe PS n3 = [part n3].

[0064] In the RAID5 parity data power failure processing method as described above, when the pages to which the intermediate parity data are written are distributed on multiple consecutive LUNs, if the page stripe is complete, other pages of the page stripe are read XORed to recover the read error data.

[0065] As described above, in the RAID5 checksum data power-off processing method, when the pages to which the intermediate checksum data is written are distributed on multiple consecutive LUNs, if the page stripe is incomplete, any page of any logical unit is read incorrectly, the current checksum data of the restored page stripe is copied to the read XOR memory, and then the pages of the XOR or other logical units are read to restore the page data of the logical unit.

[0066] As a third aspect of the present application, the present application provides an information processing device, comprising a memory, a processor, and a program stored in the memory and executable on the processor, wherein the processor implements the method according to any one of claims 1 to 18 when executing the program.

[0067] The beneficial effects achieved by this application are as follows:

[0068] (1) When a storage device using the present application encounters a power outage, even if a bad block is encountered at the current write position of the page stripe, the intermediate state verification data can be quickly and completely saved;

[0069] (2) This application is used to increase the speed of recovering page stripe intermediate state check data after power failure.

[0070] (3) The method of powering on and recovering verification data in the present application can provide protection for data in incomplete stripe data, and when a read error occurs, there is no need to change the data reconstruction process, thereby not introducing additional R&D costs and technical complexity. BRIEF DESCRIPTION OF THE DRAWINGS

[0071] In order to more clearly illustrate the embodiments of the present application or the technical embodiments in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present application. For those skilled in the art, other drawings can also be obtained based on these drawings.

[0072] Figure 1 This is an example diagram of a lun31+1 RAID stripe distribution in an embodiment of the present application.

[0073] Figure 2 The present invention is a flowchart of a method for processing power failure of RAID5 verification data according to an embodiment of the present invention.

[0074] Figure 3A In the embodiment of the present application, the inter-state verification data only needs to be written into the example diagram of the same lun.

[0075] Figure 3B This is an example diagram of an embodiment of the present application in which the intermittent check data only needs to be written into multiple luns.

[0076] Figure 4 This is a flowchart of a method for powering on and recovering verification data according to an embodiment of the present application.

[0077] Figure 5 This is a flowchart of another method for powering on to recover verification data according to an embodiment of the present application. DETAILED DESCRIPTION

[0078] The following is a clear and complete description of the technical embodiments in the embodiments of the present application in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0079] (I) Stripe / page stripe structure of this application

[0080] Bad blocks are inevitable in NAND flash memory. In the example where a LUN consists of four planes, the Multi-Plane-Program command is used to write data to the NAND flash memory at a 4-page granularity. These four pages are recorded as Page i0, Page i1, Page i2, and Page i3 (i represents the number of the physical page in the plane). These four pages belong to four page stripes.

[0081] See also Figure 1Taking the construction of stripes on 32 LUNs as an example, in this application, 32 Blocks m of a Plane with the same Plane number (denoted as x) from each of the 32 LUNs, and their respective Page ix constitute a page stripe (denoted as PSix), and the page stripe includes 32 physical pages.

[0082] In the case that a certain Block m among the aforementioned 32 Block m is a bad block ( Figure 1 In the example, Block m of Plane 0 from LUN 1 is a bad block), and the physical page (Page i0) of the page stripe PS ix (where x=0, 0 is the number of Plane 0) provided by the bad block cannot be used. In the page stripe construction method of the present application, the bad block is replaced by Block m of other Planes belonging to the same LUN as the bad block (Block m of Plane 0 of LUN 1), and the replacement is in the order of Plane number. For example, Block m of Plane 0 of LUN 1 is a bad block, and when constructing the stripe, the bad block is replaced by Block m of Plane 1 of LUN 1. It can be understood that when replacing, the replaced bad block has the same LUN number and physical block number as the corresponding good block, but a different Plane number, and the Plane number of the good block is greater than the Plane number of the bad block. And, preferably, the Plane number of the good block is the Plane number of the corresponding bad block + 1. If the bad block's Plane number + 1 is still a bad block, the Plane number will continue to increase (+1) until a good block is found or the upper limit of the Plane number is exceeded ( Figure 1 In the example, 3). If the Plane number exceeds the upper limit and no good block is found for replacement, the LUN where the bad block is located will no longer provide physical pages for the page stripe. When a good block for replacement is found, the physical page i of the good block is used to replace the physical page that cannot be used due to the bad block.

[0083] Furthermore, in the case where a Block m of the aforementioned 32 Block m has been used to replace a bad block to construct a stripe ( Figure 1 In the example, Block m from Plane 1 of LUN 1 is used to replace the bad block Block m of Plane 0. The physical page (Page ix) that should be provided to the page stripe PS ix and is used to replace the bad block Block m is already occupied, so another good block needs to be found in the same way to replace it.

[0084] exist Figure 1In the example, the physical page (Page i0) of Block m in Plane 0 from LUN 1 cannot be used. In page stripe PS i0, Page i0 is replaced by Page i1. Refer to Figure 1 , where each physical page of Plane 0 of Block m in LUN 1 has a dark background, indicating that it belongs to a bad block, and each physical page of Plane 1 of Block m in LUN 1 is labeled as pagei0 (0 <= i < N, N is the number of physical pages in a physical block within a plane), rather than page i1, that is, it means that Page i0 is used to replace page i on its left in page stripe PS i0.

[0085] Furthermore, since each physical page of Plane 1 of Block m in LUN 1 is used to replace each physical page of Plane 0 of Block m in LUN 1 in page stripe PS i0, each physical page of Plane 2 of Block m in LUN 1 is further used to replace each physical page of Plane 1 of Block m in LUN 1 in page stripe PS i1, and each physical page of Plane 3 of Block m in LUN 1 is used to replace each physical page of Plane 2 of Block m in LUN 1 in page stripe PS i2. And for the page stripe PS i3 of Block m from each of the 32 LUNs, since the Plane number has reached the upper limit and there are no available physical pages, the page stripe PS i3 does not include physical pages from LUN 1.

[0086] Since there are only 3 good blocks in LUN 1, the fourth stripe (denoted as Stripe m3) among the 4 stripes (denoted as Stripe m0, m1, m2, and m3 respectively) corresponding to 4 Blocks m of 4 Planes in LUN 1 does not contain Block m from LUN 1, and the page stripe PS i3 does not include physical pages from LUN 1.

[0087] According to the stripe / page stripe construction method of the embodiment of the present application, only relying on the position of the bad blocks in each LUN, it is possible to identify which blocks in the LUN belong to the same stripe, which physical pages belong to the same page stripe, and to obtain all the physical pages included in a certain page stripe, without having to record the addresses of each physical block for each stripe, nor the addresses of each physical page for each page stripe. When it is necessary to use the page stripe for data reconstruction, even if there are bad blocks, the numbers of each physical page of the page stripe can be calculated based on the physical page with read data errors and the bad block positions of each LUN. For example, the physical page with read data errors is Page d of Block c of Plane b of LUN a. The number of bad blocks (denoted as ka) of the four Block cs of Plane 0 to Plane 3 is obtained through the bad block information of LUN a, and the page stripe to which the page db with read data errors belongs is PS d (b-ka). Accordingly, the physical pages provided by the page stripe PS d (b-ka) for other LUNs other than LUN a are determined. For example, for LUN 0, the number of bad blocks in the four Blocks c from Plane 0 to Plane 3 is k0, then the physical page provided by LUN 0 for the page stripe PS d (b-ka) is the physical page d provided by the b-kath Block c in the order of the Plane numbers of the four Blocks c from Plane 0 to Plane 3. And if k0>ka, LUN 0 does not provide a physical page for the page stripe PS d (b-ka).

[0088] The parity data of the stripe / page stripe is recorded in the LUN that provides the most good blocks or the physical pages corresponding to the most good blocks for the stripe / page stripe, specifically, in the physical blocks or physical pages provided by the LUN for the stripe / page stripe. For example, Figure 1 In the example, Block m of each of the four Planes of LUN 31 is a good block, so LUN 31 is selected to record the check data. It should be understood that the check data recorded by LUN 31 is not the intermediate check data of the page stripe, but the check data generated by all 31 pages of user data in the page stripe (also called complete check data).

[0089] (II) Power-off processing of intermediate state verification data in this application

[0090] When writing data to a storage device, the storage device allocates page stripes to carry the written data. When the write granularity is 4 physical pages, the 4 page stripes corresponding to each of the 4 physical pages carry the written data at the same time. If the storage device loses power when the 4 page stripes are not fully written (the corresponding complete verification data has not yet been generated), it needs to be handled according to the method provided in the embodiment of the present application.

[0091] like Figure 2As shown, the present application provides a method for power-off processing of RAID5 verification data, the method comprising the following steps:

[0092] Step S1, in response to a power failure, obtaining intermediate state verification data of an incompletely written page stripe.

[0093] The incompletely written page stripe is the page stripe that has not yet obtained complete verification data.

[0094] Step S2, determine whether the incomplete page stripe is sufficient to write the intermediate state verification data. If so, directly write the intermediate state verification data into the page of the page stripe where no data is written. Otherwise, after the page stripe is fully written with the intermediate state verification data, the remaining unwritten intermediate state verification data is written into the page of the page stripe where the verification data is stored.

[0095] (1) In a set of examples, for example, a page stripe includes 31+1 physical pages. When a power failure occurs, 10 pages of user data have been written, and the size of the intermediate state check data is 1 physical page. In step S2, the intermediate state check data is written into the page stripe.

[0096] In another example, when power failure occurs, 30 pages of user data have been written. At this time, after the intermediate state check data is written in step S2, the 31 physical pages of the page stripe are all full, and then the complete check data can be generated in step S2 and also written into the page stripe.

[0097] In another example, when power failure occurs, 30 pages of user data have been written. The next physical page containing user data comes from a bad block and cannot be written. At this time, the intermediate state check data is equivalent to the complete check data, and the physical page from the bad block is skipped, and the complete check data is written into the page stripe in step S2.

[0098] In another example, when power failure occurs, 31 pages of user data have been written in. At this time, complete verification data is generated in step S2 and written into the page stripe.

[0099] (2) As another example, four page stripes associated with the same Multi-Plane Program command are used to carry write data, and each page stripe includes, for example, 31+1 physical pages. When power failure occurs, each page stripe has been written with 10 pages of user data, and the size of the intermediate state check data of each page stripe is 1 physical page. In step S2, the intermediate state check data of each page stripe is written to the page stripe through 1 Multi-Plane Program command. Next, the storage device can be powered off, and at this time, the four page stripes are in a state of not being fully written.

[0100] In another example, when power failure occurs, if 30 pages of user data have been written to each page stripe, and the next 4 physical pages cannot accommodate 4 pages of intermediate state check data due to the presence of bad blocks. In this case, in step S2, part of the intermediate state check data is written to the physical pages from the good blocks in the 4 physical pages, and the remaining intermediate state check data is written to one or more check pages of the 4 page stripes. The unfilled check pages are filled with complete check data.

[0101] Figure 3A Another example is shown. When the power failure occurs, each of the four page stripes has written 6 pages of user data (written to lun 5). At this time, it is checked that the four physical pages provided by lun 6 for these four page stripes are enough to write 4 pages of intermediate state check data, and after writing, these four page stripes are still not full, so the 4 pages of intermediate state check data in the memory are directly written to the 4 physical pages provided by lun6 (i.e. Figure 3A Part n0 to part n3 of lun6 shown in FIG. 1 , where part n0 to part n3 represent physical pages used to store intermediate state verification data).

[0102] You can choose to save the addresses of the four pages of lun6. Here, you can choose to save the address of part nx (the page where the intermediate state check data is written), so that the intermediate state check data of the four page strips can be easily obtained according to the saved address at the next power-on. Optionally, the address of the four physical pages of LUN 6 is not saved, and the method of recovering the stripe intermediate state check data after power-on is introduced later.

[0103] As another specific embodiment of the present invention for storing the intermediate state verification data, before storing the intermediate state verification data, it is determined whether the four physical pages currently used to store the intermediate state verification data in the page stripe are from bad blocks. If there is a bad block, the page in the bad block is padded with 0 data and written together with the intermediate state verification data.

[0104] like Figure 3B As shown, four page stripes (denoted as PS n0, PS n1, PS n2 and PS n3) constructed on 32 LUNs are shown. PS n0 includes page n0 provided by each of the 32 LUNs, PS n1 includes page n1 provided by each of the 32 LUNs, and so on. PS nx includes page nx provided by each of the 32 LUNs. n represents the physical page number.

[0105] When power failure occurs, each of the four page stripes has written 6 pages of user data (written to lun 5). At this time, check whether the four physical pages provided by Lun 6 for these four page stripes are sufficient to write 4 pages of intermediate state verification data. However, lun 6 has only two good blocks (the distribution of good blocks and bad blocks is known when the stripe is enabled and recorded in the NAND flash memory). In LUN 6, the dark page n represents a physical page from a bad block, which cannot be written with data. Therefore, the four physical pages provided by LUN 6 for the four page stripes can only store two physical pages (recorded as part n0 and part n1) (in lun 6). At this time, the method provided in the "Constructing Page Stripes" embodiment in the previous text is used to determine the physical page that accommodates the intermediate state verification data. Specifically, the two available physical pages provided by LUN 6 are provided to page stripes PS n0 and PS n1 in the order of Plane numbers to store the intermediate state verification data ( Figure 3B In the example, the stored intermediate state verification data is recorded as Part n0 and Part n1).

[0106] Since the 4 pages of intermediate check data have not been written into the page stripe, we continue to look for available physical pages from the next lun7. One of the physical pages provided by lun7 for the 4 page stripes (denoted as dark Page n) is from a bad block. In the order of Plane numbers, the physical page from Plane 1 ( Figure 3B In the example, Page n0 and Page n1 of Lun 7 are used to store the remaining 2 pages of intermediate check data (Part n2 and Part n3). At this time, since the 4 physical pages provided by LUN 7 to the 4 page stripes have not been fully written ( Figure 3B In the example, page n2 of LUN 7 has no data), and another page of full 0 data is added to fill page n2 (the filled data is in Figure 3B Here, we need to fill in the zero data, because the result of XOR calculation of data and all zeros is still the data itself, which will not affect the future reconstruction of the physical page with read errors using RAID technology. At this point, step S2 is completed and the storage device can be powered off.

[0107] Figure 3B In the example, when power failure occurs, 2 of the 4 physical pages of LUN 6, which is to store the intermediate state check data, are from bad blocks, and 1 of the physical pages of LUN 7 is from a bad block. The intermediate state check data is written to 2 LUNs. The worst case is that the intermediate state check data needs to be written to 4 LUNs. Each of these 4 LUNs only provides 1 available physical page to the 4 page stripes.

[0108] As an optional embodiment of the present invention, the address of the physical page where the intermediate state verification data is written is also saved. Figure 3BFor example, the addresses of the four physical pages recording part nx (x=0, 1, 2, 3) are also saved to facilitate the recovery of the verification data after power-on and to continue writing data to the page stripe. It can be understood that after power-on, after continuing to write data to the page stripe, before the page stripe is full, the storage device may lose power again soon. At this time, the same method as above is used to process the intermediate state verification data, and there are multiple pages of intermediate state verification data in the page stripe. Due to the uncertain location and number of part nx (the page where the intermediate state verification data is written), it is not necessary to record the locations of all part nx of the page stripe, so only the part nx address at the time of this power failure needs to be saved, and the part nx address saved before the last power failure can be overwritten or discarded.

[0109] There are multiple ways to recover the intermediate state check data when the storage device is powered on.

[0110] It is important to understand that if the page stripe is fully written when the storage device is powered off, the check data buffer is initialized to 0 when the storage device is powered on.

[0111] According to whether to use the address of the physical page storing the intermediate state verification data recorded when the storage device is powered off, two sets of technical solutions (three) and (four) are provided. In (three), the previously recorded physical page address is used to restore the intermediate verification data when the storage device is powered on. However, (four) does not need to use the previously recorded physical page address, so it is also applicable to the case where the physical address used is not recorded when the storage device is powered off and the intermediate state verification data is recorded.

[0112] (III) Power-on recovery of intermediate state verification data and reconstruction of read error data - 1

[0113] like Figure 4 As shown, the present application provides a first method for powering on to recover verification data, the method comprising:

[0114] Step S410 , according to the address of the page where the intermediate state verification data is written, read the intermediate state verification data in the page where the intermediate state verification data is written into the verification data buffer as the intermediate state verification data.

[0115] Step S420, in response to receiving a write command to write data to the storage device, XOR calculation is performed on the data to be written and the intermediate state verification data in the verification data buffer to calculate new intermediate state verification data of the page stripe.

[0116] The result of the XOR calculation is retained in the verification data buffer and used as new intermediate verification data to replace the previous intermediate verification data.

[0117] As a specific embodiment of the present invention, according to the address of part nx (the page where the intermediate state verification data is written) stored before power failure, part nx (the page where the intermediate state verification data is written) is read into the memory, and data can be continuously written to the page stripe. The written data will first be XORed with the intermediate state verification data in the verification data buffer.

[0118] For example, when reconstructing a page with a read error, if the page stripe to which the page with the read error belongs has been completely written (complete verification data is stored on it), the data of all pages with intermediate verification data written on it are eliminated, and the remaining physical page data is used for XOR calculation to restore the page with the read error.

[0119] For example, another situation is that the page stripe to which the page with read error belongs is not written completely, such as Figure 3B As shown, if lun5page n2 is read incorrectly, it is necessary to read page n2 of lun 0~lun 4 and part n2 of lun 7 for XOR calculation to restore lun 5page n2 data. If lun 0~lun4 have intermediate check data, it also needs to be discarded.

[0120] In some cases, when the storage device loses power, not all addresses of part nx (pages with intermediate state verification data written) in the page stripe are saved, but only the latest part nx addresses are saved. For this reason, it is also necessary to mark which physical pages of the page stripe store the intermediate state verification data. As an example, when the storage device loses power and writes the intermediate state verification data, a mark is set in the physical page being written to distinguish whether the physical page stores intermediate state verification data or user data. For example, a mark is stored in the page meta (extra storage space of the physical page) to mark this page as intermediate state verification data. For example, 4 bytes are used exclusively for marking in page meta, and each bit represents a lun. If the lun page is part nx, the bit is set to 1, otherwise it is set to 0, such as Figure 3B The bit 0 of the page meta tag of the data page of lun0 is 0. Figure 3B The page of lun 6 is the intermediate state check data, so the bit 6 of the page meta tag will be set to 1. The 4-byte tag is 00000040h (hexadecimal), and the page meta tag of lun 7 is 00000080h (hexadecimal).

[0121] Still see Figure 3B , when a read error occurs (for example, Figure 3BIn the displayed LUN 0 page n0 is read incorrectly), the page meta tags of lun 1 to lun31 page n0 of the stripe to which the page to be read incorrectly belong are all read out and XORed, and the result is recorded as page meta flag = 000000C0h (hexadecimal), where bit 6 and bit 7 are 1 and the other bits are 0, which means that lun 6 and lun 7 are part nx, and the part nx of LUN 6 records the intermediate state check data of the read error page (page n0 of LUN 0). As long as page n0 of LUN 1 to LUN5 is read out, and then the data of lun 6 part n0 is read out and XORed, the correct lun 0 page n0 data can be obtained.

[0122] Optionally, the tag in the page meta does not need to occupy 4 bytes, but only 1 bit is used to mark whether it is partnx. When a read error occurs, the page meta of each page stripe is read out to check whether the physical page is partnx.

[0123] Since it is necessary to identify the tags in the page meta, the technical solution (three) provides a method for restoring the intermediate state verification data upon power-on. However, it is troublesome to reconstruct the erroneous data when a read error occurs, so another method for restoring the intermediate state verification data upon power-on is provided.

[0124] (IV) Power-on recovery of intermediate state verification data and reconstruction of read error data-2

[0125] Technical solution (IV) is also used to recover the intermediate state verification data when the storage device is powered on, but the difference from solution (III) is that there is no need to use the previously recorded physical page address of part nx.

[0126] In solution (iv), the intermediate state check data saved before power failure is treated as ordinary user data on the page stripe.

[0127] like Figure 5 As shown, the method specifically includes:

[0128] Step S610, obtaining the location of the page where the intermediate verification data is written on the LUN.

[0129] Step S620 , executing a corresponding verification data recovery method according to the location of the page where the intermediate verification data is written on the LUN.

[0130] Specifically, according to the different locations of the pages where the intermediate state verification data is written on the LUN, executing the corresponding verification data recovery method includes:

[0131] If the page where the intermediate check data is written exists on a single LUN, the page where the intermediate check data is written is treated as normal data, the intermediate check data of the page stripe is initialized to all 0s, and data continues to be written to the stripe.

[0132] for Figure 3A In the case of the above example, the intermediate parity data of the four page stripes are all located in a single LUN. When the storage device is powered on, the parity data buffer in the memory is set to all 0s, because Figure 3A The XOR result of page nx from LUN 5 to LUN5 and part nx of LUN6 is all 0.

[0133] If the page where the intermediate checksum data is written exists on multiple LUNs (for example, Figure 3B In the case of a situation where the host is powered on, the page where the intermediate state verification data is written is treated as ordinary data, and the data of different pages where the intermediate state verification data is written is read out to the verification data buffer of the corresponding page stripe.

[0134] by Figure 3B For example, if part nx is regarded as normal data, then [part nx] = [lun0 pagenx]xor [lun1 page nx]xor [lun2 page nx]xor [lun3 page nx]xor [lun4page nx]xor [lun5 page nx], where the symbols in [] represent physical pages, and [] represent the data stored on the physical pages. And according to the page stripe construction method provided in "(I) Stripe / Page Stripe Construction" above, Figure 3BIn the figure, page stripe PS n0 includes page n0 of LUN0-LUN 5, page n0 of LUN 6 and page n0 of LUN 7; page stripe PS n1 includes page n1 of LUN 0-LUN 5, page n1 of LUN 6 and page n1 of LUN 7; page stripe PS n2 includes page n2 of LUN 0-LUN 5 and page n2 of LUN 7; page stripe PS n3 includes page n3 of LUN 0-LUN 5. It should be understood that the value recorded in Page n0 of LUN 7 is [Part n2], which is the intermediate state check data of page stripe PS n2 when power is off, but in this embodiment, it is used as ordinary user data, and according to the page stripe construction method provided in "(I) Stripe / Page Stripe Construction", it also belongs to one of the physical pages storing ordinary user data of page stripe PS n0. Similarly, Page n1 of LUN 6 records the intermediate state check data of PS n1 when the storage device is powered off. According to the page stripe construction method provided in "(I) Stripe / Page Stripe Construction", it also belongs to one of the physical pages storing ordinary user data of page stripe PS n1. Page n1 of LUN 7 belongs to one of the physical pages storing ordinary user data of page stripe PS n1. Page n2 of LUN 7 belongs to one of the physical pages storing ordinary user data of page stripe PS n2. LUN6 does not provide physical pages for PS n2 and PS n3. LUN7 does not provide physical pages for PS n3.

[0135] Therefore, when the storage device is powered on, the current intermediate check data in the check data buffer that needs to be restored for page stripe PS n0 = [lun0 page n0]xor [lun1 page n0]xor [lun2 page n0]xor [lun3 page n0]xor [lun4 page n0]xor [lun5 page n0]xor [part n0]xor [part n2] = [part n0]xor [part n0]xor [part n2] = [part n2]. Thus, the check data buffer for page stripe PS n0 is initialized with [part n2]. When the next piece of data is subsequently written to page stripe PS n0, the intermediate check data [part n2] in the check data buffer and the written data are used to calculate new intermediate check data.

[0136] Similarly, when the storage device is powered on, the intermediate state check data in the check data buffer of page stripe PS n1 = [lun0 page n1]xor [lun1 page n1]xor [lun2 page n1]xor [lun3 page n1]xor [lun4page n1]xor [lun5 page n1]xor [part n1]xor [part n3] = [part n3]. Thus, [part n3] is read out to the check data buffer of PS n1. When the next piece of data is subsequently written to page stripe PS n1, the intermediate state check data [part n3] in the check data buffer is used to calculate the new intermediate state check data with the data being written.

[0137] Since the dummy data stored in Page n2 of LUN 7 is all 0,

[0138] Therefore, when the storage device is powered on, the intermediate state check data in the check data buffer of page stripe PS n2 = [lun0 page n2]xor [lun1 page n2]xor [lun2 page n2]xor [lun3 page n2]xor [lun4page n2]xor [lun5 page n2]xor [dummy] = [part n2], so that [part n2] is read out to the check data buffer of page stripe PS n2. When the next piece of data is subsequently written to page stripe PS n2, the intermediate state check data [part n2] in the check data buffer and the written data are used to calculate new intermediate state check data.

[0139] When the storage device is powered on, the intermediate state check data in the check data buffer of the page stripe PS n3 = [lun0page n3]xor[lun1 page n3]xor[lun2 page n3]xor[lun3 page n3]xor[lun4 page n3]xor[lun5 page n3] = [part n3];

[0140] Thus, [part n3] is read out to the PS n3 check data buffer. When the next piece of data is subsequently written to the page stripe PS n3, the intermediate check data [part n3] in the write check data buffer and the written data are used to calculate new intermediate check data.

[0141] In summary, the intermediate state check data in the check data buffer of the page stripe PS nx when the storage device is powered on can be recovered. When data is subsequently written to the page stripe PS nx, the intermediate state check data [part n3] in the write check data buffer and the written data are used to calculate new intermediate state check data.

[0142] Solution (iv) is used to restore the intermediate state check data when the storage device is powered on, so that when a read data error is encountered later and the erroneous data needs to be reconstructed using page stripes, part nx does not need to be eliminated. Therefore, there is no need to design a reconstruction process for the read error data, and the existing erroneous data reconstruction process for RAID5 can be used.

[0143] Figure 3B The situation shown is that the four part nxs saved by the intermediate state verification data saved when the storage device is powered off are distributed on two consecutive LUNs, and each LUN stores two part nxs.

[0144] If the 4 part nx stored in the intermediate state check data saved when the storage device is powered off are distributed on two consecutive LUNs, and the first and second LUNs store 1 part nx and 3 part nx respectively, if the latter LUN can provide 4 available physical pages, the last physical page needs to be filled with all 0s. In this case, the intermediate state check data of each page stripe when the storage device is powered on is obtained as follows:

[0145] The intermediate state check data in the check data buffer of page stripe PS n0 = [part n1];

[0146] The intermediate state check data in the check data buffer of page stripe PS n1 = [part n1] xor [part n2];

[0147] The intermediate state check data in the check data buffer of page stripe PS n2 = [part n2] xor [part n3];

[0148] The intermediate state check data in the check data buffer of page stripe PS n3 = [part n3].

[0149] If the 4 part nx stored in the intermediate state check data saved when the storage device is powered off are distributed on 3 consecutive LUNs, and the first and last 3 LUNs store 1 part nx, 1 part nx, and 2 part nx respectively, if the last LUN can provide 4 available physical pages, the last 2 physical pages need to be filled with all 0s. In this case, the intermediate state check data of each page stripe when the storage device is powered on is obtained as follows:

[0150] The intermediate state check data in the check data buffer of page stripe PS n0 = [part n0]xor [part n0]xor [part n1]xor [part n2] = [part n1]xor [part n2];

[0151] The intermediate state check data in the check data buffer of page stripe PS n1 = [part n1] xor [part n3];

[0152] The intermediate state check data in the check data buffer of page stripe PS n2 = [part n2];

[0153] The intermediate state check data in the check data buffer of page stripe PS n3 = [part n3].

[0154] The most complex case is that the intermediate state check data saved when the storage device is powered off saves 4 part nx distributed on 4 consecutive luns. In this case, the intermediate state check data of each page stripe when the storage device is powered on is obtained as follows:

[0155] The intermediate state check data in the check data buffer of page stripe PS n0 = [part n1]xor[part n2]xor[part n3];

[0156] The intermediate state check data in the check data buffer of page stripe PSn1 = [part n1];

[0157] The intermediate state check data in the check data buffer of page stripe PS n2 = [part n2];

[0158] The intermediate state check data in the check data buffer of page stripe PS n3 = [part n3].

[0159] Regardless of how the four parts nx saved by the intermediate state check data saved when the storage device is powered off are distributed on the LUN, the method for restoring the intermediate state check data required for each page stripe when the storage device is powered on is to use [part nx] as ordinary user data, and according to the page stripe construction method provided in "(I) Stripe / Page Stripe Construction" in the previous text, obtain each physical page belonging to each page stripe, and perform XOR on the data stored in the physical page that has been written with ordinary data in each physical page to obtain the intermediate state check data. However, through the generation method of part nx saved at power off, the XOR result of it and the data used to generate it is 0, so there is no need to read out the ordinary data used to generate part nx saved at power off, and only [part n1], [part n2] and [part n3] need to be read, and the intermediate state check data required for each page stripe is obtained through further XOR calculation.

[0160] In this case, compared with the method of restoring the intermediate state check data in the above embodiment (III), one less page of part n0 is read, but several XOR operations need to be performed. Obviously, for a storage device, the cost of calculating the XOR operation is significantly lower than reading data from a physical page.

[0161] In the embodiment of scheme (IV), the process of reconstructing the erroneous data when reading data errors occurs is relatively simple, and is basically the same as the data reconstruction method of RAID5.

[0162] There are two cases for reconstructing read error data: (1) For a complete page stripe, only the pages other than the error page in the page stripe need to be read out and XORed to reconstruct the read error data. (2) For an incomplete page stripe, Figure 3BFor example, assuming that lun0 page n0 is read incorrectly, we only need to use the intermediate state check data of page stripe n0 recovered previously, and then XOR it with page n0 of lun 1 to lun7 to recover the data of lun0 page n0, that is, [lun0 page n0] = [current intermediate state check data of PS n0] xor [lun1 page n0] xor [lun2 page n0] xor [lun3 pagen0] xor [lun4 page n0] xor [lun5 page n0] xor [part n0] xor [part n2]. Optionally, if the page stripe is written with data again after power-on, the intermediate state check data will change. When reconstructing the read error data, the current intermediate state check data is used. Another reconstruction method of lun0 page n0 is to select to read page n0 and part n0 of lun 1 to lun5 to recover the data, that is, [lun0 page n0] = [lun1 page n0]xor[lun2page n0]xor[lun3 page n0]xor[lun4 page n0]xor[lun5 page n0]xor[part n0].

[0163] The method for recovering the intermediate state check data on power-up of solution (three) of the present application and the method for recovering the intermediate state check data on power-up of solution (four) can both protect incomplete stripe data. The advantage of the method for recovering the check data on power-up of solution (four) is that the process of reconstructing the read error data is simpler when encountering a read error, while the process of recovering the intermediate state check data on power-up of the embodiment of solution (three) is simpler when there are many bad blocks.

[0164] The present application provides an information processing device, including a memory, a processor, and a program stored in the memory and executable on the processor, wherein when the processor executes the program, any one of the RAID5 verification data power-off processing methods described above is implemented.

[0165] The present application also provides a computer storage medium, wherein the computer storage medium stores computer instructions, and when the computer instructions are called, they are used to execute the address mapping method of the large-capacity solid-state hard disk. The computer storage medium contains one or more program instructions, and the one or more program instructions are used by the processor to execute a RAID5 verification data power-off processing method.

[0166] The embodiment disclosed in the present invention provides a computer-readable storage medium, in which computer program instructions are stored. When the computer program instructions are executed on a computer, the computer executes the above-mentioned RAID5 verification data power-off processing method.

[0167] An embodiment of the present invention provides a processor for processing the above-mentioned RAID5 verification data power-off processing method.

[0168] In the embodiment of the present invention, the processor may be an integrated circuit chip having the ability to process signals. The processor may be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components.

[0169] The methods, steps and logic block diagrams disclosed in the embodiments of the present invention can be implemented or executed. The general processor can be a microprocessor or the processor can also be any conventional processor, etc. The steps of the method disclosed in the embodiments of the present invention can be directly embodied as a hardware decoding processor for execution, or can be executed by a combination of hardware and software modules in the decoding processor. The software module can be located in a mature storage medium in the field such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The processor reads the information in the storage medium and completes the steps of the above method in combination with its hardware.

[0170] The storage medium may be a memory, which may be, for example, a volatile memory or a nonvolatile memory, or may include both volatile and nonvolatile memory.

[0171] Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory can be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM) and direct RAM bus random access memory (DRRAM).

[0172] The beneficial effects achieved by this application are as follows:

[0173] (1) When a storage device using the present application encounters a power outage, even if a bad block is encountered at the current write position of the page stripe, the intermediate state verification data can be quickly and completely saved;

[0174] (2) This application is used to increase the speed of recovering page stripe intermediate state check data after power failure.

[0175] (3) The method of powering on and recovering verification data in the present application can provide protection for data in incomplete stripe data, and when a read error occurs, there is no need to change the data reconstruction process, thereby not introducing additional R&D costs and technical complexity.

[0176] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, "plurality" means two or more, unless otherwise clearly and specifically defined.

[0177] In the description of the present application, the word "for example" is used to mean "used as an example, illustration or explanation". Any embodiment described as "for example" in the present application is not necessarily to be construed as being more preferred or advantageous than other embodiments. The following description is given to enable any technician in the field to implement and use the present invention. In the following description, details are listed for the purpose of explanation. It should be understood that a person of ordinary skill in the art can recognize that the present invention can be implemented without using these specific details. In other examples, well-known structures and processes will not be elaborated in detail to avoid obscuring the description of the present invention with unnecessary details. Therefore, the present invention is not intended to be limited to the embodiments shown, but is consistent with the widest scope consistent with the principles and features disclosed in the present application.

[0178] The above description is only an embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent substitution, improvement, etc. made within the spirit and principle of the present invention should be included in the scope of the claims of the present invention.

Claims

1. A method for processing power failure of RAID5 verification data, characterized in that: The method comprises the following steps: In response to a power failure, obtaining intermediate state verification data of an incompletely written page stripe; Determine whether the incomplete page stripe is sufficient to write the intermediate verification data. If so, directly write the intermediate verification data into the page of the page stripe where no data is written. Otherwise, after the intermediate verification data is fully written into the page of the page stripe storing user data, the remaining unwritten intermediate verification data is written into the page of the page stripe storing verification data.

2. The RAID5 parity data power failure processing method according to claim 1, characterized in that: In response to power-on, the intermediate state check data is restored.

3. The RAID5 parity data power failure processing method according to claim 1, characterized in that: When the number of available pages provided by the LUNs storing the intermediate check data in the page stripe for the page stripe is greater than the number of planes in the LUN, 0s are written in the remaining pages after the intermediate check data is written in the LUNs.

4. The RAID5 parity data power failure processing method according to claim 2, characterized in that: in, According to the address of the page where the intermediate state verification data is written, the page where the intermediate state verification data is written is read into the verification data buffer as the intermediate state verification data. In response to receiving a write command to write data to the storage device, the data to be written is XORed with the intermediate state verification data in the verification data buffer to calculate new intermediate state verification data of the page stripe.

5. A method for storing a device, characterized in that: In response to the storage device being powered on, obtaining an incompletely written page stripe; If the pages of the incomplete page stripe to which the intermediate check data is written exist on a single LUN, initializing the intermediate check data of the check data buffer of the incomplete page stripe to all 0s; If the pages of the incomplete page stripe where the intermediate state verification data is written exist on multiple LUNs, data of different pages where the intermediate state verification data is written are read out to the verification data buffer of the corresponding page stripe; Continue writing data to the incompletely written page stripe.

6. The method for storing a device according to claim 5, characterized in that: Reconstructing the read error data using the page stripe to which the read error data belongs through RAID5 includes: The pages of the intermediate state verification data written into the page stripe are treated as ordinary data, so that the pages of the intermediate state verification data written into the page stripe do not need to be identified when reconstructing the data with read errors.

7. The method for storing a device according to claim 6, characterized in that: If the four physical pages part n0, part n1, part n2, and part n3 storing the intermediate state check data of the incomplete page stripe are distributed on two consecutive LUNs when the storage device is powered off, reading the data of different pages with the intermediate state check data written to the check data buffer of the corresponding page stripe includes: The check data buffer of page stripe PSn0 = [part n2]; The check data buffer of page stripe PSn1 = [part n3]; The check data buffer of page stripe PSn2 = [part n2]; The check data buffer of page stripe PSn3 = [part n3], where The n in the page stripes PSn0, PSn1, PSn2 and PSn3 represents the physical page number. The physical pages part n0, part n1, part n2 and part n3 are physical pages that record the intermediate state check data of the page stripes PSn0, PSn1, PSn2 and PSn3 respectively. [partn2] represents the data stored in the physical page part n2, and [part n3] represents the data stored in the physical page part n3.

8. The method for storing a device according to claim 5 or 7, characterized in that: If the four physical pages part n0, part n1, part n2, and part n3 storing the intermediate state check data of the incomplete page stripe when the storage device is powered off are distributed on three consecutive LUNs, then reading the data of different pages with the intermediate state check data into the check data buffer of the corresponding page stripe includes: The check data buffer of page stripe PSn0 = [part n0]xor [part n0]xor [part n1]xor [part n2] = [part n1]xor [part n2]; The check data buffer of page stripe PSn1 = [part n1] xor [part n3]; The check data buffer of page stripe PSn2 = [part n2]; The check data buffer of page stripe PSn3 = [part n3], where The n in the page stripes PSn0, PSn1, PSn2 and PSn3 represents the physical page number. Physical pages part n0, part n1, part n2 and part n3 are physical pages that record the intermediate state check data of page stripes PSn0, PSn1, PSn2 and PSn3 respectively. [partn1] represents the data stored in physical page part n1, [part n2] represents the data stored in physical page part n2, and [part n3] represents the data stored in physical page part n3.

9. The method for storing a device according to claim 5 or 7, characterized in that: If the storage device is powered off and saves the intermediate state check data of the incomplete page stripe, and saves 4 physical pages part n0, part n1, part n2 and part n3 distributed on 4 consecutive luns, reading the data of different pages written with the intermediate state check data into the check data buffer of the corresponding page stripe includes: The check data buffer of page stripe PSn0 = [part n1]xor[part n2]xor[part n3]; The check data buffer of page stripe PSn1 = [part n1]; The check data buffer of page stripe PSn2 = [part n2]; The check data buffer of page stripe PSn3 = [part n3], where The n in the page stripes PSn0, PSn1, PSn2 and PSn3 represents the physical page number. Physical pages part n0, part n1, part n2 and part n3 are physical pages that record the intermediate state check data of page stripes PSn0, PSn1, PSn2 and PSn3 respectively. [partn1] represents the data stored in physical page part n1, [part n2] represents the data stored in physical page part n2, and [part n3] represents the data stored in physical page part n3.

10. An information processing device, comprising a memory, a processor, and a program stored in the memory and executable on the processor, characterized in that: When the processor executes the program, the method according to any one of claims 1 to 9 is implemented.

Images