Wafer back ohmic contact preparation method, device and equipment and storage medium

Abstract

The embodiment of the invention relates to the technical field of semiconductors, and discloses a wafer back ohmic contact preparation method, device and equipment and a storage medium, and the method comprises the steps: carrying out the metallization processing of the back of a wafer after the front process processing, so as to form ohmic metal on the back of the wafer, and enabling the back of the wafer to comprise a chip region and a scribing channel region; on the basis of a preset area positioning condition, laser annealing is not carried out on the ohmic metal corresponding to the scribing channel area, meanwhile, laser annealing is carried out on the ohmic metal corresponding to the chip area, and ohmic alloy is formed between the ohmic metal and the wafer; and the ohmic metal corresponding to the scribing channel region is stripped. According to the wafer back ohmic contact preparation method disclosed by the invention, the problems that a laser annealing mode is easy to cause reduction of the productivity and the service life of laser and reduction of the service life of a scribing cutter wheel are solved, so that the service life of the scribing cutter wheel is effectively prolonged during subsequent cutting, and the productivity of laser annealing and the service life of the laser are improved.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of semiconductor technology, and in particular to a method, device, equipment and storage medium for preparing ohmic contact on the back side of a wafer. Background Art

[0002] Silicon carbide-based MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) power devices (hereinafter referred to as SiC power devices for ease of explanation) are metal oxide semiconductor field effect transistors based on silicon carbide (SiC) semiconductor materials. Due to the high voltage and high temperature resistance of SiC, it can cover the voltage resistance level of silicon-based IGBT (Insulated Gate Bipolar Transistor) power devices with only a simpler MOSFET device, while avoiding its high energy consumption disadvantage.

[0003] In some technologies, when SiC power devices are manufactured on silicon carbide semiconductor materials (also referred to as silicon carbide wafers), a back side ohmic contact process is performed on the back side of the wafer. In the back side ohmic contact process, the entire surface of the wafer is usually laser annealed.

[0004] However, the existing laser annealing method easily leads to a decrease in the laser annealing capacity and laser life, and leads to a decrease in the life of the scribing wheel in the subsequent scribing. Summary of the invention

[0005] The purpose of the present invention is to at least provide a method, device, equipment and storage medium for preparing ohmic contact on the back side of a wafer, which can at least solve the technical problem that the existing laser annealing method is prone to reduce the laser annealing capacity and laser life, and reduce the life of the slicing wheel in subsequent slicing. At least it can achieve the technical effect of effectively extending the life of the slicing wheel during subsequent cutting, reducing the use of laser in laser annealing, thereby improving the laser annealing capacity and laser life.

[0006] In order to solve the above technical problems, at least one embodiment of the present application provides a method for preparing an ohmic contact on the back side of a wafer, comprising:

[0007] Performing metallization on the back side of the wafer after the front side process to form an ohmic metal on the back side of the wafer, wherein the back side of the wafer includes a chip area and a scribe line area;

[0008] Based on the preset regional positioning conditions, the ohmic metal corresponding to the scribe line region is not laser annealed, and the ohmic metal corresponding to the chip region is laser annealed to form an ohmic alloy between the ohmic metal corresponding to the chip region and the wafer;

[0009] The ohmic metal corresponding to the scribe line region is stripped off, so that the scribe line region is exposed.

[0010] At least one embodiment of the present application further provides a wafer backside ohmic contact preparation device, comprising:

[0011] A metallization processing module, used for performing metallization processing on the back side of the wafer after the front side process, so as to form an ohmic metal on the back side of the wafer, wherein the back side of the wafer includes a chip area and a scribe line area;

[0012] a laser processing module, configured to, based on a preset area positioning condition, not perform laser annealing on the ohmic metal corresponding to the scribe line area, and simultaneously perform laser annealing on the ohmic metal corresponding to the chip area, so as to form an ohmic alloy between the ohmic metal corresponding to the chip area and the wafer;

[0013] The metal stripping module is used to strip the ohmic metal corresponding to the scribe line area so that the scribe line area is exposed.

[0014] At least one embodiment of the present application also provides an electronic device, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the above-mentioned method for preparing ohmic contact on the back side of the wafer.

[0015] At least one embodiment of the present application further provides a computer-readable storage medium storing a computer program, wherein the computer program implements the above-mentioned method for preparing ohmic contact on the back side of a wafer when executed by a processor.

[0016] The embodiment of the present application provides a method for preparing an ohmic contact on the back side of a wafer, which performs metallization treatment on the back side of the wafer after the front side process treatment to form an ohmic metal on the back side of the wafer, and then based on the preset regional positioning conditions, the ohmic metal corresponding to the scribe area is not laser annealed, while the ohmic metal corresponding to the chip area is laser annealed to form an ohmic alloy between the ohmic metal corresponding to the chip area and the wafer, and then the ohmic metal corresponding to the scribe area is stripped, so that the scribe area is exposed. In this way, during subsequent cutting, the life of the scribe wheel is effectively extended, and the use of laser in laser annealing is reduced, thereby improving the production capacity and laser life of laser annealing.

[0017] In some optional embodiments, based on the preset regional positioning conditions, the step of not performing laser annealing on the ohmic metal corresponding to the scribe line area, and performing laser annealing on the ohmic metal corresponding to the chip area to form an ohmic alloy between the ohmic metal corresponding to the chip area and the wafer includes:

[0018] Determine the position of the first laser point, and determine the distribution area of ​​the chip area to be laser annealed based on the preset size of the chip area, wherein the chip area to be laser annealed is the first chip area to be laser annealed, and the first laser point is the vertex of the chip area to be laser annealed;

[0019] Based on the lateral distance of the scribe line area, the longitudinal distance of the scribe line area and the distribution area of ​​the chip area to be laser annealed, the distribution area of ​​each chip area is positioned one by one to skip the scribe line area and perform laser annealing on the ohmic metal corresponding to each chip area.

[0020] In this way, each chip area is precisely positioned to ensure the effectiveness of laser annealing of the wafer.

[0021] In some optional embodiments, the scribe line area includes a first scribe line area and a second scribe line area; on the back side of the wafer, the chip areas are spaced apart from each other in a first direction by the first scribe line area, and the chip areas are spaced apart from each other in a second direction by the second scribe line area, and the first direction and the second direction are perpendicular to each other, so as to separate each chip area and facilitate subsequent cutting of the chip area.

[0022] In some optional embodiments, the longitudinal distance of the scribing street area is the distance of the first scribing street area in the width direction, and the lateral distance of the scribing street area is the distance of the second scribing street area in the width direction;

[0023] The step of positioning the distribution area of ​​each chip area one by one based on the lateral distance of the scribing road area, the longitudinal distance of the scribing road area and the distribution area of ​​the chip area to be lasered so as to skip the scribing road area and laser anneal the ohmic metal corresponding to each chip area comprises:

[0024] Performing laser annealing on the distribution area of ​​the laser chip area;

[0025] Based on the distance in the width direction of the second scribing street area, positioning and laser annealing are performed on the chip area adjacent to the laser-waiting chip area in the second direction, and laser annealing is performed one by one on the chip area located in the same row as the laser-waiting chip area along the second direction;

[0026] Based on the distance in the width direction of the first scribing street area, the chip area adjacent to the to-be-laserized chip area in the first direction is positioned and laser annealed, and based on the distance in the width direction of the second scribing street area, the laser annealing of the chip areas in the same row is completed one by one along the second direction until the laser annealing of each chip area is completed, so as to skip the laser annealing of the first scribing street area and the second scribing street area. By accurately positioning and laser annealing each chip area, and skipping the laser annealing of the first scribing street area and the second scribing street area, the effect of laser annealing of the wafer is ensured.

[0027] In some optional embodiments, the step of determining the position of the first laser point includes:

[0028] Determine a reference point of the wafer, and determine the center of the wafer based on the reference point and the wafer radius;

[0029] The position of the first laser point is determined according to a preset distance between the center of the wafer and the first laser point.

[0030] In this way, by determining the position of the first laser spot, each chip region is accurately positioned one by one to ensure the effect of laser annealing on the wafer.

[0031] In some optional embodiments, the reference point includes a first reference point and a second reference point, the first reference point and the second reference point are both located at the edge of the region of the wafer, and the first reference point and the second reference point are on the same horizontal line;

[0032] The step of determining the position of the first laser point comprises:

[0033] Determine a first reference point and a second reference point of the wafer, and determine the center of the wafer based on the first reference point, the second reference point and the wafer radius;

[0034] The position of the first laser point is determined according to a preset distance between the center of the wafer and the first laser point.

[0035] By setting the first reference point and the second reference point, the accuracy of positioning the center of the wafer can be improved, thereby improving the accuracy of determining the position of the first laser point, thereby achieving precise laser annealing of the chip area.

[0036] In some optional embodiments, after the step of stripping the ohmic metal corresponding to the scribe line region so that the scribe line region is exposed, the step further includes:

[0037] Metal deposition is performed on the back of the wafer after the ohmic metal is stripped, which can effectively improve or enhance the ohmic contact to improve the reliability and stability of the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] One or more embodiments are exemplarily described by the pictures in the corresponding drawings, and these exemplary descriptions do not constitute limitations on the embodiments.

[0039] Figure 1 It is a schematic flow chart of a method for preparing an ohmic contact on the back side of a wafer provided by an embodiment of the present application;

[0040] Figure 2 It is a schematic diagram of a process of a wafer backside ohmic contact preparation device provided by an embodiment of the present application;

[0041] Figure 3 is a structural schematic diagram of an electronic device provided by another embodiment of the present application;

[0042] Figure 4 It is a schematic flow chart of a method for preparing an ohmic contact on the back side of a wafer provided by an embodiment of the present application;

[0043] Figure 5 is a schematic diagram of a laser annealing region provided by an embodiment of the present application;

[0044] Figure 6 is a schematic diagram of a whole wafer in a laser annealing area provided by another embodiment of the present application;

[0045] Figure 7 is a schematic diagram of a wafer after metallization treatment provided by another embodiment of the present application;

[0046] Figure 8 is a schematic diagram of laser annealing of an ohmic metal provided by another embodiment of the present application;

[0047] Fig. 9is a schematic diagram of a wafer after laser annealing provided by another embodiment of the present application;

[0048] Fig.10 is a schematic diagram of stripping unreacted ohmic metal provided by another embodiment of the present application;

[0049] Fig.11 It is a schematic diagram of positioning the chip area and the scribe line area provided by another embodiment of the present application. DETAILED DESCRIPTION

[0050] To make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the embodiments of the present application will be described in detail below in conjunction with the accompanying drawings. However, it will be appreciated by those skilled in the art that in the present application, many technical details are proposed in order to enable the reader to better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical scheme claimed in the present application can also be implemented. The division of the following embodiments is for the convenience of description, and the specific implementation of the present application should not be construed as any limitation, and the various embodiments can be combined and referenced with each other under the premise of no contradiction.

[0051] In order to facilitate understanding of the embodiments of the present application, relevant contents regarding the method for preparing ohmic contact on the back side of a wafer are first introduced here.

[0052] Silicon carbide-based MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) power devices (hereinafter referred to as SiC power devices for ease of explanation) are metal oxide semiconductor field effect transistors based on silicon carbide (SiC) semiconductor materials. Due to the high voltage and high temperature resistance of SiC, it can cover the voltage resistance level of silicon-based IGBT (Insulated Gate Bipolar Transistor) power devices with only simpler structures, while avoiding its high energy consumption disadvantage. Under the same environment, SiC power devices reduce energy loss by 66% compared with silicon-based IGBT power devices of the same specification, mainly due to a significant reduction in switching losses. In the new energy vehicle industry, SiC power devices can be used in inverters, on-board chargers, and fast charging piles that drive and control motors. In photovoltaic power generation, photovoltaic inverter companies have adopted SiC power devices to replace silicon devices.

[0053] In some technologies, when SiC power devices are manufactured on silicon carbide semiconductor materials (also known as silicon carbide wafers), the back side of the wafer is subjected to a back side ohmic contact process in the back side process. The existing method is to grow ohmic metal (such as NIV metal) on the back side of the wafer, and then perform laser annealing and decarbonization. After the back side ohmic contact is completed, the back side metal is grown again. In the back side ohmic contact process, the entire back side of the wafer is usually laser annealed, including the scribe area.

[0054] However, the existing laser annealing method easily leads to a decrease in the laser annealing capacity and laser life, and leads to a decrease in the life of the scribing wheel in the subsequent scribing.

[0055] In order to solve the technical problem that the above-mentioned existing laser annealing method easily leads to reduced laser annealing capacity and laser life, and reduces the life of the slicing wheel in subsequent slicing, the present invention proposes a method for preparing ohmic contact on the back side of a wafer. The implementation details of the method for preparing ohmic contact on the back side of the wafer of this embodiment are specifically described below. The following content is only the implementation details provided for easy understanding and is not necessary for the implementation of this solution.

[0056] Embodiment 1:

[0057] The method for preparing ohmic contacts on the back side of a wafer of this embodiment can be applied to electronic devices with semiconductor process processing, computing and data storage capabilities. The specific process can be as follows: Figure 1 As shown, including:

[0058] Step 101, performing metallization treatment on the back side of the wafer after the front side process to form an ohmic metal on the back side of the wafer, wherein the back side of the wafer includes a chip area and a scribe line area.

[0059] Specifically, if Figure 7 As shown in FIG. 1 , after the wafer is processed through the front process, a front process layer is formed on the front of the wafer, and the material of the wafer is SiC. Figure 5 and Figure 6 As shown, the back of the wafer includes several chip areas and scribe lane areas. The chip area can also be called a chip Die. The chip Die belongs to a separate wafer area, which contains a complete functional unit of the chip or a group of related functional units. The scribe lane area can also be called a cutting lane area. Fig.11 As shown, several chip regions are evenly distributed on the back side of the wafer in n rows and n columns, where n>1. The area between two adjacent rows of chip regions is a scribe line area distributed in the horizontal direction, and the n-row chip region corresponds to the n-1-row scribe line area. The area between two adjacent columns of chip regions is a scribe line area distributed in the vertical direction, and the n-row chip region corresponds to the n-1-column scribe line area. The n-1-row scribe line area and the n-1-column scribe line area are distributed in a crisscross pattern.

[0060] In this embodiment, after the wafer is processed on the front side, the back side of the wafer after the front side processing needs to be metallized, so as to form an ohmic metal on the back side of the wafer, and form a low resistance contact (i.e., ohmic contact) between the ohmic metal and the semiconductor material (such as SiC) to reduce the thermal resistance of the device, improve the heat dissipation capacity of the chip, and ensure good electrical contact. Among them, common ohmic metals are NiV, Ti, etc., and the thickness of the ohmic metal is 50 to 1000nm.

[0061] Step 102, based on preset area positioning conditions, laser annealing is not performed on the ohmic metal corresponding to the scribe line area, while laser annealing is performed on the ohmic metal corresponding to the chip area to form an ohmic alloy between the ohmic metal corresponding to the chip area and the wafer.

[0062] Specifically, the preset regional positioning conditions are used to position the chip area and the scribe road area of ​​the wafer, so as to be applied to the subsequent laser annealing of the chip area. After the back of the wafer is metallized, the ohmic metal is distributed on the entire back of the wafer, that is, the ohmic metal covers the chip area and the scribe road area. When the wafer forming the ohmic metal is laser annealed, the ohmic metal is irradiated by the laser beam, and the high temperature causes a chemical reaction between the ohmic metal and the semiconductor material to form an ohmic alloy, so that the interface structure between the ohmic metal and the semiconductor material is changed, the contact barrier is reduced, and the formation of a low-resistance contact (i.e., ohmic contact) between the ohmic metal and the semiconductor material is further optimized. The formation of the ohmic alloy helps to reduce the contact resistance between the ohmic metal and the semiconductor material, thereby optimizing the performance of the ohmic contact. In this embodiment, since the ohmic alloy is produced after the laser annealing, after the subsequent manufacturing is completed, the finished wafer needs to be cut into individual chip Dies, and after packaging, a number of chips are finally formed. Therefore, laser annealing is not performed on the ohmic metal corresponding to the scribe line area, while laser annealing is performed on the ohmic metal corresponding to the chip area to form an ohmic alloy between the ohmic metal corresponding to the chip area and the wafer. At this time, no ohmic alloy is formed on the scribe line area. In this way, in subsequent cutting, compared with the existing method, the cutting of ohmic metal and ohmic alloy is reduced, the life of the scribe wheel is effectively extended, and the use of laser in laser annealing is reduced, thereby improving the laser annealing capacity and laser life.

[0063] In some examples, the back of the wafer after the front process is metallized to form an ohmic metal on the back of the wafer. Assuming that the ohmic metal is NI, when laser annealing is performed, Ni+SiC→NiSi+C, the ohmic alloy formed is NiSi alloy, and the thickness of the ohmic alloy is 100-500nm. In some examples, the laser annealing energy is 2-6J / cm2. In order to compensate for the overlay alignment accuracy, when the chip area is actually laser annealed, it is necessary to do 1-5um more on all four sides than the theoretical laser annealing area (i.e., the chip area).

[0064] Step 103 , stripping off the ohmic metal corresponding to the scribe line area, so that the scribe line area is exposed.

[0065] Specifically, the ohmic metal corresponding to the scribe line area is not laser annealed, while the ohmic metal corresponding to the chip area is laser annealed to form an ohmic alloy between the ohmic metal corresponding to the chip area and the wafer, so that no ohmic alloy is formed on the scribe line area. Therefore, the unreacted ohmic metal corresponding to the scribe line area needs to be stripped, and the unreacted ohmic metal can be wet-stripped with a corrosive liquid so that the scribe line area is exposed, that is, the scribe line area is exposed, and there is no ohmic metal or ohmic alloy on the scribe line area, wherein the corrosive liquid is selected according to the material of the ohmic metal. In some examples, when the ohmic metal is NI, the corrosive liquid is NI corrosive liquid, and when the ohmic metal is TI, the corrosive liquid is TI corrosive liquid.

[0066] In this embodiment, the back side of the wafer after the front side process is metallized to form an ohmic metal on the back side of the wafer, and then based on the preset regional positioning conditions, the ohmic metal corresponding to the scribe area is not laser annealed, and the ohmic metal corresponding to the chip area is laser annealed to form an ohmic alloy between the ohmic metal corresponding to the chip area and the wafer, and then the ohmic metal corresponding to the scribe area is stripped, so that the scribe area is exposed. In this way, the life of the scribe wheel is effectively extended during subsequent cutting, and the use of laser in laser annealing is reduced, thereby improving the production capacity and laser life of laser annealing.

[0067] In some embodiments, based on a preset area positioning condition, the step of not laser annealing the ohmic metal corresponding to the scribe line area and laser annealing the ohmic metal corresponding to the chip area to form an ohmic alloy between the ohmic metal corresponding to the chip area and the wafer includes:

[0068] Determine the position of the first laser point, and determine the distribution area of ​​the chip area to be lasered based on the preset size of the chip area, wherein the chip area to be lasered is the first chip area to be laser annealed, and the first laser point is the vertex of the chip area to be lasered;

[0069] Based on the lateral distance of the scribe line area, the longitudinal distance of the scribe line area and the distribution area of ​​the chip area to be lasered, the distribution area of ​​each chip area is positioned one by one to skip the scribe line area and laser anneal the ohmic metal corresponding to each chip area.

[0070] Specifically, if Fig.11 As shown, the preset size of the chip area includes the length L and width W of the chip area, the lateral distance of the scribe line area refers to the spacing distance d1 between two adjacent columns of chip areas, and the longitudinal distance of the scribe line area refers to the spacing distance d2 between two adjacent rows of chip areas. During laser annealing, it is necessary to determine the first chip area to be laser annealed from among several chip areas on the wafer. When determining the first chip area to be laser annealed, a chip area can be arbitrarily selected as the chip area to be lasered. Preferably, the chip area located in the first row and the first column is selected from the n rows and n columns of chip areas as the chip area to be lasered. In this embodiment, a vertex in the chip area to be lasered is determined as the first laser point, and the laser beam is positioned directly above the first laser point. Then, the distribution area of ​​the chip area to be lasered can be determined based on the length L and the width W. After determining the distribution area of ​​the chip area to be lasered, laser anneal the chip area to be lasered, and then locate a vertex of the chip area adjacent to the chip area to be lasered based on the lateral distance d1 and the longitudinal distance d2 of the scribe line area, and then laser anneal the chip area based on the length L and width W of the chip area. Repeat the above operation to locate the distribution area of ​​each chip area one by one and perform laser annealing. In this way, each chip area is accurately located to ensure the effect of laser annealing on the wafer.

[0071] In some embodiments, the scribe line area includes a first scribe line area and a second scribe line area; on the back side of the wafer, the chip areas are separated from each other by the first scribe line area in a first direction, and the chip areas are separated from each other by the second scribe line area in a second direction, and the first direction and the second direction are perpendicular to each other.

[0072] Specifically, the first scribe line area is a horizontally arranged scribe line area, and the second scribe line area is a vertically arranged scribe line area. On the back side of the wafer, two adjacent rows of chip areas are separated from each other by the first scribe line area in the first direction, and two adjacent columns of chip areas are separated from each other by the second scribe line area in the second direction.

[0073] Specifically, a number of chip areas are evenly distributed on the back side of the wafer in n rows and n columns, with the first direction being the longitudinal direction and the second direction being the transverse direction. The area between two adjacent rows of chip areas is the first scribe line area distributed transversely, and the n-row chip area corresponds to the n-1-row first scribe line area. The area between two adjacent columns of chip areas is the second scribe line area distributed longitudinally, and the n-row chip area corresponds to the n-1-column second scribe line area. The n-1-row first scribe line area and the n-1-column second scribe line area are criss-crossedly distributed to separate each chip area for the convenience of subsequent cutting of the chip area.

[0074] In some embodiments, the longitudinal distance of the scribe line region is the distance in the width direction of the first scribe line region, and the lateral distance of the scribe line region is the distance in the width direction of the second scribe line region;

[0075] Based on the lateral distance of the scribing road area, the longitudinal distance of the scribing road area and the distribution area of ​​the chip area to be lasered, the distribution area of ​​each chip area is positioned one by one to skip the scribing road area, and the step of laser annealing the ohmic metal corresponding to each chip area includes:

[0076] Performing laser annealing on the distribution area of ​​the laser chip area;

[0077] Based on the distance in the width direction of the second scribing street area, positioning and laser annealing are performed on the chip area adjacent to the laser-waiting chip area in the second direction, and laser annealing is performed one by one on the chip area located in the same row as the laser-waiting chip area along the second direction;

[0078] Based on the distance in the width direction of the first scribing street area, the chip area adjacent to the chip area to be laser annealed in the first direction is positioned and laser annealed, and based on the distance in the width direction of the second scribing street area, the laser annealing of the chip areas in the same row is completed one by one along the second direction until the laser annealing of each chip area is completed, so as to skip the laser annealing of the first scribing street area and the second scribing street area.

[0079] Specifically, the lateral distance of the scribing road area refers to the spacing distance d1 between two adjacent columns of chip areas, that is, the distance d1 in the width direction of the second scribing road area; the longitudinal distance of the scribing road area refers to the spacing distance d2 between two adjacent rows of chip areas, that is, the distance d2 in the width direction of the first scribing road area. During laser annealing, it is necessary to determine the first chip area to be laser annealed from among several chip areas on the wafer. When determining the first chip area to be laser annealed, a chip area can be arbitrarily selected as the chip area to be lasered. Preferably, the chip area located in the first row and the first column is selected from the n-row and n-column chip areas as the chip area to be lasered. In this embodiment, a vertex in the chip area to be lasered is determined as the first laser point, and the laser beam is positioned directly above the first laser point. Then, the distribution area of ​​the chip area to be lasered can be determined based on the length L and the width W. After determining the distribution area of ​​the chip area to be lasered, the chip area to be lasered is laser annealed, and then the laser beam is moved along the second direction by the distance d1 in the width direction of the second scribing road area to complete the laser annealing of the next chip area, and the above operation is repeated to perform laser annealing on the chip areas in each column of the first row. After completing the laser annealing of the first row of chip areas, move the laser beam along the first direction by a distance d2 in the width direction of the first scribing road area, and start laser annealing the second row and first column of chip areas. After completing the laser annealing of the second row and first column of chip areas, move the laser beam along the second direction by a distance d1 in the width direction of the second scribing road area, and laser anneal each column of chip areas in the second row one by one. In this way, repeat the above operation, and the distribution area of ​​each row and column of chip areas can be positioned and laser annealed one by one. By accurately positioning and laser annealing each chip area, and skipping the laser annealing of the first scribing road area and the second scribing road area, the effect of laser annealing of the wafer can be ensured.

[0080] In some embodiments, the step of determining the position of the first laser point includes:

[0081] Determine the reference point of the wafer, and determine the center of the wafer based on the reference point and the wafer radius;

[0082] The position of the first laser point is determined according to a preset distance between the center of the wafer and the first laser point.

[0083] Specifically, the reference point of the wafer is located at the edge of the wafer area. After determining the reference point, the specific position of the center of the wafer can be determined based on the wafer radius and the reference point. Then, according to the preset distance between the center of the wafer and the first laser point, the position of the first laser point can be determined, that is, a vertex of the chip area to be lasered. In some examples, the coordinates of the reference point are (a, b), the radius of the wafer is R, and the preset distance between the center of the wafer and the first laser point is h. According to the coordinates of the reference point and the radius of the wafer, the center of the wafer C (0, 0) can be determined. According to the center of the wafer C (0, 0) and the preset distance h, the first laser point (x1, x2) can be located. In this way, by determining the position of the first laser point, each chip area can be accurately positioned one by one to ensure the effect of laser annealing of the wafer.

[0084] In some embodiments, the reference point includes a first reference point and a second reference point, the first reference point and the second reference point are both located at the edge of the region of the wafer, and the first reference point and the second reference point are on the same horizontal line;

[0085] The step of determining the position of the first laser point comprises:

[0086] Determine a first reference point and a second reference point of the wafer, and determine the center of the wafer based on the first reference point, the second reference point and the wafer radius;

[0087] The position of the first laser point is determined according to a preset distance between the center of the wafer and the first laser point.

[0088] Specifically, the edge of the wafer region has a flat edge, and the two endpoints of the flat edge are the first reference point and the second reference point, that is, the straight line formed by connecting the first reference point and the second reference point is the flat edge. In the semiconductor processing process, the wafer is not circular. In order to facilitate the positioning of the wafer during chip processing, a flat edge is provided on the outer peripheral surface of the wafer. In this embodiment, after determining the first reference point and the second reference point of the wafer based on the flat edge, the specific position of the center of the wafer can be determined based on the wafer radius, the first reference point and the second reference point, and then according to the preset distance between the center of the wafer and the first laser point, the position of the first laser point can be determined, that is, a vertex of the chip region to be lasered. In some examples, the coordinates of the first reference point are (a1, b1), the coordinates of the second reference point are (a2, b2), the radius of the wafer is R, and the preset distance between the center of the wafer and the first laser point is h. The center of the wafer C (0, 0) can be further determined based on the coordinates of the first reference point, the coordinates of the second reference point, and the radius of the wafer. The first laser point (x1, x2) can be located based on the center of the wafer C (0, 0) and the preset distance h. By setting the first reference point and the second reference point, the accuracy of locating the center of the wafer can be improved, thereby improving the accuracy of determining the position of the first laser point, thereby achieving precise laser annealing of the chip area.

[0089] In some embodiments, before the step of performing metallization on the back side of the wafer after the front side process to form an ohmic metal on the back side of the wafer, the step further includes:

[0090] The wafer after the front process is thinned, and the wafer after the thinning process is cleaned and dried.

[0091] Specifically, after the wafer is processed on the front side, the back side of the wafer is thinned. In addition, after the wafer is thinned, it is cleaned and dried to ensure that the ohmic metal can be evenly and firmly attached to the back side of the wafer.

[0092] In some embodiments, after the step of forming an ohmic alloy on the surface of the ohmic metal corresponding to the chip region, the method further includes:

[0093] Detect whether surface carburization is formed on the surface of ohmic alloy;

[0094] When surface carburization is formed on the surface of the ohmic alloy, the surface carburization on the surface of the ohmic alloy is removed by using dry decarburization technology.

[0095] Specifically, after laser annealing of the wafer, surface carburization may be formed on the surface of the ohmic alloy, that is, carbon atoms penetrate into the surface of the ohmic alloy. Therefore, the surface of the ohmic alloy needs to be inspected to detect whether surface carburization is formed on the surface of the ohmic alloy. When surface carburization is formed on the surface of the ohmic alloy, the surface carburization on the surface of the ohmic alloy is removed by dry decarburization technology, that is, dry etching technology is used to remove carbon contamination or other impurities on the surface of the wafer, such as reactive ion etching technology. Reactive ion etching technology removes surface carburization formed on the surface of the ohmic alloy by using high-energy ions and free radicals.

[0096] In some examples, assuming that the ohmic metal is NI, when laser annealing is performed, Ni+SiC→NiSi+C, and the formed ohmic alloy is NiSi alloy. The carbon atoms obtained by the reaction during laser annealing penetrate into the surface of the ohmic alloy, and the carburized thickness is 10 to 100 nm. The surface carburization on the surface of the ohmic alloy is removed by dry decarburization technology, such as the surface carburization formed by laser annealing by bombardment of Ar ions. By removing the surface carburization on the ohmic alloy, the good performance of the ohmic contact between the ohmic metal and the semiconductor material is maintained.

[0097] In some embodiments, after the step of stripping the ohmic metal corresponding to the scribe line region so that the scribe line region is exposed, the method further includes:

[0098] Metal deposition is performed on the back side of the wafer after the ohmic metal is stripped.

[0099] Specifically, after the ohmic metal stripping on the back of the wafer, one or more layers of metal need to be deposited on the back of the wafer, which can be referred to as back gold deposition, which can effectively improve or enhance the ohmic contact to improve the reliability and stability of the chip. In addition, the deposited metal layer can provide better heat dissipation performance and mechanical stability, and also help protect the back of the wafer from damage by the external environment.

[0100] Embodiment 2:

[0101] like Figure 4 As shown, this embodiment provides exemplary content of the first embodiment, that is, provides an exemplary process of a method for preparing an ohmic contact on the back side of a wafer, and the specific content includes:

[0102] S1, such as Figure 7 As shown in the figure, after the front process of the SIC power device is completed, the wafer is first thinned to a suitable thickness of 70-200um, then cleaned and dried, and ohmic metal is grown on the back of the wafer. Common ohmic metals include NiV, Ti, etc., with a thickness of 50-1000nm;

[0103] S2, such as Figure 8As shown, the above ohmic metal is laser annealed, the laser annealing energy is 2-6J / cm2, and the scribe area is skipped during laser annealing. In order to compensate for the overlay alignment accuracy, the actual laser annealing area is 1-5um larger than the theoretical laser annealing area on all four sides;

[0104] Specifically, the laser annealing process is as follows:

[0105] Laser annealing recipe setting: Fig.11 As shown, input the wafer radius R, the flat edge size, i.e., the AB distance, and the coordinates of the lower right Die point D (x1, x2), which are determined based on the distance from the front Die to the wafer center. The Die size includes the length L and the width W, and the scribe path size includes the horizontal direction d1 and the width direction d2.

[0106] Positioning: When the wafer is in operation, the long side of the wafer will be searched first, that is, point A and point B will be identified, and the center of the circle can be located according to the radius of the wafer. The wafer is fixed on the working stage, and according to the laser annealing machine movement and positioning system, the wafer point D is moved to the bottom of the laser head;

[0107] Laser annealing: When moved to the designated position, the laser can start working. First, laser annealing is performed on the lower right die. During the operation, the laser beam emitted by the laser head is projected onto the wafer surface to locally heat the wafer to a temperature above 1000°C. If the ohmic metal is NI, then Ni+SiC→NiSi+C.

[0108] Position offset: After the laser beam completes the laser annealing of the lower right die, the laser beam is first blocked by the optical system and the laser cannot be projected onto the wafer surface. Then the positioning system moves to the left by the specified horizontal distance d1 of the die scribing path and completes the laser annealing of the second die according to step 3.

[0109] After completing the laser annealing of the bottom row of dies, the laser beam is first blocked by the optical system and the laser cannot be projected onto the wafer surface. The mobile positioning system then moves upward a specified vertical distance d2 of the die scribing path, and then starts laser annealing of the first column of dies in the second row. The laser annealing of the second column of dies is then shifted back a distance d1, and the remaining dies are processed in a Z-shape in accordance with the same principle to complete the laser annealing of all dies and skip the die scribing path.

[0110] S3, such as Fig. 9 As shown, after laser annealing, an ohmic alloy is formed on the surface. If the ohmic metal is NI, a NiSi alloy is formed, and the alloy thickness is 100-500nm. Dry decarburization is performed, and the principle is to use Ar ions to bombard the surface carburized by laser annealing, and the carburized thickness is 10-100nm.

[0111] S4, such as Fig.10 As shown, the unreacted ohmic metal is wet-stripped to expose the scribe line area. If NI metal is used, Ni etching solution is used as the etching solution, and if Ti is used, Ti etching solution is used. The corresponding etching solution is selected according to the actual ohmic metal used.

[0112] S5. Finally, the back gold deposition is completed.

[0113] In this embodiment, laser annealing in the scribing track area is skipped, so the laser annealing capacity and laser life are improved, and Ni stripping is added after laser annealing to strip off unreacted NIV and leak out of the scribing track, thereby improving the life of the scribing wheel.

[0114] Embodiment three:

[0115] Another embodiment of the present application relates to a device for preparing an ohmic contact on the back side of a wafer. The implementation details of the device for preparing an ohmic contact on the back side of a wafer of this embodiment are described in detail below. The following content is only provided for the convenience of understanding the implementation details and is not necessary for implementing this solution. The schematic diagram of the device for preparing an ohmic contact on the back side of a wafer of this embodiment can be as shown in FIG. Figure 2 As shown, including:

[0116] The metallization processing module 201 is used to perform metallization processing on the back side of the wafer after the front side process to form an ohmic metal on the back side of the wafer, wherein the back side of the wafer includes a chip area and a scribe line area;

[0117] The laser processing module 202 is used for not performing laser annealing on the ohmic metal corresponding to the scribe line area and performing laser annealing on the ohmic metal corresponding to the chip area based on a preset area positioning condition, so as to form an ohmic alloy between the ohmic metal corresponding to the chip area and the wafer;

[0118] The metal stripping module 203 is used to strip the ohmic metal corresponding to the scribe line area so that the scribe line area is exposed.

[0119] It is worth mentioning that all modules involved in this embodiment are logic modules. In practical applications, a logic unit can be a physical unit, a part of a physical unit, or a combination of multiple physical units. In addition, in order to highlight the innovative part of this application, this embodiment does not introduce units that are not closely related to solving the technical problems proposed by this application, but this does not mean that there are no other units in this embodiment.

[0120] Embodiment 4:

[0121] Another embodiment of the present application relates to an electronic device, such as Figure 3As shown, it includes: at least one processor 901; and a memory 902 that is communicatively connected to the at least one processor 901; wherein the memory 902 stores instructions that can be executed by the at least one processor 901, and the instructions are executed by the at least one processor 901 so that the at least one processor 901 can execute the method for preparing ohmic contact on the back side of the wafer in the above-mentioned embodiments.

[0122] Among them, the memory and the processor are connected in a bus manner, and the bus may include any number of interconnected buses and bridges, and the bus connects various circuits of one or more processors and memories together. The bus can also connect various other circuits such as peripherals, voltage regulators, and power management circuits, which are well known in the art and are therefore not further described herein. The bus interface provides an interface between the bus and the transceiver. The transceiver can be one element or multiple elements, such as multiple receivers and transmitters, providing a unit for communicating with various other devices on a transmission medium. The data processed by the processor is transmitted on a wireless medium via an antenna, and further, the antenna also receives data and transmits the data to the processor.

[0123] The processor is responsible for managing the bus and general processing, and can also provide various functions, including timing, peripheral interfaces, voltage regulation, power management, and other control functions. Memory can be used to store data used by the processor when performing operations.

[0124] Embodiment five:

[0125] Another embodiment of the present application relates to a computer-readable storage medium storing a computer program, which implements the above method embodiment when executed by a processor.

[0126] That is, those skilled in the art can understand that all or part of the steps in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a program, and the program is stored in a storage medium, including a number of instructions to enable a device (which can be a single-chip microcomputer, chip, etc.) or a processor to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory, referred to as: ROM), random access memory (Random Access Memory, referred to as: RAM), disk or optical disk and other media that can store program codes.

[0127] Those skilled in the art will appreciate that the above embodiments are specific embodiments for implementing the present application, and in actual applications, various changes may be made thereto in form and detail without departing from the spirit and scope of the present application.

Claims

1. A method for preparing an ohmic contact on the back side of a wafer, characterized in that: include: Performing metallization on the back side of the wafer after the front side process to form an ohmic metal on the back side of the wafer, wherein the back side of the wafer includes a chip area and a scribe line area; Based on the preset regional positioning conditions, the ohmic metal corresponding to the scribe line region is not laser annealed, and the ohmic metal corresponding to the chip region is laser annealed to form an ohmic alloy between the ohmic metal corresponding to the chip region and the wafer; The ohmic metal corresponding to the scribe line region is stripped off, so that the scribe line region is exposed.

2. The method for preparing ohmic contact on the back side of a wafer according to claim 1, characterized in that: The step of not performing laser annealing on the ohmic metal corresponding to the scribe line area and performing laser annealing on the ohmic metal corresponding to the chip area based on the preset area positioning condition to form an ohmic alloy between the ohmic metal corresponding to the chip area and the wafer includes: Determine the position of the first laser point, and determine the distribution area of ​​the chip area to be laser annealed based on the preset size of the chip area, wherein the chip area to be laser annealed is the first chip area to be laser annealed, and the first laser point is the vertex of the chip area to be laser annealed; Based on the lateral distance of the scribe line area, the longitudinal distance of the scribe line area and the distribution area of ​​the chip area to be laser annealed, the distribution area of ​​each chip area is positioned one by one to skip the scribe line area and perform laser annealing on the ohmic metal corresponding to each chip area.

3. The method for preparing ohmic contact on the back side of a wafer according to claim 2, characterized in that: The scribe line area includes a first scribe line area and a second scribe line area; on the back side of the wafer, the chip areas are spaced apart from each other by the first scribe line area in a first direction, and the chip areas are spaced apart from each other by the second scribe line area in a second direction, and the first direction and the second direction are perpendicular to each other.

4. The method for preparing ohmic contact on the back side of a wafer according to claim 3, characterized in that: The longitudinal distance of the scribing street area is the distance of the first scribing street area in the width direction, and the lateral distance of the scribing street area is the distance of the second scribing street area in the width direction; The step of positioning the distribution area of ​​each chip area one by one based on the lateral distance of the scribing road area, the longitudinal distance of the scribing road area and the distribution area of ​​the chip area to be lasered so as to skip the scribing road area and laser anneal the ohmic metal corresponding to each chip area comprises: Performing laser annealing on the distribution area of ​​the laser chip area; Based on the distance in the width direction of the second scribing street area, positioning and laser annealing are performed on the chip area adjacent to the laser-waiting chip area in the second direction, and laser annealing is performed one by one on the chip area located in the same row as the laser-waiting chip area along the second direction; Based on the distance in the width direction of the first scribing street area, the chip area adjacent to the chip area to be lasered in the first direction is positioned and laser annealed, and based on the distance in the width direction of the second scribing street area, the laser annealing of the chip areas in the same row is completed one by one along the second direction until the laser annealing of each of the chip areas is completed, so as to skip the laser annealing of the first scribing street area and the second scribing street area.

5. The method for preparing ohmic contact on the back side of a wafer according to claim 2, characterized in that: The step of determining the position of the first laser point comprises: Determine a reference point of the wafer, and determine the center of the wafer based on the reference point and the wafer radius; The position of the first laser point is determined according to a preset distance between the center of the wafer and the first laser point.

6. The method for preparing ohmic contact on the back side of a wafer according to claim 5, characterized in that: The reference points include a first reference point and a second reference point, the first reference point and the second reference point are both located at the edge of the region of the wafer, and the first reference point and the second reference point are on the same horizontal line; The step of determining the position of the first laser point comprises: Determine a first reference point and a second reference point of the wafer, and determine the center of the wafer based on the first reference point, the second reference point and the wafer radius; The position of the first laser point is determined according to a preset distance between the center of the wafer and the first laser point.

7. The method for preparing ohmic contact on the back side of a wafer according to any one of claims 1 to 6, characterized in that: After the step of stripping the ohmic metal corresponding to the scribe line area so that the scribe line area is exposed, the method further includes: Metal deposition is performed on the back side of the wafer after the ohmic metal is stripped.

8. A wafer backside ohmic contact preparation device, characterized in that: include: A metallization processing module, used for performing metallization processing on the back side of the wafer after the front side process, so as to form an ohmic metal on the back side of the wafer, wherein the back side of the wafer includes a chip area and a scribe line area; a laser processing module, configured to, based on a preset area positioning condition, not perform laser annealing on the ohmic metal corresponding to the scribe line area, and simultaneously perform laser annealing on the ohmic metal corresponding to the chip area, so as to form an ohmic alloy between the ohmic metal corresponding to the chip area and the wafer; The metal stripping module is used to strip the ohmic metal corresponding to the scribe line area so that the scribe line area is exposed.

9. An electronic device, characterized in that: include: at least one processor; as well as, a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the method for preparing ohmic contact on the back side of a wafer as described in any one of claims 1 to 7.

10. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the method for preparing an ohmic contact on the back side of a wafer according to any one of claims 1 to 7 is implemented.

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