Semiconductor device and memory device

Abstract

A semiconductor device having good electrical characteristics is provided. The semiconductor device includes a first laminate, a semiconductor layer having a channel formation region under the first laminate, and a second laminate under the semiconductor layer. The first laminated body and the second laminated body at least comprise a first insulator and a second insulator. In this case, a first insulator included in the first laminate and a first insulator included in the second laminate have regions that overlap each other with a channel formation region therebetween. The second insulator included in the first laminated body and the second insulator included in the second laminated body have regions that overlap each other with the first insulator included in the first laminated body, the channel formation region, and the first insulator included in the second laminated body interposed therebetween. In addition, the first insulator included in the first laminated body and the first insulator included in the second laminated body have a common function, and the second insulator included in the first laminated body and the second insulator included in the second laminated body have a common function.

Description

Technical Field

[0001] One aspect of the present invention relates to a semiconductor device, a memory device, and an electronic device. Another aspect of the present invention relates to a method for manufacturing a semiconductor device and a memory device.

[0002] Note that one aspect of the present invention is not limited to the technical fields described above. Examples of technical fields encompassing one aspect of the present invention include semiconductor devices, display devices, light-emitting devices, energy storage devices, memory devices, electronic devices, lighting devices, input devices (e.g., touch sensors), input / output devices (e.g., touch panels), and driving or manufacturing methods for the aforementioned devices.

[0003] Note that in this specification, etc., a semiconductor device refers to any device capable of operating by utilizing the characteristics of semiconductors. Besides semiconductor elements such as transistors, semiconductor circuits, arithmetic processing devices, or storage devices are also types of semiconductor devices. Sometimes it can be said that display devices (liquid crystal displays, light-emitting displays, etc.), projection devices, lighting devices, electro-optical devices, energy storage devices, storage devices, semiconductor circuits, imaging devices, electronic devices, etc., include semiconductor devices. Background Technology

[0004] In recent years, semiconductor devices have been developed, with LSI (Large Scale Integration), CPU (Central Processing Unit), and memory being the main components used in semiconductor devices. A CPU is an assembly of semiconductor integrated circuits (including at least transistors and memory) formed by processing semiconductor wafers to create chips, and semiconductor elements having electrodes formed as connection terminals.

[0005] Semiconductor circuits (IC chips) such as LSI, CPU, and memory are mounted on circuit boards (e.g., printed circuit boards) and used as components of various electronic devices.

[0006] Furthermore, the technique of constructing transistors using semiconductor thin films formed on substrates with insulating surfaces has attracted considerable attention. These transistors are widely used in electronic devices such as integrated circuits (ICs) and image display devices (simply referred to as display devices). Silicon-based semiconductor materials are widely known as semiconductor thin films that can be used in transistors. Among other materials, oxide semiconductors have also garnered attention.

[0007] Furthermore, it is known that transistors using oxide semiconductors have extremely low leakage current in the non-conducting state. For example, Patent Document 1 discloses a low-power CPU that utilizes the low leakage current characteristic of transistors using oxide semiconductors. Additionally, for example, Patent Document 2 discloses a storage device that utilizes the low leakage current characteristic of transistors using oxide semiconductors to achieve long-term retention of stored content. [Preliminary Technology Documents] [Patent Literature]

[0008] [Patent Document 1] Japanese Patent Application Publication No. 2012-257187 [Patent Document 2] Japanese Patent Application Publication No. 2011-151383 Summary of the Invention The technical problem that the invention aims to solve

[0009] One objective of this invention is to provide a semiconductor device with good electrical characteristics. Another objective is to provide a semiconductor device with high reliability. Another objective is to provide a semiconductor device with less non-uniformity in the electrical characteristics of the transistor. Another objective is to provide a semiconductor device capable of miniaturization or high integration. Another objective is to provide a semiconductor device with high operating speed. Another objective is to provide a semiconductor device with high on-state current. Another objective is to provide a semiconductor device with low power consumption. Another objective is to provide a novel semiconductor device. Another objective is to provide a method for manufacturing a semiconductor device with high productivity. Another objective is to provide a novel method for manufacturing a semiconductor device.

[0010] One objective of this invention is to provide a storage device with a large storage capacity. Another objective of this invention is to provide a storage device with a high operating speed. Another objective of this invention is to provide a storage device with low power consumption. Another objective of this invention is to provide a novel storage device. Finally, another objective of this invention is to provide a novel method for manufacturing a storage device.

[0011] Note that the description of these objectives does not preclude the existence of other objectives. One aspect of the invention does not require achieving all of the above objectives. Objectives other than those described above can be extracted from the description, drawings, and claims. means of solving technical problems

[0012] One aspect of the present invention is a semiconductor device comprising a first stack, a semiconductor layer beneath the first stack, and a second stack beneath the semiconductor layer. The semiconductor layer includes a first region, a second region and a third region disposed in a manner that clamps the first region. The first and second stacks are symmetrically disposed with respect to the first region. The first stack includes a first insulator and a second insulator on top of the first insulator. The second stack includes a third insulator and a fourth insulator beneath the third insulator. The second insulator is less permeable to hydrogen than the first insulator. The fourth insulator is less permeable to hydrogen than the third insulator. Both the first and third insulators comprise silicon and oxygen. Both the second and fourth insulators comprise silicon and nitrogen.

[0013] In the above-described semiconductor device, it is preferable that the third insulator is island-shaped, and that the side end of the third insulator coincides with the side end of the semiconductor layer in cross-section.

[0014] Furthermore, in the aforementioned semiconductor device, it is preferable that the first stacked body further includes a fifth insulator below the first insulator, and the second stacked body further includes a sixth insulator above the third insulator. The fifth insulator is less permeable to oxygen than the first insulator, and the sixth insulator is less permeable to oxygen than the second insulator. Both the fifth and sixth insulators contain aluminum.

[0015] Furthermore, in the aforementioned semiconductor device, it is preferable that the third insulator and the sixth insulator have a stacked structure, the stacked structure being island-shaped, and the side ends of the stacked structure being consistent with the side ends of the semiconductor layer in cross-section.

[0016] Another aspect of the present invention is a semiconductor device comprising a first stack, a semiconductor layer beneath the first stack, and a second stack beneath the semiconductor layer. The semiconductor layer includes a first region, a second region and a third region disposed in a manner that clamps the first region. The first and second stacks are symmetrically disposed with respect to the first region. The first stack includes a first insulator, a second insulator on the first insulator, and a third insulator on the second insulator. The second stack includes a first metal oxide, a fourth insulator beneath the first metal oxide, and a fifth insulator beneath the fourth insulator. The first insulator is less permeable to oxygen than the second insulator. The third insulator is less permeable to hydrogen than the second insulator. The first metal oxide is less permeable to oxygen than the fourth insulator. The fifth insulator is less permeable to hydrogen than the fourth insulator. Both the first insulator and the first metal oxide comprise at least one of gallium and aluminum. Both the second and fourth insulators comprise silicon and oxygen. Both the third and fifth insulators comprise silicon and nitrogen.

[0017] In the above-described semiconductor device, preferably, the semiconductor layer comprises a second metal oxide, both the first metal oxide and the second metal oxide comprise indium, and the ratio of the number of atoms of gallium and aluminum in the first metal oxide relative to at least one of indium is greater than the ratio of the number of atoms of gallium and aluminum in the second metal oxide relative to at least one of indium.

[0018] Furthermore, in the aforementioned semiconductor device, it is preferable to include a sixth insulator between the fourth and fifth insulators, and the sixth insulator has the function of capturing or fixing hydrogen.

[0019] Furthermore, in the aforementioned semiconductor device, it is preferable to include a seventh insulator between the second insulator and the third insulator, and the seventh insulator has the function of capturing or fixing hydrogen.

[0020] In addition, the semiconductor device described above preferably includes a first conductor and a second conductor, wherein the first conductor is located above the first stack and the second conductor is located below the second stack.

[0021] In addition, in the above-mentioned semiconductor device, it is preferable that a third conductor and a fourth conductor are also included, with the second region overlapping the third conductor and the third region overlapping the fourth conductor.

[0022] One aspect of the present invention is a storage device comprising the aforementioned semiconductor device and a capacitor. The capacitor is a ferroelectric capacitor. Invention Effects

[0023] According to one aspect of the present invention, a semiconductor device with good electrical characteristics can be provided. Furthermore, a semiconductor device with high reliability can be provided. Furthermore, a semiconductor device with less non-uniformity in the electrical characteristics of the transistor can be provided. Furthermore, a semiconductor device capable of miniaturization or high integration can be provided. Furthermore, a semiconductor device with high operating speed can be provided. Furthermore, a semiconductor device with high on-state current can be provided. Furthermore, a semiconductor device with low power consumption can be provided. Furthermore, a novel semiconductor device can be provided. Furthermore, a method for manufacturing a semiconductor device with high productivity can be provided. Furthermore, a novel method for manufacturing a semiconductor device can be provided.

[0024] According to one aspect of the present invention, a storage device with a large storage capacity can be provided. Additionally, a storage device with a high operating speed can be provided. Furthermore, a storage device with low power consumption can be provided. Additionally, a novel storage device can be provided. Furthermore, a novel method for manufacturing a semiconductor device can be provided.

[0025] Note that the description of these effects does not preclude the existence of other effects. One aspect of the invention does not necessarily require all of the aforementioned effects. Effects other than those described above can be extracted from the specification, drawings, and claims. Brief description of the attached figures

[0026] Figure 1A This is a top view showing an example of a semiconductor device. Figure 1B and Figure 1C This is a cross-sectional view showing an example of a semiconductor device. Figure 2A and Figure 2B This is a cross-sectional view showing an example of a semiconductor device. Figure 3A This is a top view showing an example of a semiconductor device. Figure 3B and Figure 3C This is a cross-sectional view showing an example of a semiconductor device. Figures 4A to 4D This is a cross-sectional view showing an example of a semiconductor device. Figures 5A to 5D This is a cross-sectional view showing an example of a semiconductor device. Figure 6A This is a top view showing an example of a semiconductor device. Figure 6B and Figure 6C This is a cross-sectional view showing an example of a semiconductor device. Figures 7A to 7D This is a cross-sectional view showing an example of a semiconductor device. Figure 8A This is a top view showing an example of a semiconductor device. Figure 8B and Figure 8C This is a cross-sectional view showing an example of a semiconductor device. Figures 9A to 9F This is a cross-sectional view showing an example of a semiconductor device. Figures 10A to 10F This is a cross-sectional view showing an example of a semiconductor device. Figures 11A to 11D This is a cross-sectional view showing an example of a semiconductor device. Figures 12A to 12D This is a cross-sectional view showing an example of a semiconductor device. Figures 13A to 13F This is a cross-sectional view showing an example of a semiconductor device. Figures 14A to 14F This is a cross-sectional view showing an example of a semiconductor device. Figure 15A This is a top view showing an example of a semiconductor device. Figures 15B to 15D This is a cross-sectional view showing an example of a semiconductor device. Figure 16A and Figure 16B This is a cross-sectional view showing an example of a semiconductor device. Figure 17A and Figure 17B This is a cross-sectional view showing an example of a semiconductor device. Figure 18A and Figure 18B This is a cross-sectional view showing an example of a semiconductor device. Figure 19A This is a top view showing an example of a semiconductor device. Figure 19B and Figure 19C This is a cross-sectional view showing an example of a semiconductor device. Figure 20A This is a top view showing an example of a semiconductor device. Figure 20B This is a cross-sectional view showing an example of a semiconductor device. Figure 21 This is a cross-sectional view showing an example of a semiconductor device. Figure 22 This is a cross-sectional view showing an example of a semiconductor device. Figure 23A This is a top view showing an example of a semiconductor device. Figure 23B This is a cross-sectional view showing an example of a semiconductor device. Figure 24A This is a top view showing an example of a semiconductor device. Figure 24B This is a cross-sectional view showing an example of a semiconductor device. Figure 25A This is a top view showing an example of a semiconductor device. Figure 25B This is a cross-sectional view showing an example of a semiconductor device. Figure 26 This is a cross-sectional view showing an example of a storage device. Figure 27 This is a cross-sectional view showing an example of a storage device. Figure 28A This is a block diagram illustrating an example of the structure of a storage device according to one aspect of the present invention. Figure 28B This is a perspective view showing an example of the structure of a storage device according to one aspect of the present invention. Figures 29A to 29I This is a circuit diagram illustrating a structural example of a storage device according to one aspect of the present invention. Figure 30 This is a cross-sectional view showing an example of a storage device. Figure 31A This is a diagram illustrating an example of the circuit structure of a memory cell. Figure 31B This is a graph illustrating an example of hysteresis characteristics. Figure 31CThis is a timing diagram illustrating an example of a driving method for a memory cell. Figure 32A and Figure 32B This is a schematic diagram of a semiconductor device according to one aspect of the present invention. Figures 33A to 33E This is a diagram illustrating an example of a storage device. Figure 34A and Figure 34B This is a diagram showing an example of an electronic component. Figure 35A and Figure 35B This is a diagram illustrating an example of an electronic device. Figures 35C to 35E This is a diagram illustrating an example of a large computer. Figure 36 This is a diagram illustrating an example of a space device. Figure 37 This is a diagram illustrating an example of a storage system that can be used in a data center. Figure 38 This is a graph showing the GIXRD measurement results. Figure 39A and Figure 39B This is a graph showing the results of surface observation using AFM. Figure 39C and Figure 39D This is a graph showing the results of the image analysis. Figure 39E and Figure 39F This is a graph showing the results of the evaluation of particle size distribution. Figure 40A This is a diagram showing the input voltage waveform. Figure 40B This is a diagram showing the properties of PE. Figure 41A This is a diagram showing the input voltage waveform. Figure 41B This is a graph showing fatigue characteristics. Figure 42A and Figure 42B This is a graph showing fatigue characteristics. Figure 43A and Figure 43B This is a diagram illustrating the method of maintaining the measurement. Figure 44 This is a graph showing the results of the measurement. Figure 45 This is a diagram illustrating the characteristics of JV. Figure 46 It is a cross-sectional STEM image of the manufactured sample. Figure 47A This is a diagram illustrating the circuitry of a memory cell. Figure 47B These are photographs taken with an optical microscope. Figure 48 This is a diagram illustrating the characteristics of a source follower. Figure 49A and Figure 49B This diagram illustrates the evaluation method for positive polarization during writing and reading. Figure 50A and Figure 50B This diagram illustrates the evaluation method for positive polarization during writing and reading. Figure 51 This is a diagram showing the voltage waveform. Figure 52 It shows ΔV BL The graph showing the progression. Figure 53 It shows ΔV BL The graph showing the progression. Figure 54A and Figure 54B This is a graph showing fatigue characteristics. Figure 55A and Figure 55B This is a graph showing the results of the measurement. Figure 56A This is a schematic diagram of the sample. Figure 56B This is a cross-sectional view of the sample. Figure 57 It is a cross-sectional STEM image of the manufactured sample. Figure 58 This is a graph showing the Id-Vg characteristics of the sample. Figure 59 This is a graph showing the threshold voltage. Figure 60 This is a graph showing the Id-Vg characteristics of the sample. Figure 61A This is a graph showing the threshold voltage of the sample. Figure 61B This is a graph showing the thin-film resistance of the sample. Figure 61C This is a graph showing the contact resistance of the sample. Figure 62 This is a graph showing the Id-Vg characteristics of the sample. Figures 63A to 63C This is a graph showing the contact resistance of the sample. Figure 64A This is a circuit diagram showing the circuit structure of the sample. Figure 64B This is a graph showing the measurement results of the leakage current. Figure 65A This is a circuit diagram showing the circuit structure of the sample. Figure 65B This shows the Id-V of the sample. CWL Circuit diagram of the characteristics. Figure 65C This is a graph showing the potential Vsh of the sample. Figure 66A This is a graph showing the results of the data retention evaluation test for the sample. Figure 66B This is a graph showing the results of the data rewriting evaluation test for the sample. Figure 67A This is a diagram showing the contact resistance. Figure 67B This is a diagram showing the resistance of a thin film. Figure 68 This is a cross-sectional STEM image according to an embodiment. Figure 69A and Figure 69B This is a graph showing the results of the drain withstand voltage test. Figure 70 This is a graph showing the results of the drain withstand voltage test. Figure 71 This is a graph showing the PV characteristics. Figure 72 This is a graph showing fatigue characteristics. Figure 73 It shows ΔV BL The graph showing the progression. Figure 74 This is a graph showing the results of the measurement. Methods of implementing the invention

[0027] The embodiments will be described in detail with reference to the accompanying drawings. However, those skilled in the art will readily understand that the present invention is not limited to the following description and can be modified in various forms without departing from the spirit and scope of the invention. Therefore, the present invention should not be construed as being limited only to the contents described in the embodiments shown below.

[0028] Furthermore, in the inventive structure described below, the same symbols are used in different figures to represent the same parts or parts having the same function, and repeated descriptions are omitted. Additionally, when representing parts having the same function, the same shading lines are sometimes used without special additional symbols.

[0029] Furthermore, for ease of understanding, the positions, sizes, and extents of the constituent elements shown in the accompanying drawings may not represent their actual positions, sizes, and extents. Therefore, the disclosed invention is not necessarily limited to the positions, sizes, and extents disclosed in the accompanying drawings.

[0030] Note that, for convenience, ordinal numbers such as "first" and "second" are used in this specification, etc., but these do not limit the number of constituent elements or the order of the constituent elements (e.g., process sequence or stacking sequence). Furthermore, the ordinal numbers used for constituent elements in one part of this specification may sometimes differ from those used for the same constituent element in other parts of this specification or in the claims.

[0031] Furthermore, depending on the circumstances, the "film" and "layer" can be interchanged. For example, a "conductive layer" can be changed to a "conductive film." Similarly, for example, an "insulating film" can be changed to an "insulating layer." Furthermore, depending on the circumstances, a "conductor" can be changed to a "conductive layer" or a "conductive film." Furthermore, depending on the circumstances, an "insulator" can be changed to an "insulating layer" or an "insulating film."

[0032] Openings include, for example, grooves and slits. Sometimes, the area where an opening is formed is called an opening portion.

[0033] Furthermore, the accompanying drawings used in this embodiment show the case where the sidewall of the insulator at the opening of the insulator is substantially perpendicular to the substrate surface or the surface to which it is formed, but it can also be tapered.

[0034] Note that, in this specification and the like, a conical shape refers to a shape in which at least a portion of the side surface of a constituent element is inclined relative to the substrate surface or the surface to be formed. For example, it is preferable to have a region where the angle (hereinafter, sometimes referred to as the cone angle) formed by the inclined side surface and the substrate surface or the surface to be formed is less than 90°. Here, the side surface and the substrate surface of the structure do not necessarily have to be completely flat; they may also be approximately planar with slight curvature or approximately planar with slight irregularities.

[0035] In this specification, "height consistency" refers to a structure in which the height from a reference surface (e.g., a flat surface such as a substrate surface) is equal in cross-section. For example, in the manufacturing process of semiconductor devices, planarization processes (typically CMP (Chemical Mechanical Polishing)) are sometimes performed to expose the surfaces of one or more layers. In this case, the surface being processed by CMP is equal in height from the reference surface. Note that depending on the processing apparatus, processing method, or material of the surface being processed during CMP, the heights of multiple layers may differ. In this specification, "height consistency" also includes the above-described cases. For example, in the case where there are two layers with two heights relative to a reference surface (referred to herein as the first layer and the second layer), when the difference between the height of the top surface of the first layer and the height of the top surface of the second layer is less than 20 nm, it is also referred to as "height consistency".

[0036] In this specification and the like, "end-aligned" means that at least a portion of the contours of stacked layers overlap when viewed from above. For example, this includes cases where the upper and lower layers are processed using the same mask pattern or a portion thereof. However, strictly speaking, sometimes the contours do not overlap and the contour of the upper layer is inside or outside the contour of the lower layer; these cases are also included in "end-aligned".

[0037] Note that, generally speaking, it is difficult to clearly distinguish between "completely identical" and "substantially identical". Therefore, in this specification, "identical" includes both cases of complete identicalness and cases of substantial identicalness.

[0038] In this specification, the off-state current is sometimes referred to as leakage current. Furthermore, in this specification, the off-state current sometimes refers to the current flowing between the source and drain when the transistor is in the off state.

[0039] (Implementation Method 1) In this embodiment, refer to Figures 1A to 25B An example of the structure of a semiconductor device as one embodiment of the present invention will be described. Furthermore, the semiconductor device as one embodiment of the present invention includes a transistor.

[0040] <Structure Example 1> Reference Figures 1A to 1C An example of the structure of a semiconductor device according to one aspect of the present invention is provided. Figure 1A This is a top view of a semiconductor device. Figure 1B and Figure 1C This is a cross-sectional view of a semiconductor device. Figure 1B It is along Figure 1A A cross-sectional view of the section marked with dashed lines A1-A2. Furthermore, Figure 1C It is along Figure 1A The cross-sectional view of the section marked with dashed lines A3-A4. Note that in... Figure 1A In the top view, some constituent elements are omitted for clarity.

[0041] Figures 1A to 1C The semiconductor device shown includes transistor 200A. Therefore, Figure 1B This can be described as a cross-sectional view along the channel length of transistor 200A. Furthermore, Figure 1C It can also be described as a cross-sectional view of the channel width of transistor 200A.

[0042] Transistor 200A includes a conductor 205, an insulator 222 (insulator 222b and insulator 222a) on the conductor 205, an oxide 230 on the insulator 222, conductors 242a and 242b on the oxide 230, an insulator 250 (insulator 250a and insulator 250b) on the oxide 230, and a conductor 260 on the insulator 250.

[0043] An insulator 280 is provided on insulator 222, conductor 242a, and conductor 242b. The top surface of insulator 280 may also be planarized. In addition, insulator 250 and conductor 260 are provided in such a way as to be embedded in openings formed in insulator 280.

[0044] Oxide 230 has a region used as a channel formation region. Conductor 260 has a region used as a first gate electrode (upper gate electrode). Insulator 250 has a region used as a first gate insulator. Conductor 205 has a region used as a second gate electrode (lower gate electrode). Insulator 222 has a region used as a second gate insulator. Conductor 242a has a region used as one of the source electrode and drain electrode. Conductor 242b has a region used as the other of the source electrode and drain electrode.

[0045] Because oxide 230 has a region used as a channel formation region, it can be referred to as the semiconductor layer of transistor 200A in this specification, etc. Alternatively, the semiconductor layer can be referred to as oxide 230.

[0046] like Figure 1B As shown, oxide 230 has region 230i and regions 230na and 230nb disposed in a manner that clamps region 230i. Here, region 230i is used as a channel forming region. In addition, region 230na is used as one of the source region and drain region, and region 230nb is used as the other of the source region and drain region. At least a portion of region 230i overlaps with conductor 260 and conductor 205. Region 230na overlaps with conductor 242a, and region 230nb overlaps with conductor 242b.

[0047] Because it has fewer oxygen vacancies or lower impurity concentrations compared to regions 230na and 230nb, region 230i is a high-resistivity region with low carrier concentration. Therefore, region 230i can be considered a type I (intrinsic) or essentially type I region.

[0048] Compared to region 230i, regions 230na and 230nb have more oxygen vacancies or higher concentrations of impurities such as hydrogen, nitrogen, and metal elements, thus they are low-resistance regions with high carrier concentration. In other words, regions 230na and 230nb are n-type regions (low-resistance regions) with higher carrier concentration than region 230i.

[0049] The preferred carrier concentration in region 230i is 1×10⁻⁶. 18 cm -3 Below, less than 1×10 17 cm -3 Less than 1×10 16 cm -3 Less than 1×10 15 cm -3 Less than 1×10 14 cm -3 Less than 1×1013 cm -3 Less than 1×10 12 cm -3 Less than 1×10 11 cm -3 Or less than 1×10 10 cm -3 Note that there is no specific limit to the lower limit of carrier concentration in region 230i; for example, it can be 1 × 10⁻⁶. -9 cm -3 .

[0050] When the aim is to reduce the carrier concentration of oxide 230, the impurity concentration in oxide 230 can be reduced to decrease the defect state density. In this specification and the like, a state with low impurity concentration and low defect state density is referred to as high-purity intrinsic or substantially high-purity intrinsic. Furthermore, oxide semiconductors (or metal oxides) with low carrier concentration are sometimes referred to as high-purity intrinsic or substantially high-purity intrinsic oxide semiconductors (or metal oxides).

[0051] To stabilize the electrical characteristics of transistor 200A, reducing the impurity concentration in oxide 230 is effective. To further reduce the impurity concentration in oxide 230, it is preferable to also reduce the impurity concentration in the adjacent film. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, and silicon. Note that impurities in oxide 230 refer, for example, to elements other than the main components constituting oxide 230. For example, elements with a concentration less than 0.1 atomic percent can be considered impurities.

[0052] In oxide 230, it is sometimes difficult to clearly observe the boundaries between regions. The concentrations of metallic elements and impurity elements such as hydrogen and nitrogen detected in each region do not need to vary in stages according to each region; they can vary continuously within each region. That is, the closer to region 230i, the lower the concentration of impurity elements such as hydrogen and nitrogen can be.

[0053] Oxide 230 can be in the form of a single layer or a multilayer structure.

[0054] Furthermore, it is preferable to use a metal oxide (hereinafter also referred to as an oxide semiconductor) for oxide 230.

[0055] The bandgap of the metal oxide used as a semiconductor is preferably 2 eV or more, more preferably 2.5 eV or more. By using a metal oxide with a wider bandgap, the off-state current of the transistor can be reduced. Therefore, a transistor that incorporates a metal oxide in the channel formation region is called an OS transistor. OS transistors have low off-state currents, thus significantly reducing the power consumption of semiconductor devices. In addition, OS transistors have high frequency characteristics, enabling semiconductor devices to operate at high speeds.

[0056] Oxide 230 preferably comprises a metal oxide (oxide semiconductor). Examples of metal oxides that can be used in oxide 230 include indium oxide, gallium oxide, and zinc oxide. The metal oxide preferably comprises at least indium (In) or zinc (Zn). Furthermore, the metal oxide preferably comprises two or three elements selected from indium, element M, and zinc. Element M is a metallic or half-metallic element with a high bond energy with oxygen, for example, a metallic or half-metallic element with a higher bond energy with oxygen than with indium. Specifically, examples of element M include aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium, and antimony. The element M included in the metal oxide is preferably any one or more of the above elements, more preferably one or more selected from aluminum, gallium, tin, and yttrium, and even more preferably gallium. Note that in this specification and other documents, metallic elements and half-metallic elements are sometimes collectively referred to as "metallic elements," and the "metallic elements" described in this specification and other documents sometimes include half-metallic elements.

[0057] Oxide 230 may include, for example, indium zinc oxide (In-Zn oxide), indium tin oxide (In-Sn oxide), indium titanium oxide (In-Ti oxide), indium gallium oxide (In-Ga oxide), indium gallium aluminum oxide (In-Ga-Al oxide), indium gallium tin oxide (In-Ga-Sn oxide), gallium zinc oxide (Ga-Zn oxide, also referred to as GZO), aluminum zinc oxide (Al-Zn oxide, also referred to as AZO), indium aluminum zinc oxide (In-Al-Zn oxide, also referred to as IAZO), indium tin zinc oxide (In-Sn-Zn oxide), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, also referred to as IGZO), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide, also referred to as IGZTO), indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, also referred to as IGAZO or IAGZO), etc. Alternatively, silicon-containing indium tin oxide, gallium tin oxide (Ga-Sn oxide), aluminum tin oxide (Al-Sn oxide), etc., can be used.

[0058] Increasing the proportion of indium atoms in a metal oxide relative to the sum of the atomic numbers of all metal elements can improve the field-effect mobility of a transistor.

[0059] Note that metal oxides can also replace indium or contain one or more metals with high period numbers in the periodic table, in addition to indium. There is a tendency that the greater the orbital overlap of the metal elements, the greater the carrier conduction in the metal oxide. Therefore, by including metals with high period numbers in the periodic table, the field-effect mobility of transistors can sometimes be improved. Examples of metals with high period numbers in the periodic table include those belonging to period 5 and period 6. Specifically, examples of such metals include yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium. Note that lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium are called light rare earth elements.

[0060] In addition, metal oxides can also contain one or more non-metallic elements. When metal oxides contain non-metallic elements, the field-effect mobility of transistors can sometimes be improved. Examples of non-metallic elements include carbon, nitrogen, phosphorus, sulfur, selenium, fluorine, chlorine, bromine, and hydrogen.

[0061] Furthermore, increasing the proportion of zinc atoms in the metal oxide relative to the sum of the atomic numbers of all metal elements results in high crystallinity of the metal oxide, which suppresses the diffusion of impurities. Therefore, variations in the electrical characteristics of the transistor are suppressed, thus improving reliability.

[0062] Furthermore, increasing the proportion of element M atoms in the metal oxide relative to the sum of the atomic numbers of all metal elements can suppress the formation of oxygen vacancies in the metal oxide. Therefore, carrier generation due to oxygen vacancies is suppressed, allowing for the formation of transistors with low off-state currents. Additionally, fluctuations in the transistor's electrical characteristics are suppressed, thus improving reliability.

[0063] Furthermore, by increasing the ratio of the number of In atoms to the total number of atoms of all metal elements in a metal oxide, transistors can achieve large on-state current and high frequency characteristics.

[0064] As described above, the electrical characteristics and reliability of the transistor vary depending on the composition of the metal oxide used in oxide 230. Therefore, by varying the composition of the metal oxide according to the required electrical characteristics and reliability of the transistor, a semiconductor device with both excellent electrical characteristics and high reliability can be realized.

[0065] Specifically, the oxide 230 can be a metal oxide having the following compositions: In:M:Zn = 1:1:1 [atomic ratio] or a composition close to it; In:M:Zn = 1:1:1.2 [atomic ratio] or a composition close to it; In:M:Zn = 1:1:2 [atomic ratio] or a composition close to it; or In:M:Zn = 4:2:3 [atomic ratio] or a composition close to it. Furthermore, the "close to" composition includes a range of ±30% of the desired atomic ratio. Additionally, at least one of gallium and aluminum is preferably used as element M.

[0066] Furthermore, when depositing metal oxides using sputtering, the aforementioned atomic ratio is not limited to the atomic ratio of the deposited metal oxide, but can also be the atomic ratio of the sputtering target used for depositing the metal oxide.

[0067] In transistors using oxide semiconductors, the presence of impurities and oxygen vacancies in the channel formation region can easily alter electrical characteristics, potentially leading to decreased reliability. Furthermore, hydrogen near oxygen vacancies can form defects where hydrogen enters the oxygen vacancy (sometimes referred to below as V). O H) may generate electrons that become charge carriers. Therefore, when oxygen vacancies are included in the channel formation region of an oxide semiconductor, the transistor tends to have always-on characteristics (the characteristic that current flows through the transistor even when no voltage is applied to the gate electrode). Therefore, in the channel formation region of an oxide semiconductor, it is preferable to minimize impurities, oxygen vacancies, and V O H. In other words, preferably, the carrier concentration in the channel formation region of the oxide semiconductor is reduced and is i-typed (intrinsicized) or substantially i-typed.

[0068] In contrast, by performing heat treatment with an insulator containing oxygen that has been removed by heating (hereinafter, sometimes referred to as excess oxygen) near the oxide semiconductor, oxygen can be supplied to the oxide semiconductor from the insulator, thereby reducing oxygen vacancies and V. O H. Note that supplying excessive oxygen to region 230na or region 230nb may cause a decrease in the on-state current or field-effect mobility of transistor 200A. Furthermore, when the amount of oxygen supplied to region 230na or region 230nb is uneven within the substrate surface, non-uniformity in the semiconductor device characteristics, including those of the transistor, occurs. Additionally, when oxygen supplied from the insulator to the oxide semiconductor diffuses to conductors such as the gate electrode, source electrode, and drain electrode, these conductors may sometimes be oxidized, leading to a loss of conductivity and thus negatively impacting the electrical characteristics and reliability of the transistor.

[0069] Therefore, it is preferable that, in the oxide semiconductor, the carrier concentration in region 230i is reduced and is i-typened or substantially i-typened; on the other hand, it is preferable that the carrier concentrations in regions 230na and 230nb are high and n-typened. That is, it is preferable to reduce the oxygen vacancies and Vo in region 230i. O H. Furthermore, it is preferable that regions 230na and 230nb are not supplied with excessive oxygen and that the V of regions 230na and 230nb... O The amount of hydrogen (H) is not excessively reduced. Furthermore, a structure that suppresses the decrease in conductivity of conductors 260, 242a, and 242b is preferred. For example, a structure that suppresses the oxidation of conductors 260, 242a, and 242b is preferred. Note that hydrogen in oxide semiconductors may form V2. O H, therefore, in order to reduce V O The amount of H needs to be reduced by lowering the hydrogen concentration.

[0070] Therefore, in this embodiment, the semiconductor device has a structure that supplies oxygen to region 230i and suppresses hydrogen diffusion to region 230i. Furthermore, the semiconductor device has a structure that suppresses the oxidation of conductors 242a, 242b, and 260. Additionally, the semiconductor device has a structure that reduces the hydrogen concentration in region 230i.

[0071] like Figure 1C As shown, in a cross-section along the channel width direction of transistor 200A, conductor 260 covers the side and top surfaces of oxide 230. By employing this structure, a region can be formed around the channel by the electric field of the gate electrode. In this specification, the transistor structure in which a region is formed around the channel by the electric field of at least the first gate electrode is referred to as a surrounded channel (S-channel) structure. By giving transistor 200A an S-channel structure, the channel formation region formed at or near the interface between oxide 230 and the gate insulator can be considered as the entire bulk of oxide 230. Therefore, the current density flowing through the transistor can be increased, and thus an increase in the transistor's on-state current or field-effect mobility can be expected.

[0072] As described above, transistor 200A has a structure in which the channel formation region is surrounded by the electric field of the gate electrode. Therefore, it is preferable to adopt a structure that uniformly supplies oxygen to the entire channel formation region (the top, side, and bottom surfaces of the channel formation region) and suppresses hydrogen diffusion. For example, it is preferable to provide a first insulator containing a material that easily allows oxygen to permeate around the channel formation region, and to provide a second insulator that has the function of suppressing hydrogen diffusion around the channel formation region and the first insulator. Specifically, it is preferable to provide a first insulator above and below region 230i, and to provide a second insulator above and below it, respectively. Here, the stack of the first insulator and the second insulator on the first insulator in the channel formation region is referred to as the first stack. In addition, the stack of the first insulator and the second insulator below the first insulator in region 230i is referred to as the second stack. At this time, the first stack and the second stack are arranged symmetrically with respect to the channel formation region or axis. In other words, the first stack and the second stack are arranged symmetrically with respect to the surface or line passing through the channel formation region. Furthermore, the first and second stacked bodies are arranged symmetrically around the channel forming region.

[0073] Note that in this specification, the structure in which the first and second stacked bodies are symmetrically arranged with respect to the structure refers to a structure in which the first and second stacked bodies are arranged to clamp the structure, and the stacking order of the layers included in the first stacked body is the same as that of the layers included in the second stacked body when referenced to the structure. In other words, it refers to a structure in which the first and second stacked bodies are arranged to clamp the structure, and the stacking order of the layers included in the first stacked body is reversed in the direction from the first stacked body to the second stacked body across the structure. Furthermore, the first stacked body, the structure, and the second stacked body can be arranged sequentially in a direction perpendicular to the substrate surface or sequentially in a direction horizontal to the substrate surface. When the first stacked body, the structure, and the second stacked body are arranged sequentially in a direction perpendicular to the substrate surface, it can be said that the first and second stacked bodies are positioned above and below the structure.

[0074] Furthermore, both the first and second laminated bodies comprise two or more layers. Preferably, the number of layers in the first laminated body is the same as the number of layers in the second laminated body. Note that a single layer in the first laminated body may sometimes function as multiple layers in the second laminated body, and vice versa. Additionally, a structure composed of multiple layers in the first laminated body may sometimes function as a single layer in the second laminated body, and vice versa. Therefore, the number of layers in the first laminated body may sometimes differ from the number of layers in the second laminated body. Furthermore, the outlines of a single layer in the first laminated body do not necessarily need to overlap with the outlines of other layers. The same applies to the second laminated body.

[0075] The semiconductor device shown in this embodiment includes a first stack, a metal oxide having a channel forming region under the first stack, and a second stack under the metal oxide. Each of the first and second stacks includes at least a first insulator and a second insulator. The first insulator in the first stack and the first insulator in the second stack have regions that overlap each other across the channel forming region, and the second insulator in the first stack and the second insulator in the second stack have regions that overlap each other across the first insulator in the first stack, the channel forming region, and the first insulator in the second stack.

[0076] Note that as long as the first insulator included in the first laminate and the first insulator included in the second laminate have the same properties or functions, their thickness, material, and formation method can also be different. Specifically, the first insulator included in the first laminate and the first insulator included in the second laminate only need to have the property of easily allowing oxygen to permeate, and their thickness, material, and formation method can also be different. Note that there can be one or more of the same properties or functions. The same applies to the second insulator included in the first laminate and the second insulator included in the second laminate. Specifically, the second insulator included in the first laminate and the second insulator included in the second laminate only need to have the function of inhibiting hydrogen diffusion, and their thickness, material, and formation method can also be different.

[0077] like Figure 1B and Figure 1C As shown, insulator 250 preferably has a laminated structure of insulator 250a and insulator 250b on insulator 250a. Furthermore, insulator 222 preferably has a laminated structure of insulator 222a and insulator 222b below insulator 222a. That is, insulator 250a and insulator 222a are preferably provided in a manner that sandwiches oxide 230 in region 230i, and insulator 250b and insulator 222b are provided in a manner that sandwiches insulator 250a, region 230i, and insulator 222a. In other words, insulator 250a and insulator 222a have regions that overlap each other across region 230i, and insulator 250b and insulator 222b have regions that overlap each other across insulator 250a, region 230i, and insulator 222a.

[0078] exist Figure 1B and Figure 1CIn the structure shown, insulator 250 corresponds to the first stacked body described above, and insulator 222 corresponds to the second stacked body described above. Furthermore, insulators 250a and 222a correspond to the first insulator, and insulators 250b and 222b correspond to the second insulator. In this case, conductor 260 can be said to be located above the first stacked body. Furthermore, conductor 205 can be said to be located below the second stacked body.

[0079] In addition, such as Figure 1B and Figure 1C As shown, insulators 250a and 222a preferably have regions in contact with each other in areas that do not overlap with oxide 230. By adopting this structure, oxide 230 can be surrounded by insulators 250a and 222a.

[0080] As insulators 250a and 222a, insulators that are easily permeable to oxygen are preferably used. With this structure, oxygen contained in insulator 280 can be supplied to region 230i through insulators 250a and 222a. Alternatively, insulators 250a and 222a can also be insulators containing excess oxygen. With this structure, oxygen contained in insulators 250a and 222a can be supplied to region 230i.

[0081] For example, silicon oxide, silicon oxynitride, or silicon oxynitride can be used as insulators 250a and 222a. Furthermore, for example, silicon oxide with added fluorine, silicon oxide with added carbon, or silicon oxide with added carbon and nitrogen can be used. Furthermore, for example, porous silicon oxide can be used. Moreover, these silicon oxides may also contain nitrogen. In particular, silicon oxide and silicon oxynitride have thermal stability and are therefore preferred. In this case, insulators 250a and 222a contain at least oxygen and silicon.

[0082] Note that in this specification, etc., oxynitrides refer to materials in which the oxygen content is greater than the nitrogen content in their composition, while oxynitrides refer to materials in which the nitrogen content is greater than the oxygen content in their composition. For example, when referred to as silicon oxynitride, this refers to materials in which the oxygen content is greater than the nitrogen content in their composition, while when referred to as silicon oxynitride, this refers to materials in which the nitrogen content is greater than the oxygen content in their composition.

[0083] Furthermore, the concentrations of impurities such as water and hydrogen in insulators 250a and 222a are preferably reduced.

[0084] Insulators 250b and 222b preferably have hydrogen-blocking properties. This suppresses the diffusion of impurities such as hydrogen contained in conductors 260 and 205 into region 230i. As insulators 250b and 222b, aluminum oxide, magnesium oxide, hafnium oxide, gallium oxide, indium gallium zinc oxide, silicon nitride, or silicon oxynitride are preferred, for example. In particular, silicon nitride has high hydrogen-blocking properties and is therefore preferred for insulators 250b and 222b. In this case, insulators 250b and 222b contain at least nitrogen and silicon.

[0085] Insulator 250b can be made less permeable to hydrogen than insulator 250a. Furthermore, insulator 250b can be made of a material less permeable to hydrogen than insulator 250a. Similarly, insulator 222b can be made less permeable to hydrogen than insulator 222a. Furthermore, insulator 222b can be made of a material less permeable to hydrogen than insulator 222a.

[0086] Note that in this specification, barrier properties refer to the property that the corresponding substance does not easily diffuse (or, in other words, the property that the corresponding substance is not easily permeable, the property that the corresponding substance has low permeability, or the function of inhibiting the diffusion of the corresponding substance). Furthermore, barrier properties refer to the function of capturing or fixing (also known as gettering) the corresponding substance. Additionally, in this specification, insulators with barrier properties are sometimes referred to as barrier insulators.

[0087] Insulators 250b and 222b preferably have oxygen-barrier properties. Insulator 250b is disposed between insulator 250a and conductor 260. This prevents oxygen contained in insulator 250a from diffusing into conductor 260, thus inhibiting oxidation of conductor 260. Furthermore, it suppresses the reduction of oxygen supply to region 230i. Insulator 222b is disposed between insulator 222a and conductor 205. This prevents oxygen contained in insulator 222a from diffusing into conductor 205, thus inhibiting oxidation of conductor 205. Furthermore, it suppresses the reduction of oxygen supply to region 230i.

[0088] Note that insulator 250b should be less permeable to oxygen than insulator 250a. Furthermore, insulator 250b can be made of a material less permeable to oxygen than insulator 250a. Similarly, insulator 222b should be less permeable to oxygen than insulator 222a. Furthermore, insulator 222b can be made of a material less permeable to oxygen than insulator 222a.

[0089] Silicon nitride has oxygen barrier properties, which makes it suitable for insulators 250b and 222b.

[0090] By adopting the above structure, the electrical characteristics and reliability of transistor 200 can be improved. Therefore, a semiconductor device with good electrical characteristics and high reliability can be realized. Insulators 250a and 222a have the same function, and insulators 250b and 222b have the same function. Therefore, the first and second stacked bodies can be symmetrically arranged with reference to the channel forming region.

[0091] Insulator 280 is used as an interlayer film. A material with a low dielectric constant is preferably used as insulator 280. For example, the dielectric constant of insulator 280 is preferably lower than that of insulator 250b. By using a material with a low dielectric constant as the interlayer film, parasitic capacitance generated between the wirings can be reduced.

[0092] Note that the ratio of the dielectric constant of a medium to its dielectric constant relative to the dielectric constant of vacuum is called the relative dielectric constant. In other words, the relative dielectric constant refers to the ratio by which the dielectric constant is made dimensionless using the electrical constant. Therefore, the dielectric constant can be referred to as the relative dielectric constant.

[0093] For example, insulator 280 can be an insulator that can also be used for insulator 250a and insulator 222a. In particular, materials such as silicon oxide, silicon oxynitride, and porous silicon oxide are preferred, thereby making it easy to form regions containing excess oxygen.

[0094] The concentration of impurities such as water and hydrogen in the insulator 280 is preferably reduced. For example, silicon oxides such as silicon oxynitride are preferably used as the insulator 280.

[0095] The conductor 260 and the insulator 250 are arranged to be embedded in an opening formed in the insulator 280. The conductor 260 covers at least a portion of the side surface and at least a portion of the top surface of the oxide 230 via the insulator 250 in this opening. Furthermore, the top surface of the conductor 260 is arranged to be at the same height as the top surfaces of the insulator 250 and the insulator 280.

[0096] In the opening formed in the insulator 280 where the conductor 260 and the insulator 250 are disposed, the sidewall of the insulator 280 can be approximately perpendicular to the top surface of the insulator 222, or it can have a conical shape. By having a conical shape for the sidewall of the insulator 280 in the opening, the coverage of the insulator 250 and the like provided in the opening can be improved, thereby reducing defects such as voids.

[0097] like Figure 1A and Figure 1C As shown, the conductor 260 preferably extends in the channel width direction. By employing this structure, the conductor 260 is used as wiring when multiple transistors are arranged.

[0098] As conductors 260, 242a, 242b, and 205, it is preferable to use conductive materials that are not easily oxidized or conductive materials that have the function of inhibiting oxygen diffusion. Examples of such conductive materials include nitrogen-containing conductive materials and oxygen-containing conductive materials. This suppresses the reduction of conductivity in conductors 260, 242a, 242b, and 205. When conductive materials containing metal and nitrogen are used as conductors 260, 242a, 242b, and 205, these conductors at least contain both the metal and nitrogen.

[0099] Conductor 260 can have either a single-layer structure or a multilayer structure. Furthermore, conductors 242a and 242b can have either a single-layer structure or a multilayer structure.

[0100] The conductors 242a and 242b are preferably made of nitrogen-containing conductive materials, such as tantalum nitrides, titanium nitrides, molybdenum nitrides, tungsten nitrides, tantalum and aluminum nitrides, and titanium and aluminum nitrides. In one embodiment of the invention, tantalum nitrides are particularly preferred. Furthermore, ruthenium, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel may also be used, for example. These materials are preferred because they are conductive materials that are not easily oxidized or maintain conductivity even when absorbing oxygen.

[0101] Note that sometimes hydrogen contained in oxide 230, etc., diffuses into conductor 242a or conductor 242b. In particular, when a tantalum-containing nitride is used as conductor 242a and conductor 242b, sometimes hydrogen contained in oxide 230, etc., readily diffuses into conductor 242a or conductor 242b, and this diffused hydrogen bonds with the nitrogen contained in conductor 242a or conductor 242b. That is, sometimes hydrogen contained in oxide 230, etc., is absorbed by conductor 242a or conductor 242b.

[0102] Conductor 205 is disposed in a manner that overlaps with oxide 230 and conductor 260. Furthermore, as... Figure 1A and Figure 1C As shown, the conductor 205 preferably extends in the channel width direction. By employing this structure, the conductor 205 is used as wiring when multiple transistors are arranged.

[0103] The conductor 205 can have a single-layer structure or a multilayer structure.

[0104] Conductor 205 can be used as a second gate electrode. In this case, the threshold voltage (Vth) of transistor 200 can be controlled by independently changing the potential applied to conductor 205 without linking it to the potential applied to conductor 260. In particular, by applying a negative potential to conductor 205, the Vth of transistor 200 can be further increased, thereby reducing the off-state current. Thus, compared to not applying a negative potential to conductor 205, applying a negative potential to conductor 205 can reduce the drain current when the potential applied to conductor 260 is 0V.

[0105] Alternatively, the potential applied to conductor 205 can be the same as the potential applied to conductor 260. In this case, the electric fields of conductors 260 and 205 can act on the entire channel-forming region of oxide 230. Therefore, the channel width can be increased without increasing the transistor size. Thus, transistor miniaturization can be achieved while increasing the transistor's on-state current. Furthermore, increasing the transistor's on-state current improves frequency characteristics.

[0106] exist Figure 1B and Figure 1C In this invention, a stacked structure of insulator 222b and insulator 222a is used as the second gate insulator, but the invention is not limited thereto. For example, a stacked structure of insulator 222 and island-shaped insulators on insulator 222 can also be used as the second gate insulator. In other words, island-shaped insulators can also be provided between insulator 222 and oxide 230.

[0107] Note that in this specification, etc., "island" refers to the state in which two or more layers formed in the same process and using the same material are physically separated.

[0108] Figure 2A and Figure 2B Showing with Figure 1B and Figure 1C The diagram shows an example of a different structure. Figure 2A and Figure 2B This is a cross-sectional view of a semiconductor device including transistor 200A. Here, Figure 2A This is a cross-sectional view along the channel length of transistor 200A. Figure 2B This is a cross-sectional view along the channel width of transistor 200A. Additionally, Figure 2A and Figure 2B The top view of the semiconductor device shown can be referenced. Figure 1A .

[0109] Figure 2A and Figure 2B The transistor 200A shown is Figure 1B and Figure 1CThe main difference of the transistor 200A shown is that the insulator 222 is a single layer and includes island-shaped insulators 224.

[0110] exist Figure 2A and Figure 2B In the transistor 200A shown, an island-shaped insulator 224 is disposed between the insulator 222 and the oxide 230. For example... Figure 2A and Figure 2B As shown, in the cross-section of transistor 200A, the side end of insulator 224 coincides with the side end of oxide 230.

[0111] Both insulators 222 and 224 have regions that serve as second gate insulators.

[0112] Insulator 250a has a region that contacts the top surface of insulator 222, a region that contacts the side surface of insulator 224, a region that contacts the side surface of oxide 230, and a region that contacts the top surface of oxide 230. At this time, region 230i of oxide 230 is surrounded by insulator 250a and insulator 224.

[0113] Insulator 222 is preferably made of a material suitable for insulator 222b. Furthermore, insulator 224 is preferably made of a material suitable for insulator 222a. In this structure, the laminate composed of insulator 222 and island-shaped insulator 224 can be considered as a second laminate. At this point, it can be said that… Figure 2A and Figure 2B The transistor 200A shown has a structure in which the first stack and the second stack are symmetrically arranged with respect to the channel forming region.

[0114] <Structure Example 2> Figures 3A to 3C An example of a structure different from the transistor 200A described above is shown. Figure 3A This is a top view of a semiconductor device. Figure 3B and Figure 3C This is a cross-sectional view of a semiconductor device. Figure 3B It is along Figure 3A A cross-sectional view of the section marked with dashed lines A1-A2. Furthermore, Figure 3C It is along Figure 3A The cross-sectional view of the section marked with dashed lines A3-A4. Note that in... Figure 3A In the top view, some constituent elements are omitted for clarity.

[0115] Figures 3A to 3C The semiconductor device shown includes transistor 200B. Therefore, Figure 3B This can be described as a cross-sectional view along the channel length of transistor 200B. Furthermore, Figure 3CIt can also be described as a cross-sectional view of the channel width of transistor 200B.

[0116] Figure 3B and Figure 3C The transistor 200B shown is Figure 1B and Figure 1C The main difference in the transistor 200A shown is that both insulator 222 and insulator 250 have a three-layer stacked structure. Specifically, Figure 3B and Figure 3C The transistor 200B shown is Figure 1B and Figure 1C The main difference of the transistor 200A shown is that: insulator 250 further includes insulator 250c below insulator 250a; and insulator 222 further includes insulator 222c above insulator 222a. The following mainly describes the parts that differ from the above-described structural example 1, omitting repeated descriptions.

[0117] Insulator 250 includes insulator 250c, insulator 250a on insulator 250c, and insulator 250b on insulator 250a. Insulator 222 includes insulator 222b, insulator 222a on insulator 222b, and insulator 222c on insulator 222a. At this time, insulator 250c and insulator 222c have regions that overlap with each other across region 230i, insulator 250a and insulator 222a have regions that overlap with each other across insulator 250c, region 230i, and insulator 222c, and insulator 250b and insulator 222b have regions that overlap with each other across insulator 250a, insulator 250c, region 230i, insulator 222c, and insulator 222a. In addition, it can be said that insulator 250c is located between insulator 250a and region 230i, and insulator 222c is located between insulator 222a and region 230i.

[0118] Insulators 250c and 222c preferably have oxygen-barrier properties. Insulator 250c includes a region contacting the side of conductor 242a and a region contacting the side of conductor 242b. When insulator 250c has oxygen-barrier properties, oxidation of the side surfaces of conductors 242a and 242b, preventing the formation of an oxide film on those side surfaces, can be suppressed. This suppresses the decrease in on-state current or field-effect mobility of transistor 200B. Examples of oxygen-barrier insulators include oxides containing one or both of aluminum and hafnium, oxides containing hafnium and silicon (hafnium silicate), magnesium oxide, gallium oxide, zinc gallium oxide, zinc indium gallium oxide, silicon nitride, and silicon oxynitride. Furthermore, examples of oxides containing one or both of aluminum and hafnium include aluminum oxide, hafnium oxide, and oxides containing aluminum and hafnium (hafnium aluminate).

[0119] Insulators 250c and 222c preferably have a single-layer structure or a multilayer structure of the oxygen-barrier insulator described above. Note that insulator 250c should, for example, be less permeable to oxygen than insulator 250a. Furthermore, insulator 250c can, for example, be made of a material less permeable to oxygen than insulator 250a. Similarly, insulator 222c should, for example, be less permeable to oxygen than insulator 222a. Furthermore, insulator 222c can, for example, be made of a material less permeable to oxygen than insulator 222a.

[0120] Insulator 250c contacts the top and side surfaces of oxide 230 and the top surface of insulator 222c. That is, region 230i is surrounded by insulator 250c and insulator 222c. When insulator 250c and insulator 222c have oxygen-barrier properties, oxygen detachment from region 230i during heat treatment or similar processes can be suppressed. Therefore, the formation of oxygen vacancies in region 230i can be suppressed.

[0121] Furthermore, by providing insulators 250c and 222c, even if insulator 280 contains excess oxygen, the supply of excess oxygen to region 230i can be suppressed, ensuring that an appropriate amount of oxygen is supplied to region 230i. Therefore, the decrease in on-state current or field-effect mobility of transistor 200B due to excessive oxidation of regions 230na and 230nb can be suppressed.

[0122] Furthermore, insulator 222c is disposed between insulator 222a and region 230na or region 230nb. Therefore, oxygen diffusion from below insulator 222c to regions 230na and 230nb can be suppressed. Moreover, conductor 242a is disposed on region 230na, and conductor 242b is disposed on region 230nb. Therefore, in this embodiment, regions 230na and 230nb are not supplied with excessive oxygen.

[0123] As insulators 250c and 222c, it is preferable to use insulators comprising oxides, which contain one or both of aluminum and hafnium. In this embodiment, aluminum oxide is used as insulator 250c and insulator 222c. In this case, insulator 250c and insulator 222c each contain at least oxygen and aluminum.

[0124] By adopting the above structure, insulator 250c and insulator 222c have the same function. Therefore, the first and second laminates can be symmetrically arranged with reference to the channel forming region.

[0125] In addition, with Figure 2A and Figure 2BSimilarly, the second gate insulator can also be composed of a stack of insulator 222 and island insulator 224.

[0126] Figure 4A and Figure 4B Showing with Figure 3B and Figure 3C The diagram shows an example of a different structure. Figure 4A and Figure 4B This is a cross-sectional view of a semiconductor device including transistor 200B. Here, Figure 4A This is a cross-sectional view along the channel length of transistor 200B. Figure 4B This is a cross-sectional view of the channel width of transistor 200B. Additionally, Figure 4A and Figure 4B The top view of the semiconductor device shown can be referenced. Figure 3A .

[0127] Figure 4A and Figure 4B The transistor 200B shown is Figure 3B and Figure 3C The main difference of the transistor 200B shown is that the insulator 222 has a two-layer stacked structure and includes an island insulator 224.

[0128] exist Figure 4A and Figure 4B In the transistor 200B shown, the insulator 222 has a stacked structure of insulator 222b and insulator 222a on insulator 222b. In addition, an island-shaped insulator 224 is disposed between insulator 222 and oxide 230.

[0129] Insulator 250c has a region that contacts the top surface of insulator 222a, a region that contacts the side surface of insulator 224, a region that contacts the side surface of oxide 230, and a region that contacts the top surface of oxide 230. At this time, region 230i of oxide 230 is surrounded by insulator 250c and insulator 224.

[0130] Insulator 224 is preferably made of a material that can be used in the aforementioned insulator 222c.

[0131] Note that the structures of insulators 222 and 224 are not limited to those of other types. Figure 4A and Figure 4B The structure shown. Figure 4C and Figure 4D Showing with Figure 4A and Figure 4B The diagram shows an example of a different structure. Figure 4C and Figure 4D This is a cross-sectional view of a semiconductor device including transistor 200B. Here, Figure 4CThis is a cross-sectional view along the channel length of transistor 200B. Figure 4D This is a cross-sectional view of the channel width of transistor 200B. Note that... Figure 4C and Figure 4D The top view of the semiconductor device shown can be referenced. Figure 3A .

[0132] like Figure 4C and Figure 4D As shown, insulator 222 can also have a single-layer structure, and insulator 224 can also have a laminated structure of insulator 224a and insulator 224c on insulator 224a. In this case, insulator 222 is preferably made of a material that can be used in insulator 222b. In addition, insulator 224a is preferably made of a material that can be used insulator 222a, and insulator 224c is preferably made of a material that can be used insulator 222c.

[0133] By adopting the above structure, the laminate composed of insulator 222 and insulator 224 can be regarded as a second laminate. At this point, it can be said that... Figure 4A and Figure 4B The transistor 200B shown and Figure 4C and Figure 4D The transistor 200B shown has a structure in which a first stack and a second stack are arranged symmetrically with respect to the channel forming region.

[0134] Notice, Figure 4A and Figure 4B The invention is shown to have an oxygen-barrier insulator 224 disposed between region 230i and insulator 222a, but the invention is not limited thereto. Figure 5A and Figure 5B Showing with Figure 4A and Figure 4B The diagram shows an example of a different structure.

[0135] Figure 5A and Figure 5B This is a cross-sectional view of a semiconductor device including transistor 200B. Here, Figure 5A This is a cross-sectional view along the channel length of transistor 200B. Figure 5B This is a cross-sectional view of the channel width of transistor 200B. Note that... Figure 5A and Figure 5B The top view of the semiconductor device shown can be referenced. Figure 3A .

[0136] Figure 5A and Figure 5B The transistor 200B shown is Figure 4A and Figure 4BThe main differences of the transistor 200B shown are: the insulator 222 has a two-layer stacked structure; the insulator 224 is not included; and the oxide 230 has a two-layer stacked structure.

[0137] like Figure 5A and Figure 5B As shown, insulator 222 has a stacked structure of insulator 222b and insulator 222a on insulator 222b. Additionally, oxide 230 has a stacked structure of oxide 230a and oxide 230b on oxide 230a. Oxide 230a uses an oxygen-barrier semiconductor material, and oxide 230b preferably uses a material suitable for the aforementioned oxide 230.

[0138] Note that oxide 230a can be made less permeable to oxygen than insulator 222a. Furthermore, oxide 230a can be made of a material that is less permeable to oxygen than insulator 222a.

[0139] For example, oxide 230a preferably uses a metal oxide that contains at least element M. Note that oxide 230b may or may not contain element M. For example, the atomic ratio of element M relative to the main metal element in oxide 230a is preferably greater than the atomic ratio of element M relative to the main metal element in oxide 230b. Furthermore, when both oxide 230a and oxide 230b contain In, the atomic ratio of element M relative to In in oxide 230a is preferably greater than the atomic ratio of element M relative to In in oxide 230b. By employing this structure, the diffusion of impurities and oxygen from the structure formed below oxide 230a to oxide 230b can be suppressed.

[0140] For example, as oxide 230a, a metal oxide with an In:M:Zn ratio of 1:3:2 or similar, an In:M:Zn ratio of 1:3:4 or similar, or an In:M:Zn ratio of 1:1:0.5 or similar can be used.

[0141] Furthermore, at least one of gallium and aluminum is preferably used as element M. As described above, when aluminum oxide is used as insulator 250c, both oxide 230a and insulator 250c contain at least one of gallium and aluminum.

[0142] In the above structure, the laminate composed of insulator 222 and oxide 230a can be regarded as the second laminate. At this point, it can be said that... Figure 5A and Figure 5B The transistor 200B shown has a structure in which a first stack and a second stack are arranged symmetrically with respect to the channel forming region.

[0143] Note that when oxide 230 has a stacked structure of oxide 230a and oxide 230b, regions 230i, 230na and 230nb are sometimes formed not only in oxide 230b but also in oxide 230a.

[0144] Figure 5C and Figure 5D Showing with Figure 5A and Figure 5B The diagram shows an example of a different structure. Figure 5C and Figure 5D This is a cross-sectional view of a semiconductor device including transistor 200B. Here, Figure 5C This is a cross-sectional view along the channel length of transistor 200B. Figure 5D This is a cross-sectional view of the channel width of transistor 200B. Note that... Figure 5C and Figure 5D The top view of the semiconductor device shown can be referenced. Figure 3A .

[0145] like Figure 5C and Figure 5D As shown, insulator 222 can also have a single-layer structure, and insulator 224 can be disposed between insulator 222 and oxide 230a. In this case, insulator 250c and oxide 230a have regions that overlap with each other through region 230i, insulator 250a and insulator 224 have regions that overlap with each other through insulator 250c, region 230i and oxide 230a, and insulator 250b and insulator 222 have regions that overlap with each other through insulator 250a, insulator 250c, region 230i, oxide 230a and insulator 224.

[0146] Insulator 222 is preferably made of a material suitable for insulator 222b. Furthermore, insulator 224 is preferably made of a material suitable for insulator 222a. In this structure, the structure composed of insulator 222, insulator 224, and oxide 230a can be considered as a second laminate. In this case, the second laminate includes oxide 230a, insulator 224 beneath oxide 230a, and insulator 222 beneath insulator 224. Therefore, it can be said that… Figure 5C and Figure 5D The transistor 200B shown has a structure in which a first stack and a second stack are symmetrically arranged with respect to the channel forming region.

[0147] <Structure Example 3> Figures 6A to 6C An example of a structure different from the transistor 200A described above is shown. Figure 6A This is a top view of a semiconductor device. Figure 6B and Figure 6C This is a cross-sectional view of a semiconductor device. Figure 6B It is along Figure 6A A cross-sectional view of the section marked with dashed lines A1-A2. Furthermore, Figure 6C It is along Figure 6A The cross-sectional view of the section marked with dashed lines A3-A4. Note that in... Figure 6A In the top view, some constituent elements are omitted for clarity.

[0148] Figures 6A to 6C The semiconductor device shown includes transistor 200C. Therefore, Figure 6B This can be described as a cross-sectional view along the channel length of transistor 200C. Furthermore, Figure 6C It can also be described as a cross-sectional view of the channel width of transistor 200C.

[0149] Figure 6B and Figure 6C The transistor 200C shown is Figure 1B and Figure 1C The main difference in the transistor 200A shown is that both insulator 222 and insulator 250 have a three-layer stacked structure. Specifically, Figure 6B and Figure 6C The transistor 200C shown is Figure 1B and Figure 1C The main difference of the transistor 200A shown is that it includes an insulator 250d between insulators 250a and 250b, and an insulator 222d between insulators 222a and 222b. The following mainly describes the parts that differ from the structure example 1 described above, omitting repeated descriptions.

[0150] Insulator 250 includes insulator 250a, insulator 250d on insulator 250a, and insulator 250b on insulator 250d. Insulator 222 includes insulator 222b, insulator 222d on insulator 222b, and insulator 222a on insulator 222d. At this time, insulator 250a and insulator 222a have regions that overlap with each other across region 230i, insulator 250d and insulator 222d have regions that overlap with each other across insulator 250a, region 230i, and insulator 222a, and insulator 250b and insulator 222b have regions that overlap with each other across insulator 250d, insulator 250a, region 230i, insulator 222a, and insulator 222d.

[0151] Insulators 250d and 222d preferably have the function of trapping or fixing hydrogen. By providing an insulator with the function of trapping or fixing hydrogen inside the region surrounded by insulators 250b and 222b, hydrogen inside that region can be trapped or fixed more effectively. That is, hydrogen contained in region 230i of insulators 250a and 230b, and insulator 222a can be trapped or fixed more effectively. Therefore, the hydrogen concentration in region 230i can be reduced. Consequently, the V in region 230i can be reduced. O H thus makes region 230ii type or essentially i type.

[0152] Metal oxides with amorphous structures can be cited as insulators capable of trapping or fixing hydrogen. For example, magnesium oxide or oxides containing one or both of aluminum and hafnium are preferred as insulators 250d and 222d. These metal oxides with amorphous structures sometimes possess the property that oxygen atoms have dangling bonds, which trap or fix hydrogen. In other words, the ability of metal oxides with amorphous structures to trap or fix hydrogen can be considered high.

[0153] Furthermore, insulators 250d and 222d preferably use materials with high relative permittivity (high-k). Note that examples of high-k materials include oxides containing one or both of aluminum and hafnium, tantalum oxide, zirconium oxide, hafnium zirconium oxide, etc. When miniaturizing and highly integrating transistors, problems such as leakage current sometimes occur due to the thinning of the gate insulator. When using high-k materials as insulators 250d and 222d, the gate potential applied during transistor operation can be reduced while maintaining the physical thickness of the gate insulator. Furthermore, the equivalent oxide thickness (EOT) of the insulator used as the gate insulator can be reduced. Additionally, materials with high relative permittivity, such as lead zirconate titanate (PZT), strontium titanate (SrTiO3), and (Ba,Sr)TiO3 (BST), can sometimes be used as insulators 250d and 222d.

[0154] As described above, oxides containing one or both of aluminum and hafnium are preferably used as insulators 250d and 222d, and oxides having an amorphous structure and containing one or both of aluminum and hafnium are more preferably used. In this embodiment, hafnium oxide is used as insulators 250d and 222d. In this case, insulators 250d and 222d each contain at least oxygen and hafnium. Furthermore, the hafnium oxide has an amorphous structure. In this case, insulators 250d and 222d have an amorphous structure.

[0155] By adopting the above structure, insulator 250d and insulator 222d have the same function. Therefore, the first and second laminates can be symmetrically arranged with reference to the channel forming region.

[0156] In addition, with Figure 2A and Figure 2B Similarly, the second gate insulator can also be composed of a stack of insulator 222 and island insulator 224.

[0157] Figure 7A and Figure 7B Showing with Figure 6B and Figure 6C The diagram shows an example of a different structure. Figure 7A and Figure 7B This is a cross-sectional view of a semiconductor device including transistor 200C. Here, Figure 7A This is a cross-sectional view of the channel length of transistor 200C. Figure 7B This is a cross-sectional view of the channel width of transistor 200C. Additionally, Figure 7A and Figure 7B The top view of the semiconductor device shown can be referenced. Figure 6A .

[0158] Figure 7A and Figure 7B The transistor 200C shown is Figure 6B and Figure 6C The main difference of the transistor 200C shown is that the insulator 222 has a two-layer stacked structure and includes an island insulator 224.

[0159] exist Figure 7A and Figure 7B In the transistor 200C shown, the insulator 222 has a stacked structure of insulator 222b and insulator 222d on insulator 222b. In addition, an island-shaped insulator 224 is disposed between insulator 222 and oxide 230.

[0160] Insulator 250a has a region that contacts the top surface of insulator 222d, a region that contacts the side surface of insulator 224, a region that contacts the side surface of oxide 230, and a region that contacts the top surface of oxide 230. At this time, region 230i of oxide 230 is surrounded by insulator 250a and insulator 224.

[0161] The insulator 224 is preferably made of a material that can be used in the insulator 222a described above.

[0162] Note that the structures of insulators 222 and 224 are not limited to those of other types. Figure 7A and Figure 7B The structure shown. Figure 7C and Figure 7D Showing with Figure 7A and Figure 7B The diagram shows an example of a different structure. Figure 7C and Figure 7D This is a cross-sectional view of a semiconductor device including transistor 200C. Here, Figure 7C This is a cross-sectional view of the channel length of transistor 200C. Figure 7D This is a cross-sectional view of the channel width of transistor 200C. Note that... Figure 7C and Figure 7D The top view of the semiconductor device shown can be referenced. Figure 6A .

[0163] like Figure 7C and Figure 7D As shown, insulator 222 can also have a single-layer structure, and insulator 224 can also have a laminated structure of insulator 224d and insulator 224a on insulator 224d. In this case, insulator 222 is preferably made of a material that can be used in insulator 222b. In addition, insulator 224d is preferably made of a material that can be used insulator 222d, and insulator 224a is preferably made of a material that can be used insulator 222a.

[0164] By adopting the above structure, the laminate composed of insulator 222 and insulator 224 can be regarded as a second laminate. At this point, it can be said that... Figure 7A and Figure 7B The transistor 200C shown and Figure 7C and Figure 7D The transistor 200C shown has a structure in which a first stack and a second stack are arranged symmetrically with respect to the channel forming region.

[0165] <Structure Example 4> Figures 8A to 8C Examples of structures different from those of transistors 200A to 200C described above are shown. Figure 8A This is a top view of a semiconductor device. Figure 8B and Figure 8C This is a cross-sectional view of a semiconductor device. Figure 8B It is along Figure 8A A cross-sectional view of the section marked with dashed lines A1-A2. Furthermore, Figure 8C It is along Figure 8A The cross-sectional view of the section marked with dashed lines A3-A4. Note that in... Figure 8A In the top view, some constituent elements are omitted for clarity.

[0166] Figures 8A to 8C The semiconductor device shown includes transistor 200D. Therefore, Figure 8BThis can be described as a cross-sectional view along the channel length of transistor 200D. Furthermore, Figure 8C It can also be described as a cross-sectional view of the channel width of transistor 200D.

[0167] Figure 8B and Figure 8C The main difference between transistor 200D and transistors 200A to 200C is that insulators 222 and 250 both have a four-layer stacked structure. Figure 8B and Figure 8C The transistor 200D shown can also be said to have the ability to... Figures 3A to 3C The transistor 200B shown has an additional insulator 250d and insulator 222d. Alternatively, it can be said to have a structure that... Figures 6A to 6C The transistor 200C shown has an additional insulator 250c and insulator 222c. The following mainly describes the parts that differ from the structural examples 1 to 3 described above, omitting repeated descriptions.

[0168] Insulator 250 includes insulator 250c, insulator 250a on insulator 250c, insulator 250d on insulator 250a, and insulator 250b on insulator 250d. Insulator 222 includes insulator 222b, insulator 222d on insulator 222b, insulator 222a on insulator 222d, and insulator 222c on insulator 222a. At this time, insulator 250c and insulator 222c have regions that overlap with each other across region 230i, insulator 250a and insulator 222a have regions that overlap with each other across insulator 250c, region 230i and insulator 222c, insulator 250d and insulator 222d have regions that overlap with each other across insulator 250a, insulator 250c, region 230i, insulator 222c and insulator 222a, and insulator 250b and insulator 222b have regions that overlap with each other across insulator 250d, insulator 250a, insulator 250c, region 230i, insulator 222c, insulator 222a and insulator 222d.

[0169] By adopting the above structure, the first and second stacked bodies can be symmetrically arranged with reference to the channel forming region.

[0170] In addition, with Figure 2A and Figure 2B Similarly, the second gate insulator can also be composed of insulator 222 and island insulator 224.

[0171] Figure 9A and Figure 9B , Figure 9C and Figure 9D as well as Figure 9Eand Figure 9F Showing with Figure 8B and Figure 8C The diagram shows an example of a different structure. Figure 9A and Figure 9B , Figure 9C and Figure 9D as well as Figure 9E and Figure 9F This is a cross-sectional view of a semiconductor device including transistor 200D. Here, Figure 9A , Figure 9C and Figure 9E This is a cross-sectional view of the channel length of transistor 200D. Figure 9B , Figure 9D and Figure 9F This is a cross-sectional view of the channel width of transistor 200D. Additionally, Figure 9A and Figure 9B , Figure 9C and Figure 9D as well as Figure 9E and Figure 9F The top views of the semiconductor devices shown can be referenced. Figure 8A .

[0172] Figure 9A and Figure 9B The transistor 200D shown Figure 9C and Figure 9D The transistor 200D shown and Figure 9E and Figure 9F The transistor 200D shown is Figure 8B and Figure 8C The main difference of the transistor 200D shown is that it includes an island insulator 224 between the insulator 222 and the oxide 230.

[0173] exist Figure 9A and Figure 9B In the transistor 200D shown, the insulator 222 has a stacked structure of insulator 222b, insulator 222d on insulator 222b, and insulator 222a on insulator 222d, and the insulator 224 has a single-layer structure. The insulator 224 is preferably made of a material suitable for the aforementioned insulator 222c.

[0174] In addition, Figure 9C and Figure 9D In the transistor 200D shown, insulator 222 has a stacked structure of insulator 222b and insulator 222d on insulator 222b, and insulator 224 has a stacked structure of insulator 224a and insulator 224c on insulator 224a. Insulator 224a is preferably made of a material suitable for insulator 222a, and insulator 224c is preferably made of a material suitable for insulator 222c.

[0175] In addition, Figure 9E and Figure 9F In the transistor 200D shown, insulator 222 has a single-layer structure, and insulator 224 has a stacked structure of insulator 224d, insulator 224a on insulator 224d, and insulator 224c on insulator 224a. Insulator 222 is preferably made of a material suitable for insulator 222b. Furthermore, insulator 224d is preferably made of a material suitable for insulator 222d, insulator 224a is preferably made of a material suitable for insulator 222a, and insulator 224c is preferably made of a material suitable for insulator 222c.

[0176] By adopting the above structure, the laminate composed of insulator 222 and insulator 224 can be regarded as a second laminate. At this point, it can be said that... Figure 9A and Figure 9B The transistor 200D shown Figure 9C and Figure 9D The transistor 200D shown and Figure 9E and Figure 9F The transistor 200D shown has a structure in which a first stack and a second stack are arranged symmetrically with respect to the channel forming region.

[0177] In addition, with Figure 5A and Figure 5B Similarly, as shown, oxide 230 can also have a stacked structure of oxide 230a and oxide 230b, and an oxygen-barrier semiconductor material can also be used as oxide 230a.

[0178] Figure 10A and Figure 10B , Figure 10C and Figure 10D as well as Figure 10E and Figure 10F Showing with Figure 8B and Figure 8C The diagram shows an example of a different structure. Figure 10A and Figure 10B , Figure 10C and Figure 10D as well as Figure 10E and Figure 10F These are cross-sectional views of a semiconductor device including transistor 200D. Figure 10A , Figure 10C and Figure 10E This is a cross-sectional view of the channel length of transistor 200D. Figure 10B , Figure 10D and Figure 10F This is a cross-sectional view of the channel width of transistor 200D. Note that... Figure 10A and Figure 10BThe semiconductor device shown Figure 10C and Figure 10D The semiconductor device shown and Figure 10E and Figure 10F The top view of the semiconductor device shown can be referenced. Figure 8A .

[0179] Figure 10A and Figure 10B The transistor 200D shown is Figure 8B and Figure 8C The main difference of the transistor 200D shown is that the oxide 230 has a two-layer stacked structure. Figure 10C and Figure 10D The transistor 200D shown is Figure 8B and Figure 8C The main difference of the transistor 200D shown is that it includes an island insulator 224 and an oxide 230 with a two-layer stacked structure.

[0180] exist Figure 10A and Figure 10B In the transistor 200D shown, the insulator 222 has a stacked structure of insulator 222b, insulator 222d on insulator 222b, and insulator 222a on insulator 222d; the oxide 230 has a stacked structure of oxide 230a and oxide 230b on oxide 230a. In this structure, the stacked body composed of insulator 222 and oxide 230a can be regarded as a second stacked body. At this time, Figure 10A and Figure 10B The transistor 200D shown can be said to have a structure in which the first stack and the second stack are arranged symmetrically with respect to the channel forming region.

[0181] In addition, Figure 10C and Figure 10D In the transistor 200D shown, the insulator 222 has a stacked structure of insulator 222b and insulator 222d on insulator 222b. Additionally, the oxide 230 has a stacked structure of oxide 230a and oxide 230b on oxide 230a. The insulator 224 is preferably made of a material suitable for the aforementioned insulator 222a.

[0182] In addition, Figure 10E and Figure 10FIn the transistor 200D shown, the insulator 224 includes an insulator 224d and an insulator 224a on the insulator 224d. Additionally, the oxide 230 has a stacked structure of oxide 230a and oxide 230b on the oxide 230a. The insulator 222 is preferably made of a material suitable for the aforementioned insulator 222b. Furthermore, the insulator 224d is preferably made of a material suitable for the aforementioned insulator 222d, and the insulator 224a is preferably made of a material suitable for the aforementioned insulator 222a.

[0183] By adopting the above structure, the laminate composed of insulator 222, insulator 224, and oxide 230a can be regarded as a second laminate. At this point, it can be said that... Figure 10C and Figure 10D The transistor 200D shown and Figure 10E and Figure 10F The transistor 200D shown has a structure in which a first stack and a second stack are arranged symmetrically with respect to the channel forming region.

[0184] Alternatively, when the hydrogen concentration in insulator 250a, insulator 222a, or region 230i is sufficiently low, it is sufficient to provide either insulator 250d or insulator 222d.

[0185] Figure 11A and Figure 11B , Figure 11C and Figure 11D , Figure 12A and Figure 12B as well as Figure 12C and Figure 12D These are cross-sectional views of a semiconductor device including transistor 200D. Figure 11A , Figure 11C , Figure 12A and Figure 12C This is a cross-sectional view of the channel length of transistor 200D. Figure 11B , Figure 11D , Figure 12B and Figure 12D This is a cross-sectional view of the channel width of transistor 200D. Note that... Figure 11A and Figure 11B The semiconductor device shown and Figure 11C and Figure 11D The top view of the semiconductor device shown can be referenced. Figure 3A , Figure 12A and Figure 12B The semiconductor device shown and Figure 12C and Figure 12D The top view of the semiconductor device shown can be referenced. Figure 8A .

[0186] For example, Figure 11A and Figure 11B The transistor 200D shown and Figure 11C and Figure 11D The transistor 200D shown includes insulator 222d but does not include insulator 250d.

[0187] Figure 11A and Figure 11B The transistor 200D shown is Figure 4C and Figure 4D The difference in the transistor 200B shown is the inclusion of an insulator 222d. Additionally, Figure 11A and Figure 11B The transistor 200D shown is Figure 9C and Figure 9D The difference in transistor 200D shown is that it does not include insulator 250d. Therefore, Figure 11A and Figure 11B The transistor 200D shown can be described as Figure 4C and Figure 4D The modified example of transistor 200B shown or Figure 9C and Figure 9D The example shown is a variation of the transistor 200D.

[0188] in addition, Figure 11C and Figure 11D The transistor 200D shown is Figure 5C and Figure 5D The difference in transistor 200B shown is that it includes insulator 222d between insulator 222b and insulator 224. Additionally, Figure 11C and Figure 11C The transistor 200D shown is Figure 10C and Figure 10D The difference in transistor 200D shown is that it does not include insulator 250d. Therefore, Figure 11C and Figure 11D The transistor 200D shown can be described as Figure 5C and Figure 5D The modified example of transistor 200B shown or Figure 10C and Figure 10D The example shown is a modified version of the transistor 200D. Additionally, Figure 10C and Figure 10D The transistor 200D shown has in Figure 11C and Figure 11D The transistor 200D shown has an insulator 250d structure between insulator 250a and insulator 250b.

[0189] In addition, for example, Figure 12A and Figure 12B The transistor 200D shown and Figure 12C and Figure 12DThe transistor 200D shown includes insulator 250d but excludes insulator 222d.

[0190] Figure 12A and Figure 12B The transistor 200D shown is Figure 4C and Figure 4D The difference in the transistor 200B shown is the inclusion of an insulator 250d. Additionally, Figure 12A and Figure 12B The transistor 200D shown is Figure 9C and Figure 9D The difference in transistor 200D shown is that it does not include insulator 222d. Therefore, Figure 12A and Figure 12B The transistor 200D shown can be described as Figure 4C and Figure 4D The modified example of transistor 200B shown or Figure 9C and Figure 9D The example shown is a variation of the transistor 200D.

[0191] in addition, Figure 12C and Figure 12D The transistor 200D shown is Figure 5C and Figure 5D The difference in the transistor 200B shown is the inclusion of an insulator 250d. In other words, Figure 12C and Figure 12D The transistor 200D shown has the ability to Figure 5C and Figure 5D The transistor 200B shown has a structure with an additional insulator 250d. Furthermore, Figure 12C and Figure 12D The transistor 200D shown is Figure 10C and Figure 10D The difference in transistor 200D shown is that it does not include insulator 222d. Therefore, Figure 12C and Figure 12D The transistor 200D shown can be described as Figure 5C and Figure 5D The modified example of transistor 200B shown or Figure 10C and Figure 10D The example shown is a variation of the transistor 200D.

[0192] Notice, Figure 12A and Figure 12B The transistor 200D shown and Figure 12C and Figure 12D The insulator 222 of the transistor 200D shown can be made of a material that can be used for the insulator 222b or the insulator 222d.

[0193] In the role of Figure 12A and Figure 12B The transistor 200D shown and Figure 12C and Figure 12D When the insulator 222 of the transistor 200D shown is made of a material suitable for the aforementioned insulator 222d, the insulator 222 preferably also has the function of suppressing the diffusion of hydrogen (e.g., at least one of hydrogen atoms and hydrogen molecules). For example, with insulator 224 (in Figure 12A and Figure 12B Compared to insulator 224a in the transistor 200D shown, insulator 222 preferably has the function of further suppressing hydrogen diffusion. Furthermore, insulator 222 may also have the function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.). In this case, compared to insulator 224a (in... Figure 12A and Figure 12B Compared to insulator 224a in transistor 200D, insulator 222 preferably has the function of further suppressing oxygen diffusion.

[0194] exist Figure 12A and Figure 12B The transistor 200D shown and Figure 12C and Figure 12D In the transistor 200D shown, the insulator 222 is preferably an oxide of one or both of aluminum and hafnium, or an oxide containing hafnium and zirconium. When such an oxide is used as the insulator 222, the insulator 222 serves as a layer that suppresses the diffusion of impurities such as hydrogen from the substrate side to the oxide 230 and suppresses the release of oxygen from the oxide 230 to the substrate side. Therefore, the diffusion of impurities such as hydrogen to the inside of the transistor 200D can be suppressed, and the generation of oxygen vacancies in the oxide 230 can be suppressed. Furthermore, the reaction between the conductor 205 and the oxygen contained in the oxide 230 can be suppressed.

[0195] Note that, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide can also be added to the above insulator. Alternatively, the above insulator can be nitrided.

[0196] For example, when using an oxide of one or both of aluminum and hafnium as insulator 222, it is preferable to increase the thickness of insulator 222. For example, the thickness of insulator 222 is preferably greater than the thickness of insulator 250d, and more preferably greater than the sum of the thicknesses of insulator 250d and insulator 250b. By increasing the thickness of insulator 222, insulator 222 sometimes has the function of trapping or fixing hydrogen and suppressing the diffusion of hydrogen (e.g., at least one of hydrogen atoms and hydrogen molecules). In this case, insulator 222 can possess both the functions of the materials used in insulator 222b and the functions of the materials used in insulator 222d. By adopting this structure, it can be said that... Figure 12A and Figure 12B The transistor 200D shown and Figure 12C and Figure 12D The transistor 200D shown has a structure in which a first stack and a second stack are arranged symmetrically with respect to the channel forming region.

[0197] <Application Examples> In one aspect of the semiconductor device of the present invention, a hydrogen-blocking insulator may also be provided above the first gate electrode and below one or both of the second gate electrode.

[0198] Figure 13A and Figure 13B , Figure 13C and Figure 13D as well as Figure 13E and Figure 13F These are cross-sectional views of a semiconductor device including transistor 200E. Figure 13A , Figure 13C and Figure 13E This is a cross-sectional view of the channel length of transistor 200E. Figure 13B , Figure 13D and Figure 13F This is a cross-sectional view of the channel width of transistor 200E. Note that... Figure 13A and Figure 13B The semiconductor device shown Figure 13C and Figure 13D The semiconductor device shown and Figure 13E and Figure 13F The top view of the semiconductor device shown can be referenced. Figure 1A The following mainly explains the parts that differ from the above structural examples 1 and even 4, omitting explanations of repeated parts.

[0199] exist Figure 13A and Figure 13B In the transistor 200E shown, an insulator 283 is disposed above the conductor 260. Additionally, in Figure 13C and Figure 13D In the transistor 200E shown, an insulator 215 is disposed below the conductor 205. Additionally, in Figure 13E and Figure 13F In the transistor 200E shown, an insulator 283 is disposed above the conductor 260, and an insulator 215 is disposed below the conductor 205.

[0200] Similar to insulator 250b, insulator 283 preferably has hydrogen-barrier properties. By providing insulator 283, the diffusion of impurities such as hydrogen contained in the structure disposed above insulator 283 into region 230i can be suppressed. Furthermore, similar to insulator 222b, insulator 215 preferably has hydrogen-barrier properties. By providing insulator 215, the diffusion of impurities such as hydrogen contained in the structure disposed below insulator 215 into region 230i can be suppressed.

[0201] Furthermore, in the transistor 200E which has an insulator 215, an insulator 216 is provided on the insulator 215, and a conductor 205 is arranged in such a way that it is embedded in an opening formed in the insulator 216. In addition, the height of the top surface of the conductor 205 is the same as the height of the top surface of the insulator 216.

[0202] Furthermore, the resistivity of the conductor 205 is designed with the potential applied to it in mind, and the thickness of the conductor 205 is set according to this resistivity. Additionally, the thickness of the insulator 216 is approximately the same as that of the conductor 205. Here, it is preferable to reduce the thickness of both the conductor 205 and the insulator 216 within the design limits of the conductor 205. By reducing the thickness of the insulator 216, the absolute amount of impurities such as hydrogen contained in the insulator 216 can be reduced, thus suppressing the diffusion of these impurities into the oxide 230.

[0203] The dielectric constant of insulator 216 is preferably lower than that of insulator 215. For example, an insulator that can be used for insulator 280 can be used as insulator 216.

[0204] Alternatively, when hydrogen diffusion from above the transistor 200 to region 230i can be sufficiently suppressed by providing an insulator 283 having the same function as insulator 250b, insulator 250b may not be provided. Similarly, when hydrogen diffusion from below the transistor 200 to region 230i can be sufficiently suppressed by providing an insulator 215 having the same function as insulator 222b, insulator 222b may not be provided.

[0205] Figure 14A and Figure 14B , Figure 14C and Figure 14D as well as Figure 14E and Figure 14F This is a cross-sectional view of a semiconductor device including transistor 200E. Here, Figure 14A , Figure 14C and Figure 14E This is a cross-sectional view of the channel length of transistor 200E. Figure 14B , Figure 14D and Figure 14F This is a cross-sectional view of the channel width of transistor 200E. Note that... Figure 14A and Figure 14B The semiconductor device shown and Figure 14C and Figure 14D The top view of the semiconductor device shown can be referenced. Figure 8A .about Figure 14E and Figure 14F The top view of the semiconductor device shown can be referred to Figure 3A .

[0206] Insulator 215 is provided but insulator 222b is not provided, at this point Figure 14A and Figure 14B The transistor 200E shown is Figure 9C and Figure 9D The transistor 200D shown is different. Figure 14C and Figure 14D The transistor 200E shown is Figure 10C and Figure 10D The transistor 200D shown is different, and Figure 14E and Figure 14F The transistor 200E shown is Figure 11C and Figure 11D The transistor shown is different from the 200E.

[0207] like Figures 14A to 14F As shown, even without the insulator 222b, an insulator with the function of trapping or fixing hydrogen is provided between the conductor 205 and the insulator 216 and the oxide 230, thereby suppressing the increase of hydrogen concentration in region 230i.

[0208] Note that, with Figure 12A and Figure 12B The transistor 200D shown and Figure 12C and Figure 12D Similarly, the transistor 200D shown also forms a thick insulator 222 by using the aforementioned material suitable for insulator 222b. Figure 14A and Figure 14B The transistor 200E shown Figure 14C and Figure 14D The transistor 200E shown and Figure 14E and Figure 14F The transistor 200E shown can be viewed as having a structure in which a first stack and a second stack are symmetrically arranged with respect to the channel formation region.

[0209] <Detailed structural example> Reference Figures 15A to 15D Provide detailed structural examples of semiconductor devices, including transistors.

[0210] Figure 15A This is a top view of a semiconductor device including transistor 200. Figures 15B to 15DThis is a cross-sectional view of a semiconductor device. Figure 15B It is along Figure 15A The cross-sectional view of the dashed lines A1-A2 in the figure corresponds to a cross-sectional view of the transistor 200 along the channel length direction. Figure 15C It is along Figure 15A The cross-sectional view along the dashed lines A3-A4 in the diagram corresponds to a cross-sectional view of the transistor 200 along the channel width direction. Additionally, Figure 15D It is along Figure 15A The cross-sectional view of the section marked with dashed lines A5-A6 is also a cross-sectional view along the channel width direction of transistor 200. For clarity, in Figure 15A Some constituent elements are omitted in the top view. Furthermore, the following mainly describes the parts that differ from the above content, omitting repeated descriptions.

[0211] Transistor 200 includes an insulator 216 on an insulator 215, conductors 205 (conductors 205a and 205b) embedded in the insulator 216, an insulator 222 on the insulator 216 and conductors 205, an insulator 224 on the insulator 222, an oxide 230 on the insulator 224, conductors 242a and 242b on the oxide 230, an insulator 271a on the conductor 242a, an insulator 271b on the conductor 242b, an insulator 250 on the oxide 230, and conductors 260 (conductors 260a and 260b) on the insulator 250.

[0212] An insulator 275 is provided on insulators 271a and 271b, and an insulator 280 is provided on insulator 275. An insulator 250 and a conductor 260 are embedded within openings formed in insulators 280 and 275. Furthermore, an insulator 282 is provided on insulators 280, 260, and 250. Additionally, an insulator 283 is provided on insulator 282.

[0213] like Figure 15B As shown, in the cross-section of transistor 200, preferably, one end of conductor 242a coincides with one end of oxide 230, and one end of conductor 242b coincides with the other end of oxide 230. Furthermore, the end of insulator 224 preferably coincides with the end of oxide 230. By processing insulator 224, oxide 230, and the conductive layers that form conductors 242a and 242b together into an island shape, semiconductor devices can be manufactured with high productivity. In this case, the ends of insulator 224, oxide 230, conductor 242a, and conductor 242b are all aligned as described above.

[0214] As Figures 15A to 15DThe transistor 200 shown is preferably constructed using any one of the structures described above, from transistor 200A to transistor 200E.

[0215] Figure 16A and Figure 16B Showing will Figure 11C and Figure 11D The structure of the transistor 200D shown is used for Figures 15A to 15D The example shown is of transistor 200. Figure 16A This is a magnified cross-sectional view of transistor 200 along its channel length. Figure 16B This is an enlarged cross-sectional view of transistor 200 along the channel width direction.

[0216] in addition, Figure 17A and Figure 17B Showing will Figure 14C and Figure 14D The structure of the transistor 200E shown is used for Figures 15A to 15D The example shown is of transistor 200. Figure 17A This is a magnified cross-sectional view of transistor 200 along its channel length. Figure 17B This is an enlarged cross-sectional view of transistor 200 along the channel width direction.

[0217] like Figures 16A to 17B As shown, oxide 230 preferably includes oxide 230a on insulator 224 and oxide 230b on oxide 230a.

[0218] The chemical compositions of oxides 230a and 230b are preferably different. When oxides 230a and 230b contain a common element as a major component in addition to oxygen, the defect state density at the interface between oxides 230a and 230b can be reduced. This reduces the impact of interface scattering on carrier conduction, thereby enabling the transistor 200 to achieve a large on-state current and high frequency characteristics.

[0219] Oxide 230b is preferably a crystalline oxide semiconductor. Examples of crystalline oxide semiconductors include CAAC-OS (c-axis aligned crystalline oxide semiconductor), nc-OS (nanocrystalline oxide semiconductor), polycrystalline oxide semiconductors, and single-crystal oxide semiconductors. CAAC-OS or nc-OS is preferably used as oxide 230b, and CAAC-OS is particularly preferred.

[0220] CAAC-OS possesses a highly crystalline, dense structure and is a metal oxide with few impurities and defects (e.g., oxygen vacancies). In particular, by heat-treating CAAC-OS after its formation at a temperature at which polymorphism of the metal oxide is prevented (e.g., above 400°C and below 600°C), a more crystalline, dense structure can be achieved. Thus, by further increasing the density of CAAC-OS, the diffusion of impurities or oxygen within it can be further reduced.

[0221] Furthermore, distinct grain boundaries are not readily observed in CAAC-OS, thus reducing the likelihood of decreased electron mobility due to grain boundaries. Consequently, metal oxides containing CAAC-OS exhibit stable physical properties. Therefore, metal oxides with CAAC-OS demonstrate high heat resistance and reliability.

[0222] Furthermore, when a crystalline oxide such as CAAC-OS is used as oxide 230b, oxygen extraction from oxide 230b by conductor 242a or conductor 242b can be suppressed. Therefore, even with heat treatment, oxygen extraction from oxide 230b can be suppressed, resulting in stability of the transistor 200 against high temperatures (so-called thermal budget) during the manufacturing process. Additionally, the decrease in conductivity of conductors 242a and 242b can be suppressed.

[0223] In nc-OS, the atomic arrangement in tiny regions (e.g., regions above 1 nm and below 10 nm, particularly above 1 nm and below 3 nm) exhibits periodicity. In other words, nc-OS possesses tiny crystals (also known as nanocrystals). Furthermore, no regularity in crystal orientation is observed between different nanocrystals in nc-OS, therefore no orientation is observed in the overall film. That is to say, when nc-OS is used as oxide 230b, the film properties of oxide 230b are fixed regardless of the carrier flow direction in oxide 230b, thus the electrical characteristics of the transistor are very stable.

[0224] Oxide semiconductors have various structures and properties. Oxide 230b can also include two or more of the following: CAAC-OS, nc-OS, a-like OS (amorphous-like oxide semiconductor), amorphous oxide semiconductor, polycrystalline oxide semiconductor, and CAC-OS (cloud-aligned composite oxide semiconductor).

[0225] For example, when performing structural analysis on CAAC-OS films using an XRD apparatus, peaks indicating c-axis orientation are detected at or near 2θ = 31° in out-of-plane XRD measurements using θ / 2θ scanning. Note that the position of the peak indicating c-axis orientation (2θ value) sometimes varies depending on the type and composition of the metallic elements constituting CAAC-OS. For example, multiple bright spots (spots) are observed in the electron diffraction pattern of CAAC-OS films. Furthermore, when the spot of the incident electron beam passing through the sample (also known as the direct spot) is taken as the center of symmetry, one spot and other spots are observed at point-symmetric positions.

[0226] On the other hand, when electron diffraction (also known as nanobeam electron diffraction) is performed on nc-OS films using an electron beam whose beam diameter is equal to or smaller than the size of the nanocrystals (e.g., more than 1 nm and less than 30 nm), sometimes an electron diffraction pattern is observed in a ring-shaped region centered on a direct spot.

[0227] like Figure 16A and Figure 17A As shown, oxide 230b has region 230bi and regions 230bna and 230bnb disposed in a manner that clamps region 230bi. Note that for regions 230bi, 230bna and 230bnb, please refer to the descriptions of regions 230i, 230na and 230nb above, respectively.

[0228] exist Figures 16A to 17B The diagram shows an example of oxide 230 having a two-layer structure of oxide 230a and oxide 230b, but it is not limited to this. Oxide 230 may also have, for example, a two-layer structure such as oxide 230a and oxide 230b. Figure 1B and Figure 1C The single-layer structure is shown. Furthermore, one or both of oxides 230a and 230b may have a stacked structure with two or more layers. Note that when oxide 230 has a single-layer structure, a metal oxide suitable for oxide 230a described above may also be used as oxide 230.

[0229] like Figure 16A and Figure 16B As shown, the insulator 250 preferably has a laminated structure of an insulator 250c in contact with the oxide 230, an insulator 250a on the insulator 250c, and an insulator 250b on the insulator 250a. Alternatively, as... Figure 17A and Figure 17B As shown, the insulator 250 preferably has a stacked structure of an insulator 250c in contact with the oxide 230, an insulator 250a on the insulator 250c, an insulator 250d on the insulator 250a, and an insulator 250b on the insulator 250d.

[0230] Insulators 250a to 250d are disposed together with conductor 260 inside the opening formed in insulator 280, etc. To achieve miniaturization of transistor 200, the thickness of insulators 250a to 250d is preferably small. The thickness of each of insulators 250a to 250d is preferably 0.1 nm or more and 10 nm or less, more preferably 0.1 nm or more and 5.0 nm or less, further preferably 0.5 nm or more and 5.0 nm or less, even more preferably 1.0 nm or more and less than 5.0 nm, and even more preferably 1.0 nm or more and 3.0 nm or less. Furthermore, at least a portion of each of insulators 250a to 250d may include a region having the thickness described above.

[0231] To reduce the thickness of insulators 250a to 250d as described above, atomic layer deposition (ALD) is preferred. ALD methods include thermal ALD, which uses only thermal energy to react the precursors and reactants, and plasma-enhanced ALD, which uses reactants excited by plasma. In PEALD, deposition can be performed at lower temperatures by utilizing plasma, and is therefore sometimes preferred.

[0232] ALD (Alternating Layer Deposition) allows for atomic deposition layer by layer, resulting in advantages such as the ability to deposit extremely thin films, deposit structures with high aspect ratios, deposit with fewer defects such as pinholes, achieve high coverage, and deposit at low temperatures. Therefore, it is possible to deposit a thin insulator 250 with high coverage on the sides of openings formed in insulators 280 and 275, as well as on the side ends of conductors 242a and 242b.

[0233] Note that the precursors used in the ALD method sometimes contain carbon and other impurities. Therefore, films formed using the ALD method sometimes contain more carbon and other impurities compared to films formed using other deposition methods. Furthermore, the quantification of impurities can be performed using secondary ion mass spectrometry (SIMS), X-ray photoelectron spectroscopy (XPS), or Auger electron spectroscopy (AES).

[0234] Note that the above description illustrates the case where the insulator 250 has a three-layer structure of insulators 250a to 250c or a four-layer structure of insulators 250a to 250d, but the present invention is not limited thereto. The insulator 250 may have a structure including at least one of insulators 250a to 250d. By having the insulator 250 comprised of one, two, or three layers of insulators 250a to 250d, the manufacturing process of semiconductor devices can be simplified, thereby improving productivity.

[0235] like Figure 16A and Figure 16B As shown, the insulator 222 preferably has a stacked structure of insulator 216 and insulator 222b on conductor 205 and insulator 222d on insulator 222b.

[0236] An insulator 222b is disposed between insulator 216 and conductor 205 and insulator 222d. Preferably, insulator 222b has the function of suppressing hydrogen diffusion. This prevents hydrogen from diffusing from below insulator 222b into transistor 200. Furthermore, insulator 222b can also function as insulator 215. In this case, by adopting a structure without insulator 215, the manufacturing process of the semiconductor device can be simplified, and productivity can be improved.

[0237] For example, silicon nitride deposited using the ALD method (especially the PEALD method) is preferably used as the insulator 222b. By depositing the insulator 222b using the ALD method, even if there are unevenness between the insulator 216 and the conductor 205, the insulator 222b can be deposited with high coverage. Therefore, the formation of pinholes or breaks in the insulator 222d deposited on the insulator 222b can be suppressed.

[0238] Or, such as Figure 17A and Figure 17B As shown, insulator 222 preferably has a single-layer structure. Additionally, with Figure 12A and Figure 12B The transistor 200D shown and Figure 12C and Figure 12D Similarly, the transistor 200D shown is preferably formed with a thick insulator 222 using a material that can be used for the insulator 222b described above.

[0239] Note that in the above description, insulator 222 has a single-layer structure or a two-layer structure of insulator 222b and insulator 222d, but the present invention is not limited thereto. Insulator 222 may also have a stacked structure of three or more layers.

[0240] The insulator 224 is preferably processed into an island shape in the same way as the oxide 230. Thus, when multiple transistors 200 are provided, each transistor 200 has an insulator 224 of approximately the same size. Therefore, the amount of oxygen supplied from the insulator 224 to the oxide 230 in each transistor 200 is approximately equal. This suppresses non-uniformity in the electrical characteristics of the transistors 200 within the substrate surface.

[0241] Furthermore, the insulator 224 can also have a multilayer structure with two or more layers. In this case, it is not limited to a multilayer structure made of the same material; it can also be a multilayer structure made of different materials. Furthermore, as... Figure 1B As shown, insulator 224 may not be required.

[0242] Insulator 275 preferably has oxygen-barrier properties. Insulator 275 is disposed between insulator 280 and conductor 242a, and between insulator 280 and conductor 242b. By providing insulator 275, the diffusion of oxygen contained in insulator 280 to conductors 242a and 242b can be suppressed. Therefore, the oxidation of conductors 242a and 242b caused by oxygen contained in insulator 280, which would increase resistivity and decrease on-state current, can be suppressed. Insulator 275 is preferably at least less permeable to oxygen than insulator 280. For example, silicon nitride is preferably used as insulator 275. In this case, insulator 275 contains at least nitrogen and silicon.

[0243] Furthermore, insulator 275 is disposed between insulator 280 and region 230bna and between insulator 280 and region 230bnb. In other words, regions 230bna and 230bnb are surrounded by insulator 275 and oxide 230a. Therefore, the diffusion of oxygen contained in insulator 280 into regions 230bna and 230bnb can be suppressed.

[0244] Furthermore, insulator 275 preferably has hydrogen-blocking properties. When insulator 275 has hydrogen-blocking properties, the reduction in hydrogen concentration in regions 230bna and 230bnb can be suppressed.

[0245] Examples of hydrogen barrier insulators include oxides such as aluminum oxide, hafnium oxide, and tantalum oxide, as well as nitrides such as silicon nitride. For example, the insulator 275 preferably employs a single-layer structure or a multilayer structure of the aforementioned hydrogen barrier insulators.

[0246] By adopting the above structure, region 230bi can be i-typed or substantially i-typed, and regions 230bna and 230bnb can be n-typed, thus providing a semiconductor device with excellent electrical characteristics. Therefore, a semiconductor device with excellent electrical characteristics can be provided. Even with miniaturization or high integration of the semiconductor device, it can still possess excellent electrical characteristics. Furthermore, miniaturizing transistor 200 can improve high-frequency characteristics. Specifically, the cutoff frequency can be increased.

[0247] The top surface of insulator 271a is in contact with the top surface of conductor 242a and the bottom surface of insulator 275, and the top surface of insulator 271b is in contact with the top surface of conductor 242b and the bottom surface of insulator 275.

[0248] In addition, insulators 271a and 271b are both used as etch stop layers to protect conductors 242a and 242b. Therefore, as Figure 15B As shown, in the cross-section of transistor 200, preferably, the side end of insulator 271a coincides with the side end of conductor 242a, and the side end of insulator 271b coincides with the side end of conductor 242b.

[0249] Furthermore, insulators 271a and 271b are preferably inorganic insulators that are not easily oxidized by conductors 242a and 242b, since they are in contact with conductors 242a and 242b, respectively. For example, nitride insulators that can be used in insulator 250b are preferably used as insulators 271a and 271b.

[0250] Note that in Figure 15B In the diagram, insulators 271a and 271b are shown as single layers, but the invention is not limited thereto. Insulators 271a and 271b may also have a multilayer structure.

[0251] In this embodiment, it is preferable that the semiconductor device, in addition to the structure described above, also has a structure for suppressing hydrogen ingress into the transistor 200, etc. For example, it is preferable that an insulator with the function of suppressing hydrogen diffusion is provided such that it covers one or both of the top and bottom of the transistor 200, etc. In the semiconductor device described in this embodiment, this insulator is, for example, insulator 215, insulator 282, and insulator 283. Furthermore, the insulator 215 provided under the transistor 200 may also have the same structure as one or both of insulator 282 and insulator 283. In this case, the insulator 215 may adopt a stacked structure of insulator 282 and insulator 283, or it may adopt a structure where insulator 282 is below and insulator 283 is above, or it may adopt a structure where insulator 282 is above and insulator 283 is below. Note that when the insulator 215 has insulator 282 above and insulator 283 below, the insulator 215, insulator 282, and insulator 283 are symmetrically arranged with respect to the channel forming region.

[0252] One or both of insulators 282 and 283 are preferably used as barrier insulators to suppress the diffusion of impurities such as water and hydrogen from the substrate side or above the transistor 200 to the transistor 200. Therefore, one or both of insulators 282 and 283 preferably contain an insulating material that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms (making it difficult for the aforementioned impurities to permeate). Alternatively, it is preferable to contain an insulating material that has the function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.) (making it difficult for the aforementioned oxygen to permeate).

[0253] Insulators 282 and 283 preferably include insulators that suppress the diffusion of impurities such as water and hydrogen, as well as oxygen. For example, aluminum oxide, magnesium oxide, hafnium oxide, gallium oxide, indium gallium zinc oxide, silicon nitride, or silicon oxynitride can be used. For instance, silicon nitride, which has higher hydrogen barrier properties, is preferably used as insulator 283. Furthermore, insulator 282 preferably includes aluminum oxide or magnesium oxide, which have high hydrogen trapping or fixing capabilities. This suppresses the diffusion of impurities such as water and hydrogen from the interlayer insulating film disposed outside insulator 283 to transistor 200, etc. Alternatively, it suppresses the diffusion of oxygen contained in insulator 280, etc., upwards through insulator 282, etc. Furthermore, by employing the same structure as one or both of insulators 282 and 283 as insulator 215, the diffusion of impurities such as water and hydrogen from the substrate side through insulator 215 to transistor 200, etc., can be suppressed. Additionally, the diffusion of oxygen contained in insulator 224, etc., to the substrate side can be suppressed. In this way, it is preferable to use an insulator that has the function of suppressing the diffusion of impurities such as water, hydrogen and oxygen around the top and bottom of the transistor 200.

[0254] The conductor 205 can have a single-layer structure or a multi-layer structure. Figure 15B and Figure 15C In the insulator 216, the conductor 205 includes conductor 205a and conductor 205b. Conductor 205a is disposed in contact with the bottom surface and sidewall of the opening formed in the insulator 216. Conductor 205b is disposed in a recess formed along the opening of conductor 205a.

[0255] Here, the conductor 205a preferably comprises a conductive material that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms. Alternatively, it is preferable to include a conductive material that has the function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.).

[0256] By using a conductive material that reduces hydrogen diffusion as conductor 205a, impurities such as hydrogen contained in conductor 205b can be prevented from diffusing to oxide 230 through insulator 216, etc. Furthermore, by using a conductive material that inhibits oxygen diffusion as conductor 205a, oxidation of conductor 205b and subsequent decrease in conductivity can be prevented. Examples of conductive materials that inhibit oxygen diffusion include titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, and ruthenium oxide. Conductor 205a can have a single-layer structure or a multilayer structure of the aforementioned conductive materials. For example, conductor 205a preferably contains titanium nitride.

[0257] Furthermore, the conductor 205b preferably uses a conductive material whose main component is tungsten, copper, or aluminum. For example, the conductor 205b preferably contains tungsten.

[0258] Both conductors 242a and 242b have regions in contact with oxide 230b. Conductors 242a and 242b can have either a single-layer structure or a multilayer structure. For example, as... Figure 16A As shown, conductors 242a and 242b can also each have a two-layer structure. In this case, conductor 242a is a stack of conductor 242a1 and conductor 242a2 on conductor 242a1, and conductor 242b is a stack of conductor 242b1 and conductor 242b2 on conductor 242b1. At this time, as the layers (conductors 242a1 and conductor 242b1) in contact with oxide 230b, it is preferable to use the aforementioned conductive material that is not easily oxidized or a conductive material that has the function of inhibiting oxygen diffusion. This can prevent conductors 242a and 242b from being over-oxidized by oxygen contained in oxide 230b. Furthermore, it can prevent the conductivity of conductors 242a and 242b from decreasing.

[0259] The conductivity of conductors 242a2 and 242b2 is preferably higher than that of conductors 242a1 and 242b1. For example, the thickness of conductors 242a2 and 242b2 is preferably greater than that of conductors 242a1 and 242b1. Conductors suitable for conductor 205b can be used as conductors 242a2 and 242b2. By adopting the above structure, the resistance of conductors 242a2 and 242b2 can be reduced. Therefore, conductors 242a2 and 242b2 can be used as wiring or electrodes with high conductivity. Furthermore, the operating speed of transistor 200 can be increased.

[0260] For example, tantalum nitride or titanium nitride can be used as conductors 242a1 and 242b1, and tungsten can be used as conductors 242a2 and 242b2.

[0261] like Figures 16A to 17B As shown, the conductor 260 is arranged in such a way that it is embedded in the insulator 280 and the insulator 275 to form an opening. The conductor 260 is arranged in this opening such that it covers the side surface of the insulator 224, the side surface of the oxide 230a, and the side surface and top surface of the oxide 230b through the insulator 250.

[0262] In addition, such as Figure 16B and Figure 17BAs shown, in the cross-section of the transistor 200 along the channel width direction, a curved surface may also be present between the side surface and the top surface of the oxide 230b. That is, the ends of the side surface and the top surface may also be curved (hereinafter also referred to as circular). By adopting the above shape, the coverage of the insulator 250 and the conductor 260 on the oxide 230b can be improved.

[0263] In a structure with island-shaped insulator 224, such as Figure 16B and Figure 17B As shown, at least a portion of the bottom surface of the conductor 260 can be disposed below the bottom surface of the oxide 230b. Therefore, the conductor 260 can be positioned opposite the top and side surfaces of the oxide 230b, allowing the electric field of the conductor 260 to act on the top and side surfaces of the oxide 230b. Thus, by employing an island-shaped structure for the insulator 224, an S-channel transistor can be easily realized.

[0264] Furthermore, the S-channel structure disclosed in this specification differs from the Fin-type structure and the planar structure. On the other hand, the S-channel structure disclosed in this specification can be considered a type of Fin-type structure. Moreover, in this specification, a Fin-type structure refers to a structure in which the gate electrode is arranged with at least two or more surfaces surrounding the channel (specifically, two, three, or four surfaces, etc.). By employing both Fin-type and S-channel structures, tolerance to short-channel effects can be improved; in other words, transistors less prone to short-channel effects can be realized.

[0265] By employing an S-channel structure as transistor 200, a region can be electrically formed around the channel. The S-channel structure is a structure in which a region is electrically formed around the channel, so it can also be said that this structure is essentially the same as the GAA (Gate All Around) structure or the LGAA (Lateral Gate All Around) structure.

[0266] Note that, as Figure 16B and Figure 17B The transistor 200 shown illustrates an S-channel structure, but the semiconductor device of one embodiment of the present invention is not limited thereto. For example, as a transistor structure that can be used in one embodiment of the present invention, one or more selected from planar structures, Fin structures, and GAA structures may also be employed.

[0267] Figure 16A and Figure 17AThe conductor 260 is shown to be a two-layer structure. Preferably, the conductor 260 includes a conductor 260a and a conductor 260b disposed on the conductor 260a. For example, it is preferable that the conductor 260a is disposed such that it surrounds the bottom and side surfaces of the conductor 260b. In this case, the conductor 260a is preferably made of a conductive material that is not easily oxidized or a conductive material that has the function of inhibiting oxygen diffusion.

[0268] The conductor 260a preferably uses a conductive material that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules, and copper atoms. Furthermore, it is preferable to use a conductive material that has the function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.).

[0269] Furthermore, when the conductor 260a has the function of suppressing oxygen diffusion, it can prevent the oxygen contained in the insulator 280 from oxidizing the conductor 260b and causing a decrease in conductivity. For example, titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, and ruthenium oxide can be used as conductive materials with the function of suppressing oxygen diffusion.

[0270] Furthermore, the conductor 260b is preferably a conductor with high conductivity. For example, the conductor 260b can be a conductive material with tungsten, copper, or aluminum as the main component. In addition, the conductor 260b can have a laminated structure, for example, it can have a laminated structure of titanium or titanium nitride with the aforementioned conductive material.

[0271] Furthermore, in transistor 200, conductor 260 is formed in a self-aligned manner by being embedded in an opening formed in insulator 280, etc. By forming conductor 260 in this way, conductor 260 can be reliably configured in the region between conductor 242a and conductor 242b without alignment.

[0272] Although Figure 16A The diagram shows a structure in which the insulator 250c makes lateral contact with the conductors 242a2 and 242b2, but the invention is not limited thereto. For example, an insulator 255 may also be provided between the insulator 250c and the conductor 242a2 and between the insulator 250c and the conductor 242b2.

[0273] Figure 18A and Figure 18B This is an enlarged cross-sectional view of transistor 200 along its channel length. Figure 18A The semiconductor device shown and Figure 18B The semiconductor device shown is Figure 16A The illustration shows a modified example of a semiconductor device. Specifically, Figure 18A and Figure 18B Each of the semiconductor devices shown is with Figure 16A The difference in the semiconductor device shown is that: Figure 18A and Figure 18B In the semiconductor device shown, an insulator 255 is provided between the insulator 250c and the conductor 242a2 and between the insulator 250c and the conductor 242b2.

[0274] like Figure 18A As shown, in the cross-section along the channel length of transistor 200, the distance between conductors 242a1 and 242b1 is smaller than the distance between conductors 242a2 and 242b2. By employing this structure, the distance between the source and drain can be further shortened, and correspondingly, the channel length can be shortened. Therefore, the frequency characteristics of transistor 200 can be improved. Thus, by miniaturizing the semiconductor device, a semiconductor device with increased operating speed can be provided.

[0275] For example, insulator 255 is preferably an insulator that is not easily oxidized, such as a nitride. Insulator 255 is formed in contact with the sides of conductors 242a2 and 242b2, and functions to protect conductors 242a2 and 242b2. Since insulator 255 is exposed to an oxidizing atmosphere, it is preferably an inorganic insulator that is not easily oxidized. Furthermore, since insulator 255 is in contact with conductors 242a2 and 242b2, it is preferably an inorganic insulator that does not easily oxidize conductors 242a2 and 242b2. Therefore, as insulator 255, an insulating material with oxygen-barrier properties is preferably used. For example, silicon nitride can be used as insulator 255.

[0276] In order to form Figure 18A The transistor 200 shown has openings formed in insulators 280 and 275, and an insulator 255 is formed to contact the sidewalls of these openings. A mask is used to separate conductors 242a1 and 242b1. Here, the openings overlap the region between conductors 242a1 and 242b2. Furthermore, portions of conductors 242a1 and 242b1 protrude into the openings. Thus, the insulator 255 contacts the top surface of conductors 242a1, the top surface of conductor 242b1, the side surface of conductor 242a2, and the side surface of conductor 242b2 at the openings. Additionally, the insulator 250 contacts the top surface of oxide 230 in the region between conductors 242a1 and 242b1.

[0277] After the conductors 242a1 and 242b1 are separated and before the insulator 250 is deposited, heat treatment is preferably performed in an oxygen-containing atmosphere. This supplies oxygen to the oxide 230, thereby reducing oxygen vacancies. Furthermore, since the insulator 255 is formed in contact with the sides of both the conductors 242a2 and 242b2, over-oxidation of the conductors 242a2 and 242b2 can be prevented. This improves the electrical characteristics and reliability of the transistor. Additionally, it suppresses the inhomogeneity of electrical characteristics among multiple transistors formed on the same substrate.

[0278] Although Figure 18A The diagram shows an insulator 250 having a structure with regions of overlap between the insulator 255 and conductors 242a1 and 242b1, but the invention is not limited thereto. For example, as... Figure 18B As shown, the structure can also be as follows: in the openings formed in insulators 280 and 275, the side surface of insulator 255 coincides with the side surface of conductor 242a1, and the side surface of insulator 255 coincides with the side surface of conductor 242b1. By adopting this structure, the process of separating conductor 242a1 and conductor 242b1 using a mask can be omitted, thereby simplifying the manufacturing process of semiconductor devices and improving productivity.

[0279] Note that in Figure 18A and Figure 18B In the diagram, the first and second stacked bodies are shown as employing... Figure 11C and Figure 11D The example shown is of the structure of transistor 200D, but it is preferred to use any one of the structures of transistor 200A to transistor 200E described above.

[0280] Materials Constituting Semiconductor Devices The following describes the materials that can be used to construct semiconductor devices. Note that the layers constituting a semiconductor device can have either a single-layer structure or a stacked structure.

[0281] <<Substrate>> Substrates for forming transistors can be, for example, insulating substrates, semiconductor substrates, or conductive substrates. Examples of insulating substrates include glass substrates, quartz substrates, sapphire substrates, stabilized zirconia substrates (yttrium-stabilized zirconia substrates, etc.), and resin substrates. Examples of semiconductor substrates include semiconductor substrates made of silicon or germanium, or compound semiconductor substrates made of silicon carbide, silicon-germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide. Furthermore, semiconductor substrates having insulating regions within the aforementioned semiconductor substrates can also be used, such as SOI (Silicon On Insulator) substrates. Examples of conductive substrates include graphite substrates, metal substrates, alloy substrates, and conductive resin substrates. Additionally, examples of substrates include substrates containing metal nitrides, substrates containing metal oxides, insulating substrates with conductors or semiconductors, semiconductor substrates with conductors or insulators, and conductive substrates with semiconductors or insulators. Alternatively, substrates on which one or more elements are disposed can also be used. Examples of components disposed on a substrate include capacitors, resistors, switching elements, light-emitting elements, and storage elements.

[0282] <<Insulators>> Examples of insulating materials include oxides, nitrides, oxynitrides, nitrogen oxides, metal oxides, metal oxynitrides, and metal nitrogen oxides.

[0283] For example, when miniaturizing and highly integrating transistors, problems such as leakage current sometimes occur due to the thinning of the gate insulator. By using a high-k material as the insulator used as the gate insulator, low voltage can be achieved during transistor operation while maintaining the physical thickness. On the other hand, by using a material with a relatively low permittivity as the insulator used as the interlayer film, parasitic capacitance generated between wirings can be reduced. Therefore, it is preferable to select materials based on the function of the insulator.

[0284] Materials with relatively high permittivity (high-k) include, for example, gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, or nitrides containing silicon and hafnium.

[0285] Examples of insulators with relatively low relative permittivity include inorganic insulating materials such as silicon oxide, silicon oxynitride, silicon oxynitride, silicon nitride, fluorinated silicon oxide, carbon-containing silicon oxide, silicon oxide with both carbon and nitrogen, and porous silicon oxide; as well as resins such as polyester, polyolefins, polyamides (nylon, aramids, etc.), polyimide, polycarbonate, or acrylic resins. Furthermore, materials with relatively low relative permittivity are also materials with high dielectric strength.

[0286] Furthermore, by surrounding a transistor using a metal oxide with an insulator that suppresses the permeation of impurities such as hydrogen and oxygen, the electrical characteristics of the transistor can be stabilized. Examples of insulators that suppress the permeation of impurities such as hydrogen and oxygen include single layers or stacks of one or more of boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, and tantalum. Specifically, examples of insulators that suppress the permeation of impurities such as hydrogen and oxygen include metal oxides such as aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide, as well as metal nitrides such as aluminum nitride, silicon oxynitride, and silicon nitride.

[0287] Furthermore, the insulator used as the gate insulator is preferably an insulator having regions containing oxygen that has been removed by heating. For example, by employing a structure in which silicon oxide or silicon oxynitride having regions containing oxygen that has been removed by heating is contacted with the oxide 230, the oxygen vacancies contained in the oxide 230 can be filled.

[0288] <<Conductors>> As a conductor, it is preferable to use a metallic element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum, an alloy containing the above-mentioned metallic elements, or an alloy combining the above-mentioned metallic elements. Examples of conductors include tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel. Furthermore, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are preferred because they are conductive materials that are not easily oxidized or maintain conductivity even after absorbing oxygen. In addition, semiconductors with high conductivity, such as polycrystalline silicon containing impurity elements such as phosphorus, and silicides such as nickel silicides can also be used.

[0289] When using a conductor with a multilayer structure, for example, a multilayer structure combining a material containing the aforementioned metal element and a conductive material containing oxygen, a multilayer structure combining a material containing the aforementioned metal element and a conductive material containing nitrogen, or a multilayer structure combining a material containing the aforementioned metal element, a conductive material containing oxygen, and a conductive material containing nitrogen may also be used.

[0290] Furthermore, when using oxides in the channel formation region of a transistor, a stacked structure combining a material containing the aforementioned metallic elements and an oxygen-containing conductive material is preferably used as the conductor serving as the gate electrode. In this case, it is preferable to provide the oxygen-containing conductive material on one side of the channel formation region. By providing the oxygen-containing conductive material on one side of the channel formation region, oxygen detached from this conductive material can be easily supplied to the channel formation region.

[0291] In particular, as the conductor used as the gate electrode, a conductive material containing a metal element and oxygen contained in the metal oxide in which the channel is formed is preferably used. Alternatively, a conductive material containing the aforementioned metal element and nitrogen can also be used. For example, nitrogen-containing conductive materials such as titanium nitride and tantalum nitride can be used. Furthermore, one or more of indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, and indium tin oxide with added silicon can also be used. Additionally, indium gallium zinc oxide containing nitrogen can also be used. By using the above materials, hydrogen contained in the metal oxide in which the channel is formed can sometimes be trapped. Alternatively, hydrogen mixed in from external insulators or the like can sometimes be trapped.

[0292] The semiconductor device according to this embodiment includes an OS transistor. The OS transistor has a small off-state current, thus enabling a low-power semiconductor device. Furthermore, the OS transistor has high frequency characteristics, enabling a high-speed semiconductor device. Moreover, by using the OS transistor, a semiconductor device with good electrical characteristics, low transistor electrical characteristic non-uniformity, large on-state current, and high reliability can be achieved.

[0293] <Application Examples of Semiconductor Devices> The following uses Figures 19A to 19C An example of a semiconductor device illustrating one aspect of the present invention.

[0294] Figure 19A A top view of semiconductor device 500 is shown. Figure 19A In this diagram, the direction parallel to the channel length of transistor 200 is the x-axis, and the direction perpendicular to the x-axis is the y-axis. Furthermore, Figure 19B It is along Figure 19AThe cross-sectional view of the section with dotted lines A1-A2 in the figure corresponds to a cross-sectional view of the transistor 200 along the channel length direction. Figure 19C It is along Figure 19A The cross-sectional view along the dashed lines A3-A4 corresponds to the cross-sectional view of the opening region 400 and its vicinity. Note that in... Figure 19A In the top view, some constituent elements are omitted for clarity.

[0295] Note that in Figures 19A to 19C In the semiconductor devices shown, structures having the same function as the constituent elements constituting the semiconductor devices shown in the <Detailed Structural Examples> are given the same symbols. Note that the materials constituting the semiconductor devices in this section may be the materials described in detail in the <Detailed Structural Examples>.

[0296] Figures 19A to 19C The semiconductor device 500 shown is Figures 15A to 15D The example shown is a modified version of the semiconductor device. Figures 19A to 19C The semiconductor device 500 shown is related to Figures 15A to 15D The semiconductor device shown differs in that insulators 282 and 280 have opening regions 400. Furthermore, compared to... Figures 15A to 15D The semiconductor device shown differs in that it has a sealing portion 265 formed around a plurality of transistors 200.

[0297] Semiconductor device 500 includes a plurality of transistors 200 arranged in a matrix and a plurality of opening regions 400. Furthermore, a plurality of conductors 260, serving as gate electrodes of the transistors 200, are provided extending in the y-axis direction. The opening regions 400 are formed in regions that do not overlap with the oxide 230 and the conductors 260. Additionally, a sealing portion 265 is formed surrounding the plurality of transistors 200, the plurality of conductors 260, and the plurality of opening regions 400. Note that the number, arrangement, and size of the transistors 200, conductors 260, and opening regions 400 are not limited. Figures 19A to 19C The structure shown can be appropriately set according to the design of the semiconductor device 500.

[0298] An insulator 285 is provided on the insulator 283. The same insulator as the insulator 280 can be used as the insulator 285.

[0299] like Figure 19B and Figure 19CAs shown, the sealing portion 265 is arranged to surround the plurality of transistors 200, insulators 216, 222, 275, 280, and 282. In other words, the insulator 283 is arranged to cover the plurality of transistors 200, insulators 216, 222, 275, 280, and 282. Furthermore, in the sealing portion 265, the insulator 283 contacts the top surface of the insulator 215b. Additionally, above the sealing portion 265, an insulator 274 is provided between the insulators 283 and 285. The height of the top surface of the insulator 274 is the same as the height of the uppermost part of the insulator 283. Furthermore, the same insulator as the insulator 280 can be used as the insulator 274.

[0300] By employing this structure, multiple transistors 200 can be surrounded by insulators 283, 215b, and 215a. Here, one or more of insulators 283, 215b, and 215a are preferably used as hydrogen-barrier insulators. This prevents hydrogen outside the region of the sealing portion 265 from entering the region of the sealing portion 265.

[0301] like Figure 19C As shown, in the opening region 400, the insulator 282 has an opening. Furthermore, in the opening region 400, the insulator 280 may also have a groove that overlaps with the opening of the insulator 282. The depth of the groove in the insulator 280 is sufficient to expose the top surface of the insulator 275; for example, it can be approximately 1 / 4 to 1 / 2 of the maximum thickness of the insulator 280.

[0302] In addition, such as Figure 19C As shown, insulator 283 contacts the side surface of insulator 282, the side surface of insulator 280, and the top surface of insulator 280 on the inner side of opening region 400. Furthermore, in opening region 400, sometimes a portion of insulator 274 is formed by embedding into a recess formed in insulator 283. In this case, the height of the top surface of insulator 274 formed in opening region 400 sometimes coincides with the height of the uppermost part of insulator 283.

[0303] By performing heat treatment with the opening region 400 formed and the insulator 280 exposed from the opening of the insulator 282, a portion of the oxygen contained in the insulator 280 can diffuse to the outside from the opening region 400 while oxygen is supplied to the oxide 230. Thus, sufficient oxygen can be supplied from the insulator 280, which contains oxygen released by heating, to the region of the oxide semiconductor used as the channel formation region and its vicinity, while preventing excessive oxygen supply.

[0304] At this point, the hydrogen contained in insulator 280 can be bonded to oxygen and released to the outside through opening region 400. The hydrogen bonded to oxygen is released as water. Therefore, the amount of hydrogen contained in insulator 280 can be reduced, and the entry of hydrogen contained in insulator 280 into oxide 230 can be decreased.

[0305] In addition, Figure 19A In the diagram, the top-view opening region 400 is generally rectangular in shape, but the invention is not limited to this. For example, the top-view opening region 400 may also be rectangular, elliptical, circular, rhomboid, or a combination of these shapes. Furthermore, the area and spacing of the opening regions 400 can be appropriately set according to the design of the semiconductor device including the transistors 200. For example, in regions with low transistor density, the area of ​​the opening regions 400 can be increased or the spacing of the opening regions 400 can be decreased. Conversely, in regions with high transistor density, the area of ​​the opening regions 400 can be decreased or the spacing of the opening regions 400 can be increased.

[0306] According to one aspect of the present invention, a novel transistor can be provided. Furthermore, a semiconductor device with excellent electrical characteristics can be provided. Furthermore, a semiconductor device with excellent reliability can be provided. Furthermore, a semiconductor device with low transistor characteristic non-uniformity can be provided. Furthermore, a semiconductor device with high on-state current can be provided. Furthermore, a semiconductor device with high field-effect mobility can be provided. Furthermore, a semiconductor device with excellent frequency characteristics can be provided. Furthermore, a semiconductor device capable of miniaturization or high integration can be provided. Furthermore, a semiconductor device with low power consumption can be provided.

[0307] <Structural example of a semiconductor device including transistor 200 and capacitor 100> Figure 20A and Figure 20B A semiconductor device including the transistor 200 and capacitor 100 described above is shown. Figure 20A This is a top view of the semiconductor device. Furthermore, Figure 20B It is along Figure 20A The cross-sectional view along the dotted line A1-A2 in the diagram corresponds to a cross-sectional view along the channel length of transistor 200. Note that in... Figure 20A In the top view, some constituent elements are omitted for clarity.

[0308] exist Figure 20A and Figure 20BIn the semiconductor device shown, a capacitor 100 and a conductor 112 are disposed on a transistor 200. Preferably, the overlap area between the capacitor 100 and the transistor 200 is large when viewed from above. By adopting this structure, the occupied area of ​​the semiconductor device including the capacitor 100 and the transistor 200 can be reduced. This allows for miniaturization or high integration of the semiconductor device.

[0309] The semiconductor device includes conductors 240a and 240b serving as a plug. Conductor 240a is disposed inside an opening formed in insulators 285, 283, 282, 280, 275, and 271a, and conductor 240b is disposed inside an opening formed in insulators 285, 283, 282, 280, 275, and 271b.

[0310] like Figure 20B As shown, conductor 240a has a region in contact with conductor 242a and a region in contact with at least a portion of the bottom surface of conductor 112. Furthermore, conductor 240b has a region in contact with conductor 242b and a region in contact with at least a portion of the bottom surface of conductor 110 included in capacitor 100. That is, conductor 240a is electrically connected to one of the source and drain terminals of transistor 200, and conductor 240b is electrically connected to the other of the source and drain terminals of transistor 200.

[0311] Conductors 240a and 240b are preferably made of conductive materials with tungsten, copper, or aluminum as the main components. Alternatively, conductors 240a and 240b may each employ a stacked structure of a first conductor and a second conductor disposed along the side and bottom surfaces of the aforementioned opening.

[0312] When conductors 240a and 240b have a stacked structure, a conductive material that suppresses the permeation of impurities such as water and hydrogen is preferably used as the first conductor disposed near insulators 285 and 280. For example, tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, or ruthenium oxide are preferred. Alternatively, a conductive material that suppresses the permeation of impurities such as water and hydrogen can be used as a single layer or in a stack. By employing this structure, impurities such as water and hydrogen contained in the upper layer of insulator 283 can be prevented from mixing into oxide 230 through conductors 240a and 240b. Furthermore, the second conductor is also used for wiring, therefore a conductor with high conductivity is preferred. For example, a conductive material with tungsten, copper, or aluminum as its main components can be used as the second conductor.

[0313] Although Figure 20BThe conductors 240a and 240b shown have a stacked structure of a first conductor and a second conductor, but the present invention is not limited thereto. For example, the conductor 240 may also have a single-layer structure or a stacked structure of three or more layers.

[0314] An insulator 241a is disposed in contact with the inner wall of the opening formed in insulators 285, 283, 282, 280, 275, and 271a, and the side surface of the conductor 240a. Furthermore, an insulator 241b is disposed in contact with the inner wall of the opening formed in insulators 285, 283, 282, 280, 275, and 271b, and the side surface of the conductor 240b. Additionally, the first insulator of each of insulators 241a and 241b contacts the inner wall of the opening, and the second insulator is further inward.

[0315] Insulators 241a and 241b are preferably hydrogen- and oxygen-blocking insulators, or both. For example, silicon nitride, silicon oxynitride, aluminum oxide, or hafnium oxide are preferred as insulators 241a and 241b. Other metal oxides such as magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, or tantalum oxide can also be used. Because insulators 241a and 241b are in contact with insulators 283, 282, and 275 respectively, impurities such as water and hydrogen contained in insulators 280 can be suppressed from entering oxide 230 through conductors 240a and 240b. Silicon nitride, in particular, has high hydrogen-blocking properties and is therefore preferred.

[0316] Furthermore, insulator 241a is disposed between insulator 280 and conductor 240a, and insulator 241b is disposed between insulator 280 and conductor 240b. Insulator 280 contains excess oxygen and is disposed near the oxide semiconductor. By using oxygen-barrier insulators as insulators 241a and 241b, the absorption of oxygen contained in insulator 280 by conductors 240a and 240b can be suppressed.

[0317] Insulators 241a and 241b have the following characteristics: Figure 20B In the case of a multilayer structure as shown, an oxygen barrier insulator and a hydrogen barrier insulator are preferably used in combination as a first insulator that contacts the inner wall of the opening formed in the insulator 280 and the second insulator inside it.

[0318] For example, aluminum oxide deposited using the ALD method can be used as the first insulator and silicon nitride deposited using the PEALD method can be used as the second insulator. By adopting such a structure, oxidation of conductors 240a and 240b can be suppressed, and hydrogen incorporation into conductors 240a and 240b can be suppressed.

[0319] <Capacitor 100> A capacitor 100 is disposed above a transistor 200. The capacitor 100 includes a conductor 110 serving as a first electrode (also called a lower electrode), a conductor 120 serving as a second electrode (also called an upper electrode), and an insulator 132 serving as a dielectric. The capacitor 100 has a pair of electrodes, consisting of a first electrode and a second electrode.

[0320] As the conductor 110, it is preferable to use a metallic element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum, an alloy containing the above-mentioned metallic elements, or an alloy combining the above-mentioned metallic elements. As an alloy containing the above-mentioned metallic elements, a nitride or oxide of the alloy may also be used. For example, tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are preferred. Furthermore, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are conductive materials that are not easily oxidized or that maintain conductivity even after absorbing oxygen, and are therefore preferred. In addition, semiconductors with high conductivity, such as polycrystalline silicon containing impurity elements such as phosphorus, and silicides such as nickel silicides can also be used.

[0321] Furthermore, multiple conductive layers formed from the aforementioned materials can be stacked. For example, a stacked structure combining materials containing the aforementioned metallic elements and conductive materials containing oxygen can also be used. Furthermore, a stacked structure combining materials containing the aforementioned metallic elements and conductive materials containing nitrogen can also be used. Additionally, a stacked structure combining materials containing the aforementioned metallic elements, conductive materials containing oxygen, and conductive materials containing nitrogen can also be used.

[0322] Conductor 120 can be made of a conductive material that can be used in conductor 110.

[0323] For example, conductor 112 provided on conductor 240a and conductor 110 provided on conductor 240b can be formed simultaneously. In this case, conductor 112 contains the same conductive material as conductor 110. Furthermore, conductor 112 is used as a plug or wiring for electrical connection with capacitor 100 or transistor 200.

[0324] Although Figure 20B The diagram shows conductors 112 and 110 with single-layer structures, but the present invention is not limited thereto. For example, conductors 112 and 110 may also have a stacked structure of two or more layers. For example, a conductor with high adhesion between a barrier conductor and a highly conductive conductor may be formed between the barrier conductor and the highly conductive conductor.

[0325] The insulator 132 may be made of, for example, silicon oxide, silicon oxynitride, silicon oxynitride, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum oxynitride, aluminum nitride, hafnium oxide, hafnium oxynitride, hafnium oxynitride, etc., and may be in the form of a multilayer or a single layer. Furthermore, for example, the insulator 132 may be an insulator stacked in the order of zirconium oxide, aluminum oxide, zirconium oxide, and aluminum oxide.

[0326] Furthermore, for example, insulator 132 preferably has a laminated structure comprising an insulator containing a material with high dielectric strength (a material with a low relative permittivity) and an insulator containing a material with a high relative permittivity (high-k). By employing this structure, capacitor 100 can ensure sufficient capacitance due to having an insulator containing a high-k material, and can improve dielectric strength due to having an insulator containing a material with high dielectric strength, thereby suppressing electrostatic damage to capacitor 100.

[0327] An insulator 150 is provided on the conductor 120 and the insulator 132. The insulator 150 is used as an interlayer film.

[0328] As insulators that can be used in interlayer films, there are oxides, nitrides, oxynitrides, nitrogen oxides, metal oxides, metal oxynitrides, and metal nitrogen oxides, etc., which have insulating properties.

[0329] For example, by using a material with a relatively low permittivity in the insulator used as an interlayer film, the parasitic capacitance generated between wirings can be reduced. Therefore, it is preferable to select the material according to the function of the insulator.

[0330] For example, insulator 150 preferably comprises the aforementioned material with a low relative permittivity. Furthermore, insulator 150 preferably has a laminated structure comprising an insulator comprising the aforementioned inorganic insulating material and an insulator comprising the aforementioned resin. Because silicon oxide and silicon oxynitride are thermally stable, a thermally stable laminated structure with a low relative permittivity can be achieved by combining them with a resin.

[0331] Although Figure 20A and Figure 20B The capacitor 100 in the illustrated semiconductor device is planar in shape, but the invention is not limited thereto. For example, Figure 21 As shown, the capacitor 100 can also be cylindrical. Furthermore, Figure 21 The structure below the insulator 150 of the semiconductor device shown is similar to Figure 20A and Figure 20B The semiconductor device shown is the same.

[0332] exist Figure 21 In the semiconductor device shown, insulator 150 is disposed on insulator 132, and insulator 142 is disposed on insulator 150. Furthermore, openings 168 leading to conductor 110 are formed in insulator 132, insulator 150, and insulator 142.

[0333] Figure 21 The capacitor 100 shown includes a conductor 115, an insulator 145 on an insulator 142, and a conductor 125 on an insulator 145. Here, at least a portion of each of the conductor 115, the insulator 145, and the conductor 125 is disposed inside the opening 168.

[0334] Insulator 151 is disposed on conductor 125 and insulator 145, insulator 154 is disposed on insulator 151, and conductor 153 and insulator 156 are disposed on insulator 154. Furthermore, conductor 140 is disposed inside an opening formed in insulator 132, insulator 150, insulator 142, insulator 145, insulator 151, and insulator 154.

[0335] Conductor 115 is used as the first electrode of capacitor 100, conductor 125 is used as the second electrode of capacitor 100, and insulator 145 is used as the dielectric of capacitor 100. Capacitor 100 has a structure in which the first and second electrodes are opposed to each other by a dielectric material not only on the bottom surface but also on the sides inside the opening 168, thus increasing the electrostatic capacitance per unit area. Therefore, the deeper the opening 168, the larger the electrostatic capacitance of capacitor 100 can be. In this way, by increasing the electrostatic capacitance per unit area of ​​capacitor 100, miniaturization or high integration of semiconductor devices can be advanced.

[0336] As insulator 151, an insulator that can also be used for insulator 150 can be used. Furthermore, as insulator 142, an insulator that can also be used for insulator 282 can be used.

[0337] The shape of the opening 168 when viewed from above can be a square, a polygon other than a square, a polygon with rounded corners, or a circular shape such as an ellipse. Preferably, the area of ​​overlap between the opening 168 and the transistor 200 when viewed from above is large. By adopting this structure, the area occupied by the semiconductor device, including the capacitor 100 and the transistor 200, can be reduced.

[0338] The conductor 115 contacts the sides of both the insulator 150 and the insulator 142 in the opening 168. The height of the top surface of the conductor 115 is preferably the same as the height of the top surface of the insulator 142. Furthermore, the bottom surface of the conductor 115 contacts the conductor 110 through the opening 168. The conductor 115 is preferably formed by an ALD or CVD method, for example, using a conductor suitable for conductor 205.

[0339] Insulator 145 is disposed in such a way that it covers conductor 115 and insulator 142. Insulator 145 is preferably formed by ALD or CVD methods. As insulator 145, an insulator that can also be used for insulator 132 can be used.

[0340] The conductor 125 is embedded in the opening 168. The conductor 125 is preferably formed by ALD or CVD, for example, a conductor that can be used for conductor 205 can be used.

[0341] Conductor 153 is disposed on insulator 154 and covered by insulator 156. Conductor 153 may be a conductor that can be used for conductor 112. Furthermore, insulator 156 may be an insulator that can be used for insulator 150. Here, conductor 153 is in contact with the top surface of conductor 140 and is used as a terminal of capacitor 100 or transistor 200.

[0342] Although Figure 21 The diagram shows a structure in which the lower electrode of a cylindrical capacitor 100 is electrically connected to another of the source and drain electrodes of a transistor 200 via a conductor 240b; however, the invention is not limited thereto. For example, as... Figure 22 As shown, the lower electrode of the cylindrical capacitor can also contact another of the source and drain electrodes of the transistor 200.

[0343] Figure 22 A semiconductor device including the aforementioned transistor 200 and cylindrical capacitor 100 is shown. Figure 22 In the diagram, the X-direction is parallel to the channel length of the transistor, the Y-direction is perpendicular to the X-direction, and the Z-direction is perpendicular to both the X and Y directions. The following mainly explains the relationship with... Figure 21 Different parts of the semiconductor device shown are described, with repeated descriptions omitted.

[0344] Insulator 284 is disposed on insulator 285. Insulator 284 may be an insulator that can be used for insulator 216.

[0345] The capacitor 100 includes a conductor 153 on a conductor 242b, an insulator 154 on the conductor 153, and a conductor 160 (conductor 160a and conductor 160b) on the insulator 154.

[0346] At least a portion of each of the conductor 153, insulator 154, and conductor 160 is disposed within an opening formed in insulators 271b, 275, 280, 282, 283, and 285. A terminal of each of the conductors 153, 154, and 160 is located at least on insulator 282, and preferably on insulator 285. Insulator 154 is provided to cover the end of conductor 153. Thus, conductor 153 is electrically insulated from conductor 160.

[0347] Conductor 153 includes a region serving as a first electrode (lower electrode) of capacitor 100. Insulator 154 includes a region serving as a dielectric of capacitor 100. Conductor 160 includes a region serving as a second electrode (upper electrode) of capacitor 100. Capacitor 100 constitutes a MIM (Metal-Insulator-Metal) capacitor.

[0348] Furthermore, the conductor 242b disposed on the oxide 230 in a manner overlapping with the oxide 230 is used as wiring for electrical connection with the conductor 153 of the capacitor 100.

[0349] The capacitor 100 includes conductors 153 and 160, each of which can be a conductor suitable for conductors 205, 242a, 242b, or 260. Conductors 153 and 160 are preferably deposited using a deposition method with good coverage, such as ALD or CVD. For example, titanium nitride or tantalum nitride deposited using ALD or CVD can be used as conductor 153.

[0350] The bottom surface of conductor 153 is in contact with the top surface of conductor 242b. Here, by using a conductive material with good conductivity as conductor 242b, the contact resistance between conductor 153 and conductor 242b can be reduced.

[0351] Furthermore, titanium nitride deposited using ALD or CVD methods can be used as conductor 160a, and tungsten deposited using CVD methods can be used as conductor 160b. Here, when the adhesion of tungsten to the insulator 154 is sufficiently high, a single-layer structure of tungsten deposited using CVD methods can also be used as conductor 160.

[0352] The insulator 154 in capacitor 100 is preferably made of a material with a relatively high permittivity (high-k). The insulator 154 is preferably deposited using a deposition method with good coverage, such as ALD or CVD.

[0353] Furthermore, as the insulator 154, a laminated structure of a material with a relatively high dielectric constant (high-k) and a material with high dielectric strength is preferably used. For example, an insulator layered in the order of zirconium oxide, alumina, and zirconium oxide can be used as the insulator 154. Alternatively, an insulator layered in the order of zirconium oxide, alumina, zirconium oxide, and alumina can be used. Furthermore, an insulating film layered in the order of hafnium zirconium oxide, alumina, hafnium zirconium oxide, and alumina can be used. By using laminated insulators with high dielectric strength, such as alumina, the dielectric strength is increased, thus suppressing electrostatic discharge damage to the capacitor 100.

[0354] In addition, materials that can have ferroelectric properties, as described later, can also be used as insulators 154.

[0355] The deeper the openings formed in insulators 271b, 275, 280, 282, 283, and 285 (that is, increasing the thickness of one or more of insulators 271b, 275, 280, 282, 283, and 285), the larger the electrostatic capacitance of capacitor 100 can be. By increasing the electrostatic capacitance per unit area of ​​capacitor 100, miniaturization or high integration of semiconductor devices can be achieved.

[0356] Here, since insulators 271b, 275, 282, and 283 are used as barrier insulators, their thicknesses are preferably set according to the barrier properties required by the semiconductor device. Furthermore, since the thickness of the conductor 260 used as the gate electrode is determined by the thickness of the insulator 280, the thickness of the insulator 280 is preferably set according to the thickness of the conductor 260 required by the semiconductor device.

[0357] Therefore, by adjusting the thickness of the insulator 285, the electrostatic capacitance of the capacitor 100 is preferably set. For example, the thickness of the insulator 285 can be set in the range of 50 nm or more and 250 nm or less, and the depth of the opening can be approximately 150 nm or more and 350 nm or less. By forming the capacitor 100 within the above range, the capacitor 100 has sufficient electrostatic capacitance, and in a semiconductor device with multiple layers including the capacitor 100 stacked, the height of one layer can be prevented from increasing excessively. In each of the multiple layers, the electrostatic capacitance of the capacitor provided in each memory cell can be different. When adopting this structure, for example, the thickness of the insulator 285 provided in each layer can be different.

[0358] In the opening provided in the insulator 285, where the capacitor 100 is disposed, the sidewall of the opening may be approximately perpendicular to the top surface of the insulator 222, and may also have a conical shape. By having a conical shape for the sidewall, the coverage of the conductor 153, etc., provided in the opening can be improved, thereby reducing defects such as voids.

[0359] Conductor 240 is disposed inside the openings formed in insulators 216, 222, 275, 280, 282, 283, 285, and 284. Furthermore, conductor 240 is in contact with one of the source and drain electrodes of transistor 200 (conductor 242a). Conductor 240 extends in the Z direction.

[0360] The conductor 242a disposed on the oxide 230 includes a region serving as wiring for electrical connection with the conductor 240. For example, in Figure 22 In this configuration, the top surface and side end of conductor 242a are electrically connected to conductor 240 extending in the Z direction. Since conductor 240 directly contacts at least one of the top surface and side end of conductor 242a, no additional electrodes for connection are required, thus reducing the footprint of the semiconductor device. Furthermore, conductor 240 preferably contacts a portion of the top surface and side end of conductor 242a. By having multiple surfaces of conductor 240 contact conductor 242a, the contact resistance between conductor 240 and conductor 242a can be reduced.

[0361] The conductor 240 preferably has a stacked structure of a first conductor and a second conductor. For example, such as Figure 22 As shown, the conductor 240 may have a structure in which a first conductor contacts the inner wall of the opening and a second conductor is disposed on its inner side. That is, compared to the second conductor, the first conductor is disposed near insulators 216, 222, 275, 280, 282, 283, 285, and 284. Furthermore, the first conductor contacts the top surface and side ends of the conductor 242a.

[0362] As the first conductor of conductor 240, a conductive material suitable for the first conductor of conductor 240a or conductor 240b can be used, and as the second conductor of conductor 240, a conductive material suitable for the second conductor of conductor 240a or conductor 240b can be used.

[0363] For example, titanium nitride is preferably used as the first conductor of conductor 240, and tungsten is preferably used as the second conductor of conductor 240. In this case, the first conductor of conductor 240 comprises titanium and nitrogen, and the second conductor of conductor 240 comprises tungsten.

[0364] In addition, the conductor 240 may also have a single-layer structure or a stacked structure of three or more layers.

[0365] In addition, such as Figure 22 As shown, the insulator 241 is preferably disposed in contact with the side surface of the conductor 240. Specifically, the insulator 241 is disposed in contact with the inner wall of the opening formed in the insulators 216, 222, 275, 280, 282, 283, 285, and 284. Furthermore, the insulator 241 is also formed on the side surface of the insulator 224, oxide 230, and conductor 242a that protrude into the opening. Here, at least a portion of the conductor 242a protrudes from the insulator 241 and contacts the conductor 240. That is, the conductor 240 is disposed in such a way that it is embedded inside the opening through the insulator 241.

[0366] like Figure 22 As shown, the uppermost part of the insulator 241 formed below the conductor 242a is preferably located below the top surface of the conductor 242a. With this structure, the conductor 240 can contact at least a portion of the side end of the conductor 242a. Furthermore, the insulator 241 formed below the conductor 242a preferably includes a region that contacts the side surface of the oxide 230. With this structure, impurities such as water and hydrogen contained in the insulator 280 can be suppressed from mixing into the oxide 230 through the conductor 240.

[0367] As insulator 241, a barrier insulator that can be used for insulators 241a and 241b, etc., can be used.

[0368] Although Figure 22 The diagram shows insulator 241 as a single-layer structure, but the invention is not limited to this. Insulator 241 may also have a stacked structure of two or more layers.

[0369] When the insulator 241 has a two-layer stacked structure, the first layer contacting the inner wall of the opening in the insulator 280, etc., can be an oxygen-barrier insulating film, and the second layer inside it can be a hydrogen-barrier insulating film. For example, aluminum oxide deposited by ALD method can be used as the first layer, and silicon nitride deposited by PEALD method can be used as the second layer. By adopting this structure, the oxidation of the conductor 240 can be suppressed, and the mixing of hydrogen from the conductor 240 into the oxide 230, etc., can be reduced. As a result, the electrical characteristics and reliability of the transistor 200 can be improved.

[0370] In the opening where the conductor 240 and the insulator 241 are disposed, the sidewall of the opening may be substantially perpendicular to the top surface of the insulator 222, or it may be conical. By having a conical sidewall, the coverage of the insulator 241 and the like provided in the opening is improved.

[0371] A semiconductor device including a transistor 200 and a capacitor 100, wherein one of the source and drain of the transistor 200 is electrically connected to one of a pair of electrodes of the capacitor 100, can be used as a storage cell of a storage device, for example.

[0372] <Structural example of a semiconductor device including transistor 200 and capacitor 100A> Figure 23A and Figure 23B A semiconductor device including the transistor 200 and capacitor 100A is shown. Figure 23A This is a top view of the semiconductor device. Furthermore, Figure 23B It is along Figure 23A The cross-sectional view along the dotted line A1-A2 in the diagram corresponds to a cross-sectional view along the channel length of transistor 200. Note that in... Figure 23A In the top view, some constituent elements are omitted for clarity.

[0373] exist Figure 23A and Figure 23B In the illustrated semiconductor device, a capacitor 100A and a conductor 246 are disposed on a transistor 200. The conductor 246 is used for wiring. Preferably, the overlap area between the capacitor 100A and the transistor 200 is large when viewed from above. By adopting this structure, the occupied area of ​​the semiconductor device including the capacitor 100A and the transistor 200 can be reduced. Therefore, miniaturization or high integration of the semiconductor device can be achieved.

[0374] exist Figure 23A and Figure 23B The structure below the insulator 285 of the semiconductor device shown is similar to Figure 20A and Figure 20B The semiconductor device shown is the same. The following mainly describes the similarity. Figure 20A and Figure 20B Different parts of the semiconductor device shown are described, with repeated descriptions omitted.

[0375] Figure 23A and Figure 23B The semiconductor device shown includes an insulator 287 on an insulator 285.

[0376] Conductor 240a is disposed inside the opening formed in insulators 287, 285, 283, 282, 280, 275, and 271a, and conductor 240b is disposed inside the opening formed in insulators 287, 285, 283, 282, 280, 275, and 271b. Figure 23B As shown, conductor 240a has a region in contact with conductor 242a and a region in contact with at least a portion of the bottom surface of conductor 246. Furthermore, conductor 240b has a region in contact with conductor 242b and a region in contact with at least a portion of the bottom surface of conductor 110 included in capacitor 100A.

[0377] Conductor 246 can contact the top surface of conductor 240a. Conductor 246 is preferably made of a conductive material with tungsten, copper, or aluminum as its main components. Furthermore, conductor 246 can have a multilayer structure, for example, a multilayer structure of titanium or titanium nitride with the aforementioned conductive material. Moreover, conductor 246 is preferably formed in the same layer as conductor 110 using the same material.

[0378] <Capacitor 100A> Capacitor 100A includes a conductor 110, a conductor 120, and an insulator 130 sandwiched between the conductors 110 and 120. For example, conductor 110 is disposed on insulator 287 and conductor 240b, insulator 130 is disposed on conductor 110, and conductor 120 is disposed on insulator 130. Here, conductor 110 serves as the first electrode of capacitor 100A, conductor 120 serves as the second electrode of capacitor 100A, and insulator 130 serves as the dielectric of capacitor 100A. Note that, as will be explained in detail later, capacitor 100A is a capacitor that uses a material capable of electroferroelectric properties as the dielectric.

[0379] As conductor 110, a conductor suitable for conductor 110 of capacitor 100 may be used. Furthermore, as conductor 120, an insulator suitable for conductor 120 of capacitor 100 may be used.

[0380] The conductor 110 can have either a single-layer structure or a multilayer structure. The conductor 110 can be any conductor that can be used in the capacitor 100 described above.

[0381] exist Figure 23B In the process, the conductor 120 has a stacked structure of a conductor 120a and a conductor 120b disposed thereon in a manner that contacts the conductor 120a.

[0382] As conductor 120a, a conductive material suitable for conductor 120 can be deposited using methods such as sputtering, ALD, or CVD. For example, titanium nitride can be deposited using sputtering as conductor 120a.

[0383] Alternatively, titanium nitride can be deposited as the conductor 120a, for example, using a thermal ALD method. Here, it is preferable to deposit the conductor 120a using a method that deposits while heating the substrate, such as a thermal ALD method. For example, it is preferable to deposit the conductor 120a at a substrate temperature of room temperature or higher, preferably 300°C or higher, more preferably 325°C or higher, and even more preferably 350°C or higher. Furthermore, it is preferable to deposit the conductor 120a at a substrate temperature of 500°C or lower, preferably 450°C or lower. For example, the substrate temperature can be around 400°C.

[0384] By depositing the conductor 120a within the aforementioned temperature range, the insulator 130 can be imparted with ferroelectricity even without high-temperature baking treatment (e.g., baking treatment at a heat treatment temperature of 400°C or higher or 500°C or higher) after the formation of the conductor 120a. Furthermore, as described above, by using the ALD method to deposit the conductor 120a, which causes less damage to the substrate, excessive destruction of the crystal structure of the insulator 130 can be suppressed, thereby improving the ferroelectricity of the insulator 130. Moreover, the method of improving the crystallinity or ferroelectricity of the insulator 130 by utilizing the temperature during the deposition of the conductor 120a without performing annealing after the deposition of the conductor 120a is sometimes referred to as "self-annealing."

[0385] As conductor 120b, a conductor suitable for the aforementioned conductor 120 can be deposited using methods such as sputtering, ALD, or CVD. For example, tungsten can be deposited using sputtering as conductor 120b.

[0386] Furthermore, the conductor 120 may also have a single-layer or three-layer or more structure, and is not limited to the structure described above.

[0387] As the insulator 130, a material that can exhibit ferroelectric properties is preferably used. Examples of materials that can exhibit ferroelectric properties include hafnium oxide, zirconium oxide, and HfZrO. XMetal oxides, such as those containing the element J1 (where X is a real number greater than 0), can also be used as materials that can exhibit ferroelectric properties. Examples of materials that can exhibit ferroelectric properties include those containing one or more elements J1 (here, element J1 is selected from zirconium (Zr), silicon (Si), aluminum (Al), gadolinium (Gd), yttrium (Y), lanthanum (La), strontium (Sr), etc.). The ratio of the number of hafnium atoms to the number of elements J1 atoms can be appropriately set; for example, the ratio can be set to 1:1 or close to it. Furthermore, examples of materials that can exhibit ferroelectric properties include those containing one or more elements J2 (here, element J2 is selected from one or more elements J2, such as hafnium (Hf), silicon (Si), aluminum (Al), gadolinium (Gd), yttrium (Y), lanthanum (La), strontium (Sr), etc.). Furthermore, the ratio of zirconium atoms to element J2 atoms can be appropriately set; for example, the ratio can be set to 1:1 or close to it. Additionally, lead titanate (PbTiO2) can also be used as a material that can exhibit ferroelectric properties. X Piezoelectric ceramics with perovskite structure include barium strontium titanate (BST), strontium titanate, lead zirconate titanate (PZT), strontium bismuth tantalate (SBT), bismuth ferrite (BFO), and barium titanate.

[0388] Furthermore, aluminum nitride scandium (Al) can be cited as a material that can exhibit ferroelectric properties. 1-a Sc a N b (where a is a real number greater than 0 and less than 0.5, and b is a value of 1 or near it.) Metal nitrides such as Al-Ga-Sc nitrides and Ga-Sc nitrides are also examples. Furthermore, metal nitrides containing elements M1, M2, and nitrogen can be cited as materials that can exhibit ferroelectricity. Here, element M1 is selected from one or more of aluminum (Al), gallium (Ga), indium (In), etc. Furthermore, element M2 is selected from one or more of boron (B), scandium (Sc), yttrium (Y), lanthanum (La), cerium (Ce), neodymium (Nd), europium (Eu), titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), etc. Furthermore, the atomic ratio of element M1 to element M2 can be appropriately set. Moreover, metal oxides containing element M1 and nitrogen sometimes exhibit ferroelectricity even without containing element M2. Furthermore, materials that can exhibit ferroelectric properties include those in which the aforementioned metal nitrides are added with element M3. Note that element M3 is selected from one or more of magnesium (Mg), calcium (Ca), strontium (Sr), zinc (Zn), cadmium (Cd), etc. Here, the atomic ratio of elements M1, M2, and M3 can be appropriately set.

[0389] In addition, perovskite-type oxynitrides such as SrTaO2N and BaTaO2N, and κ-type alumina such as GaFeO3 can be cited as materials that can exhibit ferroelectric properties.

[0390] Note that although metal oxides and metal nitrides are shown in the above description, the description is not limited to these. For example, metal oxynitrides with nitrogen added to the above metal oxides or metal oxynitrides with oxygen added to the above metal nitrides may also be used.

[0391] Furthermore, as a material that can exhibit ferroelectricity, for example, a mixture or compound composed of multiple materials selected from the above-mentioned materials can be used. Additionally, the insulator 130 can have a layered structure composed of multiple materials selected from the above-mentioned materials. Note that the crystal structure (properties) of the materials listed above may vary not only depending on the deposition conditions but also depending on various processes, etc. Therefore, in this specification, materials exhibiting ferroelectricity are referred not only to ferroelectric materials but also to materials that can exhibit ferroelectricity.

[0392] Among these, materials containing hafnium oxide or a mixture of hafnium oxide and zirconium oxide are preferred as ferroelectric materials, because they can exhibit ferroelectricity even when processed into thin films of a few nm. Here, the thickness of the insulator 130 can be 100 nm or less, preferably 50 nm or less, more preferably 20 nm or less, and even more preferably 10 nm or less. For example, the thickness is preferably 5 nm or more and 15 nm or less, more preferably 8 nm or more and 12 nm or less. By using a ferroelectric layer that can be thinned, a semiconductor device can be formed by combining a capacitor 100A with a miniaturized semiconductor element such as a transistor. In this specification, the ferroelectric material formed in a layered manner is sometimes referred to as a ferroelectric layer, a metal oxide film, or a metal nitride film. Furthermore, in this specification, a device including a ferroelectric layer, a metal oxide film, or a metal nitride film is sometimes referred to as a ferroelectric device.

[0393] Furthermore, materials containing hafnium oxide or zirconium oxide are preferred because they exhibit ferroelectricity even in small areas. For example, a ferroelectric layer can have an area (occupying 10,000 μm) even when viewed from above. 2 Below, 1000μm 2 Below, 100μm 2 Below, 10μm 2 Below, 1μm 2 Below or 0.1μm 2 The following can also exhibit ferroelectric properties. By forming a small ferroelectric layer, the area occupied by a capacitor of 100A can be reduced.

[0394] Ferroelectric materials are insulators that exhibit polarization when subjected to an applied electric field and maintain this polarization even when the electric field is zero. Therefore, non-volatile storage elements can be formed by using a capacitor (hereinafter sometimes referred to as a ferroelectric capacitor) with this material as the dielectric. Non-volatile storage elements using ferroelectric capacitors are sometimes called FeRAM (Ferroelectric Random Access Memory), ferroelectric memory, etc. For example, a ferroelectric memory includes a transistor and a ferroelectric capacitor, with one of the source and drain terminals of the transistor electrically connected to a terminal of the ferroelectric capacitor. Thus, the capacitor 100A shown in this embodiment is a ferroelectric capacitor, and a semiconductor device including the capacitor 100A and the aforementioned transistor 200 can be used as a ferroelectric memory.

[0395] Furthermore, ferroelectricity is thought to arise from the displacement of oxygen in the crystal contained within the ferroelectric layer due to an external electric field. Moreover, the presence of ferroelectricity is presumed to depend on the structure of the crystal contained within the ferroelectric layer. Therefore, for the insulator 130 to exhibit ferroelectricity, the insulator 130 needs to contain a crystal. In particular, the insulator 130 preferably has an orthorhombic crystal structure, thereby exhibiting ferroelectricity. The crystal structure of the crystal contained in the insulator 130 can be any one or more selected from the tetragonal, orthorhombic, and monoclinic crystal systems. Alternatively, the insulator 130 may also have an amorphous structure. In this case, the insulator 130 may also have a composite structure of amorphous and crystalline structures.

[0396] Furthermore, in order to form a crystalline insulator 130, it is preferable to reduce impurities such as hydrogen or chlorine in the insulator 130. Here, the impurity is not merely a single atom. In the insulator 130, it is also preferable to reduce substances bonded to the aforementioned impurities. For example, it is preferable to also reduce substances bonded to hydrogen (e.g., OH-) in the insulator 130. - These impurities sometimes form oxygen vacancies in the crystallization of insulator 130. Furthermore, impurity elements such as hydrogen can sometimes bond to these oxygen vacancies, reducing the crystallinity of insulator 130. Therefore, if these impurities are present in insulator 130, crystallization of insulator 130 may be hindered. Thus, it is preferable to reduce impurities such as hydrogen or chlorine to improve the ferroelectricity of insulator 130.

[0397] Therefore, as Figure 23B As shown, the insulator 152 is preferably provided in a manner that covers the capacitor 100A, and the insulator 155 is provided between the insulator 152 and the insulator 130. In this case, the insulator 155 preferably contacts the insulator 287 in a region that does not overlap with the conductor 110.

[0398] Insulators 152 and 155 are used as hydrogen-blocking insulators. Insulator 152 has the ability to suppress hydrogen and hydrogen-bonded substances (e.g., OH-). - The function of at least one of the following (etc.). Therefore, compared to insulator 130, insulator 152 has a greater ability to suppress the diffusion of hydrogen and hydrogen-bonded substances (e.g., OH-). - The ability to diffuse at least one of the following (etc.) is preferably high. Furthermore, the insulator 155 has the function of capturing or fixing at least one of hydrogen and hydrogen-bonded substances. Therefore, compared to the insulator 130, the insulator 155 preferably has a higher ability to capture or fix at least one of hydrogen and hydrogen-bonded substances.

[0399] Insulators 152 and 155 may be made of materials such as aluminum oxide, magnesium oxide, hafnium oxide, gallium oxide, indium gallium zinc oxide, silicon nitride, or silicon oxynitride. Silicon nitride is preferably used as the insulator 152, for example, because it has a high ability to suppress the diffusion of impurities such as hydrogen. In this case, insulator 152 comprises at least nitrogen and silicon.

[0400] Furthermore, as an insulator 155 with a high ability to trap or fix impurities such as hydrogen, an oxide with an amorphous structure is preferably used. For example, metal oxides such as aluminum oxide or magnesium oxide are preferred. When aluminum oxide is used in insulator 155, insulator 155 contains at least oxygen and aluminum. As mentioned above, metal oxides with an amorphous structure sometimes have the property of trapping or fixing hydrogen. By using the aforementioned metal oxide with an amorphous structure as a component of capacitor 100A or placing it around capacitor 100A, hydrogen contained in capacitor 100A or hydrogen present around capacitor 100A can be trapped or fixed. In particular, hydrogen contained in insulator 130 is preferably trapped or fixed.

[0401] The insulator 155 is preferably of an amorphous structure, but a portion thereof may also have crystalline regions. Alternatively, the insulator 155 may also be a multilayer structure consisting of layers of amorphous structure and layers with crystalline regions. For example, the insulator 155 may also be a multilayer structure in which layers with crystalline regions are formed on layers of amorphous structure, typically a multilayer structure of polycrystalline structure.

[0402] By means of insulator 152, the diffusion of impurities such as hydrogen from the outside of insulator 152 into insulator 130 can be suppressed. Furthermore, impurities such as hydrogen in insulator 130 can be reduced by insulator 155 capturing or fixing impurities such as hydrogen inside the area surrounded by insulator 152. Thus, by preventing insulator 130 from containing impurities such as hydrogen or making the impurities such as hydrogen extremely low, the crystallinity of insulator 130 can be improved, and it can have a structure with high ferroelectricity.

[0403] exist Figure 23BIn this embodiment, insulator 155 has a laminated structure consisting of insulator 155a and insulator 155b disposed thereon in contact with insulator 155a. Furthermore, insulator 152 has a laminated structure consisting of insulator 152a and insulator 152b disposed thereon in contact with insulator 152a. Additionally, one or both of insulators 155 and 152 may have a single-layer or three-layer or more structures, and are not limited to the structures described above.

[0404] As the insulator 155a, it is preferable to use the ALD method, especially the thermal ALD method, to deposit an insulator suitable for the aforementioned insulator 155. For example, alumina deposited by the ALD method can be used as the insulator 155a. This allows for the deposition of the insulator 155a with high coverage, thereby suppressing the diffusion of impurities from the outside of the insulator 155b to the insulator 130 through pinholes or breaks, even if pinholes or breaks are formed in the insulator 155b deposited by sputtering.

[0405] As insulator 155b, an insulator suitable for use insulator 155 can be deposited using a sputtering method. For example, alumina deposited by sputtering can be used as insulator 155b. Because sputtering does not require the use of hydrogen-containing molecules in the deposition gas, the hydrogen concentration in insulator 155b can be reduced. As a result, impurities such as hydrogen in insulator 130 can be further captured or fixed.

[0406] As insulator 152a, an insulator suitable for use insulator 152 can be deposited using a sputtering method. For example, silicon nitride deposited using a sputtering method can be used as insulator 152a. Because sputtering does not require the use of hydrogen-containing molecules in the deposition gas, the hydrogen concentration in insulator 152a can be reduced.

[0407] As insulator 152b, it is preferable to use the ALD method, especially the PEALD method, to deposit an insulator suitable for the aforementioned insulator 152. For example, silicon nitride deposited using the PEALD method can be used as insulator 152b. Therefore, even if pinholes or breaks are formed in the insulator 152a deposited by sputtering, the overlapping portions of the pinholes or breaks can be blocked by alumina deposited using the well-covering ALD method. Furthermore, by covering the pinholes or breaks with insulator 152b, the diffusion of impurities from the outside of insulator 152b to insulator 130 can be suppressed.

[0408] Furthermore, such as Figure 23BAs shown, insulators 155 and 152 cover conductor 246 in addition to capacitor 100A. This suppresses the diffusion of impurities such as hydrogen into oxide 230 during heat treatment via capacitor 100A, conductor 246, and conductor 240. Thus, the manufacturing process of a high-purity intrinsic ferroelectric capacitor with reduced hydrogen and other impurities and a high-purity intrinsic oxide semiconductor with reduced hydrogen and other impurities achieves high integration. This provides a method for manufacturing semiconductor devices with high productivity.

[0409] As insulator 287, it is preferable to use an insulator with high ability to suppress the diffusion of impurities such as hydrogen, similar to insulator 152. By employing a structure in which insulator 155 and insulator 287 contact each other in a region that does not overlap with capacitor 100A, capacitor 100A can be sealed by insulator 287, insulator 155, and insulator 152. This suppresses the diffusion of hydrogen from the outside of insulators 152 and 287 into capacitor 100A, traps or fixes hydrogen within the region surrounded by insulators 152 and 287, and reduces the hydrogen concentration in insulator 130 of capacitor 100A. Therefore, the ferroelectricity of insulator 130 can be improved.

[0410] Although Figure 23B The diagram shows a structure in which insulator 287 contacts insulator 155 in a region that does not overlap with conductor 110, but the present invention is not limited thereto. Insulator 287 may be omitted, and the bottom surface of conductor 246, the bottom surface of insulator 155a, and the bottom surface of conductor 110 may contact the top surface of insulator 285.

[0411] Furthermore, a layer that improves the crystallinity of the insulator 130 may be provided between the insulator 130 and the conductor 110 and / or between the insulator 130 and the conductor 120. Moreover, as the layer improving crystallinity, it is preferable to use a layer containing at least one of the elements included in the insulator 130. Note that the composition of the crystallinity-improving layer is preferably different from the composition of the insulator 130. HfZrO is used in the insulator 130. X In this case, as a layer to improve crystallinity, metal oxides such as hafnium oxide or zirconium oxide, or metals such as hafnium or zirconium, are preferably used.

[0412] Note that the composition of the layer that enhances crystallinity may not include the elements contained in the insulator 130. In this case, elements such as silicon, yttrium, aluminum, and scandium can be used. By providing a layer that enhances crystallinity, the crystallinity of the insulator 130 can be increased, thereby improving the ferroelectricity of the insulator 130. Since the ferroelectricity of the insulator 130 can be increased by enhancing its crystallinity, the layer that enhances crystallinity can be referred to as a layer that increases the remanent polarization of the insulator 130.

[0413] <Example of a modified 100A capacitor> Although Figure 23A and Figure 23B The capacitor 100A shown has a structure in which the sides of the conductor 110, the side of the insulator 130, and the side of the conductor 120 are aligned; however, the present invention is not limited thereto. The following... Figures 24A to 25B Show Figure 23A and Figure 23B The example shown is a modified 100A capacitor. The following mainly describes... Figure 23A and Figure 23B The differences between the semiconductor devices shown are not repeated.

[0414] Figure 24A This is a top view of a semiconductor device. Additionally, Figure 24B It is along Figure 24A The cross-sectional view of the section marked with dotted lines A1-A2 is also a cross-sectional view along the channel length of transistor 200. Note that in Figure 24A In the top view, some constituent elements are omitted for clarity.

[0415] like Figure 24B As shown, the side surface of conductor 110 can also be located inside the side surfaces of insulator 130 and conductor 120. Insulator 130 is formed to cover the top and side surfaces of conductor 110, and the area of ​​insulator 130 that does not overlap with conductor 110 contacts insulator 287. In this case, when viewed from above, the outer edge of conductor 110 is located inside the outer edges of insulator 130 and conductor 120. By adopting such a structure, conductor 110 and conductor 120 can be sufficiently separated by insulator 130.

[0416] Furthermore, by further increasing the area of ​​the conductor 120 when viewed from above, sufficient design margin can be ensured when a conductor (not shown) connected to the conductor 120 and used as a plug or wiring is provided.

[0417] Although Figure 23B The conductor 110 has a single-layer structure, but the present invention is not limited thereto; the conductor 110 may also have a stacked structure with two or more layers. For example, as Figure 24B As shown, the conductor 110 may also have a two-layer stacked structure of conductor 110a and conductor 110b on conductor 110a.

[0418] As conductor 110a, a conductive material suitable for the conductor 110 described above can be deposited using methods such as sputtering, ALD, or CVD. For example, tungsten can be deposited using sputtering or CVD as conductor 110a.

[0419] As a conductor 110b in contact with at least a portion of the bottom surface of the insulator 130, a conductor suitable for the conductor 110 can be deposited using methods such as ALD or CVD. For example, titanium nitride can be deposited using thermal ALD. Furthermore, the top surface of the conductor 110b preferably has excellent flatness. By making the top surface of the conductor 110b have excellent flatness, the crystallinity of the insulator 130 can be improved, and the ferroelectricity of the insulator 130 can be improved.

[0420] Figure 25A This is a top view of a semiconductor device. Additionally, Figure 25B It is along Figure 25A The cross-sectional view of the section marked with dotted lines A1-A2 is also a cross-sectional view along the channel length of transistor 200. Note that in Figure 25A In the top view, some constituent elements are omitted for clarity.

[0421] like Figure 24A and Figure 25B As shown, insulator 286 can also be set without setting it. Figure 23B The insulator 287 is shown, and the conductor 110 is disposed inside the openings formed in the insulator 286 and the insulator 285.

[0422] As insulator 286, an insulating material that can be used in the aforementioned insulator 285 can be used.

[0423] Conductor 110 is embedded inside openings formed in insulators 286 and 285. Conductor 110 has a region that contacts conductor 240b inside the openings formed in insulators 286 and 285. By embedding conductor 110 inside the openings formed in insulators 286 and 285, conductor 110 and conductor 120 are sufficiently separated. Therefore, leakage current of capacitor 100A can be suppressed.

[0424] In addition, in order to form Figure 25B The conductor 110 shown can be formed by creating openings in the insulators 286 and 285 to form a conductive film that becomes the conductor 110, and then undergoing planarization treatment using chemical mechanical polishing (CMP) or the like until the insulator 286 is exposed. In other words, it can be formed using a single damascene method. Figure 25BThe conductor 110 is shown. The formation process of this conductor 110 also serves as a process for achieving excellent flatness on the top surface of the conductor 110. Therefore, an insulator 130 is provided on the conductor 110, which has excellent flatness, and thus the insulator 130 also has excellent flatness. Therefore, even if the insulator 130 is formed using a thin-film ferroelectric layer, leakage current of the capacitor 100A can be suppressed. Furthermore, in the formation process of this conductor 110, the top surface of the insulator 286 also has excellent flatness, making it preferable when a portion of the insulator 130 is provided on the insulator 286.

[0425] In addition, such as Figure 25B As shown, the conductor 110 may also have a stacked structure of conductor 110c, conductor 110a on conductor 110c, and conductor 110b on conductor 110a. Conductor 110c contacts the side surface of insulator 286, the side surface of insulator 285, the top surface of insulator 283, the side surface of insulator 241b, and the top surface of conductor 240b inside the openings formed in insulators 286 and 285. Conductor 110a is embedded in a portion of the recess formed in conductor 110c. Here, the height of the top surface of conductor 110a is lower than the height of the top surface of conductor 110c and the top surface of insulator 286. Conductor 110b contacts the top surface of conductor 110a and the side surface of conductor 110c. Here, the height of the top surface of conductor 110b is the same as the height of the top surface of conductor 110c and the top surface of insulator 286. In other words, conductor 110a has a structure surrounded by conductor 110c and conductor 110b.

[0426] When the conductor 110 has a three-layer structure of conductor 110c, conductor 110a and conductor 110b, the conductor 110 can be formed, for example, by the following steps: forming an opening in insulator 286 and insulator 285; depositing a conductive film as conductor 110c and a conductive film as conductor 110a; performing CMP treatment to expose insulator 286 to form conductor 110c and conductor 110a; and etching back a portion of conductor 110a to embed conductor 110b.

[0427] As conductor 110c, a conductive material suitable for use in the aforementioned conductor 205a can be formed using methods such as sputtering, ALD, or CVD. Furthermore, by using a conductive material with the function of suppressing oxygen diffusion as conductor 110c, oxidation of conductor 110a and a decrease in conductivity can be prevented. For example, titanium nitride can be deposited using CVD as conductor 110c.

[0428] As conductor 110b, a conductive material suitable for conductor 110 can be deposited using methods such as ALD or CVD. Furthermore, when conductor 110c is formed by planarization as described above, conductor 110c can also be formed using sputtering, CVD, or PECVD methods with high deposition rates. This allows for the manufacture of semiconductor devices with high productivity. For example, titanium nitride can be deposited using CVD as conductor 110b.

[0429] exist Figure 25B In this configuration, the side surface of the conductor 110 is located inside the side surface of the insulator 130. In this case, when viewed from above, the outer edge of the conductor 110 is located inside the outer edges of both the insulator 130 and the conductor 120. For example, the shortest distance from the side surface of the conductor 110 to the side surface of the insulator 130 is preferably greater than or equal to the thickness of the insulator 130, and more preferably greater than twice the thickness of the insulator 130. By employing this structure, the conductor 110 and the conductor 120 can be sufficiently separated by the insulator 130. At this time, as... Figure 25B As shown, sometimes a portion of the region of the insulator 286 that does not overlap with the conductor 120 is removed.

[0430] Although Figure 25B The diagram shows a structure where the side of the conductor 110 is located inside the side of the insulator 130, but the invention is not limited thereto. For example, the side of the conductor 110 may also be located outside the side of the insulator 130. With this structure, the insulator 130 is surrounded by conductors 110c, insulator 155, and insulator 152. By using a conductive material with the function of reducing hydrogen diffusion in conductor 110c, the diffusion of hydrogen from the outside of insulator 152 and conductor 110c to insulator 130 can be suppressed. In addition, hydrogen in insulator 130 can be trapped or fixed to reduce the hydrogen concentration in insulator 130. Therefore, the ferroelectricity of insulator 130 can be improved. Furthermore, the side of the conductor 110 may also coincide with the side of the insulator 130.

[0431] Conductor 246 has a region that contacts conductor 240a inside openings formed in insulators 286 and 285. Conductor 246 is used as wiring or a terminal. Conductor 246 and conductor 110 are preferably formed in the same layer using the same material. Figure 25B As shown, when the conductor 110 has the above-mentioned three-layer stacked structure, the conductor 246 and the conductor 110 are formed by using the same material in the same layer, and the conductor 246 has a three-layer stacked structure.

[0432] In addition, Figure 25B In this structure, conductor 120 has a single-layer structure. Alternatively, conductor 120 may also have... Figure 23BThe two-layer structure shown can also have a stacked structure of three or more layers. Furthermore, when the conductor 120 has a single-layer structure, a conductor suitable for either conductor 120a or conductor 120b can be used as the conductor 120. Moreover, the conductor 120 can be formed using a method suitable for either conductor 120a or conductor 120b.

[0433] This embodiment can be appropriately combined with other embodiments. Furthermore, in this specification, where multiple structural examples are shown in one embodiment, these structural examples can be appropriately combined.

[0434] (Implementation Method 2) In this embodiment, refer to Figures 26 to 27 This describes a type of semiconductor device used for storage.

[0435] [Storage Device 1] Figure 26 An example of a storage device according to one aspect of the present invention is shown. In the storage device according to one aspect of the present invention, a transistor 200 is disposed above a transistor 300, and a capacitor 100 is disposed above both transistor 300 and transistor 200. Furthermore, the transistor 200 described in the above embodiment can be used as the transistor 200.

[0436] Transistor 200 is a transistor whose channel is formed in a semiconductor layer containing oxide semiconductor. Because transistor 200 has a low off-state current, it can retain stored content for a long time when used in a memory device. In other words, since refresh operations are not required or occur at extremely low frequencies, the power consumption of the memory device can be significantly reduced.

[0437] exist Figure 26 In the illustrated storage device, wiring 1001 is electrically connected to the source of transistor 300, wiring 1002 is electrically connected to the drain of transistor 300, and wiring 1007 is electrically connected to the gate of transistor 300. Furthermore, wiring 1003 is electrically connected to one of the source and drain of transistor 200, wiring 1004 is electrically connected to the first gate of transistor 200, and wiring 1006 is electrically connected to the second gate of transistor 200. Additionally, the other of the source and drain of transistor 200 is electrically connected to one electrode of capacitor 100, and wiring 1005 is electrically connected to the other electrode of capacitor 100.

[0438] In addition, by Figure 26 The storage devices shown are configured in a matrix shape, which can form a storage cell array.

[0439] The capacitor 100 described in the above embodiment can be used as capacitor 100. Note that capacitor 100A described in the above embodiment can also be used as capacitor 100. When capacitor 100A is used as capacitor 100, Figure 26 The storage device shown includes a ferroelectric memory.

[0440] <Transistor 300> Transistor 300 is disposed on substrate 311 and includes a conductor 316 serving as a gate, an insulator 315 serving as a gate insulator, a semiconductor region 313 formed by a portion of substrate 311, and low-resistance regions 314a and 314b serving as source or drain regions. Transistor 300 may be p-channel or n-channel.

[0441] Here, in Figure 26 In the transistor 300 shown, the semiconductor region 313 (a portion of the substrate 311) forming the channel has a convex shape. Furthermore, a conductor 316 is provided such that it covers the sides and top surface of the semiconductor region 313 with an insulator 315 in between. The conductor 316 can also be made of a material with an adjustable work function. Because of the convex portion of the semiconductor substrate, this transistor 300 is also called a FIN-type transistor. Furthermore, an insulator used to form a mask for the convex portion can be provided in contact with the upper surface of the convex portion. Although the case where the convex portion is formed by processing a portion of the semiconductor substrate is shown here, a semiconductor film with convex portions can also be formed by processing an SOI substrate.

[0442] Notice, Figure 26 The structure of transistor 300 shown is just an example and is not limited to the above structure. Appropriate transistors can be used depending on the circuit structure or driving method.

[0443] <Wiring Layer> Wiring layers, including interlayer films, wiring, and plugs, can also be provided between the various structures. Furthermore, multiple wiring layers can be provided depending on the design. Here, in conductors that function as plugs or wiring, the same symbol is sometimes used to represent multiple structures. Furthermore, in this specification, wiring and plugs electrically connected to wiring can also be considered as constituent elements. That is, a part of a conductor is sometimes used as wiring, and a part of a conductor is sometimes used as a plug.

[0444] For example, in transistor 300, insulators 320, 322, 324, and 326 are sequentially stacked as interlayer films. Furthermore, conductors 328 are embedded in insulators 320 and 322, and conductors 330 are embedded in insulators 324 and 326. In addition, conductors 328 and 330 are used as connectors or wiring.

[0445] Furthermore, the insulator used as an interlayer film can be used as a planarization film covering the uneven shape underneath. For example, in order to improve the flatness of the top surface of insulator 322, its top surface can also be planarized by using a planarization process such as CMP.

[0446] Alternatively, a wiring layer can be provided on the insulator 326 and the conductor 330. For example, in Figure 26 In the structure, insulators 350, 352, and 354 are stacked sequentially. Furthermore, a conductor 356 is formed within insulators 350, 352, and 354. The conductor 356 is used as a plug or wiring.

[0447] Similarly, conductors 218 and conductors constituting transistor 200 (conductor 205) are embedded in insulators 210, 215 and 216. In addition, conductor 218 is used as a plug or wiring for electrical connection with transistor 300.

[0448] Here, similar to insulators 241a and 241b shown in the above embodiments, insulator 217 is provided in contact with the side of conductor 218, which serves as a plug. Insulator 217 is provided in contact with the inner wall of the opening formed in insulators 210, 215, and 216. That is, insulator 217 is provided between conductor 218 and insulators 210, 215, and 216. Conductor 205 can be formed in parallel with conductor 218, so sometimes insulator 217 is formed in contact with the side of conductor 205.

[0449] Insulator 217 can be, for example, an insulator suitable for insulators 241a and 241b described above. Insulator 217 is disposed in contact with insulators 215 and 222, thus suppressing impurities such as water or hydrogen contained in insulators 210 or 216 from being mixed into oxide 230 through conductor 218. Silicon nitride, in particular, has high hydrogen barrier properties and is therefore preferred. Furthermore, oxygen in insulators 210 or 216 can be prevented from being absorbed by conductor 218.

[0450] Insulator 217 can be formed in the same way as insulators 241a and 241b described above. For example, silicon nitride can be deposited using the PEALD method and anisotropic etching can be used to form an opening reaching conductor 356.

[0451] Insulators that can be used in insulator 150 can be used as insulators 210, 352, and 354, which are used as interlayer membranes.

[0452] Furthermore, by using an insulator that suppresses the permeation of impurities such as hydrogen and oxygen around a transistor using an oxide semiconductor, the electrical characteristics of the transistor can be stabilized. Therefore, it is sufficient to use an insulator that suppresses the permeation of impurities such as hydrogen and oxygen, such as insulator 215 and insulator 350.

[0453] As an insulator that suppresses impurities such as hydrogen and oxygen permeation, insulators containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, or tantalum can be used, either as a single layer or in layers. Specifically, as an insulator that suppresses impurities such as hydrogen and oxygen permeation, metal oxides such as aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide, as well as silicon oxynitride and silicon nitride, can be used.

[0454] As a conductor suitable for wiring and plugs, materials containing one or more metallic elements selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, and ruthenium can be used. Alternatively, highly conductive semiconductors, such as polycrystalline silicon containing impurity elements like phosphorus, and silicides such as nickel silicides can also be used.

[0455] For example, conductors 328, 330, 356, 218, and 112 can be made of conductive materials such as metallic materials, alloy materials, metal nitride materials, and metal oxide materials formed from the above-mentioned materials, either in a single layer or in layers. High-melting-point materials such as tungsten or molybdenum, which combine heat resistance and conductivity, are preferred; tungsten is particularly preferred. Alternatively, low-resistance conductive materials such as aluminum or copper are preferred. Using low-resistance conductive materials reduces wiring resistance.

[0456] <Wires or connectors with oxide semiconductor layers> Furthermore, as shown in the above embodiment, the transistor 200 may also employ a structure sealed by insulators 215 and 283. By employing the above structure, the mixing of hydrogen contained in insulators 274, 150, etc., into insulators 280, etc., can be reduced.

[0457] Furthermore, conductor 240 penetrates insulator 283, conductor 218 penetrates insulator 215, and, as Figure 26 As shown, insulator 241 is disposed in contact with conductor 240, and insulator 217 is disposed in contact with conductor 218. By using hydrogen-blocking insulators as insulator 241 and insulator 217, hydrogen can be prevented from mixing into the inner side of insulator 215 and insulator 283 through conductor 240 and conductor 218. In this way, transistor 200 can be sealed by insulator 215, insulator 283, insulator 241, and insulator 217, and impurities such as hydrogen contained in insulator 274 can be prevented from mixing in from the outside.

[0458] <cut line> The following describes the dicing lines (sometimes called dividing lines, severing lines, or cut-off lines) used when dividing a large-area substrate into multiple semiconductor devices in the shape of a chip by dividing each semiconductor component. As a dicing method, for example, sometimes a groove (dicing line) for dividing the semiconductor components is first formed in the substrate, and then the substrate is cut off at the dicing line to obtain multiple semiconductor devices that have been divided (segmented).

[0459] Here, for example, such as Figure 26 As shown, it is preferable to design the insulators 283 and 215 such that the contact area overlaps with the cut line. That is, an opening is provided in the insulators 282, 280, 275, 222 and 216 near the cut line area located at the edge of the memory cell including multiple transistors 200.

[0460] In other words, in the openings provided in insulators 282, 280, 275, 222 and 216, insulator 215 is in contact with insulator 283.

[0461] Furthermore, for example, openings can be formed in the upper layers of insulators 282, 280, 275, 222, 216, and 215. With this structure, insulator 215 contacts insulator 283 through the openings provided in insulators 282, 280, 275, 222, and 216. In this case, the lower layer of insulator 215 and insulator 283 can also be formed using the same material and the same method. By using the same material and the same method to form the lower layer of insulator 215 and insulator 283, the tightness can be improved. For example, silicon nitride is preferably used.

[0462] By employing this structure, the transistor 200 can be surrounded by insulators 215 and 283. Since at least one of insulators 215 and 283 has the function of suppressing the diffusion of oxygen, hydrogen, and water, even if the substrate is divided into multiple chips according to each circuit region where the semiconductor component shown in this embodiment is formed, it is possible to prevent impurities such as hydrogen or water from being mixed in from the side direction of the truncated substrate and to prevent such impurities from diffusing into the transistor 200.

[0463] Furthermore, by employing this structure, oxygen in the insulator 280 can be prevented from diffusing to the outside. Therefore, oxygen in the insulator 280 is efficiently supplied to the channel-forming region in the transistor 200. Due to this oxygen, oxygen vacancies in the channel-forming region of the transistor 200 can be reduced. Thus, the oxide semiconductor with the channel-forming region in the transistor 200 can become an oxide semiconductor with low defect state density and stable characteristics. In other words, it is possible to improve the reliability while suppressing variations in the electrical characteristics of the transistor 200.

[0464] [Storage Device 2] Figure 27 Showing with Figure 26 Examples of different structures for storage devices are shown. In the storage devices shown below, components having the same function as the components of the storage devices described above are given the same reference numerals. Furthermore, the following mainly describes the parts that differ from the storage devices described above, omitting descriptions of repeated parts.

[0465] Figure 27 This is a cross-sectional view of the storage device. Figure 27 The storage device shown is Figure 26 The difference in the storage device shown is that: Figure 27 The storage device shown does not include wiring 1007, and the gate of transistor 300 is electrically connected to the other of the source and drain of transistor 200 and one electrode of capacitor 100.

[0466] exist Figure 27 In the illustrated storage device, wiring 1001 is electrically connected to the source of transistor 300, and wiring 1002 is electrically connected to the drain of transistor 300. Furthermore, wiring 1003 is electrically connected to one of the source and drain of transistor 200, wiring 1004 is electrically connected to the first gate of transistor 200, and wiring 1006 is electrically connected to the second gate of transistor 200. Additionally, the gate of transistor 300 and the other of the source and drain of transistor 200 are electrically connected to one electrode of capacitor 100, and wiring 1005 is electrically connected to the other electrode of capacitor 100.

[0467] In addition, conductor 316 is electrically connected to capacitor 100 or transistor 200 via conductor 328, conductor 330, conductor 356, conductor 218 and conductor 240.

[0468] In the storage device shown in this embodiment, with Figure 19A The multiple transistors 200 shown also arrange the memory cells in a matrix on the xy plane, thereby forming a memory cell array. Furthermore, the memory device shown in this embodiment can also have a structure of stacked memory cell arrays. By stacking multiple memory cell arrays, memory cells can be integrated without increasing the area occupied by the memory cell array. In other words, a 3D cell array can be formed.

[0469] This embodiment can be appropriately combined with other embodiments. Furthermore, in this specification, where multiple structural examples are shown in one embodiment, these structural examples can be appropriately combined.

[0470] (Implementation Method 3) In this embodiment, refer to Figures 28A to 31C This describes a storage device (hereinafter sometimes referred to as an OS storage device) using an oxide-based semiconductor transistor (hereinafter sometimes referred to as an OS transistor) and a capacitor according to one aspect of the present invention. An OS storage device is a storage device comprising at least a capacitor and an OS transistor that controls the charging and discharging of the capacitor. Because the off-state current of an OS transistor is extremely small, an OS storage device has excellent retention characteristics and can therefore be used as a non-volatile memory.

[0471] <Example of storage device structure> Figure 28A An example of the structure of an OS storage device is shown. Storage device 1400 includes peripheral circuitry 1411 and a storage cell array 1470. Peripheral circuitry 1411 includes row circuitry 1420, column circuitry 1430, output circuitry 1440, and control logic circuitry 1460.

[0472] The column circuit 1430 includes, for example, a column decoder, a precharge circuit, a sense amplifier, and a write circuit. The precharge circuit precharges the wiring. The sense amplifier amplifies the data signal read from the memory cell. Note that the wiring described above is the wiring connected to the memory cells included in the memory cell array 1470, and its details are described below. The amplified data signal, as the data signal RDATA, is output to the outside of the memory device 1400 via the output circuit 1440. Furthermore, the row circuit 1420 includes, for example, a row decoder, a word line driver circuit, etc., and can select the row to be accessed.

[0473] The storage device 1400 is supplied with a low power supply voltage (VSS), the peripheral circuit 1411 is supplied with a high power supply voltage (VDD), and the memory cell array 1470 is supplied with a high power supply voltage (VIL). Furthermore, the storage device 1400 receives external control signals (CE, WEN, RES), address signals ADDR, and data signals WDATA. The address signal ADDR is input to the row decoder and column decoder, and the data signal WDATA is input to the write circuit.

[0474] The control logic circuit 1460 processes externally input control signals (CE, WEN, RES) to generate control signals for the row decoder and column decoder. Control signal CE is the chip enable signal, control signal WEN is the write enable signal, and control signal RES is the read enable signal. The signals processed by the control logic circuit 1460 are not limited to these; other control signals can be input as needed.

[0475] The memory cell array 1470 includes a plurality of memory cells MCs configured in a row and column arrangement and a plurality of wirings. Note that the number of wirings connecting the memory cell array 1470 and the row circuit 1420 depends on the structure of the memory cell MCs, the number of memory cell MCs included in a column, etc. Furthermore, the number of wirings connecting the memory cell array 1470 and the column circuit 1430 depends on the structure of the memory cell MCs, the number of memory cell MCs included in a row, etc.

[0476] In addition, although Figure 28A An example is shown where the peripheral circuitry 1411 and the memory cell array 1470 are formed on the same plane, but this embodiment is not limited thereto. For example, as Figure 28B As shown, the memory cell array 1470 can also be arranged overlapping a portion of the peripheral circuitry 1411. For example, the readout amplifier can also be arranged overlapping the memory cell array 1470. The OS transistor can be formed in the BEOL (Back end of line) process that forms the wiring of the memory device. Therefore, when using OS transistors for the memory cell array 1470 and using Si transistors for the peripheral circuitry 1411 overlapping the cell array 1470 below, a technique of directly forming OS transistors above Si transistors (referred to as BEOL-Tr technique) can be used.

[0477] Alternatively, a structure of stacked memory cell arrays 1470 can be adopted. By stacking multiple memory cell arrays 1470, memory cells can be integrated without increasing the area occupied by the memory cell arrays 1470. In other words, a 3D cell array can be constructed. Thus, high integration of memory cells can be achieved to provide a semiconductor device with large storage capacity. Furthermore, it is preferred that layers including OS transistors can be stacked monolithically.

[0478] Note that the structure of the peripheral circuit 1411 and the storage cell array 1470 shown in this embodiment is not limited to the structure described above. Furthermore, the configuration or function of these circuits and the wiring and circuit elements connected to them can be changed, removed, or added as needed. One aspect of the present invention provides a storage device with high operating speed and the ability to retain data for extended periods.

[0479] Reference Figures 29A to 29I as well as Figure 31A This section describes a structural example of a storage cell that can be applied to the aforementioned storage cell MC.

[0480] [DOSRAM] Figures 29A to 29C An example of the circuit structure of a DRAM memory cell is shown. In this specification and other materials, DRAM using a 1000 transistors and 1 capacitor type memory cell is sometimes referred to as DOSRAM (Dynamic Oxide Semiconductor Random Access Memory). Figure 29A The memory cell 1471 shown includes a transistor M1 and a capacitor CA. Furthermore, the transistor M1 includes a gate (sometimes referred to as the top gate) and a back gate.

[0481] The first terminal of transistor M1 is connected to the first terminal of capacitor CA. The second terminal of transistor M1 is connected to wiring BIL. The gate of transistor M1 is connected to wiring WOL. The back gate of transistor M1 is connected to wiring BGL. The second terminal of capacitor CA is connected to wiring LL.

[0482] Wiring BIL is used as the bit line, and wiring WOL is used as the word line. Wiring LL is used to apply a specified potential to the second terminal of capacitor CA. During data writing and reading, wiring LL can be either ground or low level. Wiring BGL is used to apply a potential to the back gate of transistor M1. By applying any potential to wiring BGL, the threshold voltage of transistor M1 can be increased or decreased.

[0483] Here, Figure 29A The storage cell 1471 shown corresponds to Figure 26The storage device shown. That is, transistor M1 corresponds to transistor 200, and capacitor CA corresponds to capacitor 100.

[0484] Furthermore, the memory cell MC is not limited to memory cell 1471, and its circuit structure can be changed. For example, the memory cell MC can also adopt... Figure 29B The transistor M1 in the illustrated memory cell 1472 has a back gate that is not connected to wiring BGL, but to wiring WOL. Furthermore, for example, the memory cell MC can also be as follows: Figure 29C The memory cell shown is a memory cell 1473, which is composed of a single-gate transistor, i.e., a transistor M1 excluding the back gate.

[0485] When the semiconductor device shown in the above embodiment is used in memory cell 1471, transistor 200 can be used as transistor M1, and capacitor 100 can be used as capacitor CA. By using an OS transistor as transistor M1, the leakage current of transistor M1 can be made extremely low. In other words, since the written data can be held by transistor M1 for a long time, the refresh frequency of the memory cell can be reduced. Furthermore, the refresh operation of the memory cell can be omitted. In addition, since the leakage current is extremely low, multi-valued data or analog data can be stored in memory cells 1471, 1472, and 1473.

[0486] Furthermore, in DOSRAM, when the read amplifier is arranged in a way that overlaps with the memory cell array 1470, the bit lines can be shortened. This reduces the bit line capacitance, thereby reducing the retention capacitance of the memory cells.

[0487] [NOSRAM] Figures 29D to 29G This illustrates an example of a gain-cell type memory cell with two transistors and one capacitor. Figure 29D The memory cell 1474 shown includes transistor M2, transistor M3, and capacitor CB. Furthermore, transistor M2 includes a top gate (sometimes simply referred to as the gate) and a back gate. In this specification and the like, a memory device that includes a gain-cell type memory cell using an OS transistor as transistor M2 is sometimes referred to as NOSRAM (Nonvolatile Oxide Semiconductor RAM).

[0488] Transistor M2's first terminal is connected to capacitor CB's first terminal; transistor M2's second terminal is connected to wiring WBL; transistor M2's gate is connected to wiring WOL; and transistor M2's back gate is connected to wiring BGL. Capacitor CB's second terminal is connected to wiring CAL. Transistor M3's first terminal is connected to wiring RBL; transistor M3's second terminal is connected to wiring SL; and transistor M3's gate is connected to capacitor CB's first terminal.

[0489] Wiring WBL is used as the write bit line, wiring RBL is used as the read bit line, and wiring WOL is used as the word line. Wiring CAL is used to apply a specified potential to the second terminal of capacitor CB. When writing and reading data, it is preferable to apply a high-level potential to wiring CAL. Furthermore, when holding data, it is preferable to apply a low-level potential to wiring CAL. Wiring BGL is used to apply a potential to the back gate of transistor M2. By applying an arbitrary potential to wiring BGL, the threshold voltage of transistor M2 can be increased or decreased.

[0490] Here, Figure 29D The storage cell 1474 shown corresponds to Figure 27 The storage device shown is as follows: transistor M2 corresponds to transistor 200, capacitor CB corresponds to capacitor 100, transistor M3 corresponds to transistor 300, wiring WBL corresponds to wiring 1003, wiring WOL corresponds to wiring 1004, wiring BGL corresponds to wiring 1006, wiring CAL corresponds to wiring 1005, wiring RBL corresponds to wiring 1002, and wiring SL corresponds to wiring 1001.

[0491] Furthermore, the memory cell MC is not limited to memory cell 1474, and its circuit structure can be appropriately modified. For example, the memory cell MC can also adopt... Figure 29E The transistor M2 in the illustrated memory cell 1475 has its back gate connected to the wiring BGL, but not to the wiring WOL. Furthermore, for example, the memory cell MC can also be as follows: Figure 29F The memory cell 1476 shown is a memory cell composed of a single-gate transistor, i.e., a transistor M2 excluding the back gate. Furthermore, for example, the memory cell MC may also have... Figure 29G The storage cell 1477 shown has a structure that combines wiring WBL and wiring RBL into a wiring BIL.

[0492] When the semiconductor device shown in the above embodiment is used in memory cell 1474, transistor 200 can be used as transistor M2, transistor 300 can be used as transistor M3, and capacitor 100 can be used as capacitor CB. By using an OS transistor as transistor M2, the leakage current of transistor M2 can be made extremely low. As a result, since the written data can be held by transistor M2 for a long time, the refresh frequency of the memory cell can be reduced. In addition, the refresh operation of the memory cell can be omitted. Furthermore, since the leakage current is extremely low, multi-valued data or analog data can be held in memory cell 1474. The same applies to memory cells 1475 to 1477.

[0493] Furthermore, transistor M3 can also be a transistor containing silicon in the channel formation region (hereinafter sometimes referred to as a Si transistor). The conductivity type of a Si transistor can be n-channel or p-channel. The field-effect mobility of a Si transistor is sometimes higher than that of an OS transistor. Therefore, a Si transistor can also be used as the readout transistor M3. Furthermore, by using a Si transistor as transistor M3, transistor M2 can be stacked on top of transistor M3, thereby reducing the footprint of the memory cell and enabling high integration of the memory device.

[0494] Furthermore, transistor M3 can also be an OS transistor. When using OS transistors for transistors M2 and M3, the memory cell array 1470 can be constructed using only n-channel transistors.

[0495] also, Figure 29H An example of a gain-cell type memory cell with 3 transistors and 1 capacitor is shown. Figure 29H The illustrated memory cell 1478 includes transistors M4 through M6 and capacitor CC. Capacitor CC is appropriately positioned. Memory cell 1478 is electrically connected to wiring BIL, wiring RWL, wiring WWL, wiring BGL, and wiring GNDL. Wiring GNDL is a wiring that supplies a low-level potential. Alternatively, memory cell 1478 can be electrically connected to wiring RBL and wiring WBL without being electrically connected to wiring BIL.

[0496] Transistor M4 is an OS transistor that includes a back gate, which is electrically connected to wiring BGL. Alternatively, the back gate and gate of transistor M4 can be electrically connected to each other. Or, transistor M4 may not include a back gate.

[0497] Furthermore, transistors M5 and M6 can each be either n-channel or p-channel Si transistors. Alternatively, transistors M4 through M6 can all be p-channel Si transistors. In this case, only n-channel transistors can be used to construct the circuit in the memory cell array 1470.

[0498] When the semiconductor device shown in the above embodiment is used in the memory cell 1478, transistor 200 can be used as transistor M4, transistor 300 can be used as transistors M5 and M6, and capacitor 100 can be used as capacitor CC. By using an OS transistor as transistor M4, the leakage current of transistor M4 can be minimized.

[0499] also, Figure 29I An example of a gain-cell type memory cell with 2 transistors is shown. Figure 29I The memory cell 1479 shown includes transistors M7 and M8. The memory cell 1479 is electrically connected to wiring BIL, wiring WWL, wiring BGL, and wiring SL.

[0500] Transistor M7 is an OS transistor that includes a back gate, which is electrically connected to wiring BGL. Alternatively, the back gate and the gate of transistor M7 can be electrically connected. Or, transistor M7 may not include a back gate.

[0501] exist Figure 29I In the shown memory cell 1479, the gate capacitance of transistor M8 is used as the storage capacitor. That is, memory cell 1479 can also be called a capacitor-free memory cell. Furthermore, memory cell 1479 can be considered as having no capacitor CB. Figure 29G The storage cell 1477 shown can therefore also be called a gain cell type storage cell with 2 transistors and 0 capacitors.

[0502] When the OS transistor is used as transistor M7, by keeping transistor M7 in the off state, the charge of the node electrically connected to one of the source and drain electrodes of transistor M7 and the gate electrode of transistor M8 can be maintained for a long time. Therefore, a non-volatile memory cell can be realized.

[0503] Transistor M8 can be an n-channel Si transistor or a p-channel Si transistor.

[0504] When the semiconductor device shown in the above embodiment is used in the memory cell 1479, transistor 200 can be used as transistor M7, and transistor 300 can be used as transistor M8. By using an OS transistor as transistor M7, the leakage current of transistor M7 can be made very small.

[0505] Furthermore, transistor M8 can also be an OS transistor. In this case, only n-type transistors can be used to construct the circuit in the memory cell array 1470.

[0506] When the semiconductor device shown in the above embodiment is used in the memory cell 1479, transistor 200 can be used as transistor M7 and transistor M8. By adopting this structure, transistor M7 and transistor M8 can be formed in the same layer. Therefore, compared with the case where transistor M7 and transistor M8 are arranged in different layers, the manufacturing process of stacking layers including the memory cell 1479 can be simplified, and productivity can be improved.

[0507] When transistor 200 is used as transistor M7 or transistor M8, the constituent elements of the transistor (including channel length, channel width, cross-sectional shape, etc.) can be appropriately set according to the required characteristics of transistor M7 and transistor M8.

[0508] Note that there are no particular restrictions on the structure of transistor M8, and it is independent of the semiconductor material used in transistor M8. For example, planar transistors, interleaved transistors, and anti-interleaved transistors can be used. In addition, top-gate or bottom-gate transistor structures can also be used. Alternatively, gates can be disposed on the top and bottom of the semiconductor layer forming the channel.

[0509] As described above, a structure of stacked multiple memory cell arrays 1470 can also be adopted. By stacking multiple memory cell arrays 1470, memory cells can be integrated without increasing the area occupied by the memory cell arrays 1470. In other words, a 3D cell array can be constructed. Figure 30 An example of a storage device having a structure of multiple stacked memory cell arrays 1470 is shown.

[0510] Figure 30 The storage device shown includes a first layer having transistors 300, and a storage cell array 1470[1] to a storage cell array 1470[m] on the first layer (in Figure 30 Only memory cell array 1470[1] and memory cell array 1470[2] are shown in the image. Furthermore, Figure 30 The structure below the insulator 326 of the storage device shown is similar to Figure 26 The same applies to the storage device shown.

[0511] Each of the memory cell arrays 1470[1] to 1470[m] includes a plurality of memory cells MC. Furthermore, each of the plurality of memory cells MC includes a transistor 200 and a capacitor 100. Here, the transistor 200 corresponds to the transistor 200 described in the above embodiments, and the capacitor 100 corresponds to the capacitor 100 or capacitor 100A described in the above embodiments. Furthermore, Figure 30 Showing the use Figure 22 The transistor 200 and capacitor 100 shown are examples of transistor 200 and capacitor 100.

[0512] A wiring layer, including interlayer films, wiring, and connectors, may also be provided between the first layer and the memory cell array 1470, or between two memory cell arrays 1470. Furthermore, multiple wiring layers may be provided depending on the design. Additionally, in this specification, wiring and connectors electrically connected to the wiring may also be considered as components. That is, a portion of a conductor is sometimes used as wiring, and a portion of a conductor is sometimes used as a connector.

[0513] An insulator 210 is disposed above an insulator 326, and a conductor 209 is disposed inside an opening formed in the insulator 210. Furthermore, an insulator 215 is disposed on the insulator 210. A portion of a conductor 240 disposed in the memory cell array 1470[1] is embedded in an opening formed in the insulator 215. Here, an insulator that can be used for insulator 216 can be used as the insulator 210.

[0514] A conductor (not shown) contacts the bottom surface of conductor 209. Furthermore, the top surface of conductor 209 contacts the bottom surface of conductor 240 disposed in memory cell array 1470[1]. With this structure, conductor 240, used as wiring BL, can be electrically connected to circuit elements, wiring, electrodes, or terminals such as switches, transistors, capacitors, inductors, resistors, and diodes disposed below memory cell array 1470.

[0515] Each of the memory cell arrays 1470[1] to 1470[m] includes multiple memory cells MC. The conductors 240 included in each memory cell MC are electrically connected to the conductors 240 in the upper layer and the conductors 240 in the lower layer.

[0516] like Figure 30 As shown, adjacent memory cells (MCs) share conductor 240. Furthermore, within adjacent memory cells (MCs), the right-side structure, bounded by conductor 240, is symmetrically arranged with respect to the left-side structure.

[0517] Here, the conductor 160, which serves as the upper electrode of the capacitor 100 (e.g., the layer of the memory cell array 1470 [1]), and the conductor 261, which serves as the second gate electrode of the transistor 200 (e.g., the layer of the memory cell array 1470 [2]), can be formed in the same layer. In other words, the conductor 160 of the lower capacitor 100 and the conductor 261 of the upper transistor 200 can both be embedded in an opening formed in the same insulator 216. The above structure is obtained by processing a conductive film to form the conductor 160 of the lower capacitor 100 and the conductor 261 of the upper transistor 200. At this time, the conductor 160 of the lower capacitor 100 and the conductor 261 of the upper transistor 200 contain the same material.

[0518] As described above, by simultaneously forming the conductor 160 of the lower capacitor 100 and the conductor 261 of the upper transistor 200, the manufacturing process of the memory device according to this embodiment can be reduced, thereby improving the productivity of the memory device.

[0519] In the aforementioned memory cell array 1470, multiple memory cell arrays (memory cell array 1470[1] to memory cell array 1470[m]) can be stacked. By arranging the memory cell arrays 1470[1] to memory cell array 1470[m] included in the memory cell array 1470 in a direction perpendicular to the substrate surface, the storage density of the memory cells can be increased. Furthermore, the memory cell array 1470 can be manufactured by repeatedly using the same manufacturing process in the vertical direction. Figure 30 The storage device shown can reduce the manufacturing cost of the storage cell array 1470.

[0520] Ferroelectric memory Figure 31A An example circuit structure of a memory cell using a ferroelectric capacitor is shown. Memory cell 1480 includes a transistor M9 and a capacitor Cfe. Here, as memory cell 1480, it can be used in… Figures 23A to 25B The semiconductor device shown includes transistor 200 and capacitor 100A. In this case, transistor M9 and capacitor Cfe correspond to transistor 200 and capacitor 100A, respectively. Furthermore, transistor M9 may or may not include a back gate.

[0521] As transistor M9, the OS transistor described in the above embodiment is preferably used. OS transistors have the characteristic of high dielectric strength between the source and drain. In other words, OS transistors can be referred to as miniaturized high-voltage devices. Therefore, by using an OS transistor as transistor M9, a high voltage can be applied to transistor M9 even when it is miniaturized. Miniaturization of transistor M9 reduces the footprint of the semiconductor device. This allows for high-density configuration of semiconductor devices. Consequently, memory devices with large storage capacities can be realized.

[0522] One of the source and drain terminals of transistor M9 is electrically connected to wiring BL. The other of the source and drain terminals of transistor M9 is electrically connected to one electrode of capacitor Cfe. The gate of transistor M9 is electrically connected to wiring WL. The other electrode of capacitor Cfe is electrically connected to wiring PL.

[0523] Wiring WL is used as a word line. The on / off state of transistor M9 can be controlled by adjusting the potential of wiring WL. For example, setting the potential of wiring WL to a high potential (H) turns transistor M9 on, and setting the potential of wiring WL to a low potential (L) turns transistor M9 off. Wiring WL is electrically connected to the word line driving circuit included in the row circuit 1420, and its potential can be controlled by the word line driving circuit.

[0524] Wiring BL is used as a bit line, supplying a potential corresponding to the potential of wiring BL to one electrode of capacitor Cfe when transistor M9 is in the ON state. Wiring BL is electrically connected to the bit line drive circuit of column circuit 1430. The bit line drive circuit has the function of generating data to be written to memory cell MC. In addition, the bit line drive circuit has the function of reading data output from memory cell MC. Specifically, a sense amplifier is provided in the bit line drive circuit, which can be used to read the data output from memory cell MC.

[0525] The PL wiring is used as a board wire. The other electrode of capacitor Cfe is supplied with potential through the PL wiring.

[0526] The capacitor Cfe includes a ferroelectric material as a dielectric layer between its two electrodes. The ferroelectric material can be a material suitable for the aforementioned insulator 130. By using a ferroelectric layer whose thickness can be reduced, a storage device can be realized by combining it with a miniaturized transistor. The dielectric layer included in the capacitor Cfe will be referred to below as the ferroelectric layer.

[0527] The ferroelectric layer contained in the capacitor Cfe exhibits hysteresis characteristics. Figure 31B This is a graph illustrating an example of this hysteresis characteristic. In Figure 31B In the diagram, the horizontal axis represents the voltage applied to the ferroelectric layer. This voltage can be, for example, the difference between the potential of one electrode of capacitor Cfe and the potential of the other electrode of capacitor Cfe.

[0528] In addition, Figure 31B In the diagram, the vertical axis represents the polarization of the ferroelectric layer. When the polarization is positive, it means that positive charges are biased towards one electrode side of the capacitor Cfe and negative charges are biased towards the other electrode side. Conversely, when the polarization is negative, it means that positive charges are biased towards the other electrode side of the capacitor Cfe and negative charges are biased towards one electrode side of the capacitor Cfe.

[0529] in addition, Figure 31B The voltage shown on the horizontal axis of the graph can also be the difference between the potential of the other electrode of capacitor Cfe and the potential of one electrode of capacitor Cfe. Additionally, Figure 31BThe polarization shown on the vertical axis of the graph can also be positive when the positive charge is biased to one side of the capacitor Cfe and the negative charge is biased to one side of the capacitor Cfe, and negative when the positive charge is biased to one side of the capacitor Cfe and the negative charge is biased to the other side of the capacitor Cfe.

[0530] like Figure 31B As shown, the hysteresis characteristics of the ferroelectric layer can be represented by curves 61 and 62. The voltage at the intersection of curves 61 and 62 is taken as VSP and -VSP. It can be said that VSP and -VSP have different polarities.

[0531] When the voltage applied to the ferroelectric layer is increased after applying a voltage below -VSP, the polarization of the ferroelectric layer increases according to curve 61. Conversely, when the voltage applied to the ferroelectric layer is decreased after applying a voltage above VSP, the polarization of the ferroelectric layer decreases according to curve 62. Therefore, VSP and -VSP can be considered saturation polarization voltages. Note that sometimes, for example, VSP is referred to as the first saturation polarization voltage and -VSP as the second saturation polarization voltage. Furthermore, in Figure 31B In this case, the absolute values ​​of the first saturation polarization voltage and the second saturation polarization voltage are equal, but they can also be different.

[0532] Here, the voltage applied to the ferroelectric layer when the polarization of the ferroelectric layer is "0" according to curve 61 is denoted as Vc. Similarly, the voltage applied to the ferroelectric layer when the polarization of the ferroelectric layer is "0" according to curve 62 is denoted as -Vc. Vc and -Vc can be considered coercive voltages. The values ​​of Vc and -Vc can be considered to be values ​​between -VSP and VSP. Note that sometimes, for example, Vc is referred to as the first coercive voltage and -Vc as the second coercive voltage. Furthermore, in... Figure 31B The absolute values ​​of the first and second coercive voltages are equal, but they may not be equal.

[0533] Furthermore, the maximum value of polarization when no voltage is applied to the ferroelectric layer is called "residual polarization Pr", and the minimum value is called "residual polarization -Pr". In addition, the difference between residual polarization Pr and residual polarization -Pr is called "residual polarization 2Pr".

[0534] As described above, the voltage applied to the ferroelectric layer comprising the capacitor Cfe can be represented by the difference between the potential of one electrode of the capacitor Cfe and the potential of the other electrode of the capacitor Cfe. Furthermore, as described above, the other electrode of the capacitor Cfe is electrically connected to the wiring PL. Therefore, by controlling the potential of the wiring PL, the voltage applied to the ferroelectric layer comprising the capacitor Cfe can be controlled.

[0535] illustrate Figure 31A This is an example of a driving method for the memory cell 1480. In the following description, the voltage applied to the ferroelectric layer of capacitor Cfe represents the potential difference (potential difference) between one electrode of capacitor Cfe and the other electrode (wiring PL) of capacitor Cfe. Transistor M9 is an n-channel transistor.

[0536] Figure 31C This is a timing diagram illustrating an example of the driving method for memory cell 1480. Figure 31C This illustrates an example of writing two-valued digital data to and reading two-valued digital data from memory cell 1480. Specifically, Figure 31C The following example illustrates the following: data "1" is written to storage unit 1480 from time T01 to time T02; data is read and rewritten from time T03 to time T05; data "0" is read and written to storage unit 1480 from time T11 to time T13; data is read and rewritten from time T14 to time T16; and data "1" is read and written to storage unit 1480 from time T17 to time T19.

[0537] The sense amplifier, electrically connected to the wiring BL, is supplied with Vref as a reference potential. Figure 31C In the readout operation shown, data "1" is read out through the bit line drive circuit when the potential of the wiring BL is higher than Vref. On the other hand, data "0" is read out through the bit line drive circuit when the potential of the wiring BL is lower than Vref.

[0538] From time T01 to time T02, the potential of wiring WL is set to high. This turns transistor M9 on. Additionally, the potential of wiring BL is set to Vw. Because transistor M9 is on, the potential of one electrode of capacitor Cfe becomes Vw. Furthermore, the potential of wiring PL is set to GND. Therefore, the voltage applied to the ferroelectric layer of capacitor Cfe becomes "Vw-GND". Thus, data "1" can be written to memory cell 1480. Therefore, time T01 to time T02 can be considered the period during which the write operation is performed.

[0539] Here, Vw is preferably VSP or higher, for example, preferably equal to VSP. Note that GND is a ground potential in this specification, etc., but GND does not necessarily need to be a ground potential as long as the memory cell 1480 can be driven in a manner that achieves the purpose of one aspect of the present invention. For example, when the absolute values ​​of the first saturation polarization voltage and the second saturation polarization voltage are different and the absolute values ​​of the first coercive voltage and the second coercive voltage are different, GND can be a potential other than ground.

[0540] From time T02 to time T03, the potentials of wiring BL and PL are made GND. Therefore, the voltage applied to the ferroelectric layer of capacitor Cfe becomes 0V. From time T01 to time T02, the voltage "Vw-GND" applied to the ferroelectric layer of capacitor Cfe can be greater than VSP. Therefore, from time T02 to time T03, the polarization of the ferroelectric layer of capacitor Cfe is determined according to... Figure 31B The curve 62 shown changes. Therefore, from time T02 to time T03, no polarization reversal occurs in the ferroelectric layer of capacitor Cfe.

[0541] The potentials of wiring BL and PL are set to GND, and then the potential of wiring WL is set to a low potential. Therefore, transistor M9 is turned off. Thus, the write operation is complete, and the data "1" is retained in memory cell 1480. Note that if polarization reversal does not occur in the ferroelectric layer of capacitor Cfe, i.e., the voltage applied to the ferroelectric layer of capacitor Cfe is above -Vc of the second coercive voltage, the potentials of wiring BL and PL can be arbitrary.

[0542] From time T03 to time T04, the potential of wiring WL is set to high. This turns transistor M9 on. Additionally, the potential of wiring PL is set to Vw. By setting the potential of wiring PL to Vw, the voltage applied to the ferroelectric layer of capacitor Cfe becomes "GND-Vw". As described above, from time T01 to time T02, the voltage applied to the ferroelectric layer of capacitor Cfe is "Vw-GND". Therefore, polarization reversal occurs in the ferroelectric layer of capacitor Cfe. During polarization reversal, current flows through wiring BL, and the potential of wiring BL is higher than Vref. Therefore, the bit line drive circuit can read the data "1" held by memory cell 1480. Thus, time T03 to time T04 can be considered the period for readout operation. Note that although it is assumed that Vref is higher than GND and lower than Vw, it can also be higher than Vw, for example.

[0543] Because the aforementioned readout is a destructive readout, the data "1" held by memory cell 1480 disappears. Therefore, from time T04 to time T05, the potentials of wiring BL and PL are set to Vw and GND, respectively. Thus, the data "1" in memory cell 1480 can be rewritten. Therefore, time T04 to time T05 can be considered the period during which the rewriting operation is performed.

[0544] Between time T05 and time T11, the potentials of wiring BL and PL are set to GND. Then, the potential of wiring WL is set to low. Thus, the rewrite operation ends, and the data "1" is stored in memory cell 1480.

[0545] From time T11 to time T12, the potentials of wiring WL and PL are set to high and Vw, respectively. Because memory cell 1480 holds data "1", the potential of wiring BL is higher than Vref, and the data "1" held by memory cell 1480 is read out. Therefore, time T11 to time T12 can be considered the period during which the readout operation is performed.

[0546] From time T12 to time T13, the potential of wiring BL is made GND. Because transistor M9 is turned on, the potential of one electrode of capacitor Cfe is also made GND. Additionally, the potential of wiring PL is made Vw. Therefore, the voltage applied to the ferroelectric layer of capacitor Cfe becomes "GND - Vw". Thus, data "0" can be written to memory cell 1480. Therefore, time T12 to time T13 can be considered the period during which the write operation is performed.

[0547] From time T13 to time T14, the potentials of wiring BL and PL are made GND. Therefore, the voltage applied to the ferroelectric layer of capacitor Cfe becomes 0V. From time T12 to time T13, the voltage "GND-Vw" applied to the ferroelectric layer of capacitor Cfe can be below -VSP, thus, from time T13 to time T14, the polarization of the ferroelectric layer of capacitor Cfe is determined according to... Figure 31B The curve 61 shown changes. Therefore, from time T13 to time T14, no polarization reversal occurs in the ferroelectric layer of capacitor Cfe.

[0548] The potentials of wiring BL and PL are set to GND, and then the potential of wiring WL is set to a low potential. Therefore, transistor M9 is turned off. Thus, the write operation ends, and the data "0" is retained in memory cell 1480. Note that if polarization reversal does not occur in the ferroelectric layer of capacitor Cfe, i.e., the voltage applied to the ferroelectric layer of capacitor Cfe is below the first coercive voltage Vc, the potentials of wiring BL and PL can be arbitrary.

[0549] From time T14 to time T15, the potential of wiring WL is set to high. This turns transistor M9 on. Additionally, the potential of wiring PL is set to Vw. With wiring PL set to Vw, the voltage applied to the ferroelectric layer of capacitor Cfe becomes "GND-Vw". As described above, the voltage applied to the ferroelectric layer of capacitor Cfe is "GND-Vw" from time T12 to time T13. Therefore, polarization reversal does not occur in the ferroelectric layer of capacitor Cfe. Consequently, the current flowing through wiring BL is smaller than if polarization reversal occurred in the ferroelectric layer of capacitor Cfe. Therefore, the potential rise of wiring BL is smaller than if polarization reversal occurred in the ferroelectric layer of capacitor Cfe; specifically, the potential of wiring BL becomes below Vref. Therefore, the bit line drive circuit can read the data "0" held by memory cell 1480. Therefore, time T14 to time T15 can be considered the period for readout operation.

[0550] Between time T15 and time T16, the potentials of wiring BL and wiring PL are made GND and Vw, respectively. This allows the data "0" to be rewritten into memory cell 1480. Therefore, time T15 to time T16 can be considered the period during which the rewriting operation is performed.

[0551] Between time T16 and time T17, the potentials of wiring BL and PL are set to GND. Then, the potential of wiring WL is set to low. Thus, the rewrite operation ends, and the data "0" is retained in storage cell 1480.

[0552] From time T17 to time T18, the potentials of wiring WL and PL are set to high and Vw, respectively. Because memory cell 1480 holds data "0", the potential of wiring BL is lower than Vref, and the data "0" held by memory cell 1480 is read out. Therefore, time T17 to time T18 can be considered the period during which the readout operation is performed.

[0553] From time T18 to time T19, the potential of wiring BL is set to Vw. Because transistor M9 is in the on state, the potential of one electrode of capacitor Cfe is also set to Vw. Additionally, the potential of wiring PL is set to GND. Therefore, the voltage applied to the ferroelectric layer of capacitor Cfe becomes "Vw-GND". Thus, the data "1" can be written to memory cell 1480. Therefore, time T18 to time T19 can be considered the period during which the write operation is performed.

[0554] After time T19, the potentials of wiring BL and PL are set to GND. Then, the potential of wiring WL is set to low. Thus, the write operation ends, and the data "1" is retained in memory cell 1480.

[0555] Semiconductor devices that use ferroelectric layers in capacitors (Cfe) are used as non-volatile storage elements that can retain written information even when power is interrupted.

[0556] Furthermore, DRAM requires periodic refresh operations, which increases power consumption. Semiconductor devices that use ferroelectric layers in capacitors (Cfe) do not require refresh operations, thereby reducing power consumption.

[0557] In this specification and other materials, a memory element or memory circuit including a ferroelectric layer is sometimes referred to as a "ferroelectric memory" or "FE memory". Therefore, a semiconductor device according to one aspect of the present invention is a ferroelectric memory, and also an FE memory. FE memories can be expected to achieve 1×102 10 The preferred value is 1×10. 12 The above is preferred to be 1×10 15 The above are the number of rewrites. Furthermore, the FE memory is expected to operate at frequencies of 10MHz or higher, preferably 1GHz or higher.

[0558] Furthermore, in FE memory, the residual polarization 2Pr is related to data retention capability; if the residual polarization 2Pr decreases, the data retention capability decreases. In this specification, the period until the residual polarization 2Pr decreases by 5% (data retention capability decreases by 5%) is referred to as the "retention period". FE memory can be expected to achieve a retention period of 10 days or more, preferably 1 year or more, and more preferably 10 years or more at a temperature of 150°C or 200°C.

[0559] Furthermore, FE memory can also be used as cache memory and registers in CPUs, GPUs (Graphics Processing Units), etc. By combining FE memory with CPU cache memory and registers, a normally disabled CPU (NoffCPU, registered trademark) can be achieved. Similarly, by combining FE memory with GPU cache memory and registers, a normally disabled GPU (NoffGPU, registered trademark) can be achieved.

[0560] The structures and methods shown in this embodiment can be appropriately combined with other structures and methods shown in this embodiment or other embodiments.

[0561] (Implementation Method 4) In this embodiment, refer to Figure 32A and Figure 32BAn example of a chip 1200 in which the semiconductor device of the present invention is mounted is described. Multiple circuits (systems) are mounted on the chip 1200. Thus, the technology of integrating multiple circuits (systems) on a single chip is sometimes referred to as a System on Chip (SoC).

[0562] like Figure 32A As shown, the chip 1200 includes a CPU 1211, a GPU 1212, one or more analog computing units 1213, one or more memory controllers 1214, one or more interfaces 1215, one or more network circuits 1216, etc.

[0563] A bump (not shown) is provided on chip 1200, and the bump is as follows: Figure 32B It is connected to the first side of the packaging substrate 1201 as shown. In addition, a plurality of bumps 1202 are provided on the back side of the first side of the packaging substrate 1201, and the bumps 1202 are connected to the mother plate 1203.

[0564] Alternatively, storage devices such as DRAM 1221 and flash memory 1222 can be provided on the motherboard 1203. For example, the DOSRAM shown in the above embodiment can be applied to the DRAM 1221. Furthermore, for example, the NOSRAM shown in the above embodiment can be applied to the flash memory 1222.

[0565] CPU 1211 preferably has multiple CPU cores. Furthermore, GPU 1212 preferably has multiple GPU cores. Additionally, CPU 1211 and GPU 1212 may each have a memory for temporary data storage. Alternatively, a memory shared by both CPU 1211 and GPU 1212 may be provided on chip 1200. The aforementioned NOSRAM or DOSRAM can be used in this memory. Furthermore, GPU 1212 is suitable for parallel computation of multiple data sets, and can be used for image processing or product operations. By incorporating an image processing circuit or product operation circuit using the oxide semiconductor of the present invention as GPU 1212, image processing and product operations can be performed with low power consumption.

[0566] Furthermore, since the CPU1211 and GPU1212 are located on the same chip, the wiring between the CPU1211 and GPU1212 can be shortened, and data transfer from the CPU1211 to the GPU1212, data transfer between the memory of the CPU1211 and GPU1212, and transfer of the operation result from the GPU1212 to the CPU1211 after the operation in the GPU1212 is completed can be performed at high speed.

[0567] The analog arithmetic unit 1213 includes one or both of an A / D (analog-to-digital) conversion circuit and a D / A (digital-to-analog) conversion circuit. Alternatively, the aforementioned product summation circuit may also be provided in the analog arithmetic unit 1213.

[0568] The storage controller 1214 has circuitry that serves as a controller for the DRAM 1221 and circuitry that serves as an interface for the flash memory 1222.

[0569] Interface 1215 has interface circuitry for connecting to external devices such as display devices, speakers, microphones, imaging devices, and controllers. Controllers include mice, keyboards, and game console controllers. As the aforementioned interface, USB (Universal Serial Bus), HDMI (High-Definition Multimedia Interface) (registered trademark), etc., can be used.

[0570] Network circuit 1216 includes network circuits such as LAN (Local Area Network). Additionally, it may include network security circuits.

[0571] The aforementioned circuit (system) can be formed on chip 1200 through the same manufacturing process. Therefore, even if the number of circuits required for chip 1200 increases, no additional manufacturing process is required, and chip 1200 can be manufactured at low cost.

[0572] The motherboard 1203, which includes a package substrate 1201 with a chip 1200 having a GPU 1212, a DRAM 1221, and a flash memory 1222, can be referred to as a GPU module 1204.

[0573] The GPU module 1204 can reduce its size due to the presence of the chip 1200 using SoC technology. Furthermore, the GPU module 1204, with its high image processing capabilities, is suitable for use in portable electronic devices such as smartphones, tablets, laptops, and portable game consoles. Moreover, by utilizing the product-sum operation circuitry of the GPU 1212, methods such as deep neural networks (DNN), convolutional neural networks (CNN), recurrent neural networks (RNN), autoencoders, deep Boltzmann machines (DBM), and deep belief networks (DBN) can be executed. Therefore, the chip 1200 can be used as an AI chip, or the GPU module 1204 can be used as an AI system module.

[0574] The structures, methods, etc. shown in this embodiment can be appropriately combined with other embodiments and other examples described in this specification.

[0575] (Implementation Method 5) In this embodiment, an application example of a semiconductor device using the storage device described in the above embodiment is explained. The storage device described in the above embodiment can be applied to various removable storage devices such as memory cards (e.g., SD cards), USB memory, and SSDs (solid-state drives). Figures 33A to 33E Several structural examples of removable storage devices are illustrated schematically. For example, the semiconductor devices shown in the above embodiments are fabricated into packaged memory chips and used in various storage devices or removable memories.

[0576] Figure 33A This is a schematic diagram of a USB memory. The USB memory 1100 includes a housing 1101, a cover 1102, a USB connector 1103, and a substrate 1104. The substrate 1104 is housed within the housing 1101. For example, a memory chip 1105 and a controller chip 1106 are mounted on the substrate 1104. The storage device or semiconductor device shown in the above embodiment can be assembled onto the memory chip 1105, etc.

[0577] Figure 33B This is a schematic diagram of the SD card's appearance. Figure 33C This is a schematic diagram of the internal structure of an SD card. The SD card 1110 includes a housing 1111, a connector 1112, and a substrate 1113. The substrate 1113 is housed within the housing 1111. For example, a memory chip 1114 and a controller chip 1115 are mounted on the substrate 1113. By also providing the memory chip 1114 on the back side of the substrate 1113, the capacity of the SD card 1110 can be increased. Furthermore, a wireless chip with wireless communication capabilities can also be provided on the substrate 1113. Thus, through wireless communication between the host device and the SD card 1110, data can be read from and written to the memory chip 1114. The storage device or semiconductor device described in the above embodiment can be assembled onto the memory chip 1114, etc.

[0578] Figure 33D This is a schematic diagram of the SSD's appearance. Figure 33E This is a schematic diagram of the internal structure of an SSD. The SSD 1150 includes a housing 1151, a connector 1152, and a substrate 1153. The substrate 1153 is housed within the housing 1151. For example, a memory chip 1154, a memory chip 1155, and a controller chip 1156 are mounted on the substrate 1153. The memory chip 1155 serves as the working memory for the controller chip 1156; for example, a DOSRAM chip can be used. By also providing the memory chip 1154 on the back side of the substrate 1153, the capacity of the SSD 1150 can be increased. The storage device or semiconductor device described in the above embodiment can be assembled onto the memory chip 1154, etc.

[0579] This embodiment can be implemented by appropriately combining the structures described in other embodiments, etc.

[0580] (Implementation Method 6) In this embodiment, a transistor (OS transistor) in which an oxide semiconductor is included in the channel formation region is described. Furthermore, in the description of the OS transistor, a simple comparison is given with a transistor (also known as a Si transistor) in which silicon is included in the channel formation region.

[0581] [OS Transistor] Oxide semiconductors with low carrier concentrations are preferably used in OS transistors. For example, the carrier concentration in the channel formation region of the oxide semiconductor is 1 × 10⁻⁶. 18 cm -3 Below, it is preferred to be less than 1×10 17 cm -3 More preferably, less than 1×10 16 cm -3 Further optimization of less than 1×10 13 cm -3 Furthermore, it is preferred to select those with a density lower than 1×10 10 cm -3 And it is 1×10 -9 cm -3 The above. When aiming to reduce the carrier concentration in an oxide semiconductor film, the impurity concentration in the oxide semiconductor film can be reduced to decrease the defect state density. In this specification, a state with low impurity concentration and low defect state density is referred to as high-purity intrinsic or substantially high-purity intrinsic. Furthermore, oxide semiconductors with low carrier concentrations are sometimes referred to as high-purity intrinsic or substantially high-purity intrinsic oxide semiconductors.

[0582] Because high-purity intrinsic or substantially high-purity intrinsic oxide semiconductors have a low defect state density, they sometimes have a low trapped state density. Furthermore, the charge trapped in the trapped states of oxide semiconductors takes a long time to dissipate, sometimes acting like a fixed charge. Therefore, transistors forming channel formation regions in oxide semiconductors with high trapped state densities sometimes exhibit unstable electrical characteristics.

[0583] Therefore, reducing the impurity concentration in the oxide semiconductor is effective in stabilizing the electrical characteristics of the transistor. To further reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in the adjacent film. Examples of impurities include hydrogen and nitrogen. Note that impurities in an oxide semiconductor refer, for example, to elements other than the main components constituting the oxide semiconductor. For example, elements with a concentration of less than 0.1 atomic percent can be considered impurities.

[0584] In OS transistors, the presence of impurities and oxygen vacancies in the channel formation region of the oxide semiconductor can easily alter electrical characteristics, potentially leading to decreased reliability. Furthermore, in OS transistors, hydrogen can enter oxygen vacancies in the oxide semiconductor, forming defects (sometimes referred to below as V0). O H) may generate electrons that become charge carriers. Additionally, when V is formed in the channel formation region... O At H, the donor concentration in the channel formation region sometimes increases. As the donor concentration in the channel formation region increases, the threshold voltage sometimes becomes uneven. Therefore, when oxygen vacancies are included in the channel formation region of an oxide semiconductor, the transistor exhibits always-on characteristics (the characteristic that current flows through the transistor even without a voltage applied to the gate electrode). Therefore, in the channel formation region of an oxide semiconductor, it is preferable to minimize impurities, oxygen vacancies, and Vt. O H.

[0585] Furthermore, the band gap of the oxide semiconductor is preferably larger than that of silicon (typically 1.1 eV), preferably 2 eV or more, more preferably 2.5 eV or more, and even more preferably 3.0 eV or more. By using an oxide semiconductor with a larger band gap than silicon, the off-state current (also known as Ioff) of the transistor can be reduced.

[0586] For example, in Si transistors, the short-channel effect (also known as SCE) emerges as transistors become miniaturized. Therefore, miniaturization of Si transistors is difficult. One reason for the short-channel effect is the small bandgap of silicon. On the other hand, in OS transistors, oxide semiconductors, which are semiconductor materials with large bandgaps, are used, thus suppressing the short-channel effect. In other words, OS transistors are transistors with no or very little short-channel effect.

[0587] The short-channel effect refers to the decline in electrical characteristics that occurs as transistors are miniaturized (channel length is reduced). Specific examples of the short-channel effect include a decrease in threshold voltage, an increase in subthreshold swing (sometimes referred to as the S-value), and an increase in leakage current. Here, the S-value refers to the change in gate voltage within the subthreshold region where the drain current changes by a one-digit percentage while maintaining a fixed drain voltage.

[0588] Characteristic length is widely used as an indicator of resistance to short-channeling effects. Characteristic length refers to the tortuosity of the potential in the channeling region. The smaller the characteristic length, the more rapidly the potential rises, thus indicating a higher resistance to short-channeling effects.

[0589] OS transistors are accumulation-type transistors, while Si transistors are inversion-type transistors. Therefore, compared to Si transistors, OS transistors have smaller characteristic lengths between the source and channel formation regions, and smaller characteristic lengths between the drain and channel formation regions. Consequently, OS transistors have higher resistance to short-channel effects than Si transistors. In other words, OS transistors are more suitable than Si transistors when it is desirable to manufacture transistors with short channel lengths.

[0590] Even when the carrier concentration in the oxide semiconductor is reduced to the point where the channel formation region is i-typed or substantially i-typed, the conduction band bottom of the channel formation region in a short-channel transistor decreases due to the Conduction-Band-Lowering (CBL) effect. Therefore, the energy difference between the conduction band bottom of the source or drain region and the channel formation region can potentially decrease to above 0.1 eV and below 0.2 eV. Thus, an OS transistor can be considered as having n + / n - / n + Accumulation-type junctionless transistor structure or n + / n - / n + An accumulation-type non-junction transistor structure, wherein the channel formation region is n - Type-n region, source region and drain region are n + Type of area.

[0591] When the above structure is used as an OS transistor, good electrical characteristics can be achieved even with miniaturization or high integration of the semiconductor device. For example, good electrical characteristics can be obtained even when the gate length of the OS transistor is 20 nm or less, 15 nm or less, 10 nm or less, 7 nm or less, or 6 nm or less and 1 nm or more, 3 nm or more, or 5 nm or more. On the other hand, in Si transistors, it is sometimes difficult to achieve a gate length of 20 nm or less or 15 nm or less due to the short-channel effect. Therefore, OS transistors are more suitable for use as transistors with small channel lengths compared to Si transistors. The gate length is the length of the gate electrode in the direction of carrier movement within the channel formation region when the transistor is operating.

[0592] Furthermore, miniaturizing the OS transistor can improve its high-frequency characteristics. Specifically, the transistor's cutoff frequency can be increased. When the gate length of the OS transistor is within the aforementioned range, for example at room temperature, the transistor's cutoff frequency can be 50 GHz or higher, preferably 100 GHz or higher, and more preferably 150 GHz or higher.

[0593] As explained above, OS transistors have advantages over Si transistors, such as lower off-state current and the ability to manufacture transistors with shorter channel lengths.

[0594] The configurations, structures, methods, etc. shown in this embodiment can be appropriately combined with the configurations, structures, methods, etc. shown in other embodiments, etc.

[0595] (Implementation Method 7) In this embodiment, electronic components, electronic devices, mainframe computers, space devices, and data centers (also known as DCs) of the semiconductor devices described in the above embodiments are explained. Electronic components, electronic devices, mainframe computers, space devices, and data centers using one aspect of the present invention are highly effective for achieving high performance, such as low power consumption.

[0596] [Electronic Components] Figure 34A A perspective view of a substrate (circuit board 704) on which electronic components 700 are mounted is shown. Figure 34A The electronic component 700 shown includes a semiconductor device 710 within the mold 711. Figure 34A In this text, a portion of the electronic component 700 is omitted to represent its internal structure. The electronic component 700 includes a connecting pad 712 on the outside of the mold 711. The connecting pad 712 is electrically connected to an electrode pad 713, which is electrically connected to a semiconductor device 710 via a lead 714. The electronic component 700 is mounted, for example, on a printed circuit board 702. By combining multiple such electronic components and electrically connecting them individually on the printed circuit board 702, a circuit board 704 is completed.

[0597] Additionally, the semiconductor device 710 includes a driver circuit layer 715 and a memory layer 716. The memory layer 716 has a structure in which multiple memory cell arrays are stacked. Alternatively, the memory layer 716 may also have a structure with a single layer comprising the memory cell arrays. The structure of the driver circuit layer 715 and the memory layer 716 can be a monolithic stacked structure. In a monolithic stacked structure, the layers can be connected without through-hole electrode technologies such as TSVs (Through Silicon Vias) or bonding technologies such as Cu-Cu direct bonding. When the driver circuit layer 715 and the memory layer 716 are stacked monolithically, for example, a so-called on-chip memory structure, where memory is directly formed on the processor, can be realized. By employing an on-chip memory structure, high-speed operation of the interface between the processor and the memory can be achieved.

[0598] Furthermore, by employing an on-chip memory structure, the size of interconnect wiring can be reduced compared to through-electrode techniques such as TSVs, thus allowing for an increase in the number of pins. Increasing the number of pins enables parallel operation, thereby improving the memory's bandwidth.

[0599] Furthermore, it is preferable to use OS transistors to form multiple memory cell arrays in memory layer 716, stacking these multiple memory cell arrays monolithically. When multiple memory cell arrays are monolithically stacked, either or both of the memory bandwidth and memory access latency can be improved. Bandwidth refers to the amount of data transferred per unit time, and access latency refers to the time between accessing and starting data exchange. When using Si transistors in memory layer 716, implementing a monolithically stacked structure is more difficult compared to using OS transistors. Therefore, in a monolithically stacked structure, OS transistors are superior to Si transistors.

[0600] Alternatively, the semiconductor device 710 may be referred to as a bare die. In this specification, a bare die refers to a chip obtained by forming a circuit pattern on a disk-shaped substrate (also called a wafer) and cutting it into rectangular pieces during the semiconductor chip manufacturing process. Examples of semiconductor materials that can be used for bare dies include silicon (Si), silicon carbide (SiC), and gallium nitride (GaN). For example, a bare die obtained from a silicon substrate (also called a silicon wafer) is sometimes referred to as a silicon wafer.

[0601] then, Figure 34B A perspective view of electronic component 730 is shown. Electronic component 730 is an example of SiP (System-in-Package) or MCM (Multi-Chip Module). In electronic component 730, an interposer 731 is disposed on a package substrate 732 (printed circuit board), and semiconductor devices 735 and multiple semiconductor devices 710 are disposed on the interposer 731.

[0602] Electronic component 730 illustrates an example of using semiconductor device 710 as a high-bandwidth memory (HBM). Furthermore, semiconductor device 735 can be used in integrated circuits such as CPUs (Central Processing Units), GPUs (Graphics Processing Units), or FPGAs (Field Programmable Gate Arrays).

[0603] The packaging substrate 732 can be, for example, a ceramic substrate, a plastic substrate, or a glass epoxy substrate. The through-hole plate 731 can be, for example, a silicon through-hole plate or a resin through-hole plate.

[0604] The through-hole board 731 has multiple wirings and multiple integrated circuits with different spacing between their electrical connection terminals. The multiple wirings are composed of a single layer or multiple layers. Furthermore, the through-hole board 731 has the function of electrically connecting the integrated circuits disposed on the through-hole board 731 to electrodes disposed on the package substrate 732. Therefore, the through-hole board is sometimes also referred to as a "rewiring substrate" or "intermediate substrate". Additionally, sometimes a through electrode is provided in the through-hole board 731, through which the integrated circuits are electrically connected to the package substrate 732. Furthermore, in the case of using a silicon through-hole board, a TSV can also be used as the through electrode.

[0605] In HBM, numerous wirings are required to achieve wide memory bandwidth. Therefore, the mounting board for HBM must be capable of forming fine wirings at high density. Consequently, silicon mounting boards are preferred as mounting boards for HBM.

[0606] Furthermore, in SiP and MCM applications using silicon interposers, reliability degrad...

Claims

1. A semiconductor device comprising: a first laminate; The semiconductor layer under the first stacked body; as well as A second stacked body below the semiconductor layer, The semiconductor layer includes a first region, a second region and a third region arranged in a manner of sandwiching the first region. The first stacked body and the second stacked body are symmetrically arranged with respect to the first region. The first stacked body includes a first insulator and a second insulator on the first insulator, The second stacked body includes a third insulator and a fourth insulator under the third insulator, The second insulator is less permeable to hydrogen than the first insulator, The fourth insulator is less susceptible to hydrogen permeation than the third insulator, The first insulator and the third insulator both contain silicon and oxygen, Furthermore, the second insulator and the fourth insulator both contain silicon and nitrogen.

2. The semiconductor device according to claim 1, The third insulator is in the shape of an island. And in the cross section, the side end of the third insulator is consistent with the side end of the semiconductor layer.

3. The semiconductor device according to claim 1, The first stacked body further includes a fifth insulator under the first insulator, The second laminate further includes a sixth insulator on the third insulator, The fifth insulator is less susceptible to oxygen permeation than the first insulator, The sixth insulator is less susceptible to oxygen permeation than the second insulator, Furthermore, the fifth insulator and the sixth insulator both contain aluminum.

4. The semiconductor device according to claim 3, wherein the third insulator and the sixth insulator have a stacked structure, The stacked structure is island-shaped. And in the cross section, the side end of the stacked structure is consistent with the side end of the semiconductor layer.

5. A semiconductor device comprising: a first laminate; The semiconductor layer under the first stacked body; as well as A second stacked body below the semiconductor layer, The semiconductor layer includes a first region, a second region and a third region arranged in a manner of sandwiching the first region. The first stacked body and the second stacked body are symmetrically arranged with respect to the first region. The first stacked body includes a first insulator, a second insulator on the first insulator, and a third insulator on the second insulator. The second stacked body includes a first metal oxide, a fourth insulator under the first metal oxide, and a fifth insulator under the fourth insulator, The first insulator is less susceptible to oxygen permeation than the second insulator, The third insulator is less permeable to hydrogen than the second insulator, The first metal oxide is less susceptible to oxygen permeation than the fourth insulator, The fifth insulator is less susceptible to hydrogen permeation than the fourth insulator, The first insulator and the first metal oxide both contain at least one of gallium and aluminum, The second insulator and the fourth insulator both contain silicon and oxygen, Furthermore, the third insulator and the fifth insulator both contain silicon and nitrogen.

6. The semiconductor device according to claim 5, wherein the semiconductor layer comprises a second metal oxide, The first metal oxide and the second metal oxide both contain indium, And the atomic number ratio of at least one of gallium and aluminum to indium in the first metal oxide is greater than the atomic number ratio of at least one of gallium and aluminum to indium in the second metal oxide.

7. The semiconductor device according to claim 5, further comprising a sixth insulator between the fourth insulator and the fifth insulator, The sixth insulator has the function of capturing or fixing hydrogen.

8. The semiconductor device according to claim 7, further comprising a seventh insulator between the second insulator and the third insulator, The seventh insulator has the function of capturing or fixing hydrogen.

9. The semiconductor device according to any one of claims 1 to 8, further comprising a first conductor and a second conductor, The first conductor is located above the first stacked body, And the second conductor is located below the second stacked body.

10. The semiconductor device according to claim 9, further comprising a third conductor and a fourth conductor, wherein the second region overlaps with the third conductor, And the third region overlaps with the fourth electrical conductor.

11. A storage device, comprising: The semiconductor device according to claim 10; as well as Capacitors, Wherein, the capacitor is a ferroelectric capacitor.

Images