Solder resist windowing exposed line inspection method and device, intelligent terminal and storage medium

By writing programs in the Cadence Skill environment, automatically traversing and checking the solder-resistant window position on the PCB board, the problems of low efficiency and insufficient accuracy of manpower inspection in the prior art are solved, and more efficient and accurate inspection results are achieved.

CN119416724APending Publication Date: 2025-02-11SICHUAN COOLBY COMM EQUIP CO LTD
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Patent Information

Application Number
CN202411565078.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-05
Publication Date
2025-02-11

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Abstract

The invention discloses a solder resist windowing exposed line inspection method and device, an intelligent terminal and a storage medium. The method comprises the following steps: putting a PCB (Printed Circuit Board) needing to be inspected into a specified inspection station; a pre-written Skill program is controlled to be started to traverse the PCB needing to be checked, and all solder resist windows on the PCB are traversed; judging whether wires, copper sheets and / or via holes at all the solder resist windows on the PCB fall into the solder resist windows or not; and when it is detected that the wiring, the copper sheet and / or the via hole on the PCB cannot correctly fall into the defined solder resist window, recording coordinates, and generating and outputting a violation item report. The working efficiency and accuracy are greatly improved, and the design quality can be improved.
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Description

Technical Field

[0001] The present invention relates to the field of PCB board detection, and in particular to a method, device, intelligent terminal and storage medium for inspecting solder mask window exposure based on Cadence Skill. Background Art

[0002] In the design process of high-speed PCBs such as mobile phones and tablets, due to the small size of PCBs and compact layout, patches will be inaccurately positioned or offset. In order to facilitate SMT patches (surface mount technology), solder mask silk screens will be designed on the PCB to accurately position the patches. While this brings convenience, it also brings certain risks. The position of the non-ground network solder mask opening will contact the metal material outside the board, which will cause a short circuit in the PCB. Therefore, a lot of time is required to check whether the signal line is exposed at the solder mask opening.

[0003] In the prior art, engineers manually check whether all solder mask openings on the PCB are exposed. Disadvantages of the prior art: manual inspection inevitably leads to negligence, and it is impossible to ensure whether there are any omissions, and the efficiency of manual inspection is low.

[0004] Therefore, the existing technology still needs to be improved and developed. Summary of the invention

[0005] The technical problem to be solved by the present invention is that, in view of the above-mentioned defects of the prior art, a method, device, intelligent terminal and storage medium for inspecting solder mask openings and exposed wires based on Cadence Skill are provided. The present invention greatly improves work efficiency and accuracy, and is conducive to improving design quality.

[0006] The technical solution adopted by the present invention to solve the problem is as follows:

[0007] A solder mask window exposure inspection method based on Cadence Skill, comprising:

[0008] Place the PCB board to be inspected into the designated inspection station;

[0009] Controlling and starting a pre-written Skill program to traverse the PCB board to be inspected, and traverse all solder mask openings on the PCB board;

[0010] Determine whether all traces, copper sheets and / or vias at the solder mask openings on the PCB board fall within the solder mask openings;

[0011] When it is detected that the traces, copper sheets and / or vias on the PCB board fail to fall correctly within the defined solder mask openings, the coordinates are recorded and a violation report output is generated.

[0012] The solder mask window exposure inspection method based on Cadence Skill, wherein the pre-written Skill program includes:

[0013] The cadence skill language is used for programming in advance, and it is used to traverse all the solder mask opening positions on the PCB and record the coordinates of the exposed wire positions; the cadence skill method is used to complete the solder mask opening and exposed wire inspection. The main idea of ​​the skill program is to traverse the inspection and collect reports.

[0014] The method for inspecting exposed wires at solder mask openings based on Cadence Skill, wherein the step of determining whether all traces, copper foils and / or vias at solder mask openings on the PCB board fall within the solder mask openings comprises:

[0015] Determine whether the non-ground trace on the PCB board falls within the solder mask opening;

[0016] Determine whether the non-grounded copper sheet on the PCB board falls within the solder mask opening;

[0017] It is determined whether the non-ground via on the PCB board falls within the solder mask opening.

[0018] The solder mask window exposed wire inspection method based on Cadence Skill, wherein when it is detected that the traces, copper foil and / or vias on the PCB board fail to fall correctly within the defined solder mask window, the coordinates are recorded and a violation report output is generated, including:

[0019] When it is detected that the traces at all solder mask openings on the PCB board fail to fall correctly within the defined solder mask openings,

[0020] and / or

[0021] When it is detected that copper foil falls into the solder mask openings at all solder mask openings on the PCB board and fails to fall into the defined solder mask openings correctly,

[0022] and / or

[0023] When it is detected that all the solder mask openings on the PCB board have vias that fall within the solder mask openings but fail to fall correctly within the defined solder mask openings,

[0024] The coordinates of the exposed wire location are recorded and a violation report output is generated.

[0025] The solder mask opening and exposed wire inspection method based on Cadence Skill, wherein the control starts a pre-written Skill program to traverse the PCB board to be inspected, and the step of traversing all solder mask openings on the PCB board also includes:

[0026] The control starts a pre-written Excel programming language to traverse the PCB board that needs to be checked, and traverses all the solder mask openings on the PCB board.

[0027] The solder mask window exposed wire inspection method based on Cadence Skill, wherein when it is detected that the traces, copper foil and / or vias on the PCB board fail to fall correctly within the defined solder mask window, the coordinates are recorded and a violation report output is generated, which includes:

[0028] According to the coordinate positions recorded in the generated violation report, the non-compliant parts of the PCB board to be inspected are repaired.

[0029] The solder mask window exposed wire inspection method based on Cadence Skill, wherein the step of repairing the non-compliant parts of the PCB board to be inspected according to the coordinate positions recorded in the generated violation report also includes:

[0030] The repaired PCB board is re-used with the pre-written Skill program to check the solder mask openings and exposed wires, traverse all the solder mask opening positions on the PCB, record the coordinates of the exposed wire positions, and output a report.

[0031] A solder mask window exposure inspection device based on Cadence Skill, wherein the device comprises:

[0032] The pre-set module is used to pre-program using the cadence skill language, and is written to traverse all solder mask opening positions on the PCB and record the coordinates of the exposed wire positions; the cadence skill method is used to complete the solder mask opening and exposed wire inspection. The main idea of ​​the skill program is to traverse the inspection and collect reports;

[0033] The station inspection module is used to place the PCB board to be inspected into the designated inspection station;

[0034] A traversal module is used to control the start of a pre-written Skill program to traverse the PCB board to be inspected, and traverse all solder mask openings on the PCB board;

[0035] A judgment module, used to judge whether all traces, copper sheets and / or vias at the solder mask openings on the PCB board fall within the solder mask openings;

[0036] The recording and report generation module is used to record the coordinates and generate a violation report output when it is detected that the routing, copper and / or via on the PCB board fail to fall correctly within the defined solder mask opening window.

[0037] An intelligent terminal includes a memory and one or more programs, wherein the one or more programs are stored in the memory and are configured to be executed by one or more processors, including the method for executing any one of the methods described above.

[0038] A computer-readable storage medium, wherein when instructions in the storage medium are executed by a processor of an electronic device, the electronic device is enabled to execute any one of the methods described above.

[0039] Beneficial effects of the present invention: The present invention provides a method, device, intelligent terminal and storage medium for inspecting solder mask openings and exposed wires based on Cadence Skill. The Skill written by the present invention can traverse all solder mask openings on a PCB, and then determine whether the wiring, copper foil and vias at the solder mask openings are non-ground networks, and collect and report the violations for engineers to modify. The present invention is programmed using the cadence skill language, and can quickly traverse all solder mask opening positions on a PCB, record the coordinates of the exposed wire positions, and output a report, which greatly improves work efficiency and accuracy, and is conducive to improving design quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0041] Figure 1 It is a flow chart of the solder mask window exposed line inspection method based on Cadence Skill provided in Example 1 of the present invention.

[0042] Figure 2 It is a flow chart of a solder mask window exposed line inspection method based on Cadence Skill provided in specific application example 2 of the present invention.

[0043] Figure 3 It is a principle block diagram of a solder mask window exposed wire inspection device based on Cadence Skill provided in an embodiment of the present invention.

[0044] Figure 4 It is a block diagram of the internal structure principle of the intelligent terminal provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0045] In order to make the purpose, technical solution and advantages of the present invention clearer and more specific, the present invention is further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0046] It should be noted that if the embodiments of the present invention involve directional indications (such as up, down, left, right, front, back, etc.), the directional indications are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0047] In the prior art, engineers manually check whether all solder mask openings on the PCB are exposed. The disadvantages of the prior art are: manual inspection will inevitably lead to negligence, and it is impossible to ensure whether there are any omissions, and the efficiency of manual inspection is low.

[0048] The present invention provides a method for inspecting solder mask window exposure lines based on Cadence Skill.

[0049] Wherein, based on Cadence Skill: means that the present invention is implemented in the design environment of Cadence (an electronic design automation software) using Skill programming language. Skill is a language specially developed for Cadence tools, allowing users to customize and expand the functions of Cadence software.

[0050] About solder mask opening, solder mask is a protective layer used on circuit boards, which can prevent short circuits and other electrical problems on solder joints. Opening refers to the area on the solder mask layer that is intentionally left without solder mask material to facilitate soldering or other operations.

[0051] The wire exposure inspection refers to the inspection of exposed wires or other important components on the circuit board during the manufacturing process to ensure that they are not covered by the solder mask and meet the design requirements. This inspection is usually to ensure the smooth progress of the subsequent welding process and prevent electrical connectivity problems or short circuit problems caused by solder mask coverage.

[0052] The present invention is a technical means implemented by Skill language in Cadence design environment to check whether the solder mask opening area on the circuit board is normal, whether the wire is exposed and complies with the design rules. This inspection is very important to ensure the reliability of circuit board manufacturing and function.

[0053] Cadence software (an electronic design automation software) has a built-in Skill language (a programming language) based on C language and LISP language. It has rich interactive functions to help users with secondary development. Using the skill language to write tools and put them into use can greatly improve work efficiency.

[0054] The present invention adopts cadence skill language programming to quickly traverse all solder mask window positions on the PCB, record the coordinates of the exposed wire positions, and output a report, which greatly improves work efficiency and accuracy and is conducive to improving design quality.

[0055] Skill programs are codes written in Cadence's Skill programming language, which are mainly used to automate tasks in electronic design automation (EDA) tools. The Skill language allows users to customize, extend and automate Cadence tools to achieve specific functions and operations.

[0056] Exemplary Methods

[0057] like Figure 1 As shown, a method for inspecting solder mask window exposure lines based on Cadence Skill in Embodiment 1 of the present invention includes the following steps:

[0058] Step S100, placing the PCB board to be inspected into a designated inspection station;

[0059] When the present invention is implemented, the PCB board to be inspected will be placed in a designated inspection station. Specifically, this step involves the arrangement of physical operations and workflows. The following is a detailed explanation of this step:

[0060] About preparing the inspection station: Before inspecting the PCB, you need to ensure that the inspection station (usually a dedicated operating table or testing equipment) is ready. The inspection station may be equipped with the necessary tools, equipment and software to facilitate the subsequent inspection process.

[0061] The present invention also performs classification management, for example, different inspection stations may need to be set for different types of PCBs (such as functions, sizes, materials, etc.). This step emphasizes that the PCB should be inspected at an appropriate station to ensure the suitability of the inspection conditions.

[0062] The PCB to be inspected is then carefully placed into the designated workstation. This action involves: ensuring that the PCB is not mechanically damaged when placed; ensuring that the contact points or test terminals of the PCB can have a good connection with the inspection equipment.

[0063] Then, the pre-inspection preparation is carried out: that is, once the PCB is placed in place, the technician needs to do some pre-inspection to ensure that the connection between the PCB and the inspection equipment is normal and the required test procedures are ready. The placement time of the PCB and related information can also be recorded for subsequent tracking and data management.

[0064] The benefit of this step is that placing the PCB in a designated station can effectively manage the workflow and improve the systematicness of the operation. It reduces errors or omissions caused by a chaotic environment. And dedicated inspection stations are usually designed to meet safety standards to protect operators and the PCB itself from static electricity, contamination or other potential damage. And by placing the PCB in a dedicated inspection station, related equipment can be prepared in parallel, reducing waiting time, thereby improving overall inspection efficiency.

[0065] Before the specific implementation of the present invention, it is necessary to use the cadence skill language to program in advance, and write a program for traversing all the solder mask window positions on the PCB and recording the coordinates of the exposed line positions; the cadence skill method is used to complete the solder mask window exposed line inspection, and the main idea of ​​the skill program is to traverse the inspection and collect reports.

[0066] That is, in the process of PCB (printed circuit board) design, the present invention uses Cadence Skill language to automatically perform solder mask window exposure inspection.

[0067] Regarding the preset programming requirements in the present invention, before actually performing the inspection, the developer needs to write a Skill program. The purpose of this program is to traverse all solder mask window positions, which means that each window part of the PCB design is automatically accessed through the program and its status is recorded. The Skill program will loop through the design data of the PCB to find the positions of all solder mask windows. These windows are usually uncovered areas on the solder mask layer in order to ensure contact during welding. For each window position, the program will check whether there are any circuit wires (or pins) exposed and record the coordinates of these wires. This process involves comparing the design rules to ensure that the exposed wire position meets the expected design standards.

[0068] The present invention can improve the work efficiency of PCB board detection through the pre-written Skill program, and can also ensure the correctness of the design, thereby reducing potential production problems caused by human errors.

[0069] Step S200, controlling and starting a pre-written Skill program to traverse the PCB board to be inspected, and traverse all solder mask openings on the PCB board;

[0070] In the present invention, when a PCB board to be inspected is placed in a designated inspection station, a pre-written Skill program is controlled to start to traverse the PCB board to be inspected, and all solder mask openings on the PCB board are traversed.

[0071] This step mainly involves the systematic inspection part through automated procedures during the PCB inspection process.

[0072] Specifically, in the present invention, once the PCB board is correctly placed at the inspection station, a control signal can be sent to start the pre-written Skill program. This step ensures the automation and accuracy of the inspection process and reduces the intervention of manual operation.

[0073] Then, according to the control signal sent, the pre-written Skill program is controlled to run, wherein the pre-written Skill program is a script specially designed for the Cadence environment of the present invention, which can perform complex circuit board data traversal and analysis. In this step, the program will be activated and enter the running state.

[0074] In the embodiment of the present invention, when the Skill program is started, the design data of the PCB board is traversed. This includes accessing all the solder mask opening positions on the PCB - these are open areas in the design, the purpose of which is to provide a conductive path for welding. The pre-written Skill program of the present invention checks the position of each opening one by one according to the design rules.

[0075] In the process of traversing the PCB board, the pre-written Skill program will analyze the status of each window in real time and generate test results. If a problem is found (for example, the window is not properly covered according to the design requirements), the program will record it and may feed back to the operator for subsequent processing.

[0076] In the present invention, the use of program-controlled traversal operations significantly reduces the need for manual inspection, thereby improving work efficiency and reducing human errors. In addition, the Skill program can systematically inspect all solder mask openings, and this comprehensiveness ensures that every aspect of the design can be verified, improving quality control.

[0077] For example, in the present invention, when it is detected that the PCB board is placed in the inspection station and is ready to be analyzed for the solder mask opening, the pre-written Skill program is automatically started according to the setting of the control system and begins to traverse the design data of the PCB. In this process, the Skill program accesses each solder mask opening to check whether each opening meets the design standards, such as whether the opening area, shape and position are correct. The program finds that a certain opening (for example, at position (200, 300)) fails to cover the correct wire. Through such an automated inspection step, the entire PCB review process becomes efficient and reliable, and many potential problems can be identified and resolved before production, ensuring the quality of the final product.

[0078] Step S300, determining whether all traces, copper sheets and / or vias at the solder mask openings on the PCB board fall within the solder mask openings;

[0079] This step is an important part of checking the quality of PCB design, including the following aspects:

[0080] 1) Define the inspection object: In this step, the present invention needs to focus on the solder mask opening on the PCB board. In circuit board design, the solder mask opening is to ensure that specific conductive areas (such as pads and wires) can be exposed for soldering. In this step embodiment, the position relationship between the window position and the circuit routing, copper foil, and vias is checked.

[0081] 2) Regarding the inspection logic: The judgment work of the present invention will use the calculation function of the design software to automatically analyze the coordinates of each solder mask opening and compare them with the positioning of the corresponding traces, copper foils and vias. Specifically, the Skill program of the present invention will verify the following items:

[0082] Whether the traces (signal lines) are completely within the range of each solder mask opening;

[0083] B. Whether the copper sheet (such as ground and power layers) is covered by solder mask;

[0084] C. Check whether the vias (through holes connecting different layers) are within the window positions to ensure that they can be connected normally.

[0085] In the embodiment of the present invention, once the detection is completed, the system can generate a report in the subsequent steps, listing in detail the locations of any deviations or violations of the routing, copper foil and vias, and giving the designer necessary improvement suggestions.

[0086] In this step embodiment, by confirming that the wiring, copper foil and vias are located within the solder mask opening, the risk of welding failure can be effectively reduced. This is a key step to ensure the reliability of the circuit board during subsequent production and use. And timely discovery of problems during the PCB design stage can avoid the need for rework during production or assembly, thereby saving time and cost and improving manufacturing efficiency. And the present invention ensures that the design meets engineering standards and industry specifications through systematic inspection, ensuring that the final product can meet the quality requirements of users.

[0087] For example, when designing a PCB for a complex communication device, engineers define multiple solder mask openings to accommodate various connections and component mounting. Here is a specific example of this step:

[0088] Design check: You can use CAD software to layout the signal lines, copper foil and vias according to the design requirements. Then input the design data into the check program, and the program will start to analyze all solder mask openings and determine whether the corresponding traces, copper foil and vias fall within the opening range.

[0089] This step not only effectively ensures the reliability of PCB design and process compliance, but also improves the efficiency of the production process, thus laying a solid foundation for the high quality of the final product.

[0090] In a further embodiment of the present invention, step S300 specifically includes:

[0091] S301, determining whether the non-ground trace on the PCB board falls within the solder mask opening;

[0092] Regarding the definition of non-grounded wiring in the present invention, non-grounded wiring refers to signal lines that are not directly connected to ground level signals. These lines are usually used to transmit various electrical signals to ensure the normal function of the circuit.

[0093] In the embodiment of the present invention, judging whether these non-grounded traces are all within the solder mask window range helps to avoid short circuits or other electrical faults during the welding process and ensure welding quality.

[0094] In the embodiment of the present invention, a pre-written Skill program is used to automatically perform positioning analysis on each non-grounded trace to ensure that it is completely within the corresponding solder mask opening. This facilitates marking a trace as unqualified if it is found that a trace exceeds the window range in the subsequent steps.

[0095] S302, determining whether the non-grounded copper sheet on the PCB falls within the solder mask opening;

[0096] The definition of non-grounded copper in this step refers to copper foil or conductive areas that are not connected to the ground layer of the circuit board. These copper foils may be used to provide power, current distribution or other signal functions.

[0097] In this step, ensure that the non-grounded copper is exposed to the welding area, which helps to improve electrical conductivity and welding performance and prevents it from being covered by solder mask during welding.

[0098] This step automatically checks and evaluates the location of all non-grounded copper skins through a pre-written Skill program to ensure that they fall within the defined solder mask opening. Any copper skin that does not fall within the specified opening will be marked as a design defect for further correction.

[0099] S303, determining whether the non-ground via on the PCB board falls within the solder mask opening.

[0100] The definition of non-ground vias in this step refers to electrical through-holes used to connect different layers. They are not connected to the ground layer of the PCB and are usually used to achieve interconnection between different signal layers.

[0101] In the embodiment of this step, ensuring that all non-ground vias are located within the solder mask opening helps maintain good electrical connection and prevents connection failure due to improper via position during subsequent soldering.

[0102] In specific implementation, the present invention verifies the coordinates of each non-ground via through a pre-written Skill program to ensure that it is within the corresponding solder mask opening range. If a via is found to be placed outside the solder mask opening, it will be marked as a design problem and feedback will be provided.

[0103] The core goal of the above steps S301-S303 is to ensure that the PCB design meets good manufacturing and welding standards. By determining whether the non-ground traces, copper foil and vias are properly placed in the solder mask opening, electrical faults and welding problems that may occur in actual manufacturing and subsequent use can be effectively avoided. By implementing this series of automatic detection, designers can find problems in time during the design stage, reduce risks on the production line, and improve the reliability of the final product.

[0104] Step S400: When it is detected that traces, copper sheets and / or vias on the PCB board fail to fall correctly within the defined solder mask openings, the coordinates are recorded and a violation report output is generated.

[0105] Among them, solder mask opening refers to the area on the PCB (printed circuit board) that is intentionally left uncovered by the solder mask layer. These openings are mainly used to ensure that certain areas can be soldered, such as the pins of electronic components, vias, and the routing of electrical signals. By designing a reasonable opening position, it can be ensured that the solder can flow smoothly into the component pins or via areas during soldering, thereby improving the quality and reliability of soldering.

[0106] The goal of this step embodiment is to confirm whether all traces, copper foils and vias in the solder mask openings in the PCB design are legal and completely within the solderable area.

[0107] When the routing, copper and via positions within the solder mask opening are confirmed to be correct by the pre-written Skill program of the present invention, these legal component coordinates will be automatically recorded for future reference or further review. The present invention will generate detailed design documents with this information to verify the compliance of the design.

[0108] Specifically, if any non-compliant phenomenon is found during the scanning process (such as the routing or via not falling correctly within the solder mask opening), the present invention will generate a violation report that lists all problematic components and their specific locations in detail. This report is crucial for designers to further modify and optimize the design.

[0109] Specifically, the present invention can use a pre-written Skill program to scan the entire PCB design, determine the positions of all traces, copper foils and vias, compare them with the pre-defined solder mask opening area, and identify the positions that do not meet the requirements.

[0110] For each element that fails to fall within the solder mask opening, the present invention will accurately record its coordinates, which are usually expressed in an XY plane for subsequent search and correction.

[0111] All violations found are consolidated into a single report that details the coordinates, type (such as trace, copper or via) and severity of each violation, helping designers quickly identify and resolve issues.

[0112] The benefits of this step are: 1) It can improve design accuracy: by quickly identifying and recording problems, designers can correct errors in a timely manner to ensure that the design meets manufacturing standards. This accuracy can greatly reduce the need for later revisions.

[0113] 2) It can reduce manufacturing costs: Early detection and correction of design problems can prevent higher manufacturing costs caused by design errors, including reprocessing and material waste.

[0114] 3) It can speed up the time to market: - By reducing the subsequent revision and problem solving process, the product can be produced and launched faster, giving the company an advantage over the competition.

[0115] 4) It can enhance reliability: ensuring that the traces, copper foil and vias fall within the appropriate solder mask openings can help improve the functional reliability of the PCB and reduce the risk of failures caused by problems such as electrical short circuits.

[0116] For example, when designing a PCB for an electronic product, the designer has set multiple solder mask openings to ensure signal connection and soldering characteristics. During the design review phase, the pre-written Skill program detection tool found that:

[0117] A signal trace is outside the edge of the solder mask window (coordinates are X=120mm, Y=75mm).

[0118] A piece of copper area is not within the solder mask opening and intersects with other signal networks (coordinates are X=135mm, Y=85mm).

[0119] The embodiment of the present invention will immediately record these coordinates and generate a violation report, which includes the following contents:

[0120] Violation 1:

[0121] Type: Tracking - Coordinates: X = 120mm, Y = 75mm - Problem: Failed to fall correctly within the solder mask opening - Violation 2:

[0122] Type: Copper skin - Coordinates: X = 135mm, Y = 85mm - Problem: Crossed with other signal networks and not within the solder mask opening. Designers will make quick corrections based on this information and re-layout the design elements to ensure that they meet the standards for PCB manufacturing. Through such instant feedback and records, the entire design and manufacturing process becomes more efficient and accurate, thereby fully ensuring the final quality of the product.

[0123] In a further embodiment, the step S400 specifically includes:

[0124] S401, when it is detected that the traces at all the solder mask openings on the PCB board fail to fall correctly within the defined solder mask openings;

[0125] In this step, if it is detected that the routing is not in the defined window area, the system will record the location coordinates of the routing for subsequent adjustment and correction.

[0126] And / or S402, when it is detected that copper foil falls into the solder mask openings at all the solder mask openings on the PCB board but fails to fall into the defined solder mask openings correctly;

[0127] In this step, if it is detected that the position of the copper foil does not meet the design requirements (for example, it may hinder the normal welding process), the system will also record the coordinates of the copper foil.

[0128] and / or S403, when it is detected that all the solder mask openings on the PCB have vias that fall within the solder mask openings but fail to fall correctly within the defined solder mask openings,

[0129] Check all solder mask openings to see if there are vias that fall within the openings but are in the wrong position. The coordinates of vias that do not meet the specifications will also be recorded for easy correction.

[0130] S403, record the coordinates of the exposed wire position and generate a violation report output.

[0131] After any of the above tests find problems, the present invention will record all unqualified elements and generate a detailed violation report. This report will include the coordinates and types of all problems found to guide designers to make corrections.

[0132] It can be seen that the present invention can ensure that all design elements meet manufacturing requirements through systematic detection, thereby improving the solderability and electrical performance of the PCB. And early identification of problems can reduce the risk of failure in the PCB production and assembly stages, reduce the possibility of errors, and ensure the quality of the final product. And through automated detection and report generation, the time for manual review is reduced and the overall work efficiency is improved. At the same time, by discovering problems in advance, the waste of time and expenses in the production process can be avoided. And the generated detailed report can be used as a communication tool to help the design team, test team and production team better understand and collaborate, quickly find the root cause of the problem and make adjustments.

[0133] For example, during the design review of a mobile phone circuit board, the Skill program pre-written by the present invention detects:

[0134] Routing inspection (S401): The inspection results show that a key signal routing is at the edge of the solder mask opening, which may lead to poor subsequent welding. The coordinates are X=50mm, Y=100mm.

[0135] Copper sheet inspection (S402): A piece of copper sheet prepared for a welding point is not accurately exposed in the opening because it is covered by solder mask. The coordinates are X=70mm, Y=130mm.

[0136] Via inspection (S403): Although a certain via is within the window, it overlaps with other traces and affects signal transmission. The coordinates are X=80mm, Y=150mm.

[0137] Based on these detection results, the present invention records the three obstacles and generates a violation report, which lists the coordinates and properties of each problem in detail. This allows the design team to quickly take action based on the report and update the design to ensure that the location of each routing and component meets the requirements. This preventive strategy not only optimizes the design process, but also improves the quality and reliability of the final product.

[0138] In a further embodiment, after step S400, the following steps are further included:

[0139] S500: Repair the non-compliant parts of the PCB board to be inspected according to the coordinate positions recorded in the generated violation report.

[0140] In a further embodiment of the present invention, in the PCB design review process, the violation report generated not only lists the potential problems, but also specifically marks the coordinates of each non-compliant position. The present invention also repairs the non-compliant parts on the PCB board based on these coordinate positions, and the specific steps are as follows:

[0141] Analyze violation reports: Based on the generated violation reports, identify each non-compliance and its possible impact. For example, the report may point out the location of solder mask openings, the layout of traces, or other component installation issues.

[0142] Locate non-compliant areas: Each flagged non-compliant point is pinpointed using the coordinates provided in the report. These coordinates provide a clear reference, making problem areas easy to identify.

[0143] Remediation steps: For each non-compliant location, appropriate remediation actions will be implemented. This may include:

[0144] Routing adjustment: Redesign the routing to meet the requirements of solder mask openings and ensure that the routing is positioned to avoid affecting signal characteristics.

[0145] Component Relayout: If the placement of a component is critical and does not conform to the specifications, the component needs to be moved to optimize its spacing with other components.

[0146] Solder mask opening adjustment: In some cases, it may be necessary to modify the shape or position of the solder mask opening to ensure the best fit for components or traces.

[0147] Save and Verify: After completing all fixes, save the updated design file and review it again using the Design Rule Check (DRC) feature to ensure that all issues have been effectively addressed.

[0148] The present invention can ensure that the PCB design meets production requirements by systematically identifying and correcting non-compliant items, thereby improving the overall component function and reliability. Early repairs can significantly reduce the risk of failures during the manufacturing and assembly stages, avoiding product rework and delays caused by design problems. Solving problems early in the design stage can effectively save time and material costs required for later modifications, making the overall project more efficient.

[0149] For example, during the review process for a new drone PCB design, the design team received a violation report that flagged the following non-compliance:

[0150] Coordinates (X=40mm, Y=90mm): If a trace fails to fall within the set solder mask window, signal interference may occur.

[0151] Coordinates (X=50mm, Y=110mm): The contact points of an integrated circuit (IC) are covered by solder mask, which may affect the soldering effect.

[0152] Coordinates (X=60mm, Y=130mm): The position of a component does not meet the design standards and the spacing between it and the surrounding components is too small.

[0153] The pre-written Skill program can perform repair work according to these coordinates in sequence:

[0154] Routing adjustment: Redesign the routing path so that it is completely within the solder mask opening to optimize its layout.

[0155] IC position optimization: Move the position of the integrated circuit to ensure that the pads are fully exposed outside the opening to facilitate soldering.

[0156] Component spacing adjustment: Adjust the component layout to ensure that the spacing between them meets the design requirements and reduce the risk of short circuits caused by being too close.

[0157] In a further embodiment, the step S500 further includes:

[0158] S600, re-use the pre-written Skill program to check the solder mask opening and exposed wires on the repaired PCB board, traverse all the solder mask opening positions on the PCB, record the coordinates of the exposed wire positions, and output a report.

[0159] After completing all the repairs, the design team once again used the pre-written Skill program to check and confirm that all the problems had been fixed, as shown in step S600. This not only improved the reliability of the drone PCB, but also provided a good foundation for production. Through this repair process, the team demonstrated its ability to cope with complex designs while ensuring the high quality and reliability of the final product.

[0160] Of course, in another embodiment of the present invention, the Excel programming language may also be used to write a PCB inspection program, and the inspection principle is similar to the inspection using the Skill program of the present invention: the control starts the pre-written Excel programming language to traverse the PCB board to be inspected, and traverses all the solder mask openings on the PCB board, which can also achieve the same effect.

[0161] The present invention is further described in detail below through a specific application example:

[0162] like Figure 2 As shown, the present specific application embodiment provides a method for inspecting solder mask openings and exposed wires based on Cadence Skill, which includes the following steps during implementation:

[0163] S11: Run the skill program;

[0164] Place the PCB board to be inspected into the designated inspection station and run the pre-written Skill program;

[0165] S12: traverse all copper exposed windows on the PCB board;

[0166] S13: Determine whether the non-ground trace on the PCB board falls within the defined solder mask opening window;

[0167] and / or, determining whether the non-grounded copper sheet on the PCB board falls within a defined solder mask opening;

[0168] and / or, determining whether the non-ground via on the PCB board falls within a defined solder mask opening;

[0169] S14. When it is detected that the traces, copper sheets and / or vias on the PCB board fail to fall correctly within the defined solder mask opening, the coordinates are recorded, and the violation items detected above are returned to generate a violation report output.

[0170] It can be seen that the Skill written by the present invention can traverse all solder mask openings on the PCB, and then determine whether the wiring, copper foil, and vias at the solder mask openings are non-ground networks, collect and report the violations for engineers to modify. The key point of the present invention is that the cadence skill method is used to complete the solder mask window exposed wire inspection. The main idea of ​​the skill program is to traverse the inspection and collect reports. The present invention uses the cadence skill language programming to quickly traverse all solder mask window positions on the PCB, record the coordinates of the exposed wire position, and output a report, which greatly improves work efficiency and accuracy, and is conducive to improving design quality.

[0171] Exemplary Devices

[0172] like Figure 3 As shown in the embodiment of the present invention, a solder mask window exposure inspection device based on Cadence Skill is provided, and the device includes:

[0173] The pre-setting module 310 is used to pre-program using the cadence skill language, and is written to traverse all solder mask opening positions on the PCB and record the coordinates of the exposed wire positions; the cadence skill method is used to complete the solder mask opening and exposed wire inspection, and the main idea of ​​the skill program is to traverse the inspection and collect reports;

[0174] The station inspection module 320 is used to place the PCB board to be inspected into a designated inspection station;

[0175] The traversal module 330 is used to control the start of a pre-written Skill program to traverse the PCB board to be inspected, and traverse all solder mask openings on the PCB board;

[0176] A judgment module 340 is used to judge whether all traces, copper sheets and / or vias at the solder resist openings on the PCB board fall within the solder resist openings;

[0177] The recording and report generation module 350 is used to record the coordinates and generate a violation report output when it is detected that the traces, copper sheets and / or vias on the PCB board fail to fall correctly within the defined solder mask openings, as described above.

[0178] Based on the above embodiments, the present invention further provides an intelligent terminal, whose principle block diagram can be shown as follows: Figure 4 As shown. The intelligent terminal can be an intelligent device, including a processor, a memory, a network interface, a display screen, and a database connected through a system bus. Among them, the processor of the intelligent terminal is used to provide computing and control capabilities. The memory of the intelligent terminal includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the intelligent terminal is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a method for inspecting solder mask openings and exposed lines based on Cadence Skill is implemented. The database of the intelligent terminal is used to store a solder mask opening and exposed line inspection program based on Cadence Skill.

[0179] Those skilled in the art will understand that Figure 4The principle block diagram shown in the figure is only a block diagram of a partial structure related to the scheme of the present invention, and does not constitute a limitation on the smart terminal to which the scheme of the present invention is applied. The specific smart terminal may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0180] In one embodiment, a smart terminal is provided, comprising a memory and one or more programs, wherein the one or more programs are stored in the memory and are configured to be executed by one or more processors, and the one or more programs include instructions for performing the following operations:

[0181] Place the PCB board to be inspected into the designated inspection station;

[0182] Controlling and starting a pre-written Skill program to traverse the PCB board to be inspected, and traverse all solder mask openings on the PCB board;

[0183] Determine whether all traces, copper sheets and / or vias at the solder mask openings on the PCB board fall within the solder mask openings;

[0184] When it is detected that the traces, copper sheets and / or vias on the PCB board fail to fall correctly within the defined solder mask openings, the coordinates are recorded and a violation report output is generated, as described above.

[0185] The pre-written Skill program includes:

[0186] The cadence skill language is used for programming in advance, and it is used to traverse all the solder mask opening positions on the PCB and record the coordinates of the exposed wire positions; the cadence skill method is used to complete the solder mask opening and exposed wire inspection. The main idea of ​​the skill program is to traverse the inspection and collect reports.

[0187] The step of determining whether all traces, copper sheets and / or vias at the solder mask openings on the PCB board fall within the solder mask openings comprises:

[0188] Determine whether the non-ground trace on the PCB board falls within the solder mask opening;

[0189] Determine whether the non-grounded copper sheet on the PCB board falls within the solder mask opening;

[0190] It is determined whether the non-ground via on the PCB board falls within the solder mask opening.

[0191] Wherein, when it is detected that the traces, copper sheets and / or vias on the PCB board fail to fall correctly within the defined solder mask opening, the coordinates are recorded and a violation report output is generated, including:

[0192] When it is detected that the traces at all solder mask openings on the PCB board fail to fall correctly within the defined solder mask openings,

[0193] and / or

[0194] When it is detected that copper foil falls into the solder mask openings at all solder mask openings on the PCB board and fails to fall into the defined solder mask openings correctly,

[0195] and / or

[0196] When it is detected that all the solder mask openings on the PCB board have vias that fall within the solder mask openings but fail to fall correctly within the defined solder mask openings,

[0197] The coordinates of the exposed wire location are recorded and a violation report output is generated.

[0198] The control starts a pre-written Skill program to traverse the PCB board to be inspected, and the step of traversing all solder mask openings on the PCB board also includes:

[0199] The control starts a pre-written Excel programming language to traverse the PCB board that needs to be checked, and traverses all the solder mask openings on the PCB board.

[0200] Wherein, when it is detected that the traces, copper sheets and / or vias on the PCB board fail to fall correctly within the defined solder mask opening, the coordinates are recorded and a violation report output is generated, which includes:

[0201] According to the coordinate positions recorded in the generated violation report, the non-compliant parts of the PCB board to be inspected are repaired.

[0202] Wherein, after the step of repairing the non-compliant parts of the PCB board to be inspected according to the coordinate positions recorded in the generated violation report, the step further includes:

[0203] The repaired PCB board is re-used with the pre-written Skill program to check the solder mask opening and exposed wires, traverse all the solder mask opening positions on the PCB, record the coordinates of the exposed wire positions, and output a report, as described above.

[0204] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided by the present invention can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0205] In summary, the present invention provides a method, device, intelligent terminal and storage medium for inspecting solder mask openings and exposed wires based on Cadence Skill. The Skill written by the present invention can traverse all solder mask openings on a PCB, and then determine whether the wiring, copper foil and vias at the solder mask openings are non-ground networks, collect and report the violations for engineers to modify. The present invention is programmed using the cadence skill language, and can quickly traverse all solder mask opening positions on a PCB, record the coordinates of the exposed wire positions, and output a report, which greatly improves work efficiency and accuracy, and is conducive to improving design quality.

[0206] It should be understood that the application of the present invention is not limited to the above examples. For ordinary technicians in this field, improvements or changes can be made based on the above description. All these improvements and changes should fall within the scope of protection of the claims attached to the present invention.

Claims

1. A solder mask window exposure inspection method based on Cadence Skill, characterized in that: include: Place the PCB board to be inspected into the designated inspection station; Controlling and starting a pre-written Skill program to traverse the PCB board to be inspected, and traverse all solder mask openings on the PCB board; Determine whether all traces, copper sheets and / or vias at the solder mask openings on the PCB board fall within the solder mask openings; When it is detected that the traces, copper sheets and / or vias on the PCB board fail to fall correctly within the defined solder mask openings, the coordinates are recorded and a violation report output is generated.

2. The method for inspecting solder mask openings and exposed wires based on Cadence Skill according to claim 1, characterized in that: The pre-written Skill programs include: The cadence skill language is used for programming in advance, and it is used to traverse all the solder mask opening positions on the PCB and record the coordinates of the exposed wire positions; the cadence skill method is used to complete the solder mask opening and exposed wire inspection. The main idea of ​​the skill program is to traverse the inspection and collect reports.

3. The solder mask window exposure inspection method based on Cadence Skill according to claim 1 is characterized in that: The step of judging whether all traces, copper sheets and / or vias at the solder mask openings on the PCB board fall within the solder mask openings comprises: Determine whether the non-ground trace on the PCB board falls within the solder mask opening; Determine whether the non-grounded copper sheet on the PCB board falls within the solder mask opening; It is determined whether the non-ground via on the PCB board falls within the solder mask opening.

4. The method for inspecting solder mask openings and exposed wires based on Cadence Skill according to claim 1, characterized in that: When it is detected that the traces, copper sheets and / or vias on the PCB board fail to fall correctly within the defined solder mask opening window, the coordinates are recorded and a violation report output is generated, including: When it is detected that the traces at all solder mask openings on the PCB board fail to fall correctly within the defined solder mask openings, and / or When it is detected that copper foil falls into the solder mask openings at all solder mask openings on the PCB board and fails to fall into the defined solder mask openings correctly, and / or When it is detected that all the solder mask openings on the PCB board have vias that fall within the solder mask openings but fail to fall correctly within the defined solder mask openings, The coordinates of the exposed wire location are recorded and a violation report output is generated.

5. The method for inspecting solder mask openings and exposed wires based on Cadence Skill according to claim 1, characterized in that: The control starts a pre-written Skill program to traverse the PCB board to be inspected, and the step of traversing all solder mask openings on the PCB board also includes: The control starts a pre-written Excel programming language to traverse the PCB board that needs to be checked, and traverses all the solder mask openings on the PCB board.

6. The method for inspecting solder mask openings and exposed wires based on Cadence Skill according to claim 1, characterized in that: When it is detected that the traces, copper sheets and / or vias on the PCB board fail to fall correctly within the defined solder mask opening window, the coordinates are recorded and a violation report output is generated, which includes: According to the coordinate positions recorded in the generated violation report, the non-compliant parts of the PCB board to be inspected are repaired.

7. The method for inspecting solder mask openings and exposed wires based on Cadence Skill according to claim 6, characterized in that: After the step of repairing the non-compliant parts of the PCB board to be inspected according to the coordinate positions recorded in the generated violation report, the step further includes: The repaired PCB board is re-used with the pre-written Skill program to check the solder mask openings and exposed wires, traverse all the solder mask opening positions on the PCB, record the coordinates of the exposed wire positions, and output a report.

8. A solder mask window exposure inspection device based on Cadence Skill, characterized in that: The device comprises: The pre-set module is used to pre-program using the cadence skill language, and is written to traverse all solder mask opening positions on the PCB and record the coordinates of the exposed wire positions; the cadence skill method is used to complete the solder mask opening and exposed wire inspection. The main idea of ​​the skill program is to traverse the inspection and collect reports; The station inspection module is used to place the PCB board to be inspected into the designated inspection station; A traversal module is used to control the start of a pre-written Skill program to traverse the PCB board to be inspected, and traverse all solder mask openings on the PCB board; A judgment module, used to judge whether all traces, copper sheets and / or vias at the solder mask openings on the PCB board fall within the solder mask openings; The recording and report generation module is used to record the coordinates and generate a violation report output when it is detected that the routing, copper and / or via on the PCB board fail to fall correctly within the defined solder mask opening window.

9. An intelligent terminal, characterized in that: The device comprises a memory and one or more programs, wherein the one or more programs are stored in the memory and are configured to be executed by one or more processors, and the one or more programs include being used to execute the method according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: When the instructions in the storage medium are executed by a processor of an electronic device, the electronic device is enabled to execute the method as described in any one of claims 1 to 7.

Citation Information

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