LLC synchronous rectification driving control circuit

Abstract

The invention provides an LLC synchronous rectification driving control circuit. The LLC synchronous rectification driving control circuit comprises a primary side switch tube driving signal PWM, resistors R1, R2, R3 and R4, a capacitor C1, a PNP type triode Q1, a NOT gate chip 1 and an AND gate chip 2. The resistor R1 and the resistor R2 are connected in series for voltage division, and a driving signal of a primary side switching tube of the transformer is transmitted to an input end 2 of the chip 2 after voltage division; the resistor R3 and the capacitor C1 are connected in series, and the middle point of the series connection of the resistor R3 and the capacitor C1 is connected to the chip 1; the output end of the chip 1 is connected with the other input end 1 of the chip 2; and the emitter of the PNP type triode Q1 is connected to the middle point of the series connection of the resistor R3 and the capacitor C1, the collector of the PNP type triode Q1 is grounded, and the base of the PNP type triode Q1 is connected to a primary side switching tube driving signal PWM through a resistor R4. According to the invention, simple and accurate LLC resonant converter synchronous rectification control is realized, discrete components can be used for construction, and the used components can be used in the aerospace field.

Description

Technical Field

[0001] The present invention is used in the technical field of aerospace secondary power supply, and specifically is a LLC resonant converter synchronous rectification drive control circuit. Background Art

[0002] High frequency, miniaturization and modularization are the development trends of DC / DC converters, which are also applicable to the field of aerospace secondary power supply. High frequency is a prerequisite for miniaturization. As the frequency increases, the switching loss will increase rapidly, so the research on soft switching converters is extremely important.

[0003] LLC resonant converter can realize zero voltage turn-on of primary switch tube and zero current turn-on of secondary diode in full load range, reduce switching loss and improve conversion efficiency. In the case of low voltage and high current output, if diode rectification is used, the loss on the diode is large and it is difficult to achieve high efficiency. The use of synchronous rectification can greatly improve the efficiency of the converter.

[0004] For LLC resonant converter, it is difficult to drive the secondary rectifier. The commonly used methods are: (1) Get the synchronous rectifier drive signal by detecting the transformer secondary voltage signal, usually using the transformer secondary winding to directly drive the corresponding field effect tube; the advantage is that no additional drive circuit is required and the structure is simple, but the disadvantage is that the timing of the two synchronous rectifiers is not accurate enough. (2) Get the synchronous rectifier drive signal by detecting the current flowing through the secondary synchronous rectifier, and turn on the MOS (Metal Oxide Semiconductor) tube when the synchronous rectifier current is greater than the set value; the advantage is that it has a certain anti-backflow capability, but it will add two current detection circuits and the structure is complex; (3) Dedicated synchronous rectifier chip, the advantage is simple structure and good drive timing, but there is no dedicated synchronous rectifier chip in the aerospace field. Summary of the invention

[0005] In view of the above problems, the present invention proposes an LLC synchronous rectification drive control circuit, wherein the LLC synchronous rectification drive circuit includes resistors R1, R2, R3, and R4, a capacitor C1, a PNP transistor Q1, a chip 1, and a chip 2.

[0006] The resistors R1 and R2 are connected in series to divide the voltage, and the driving PWM signal of the primary switch tube is divided and then transmitted to an input terminal 2 of the chip 2.

[0007] The resistor R3 is connected in series with C1, and the resistor R3 is connected to the driving PWM signal of the primary switch tube.

[0008] The capacitor C1 is grounded, and a midpoint between the capacitor C1 and the resistor R3 is connected to the emitter of the PNP transistor Q1 and the input terminal of the chip 1 .

[0009] The collector of Q1 is grounded, the base is connected to the PWM drive signal through the resistor R4, the output terminal of chip 1 is connected to another input terminal 1 of chip 2, and the signal output by chip 2 is the synchronous rectification drive signal of the LLC resonant converter.

[0010] The R1 can be short-circuited, and the R2 can be open-circuited. When R1 is 0 ohm, the synchronous rectification function can also be achieved.

[0011] The LLC synchronous rectification drive control circuit realizes that the synchronous rectification drive signal switches to a low level before the resonant current of the resonant converter is equal to the excitation current by designing the parameters of the resistor R3 and the capacitor C1.

[0012] When the PWM signal is converted from low level to high level, the voltage is about 12V. After the resistors R1 and R2 are connected in series to divide the voltage, the input terminal 2 of chip 2 obtains a high level signal. At this time, since the voltage across the capacitor C1 cannot change suddenly, the input terminal of chip 1 obtains a low level signal, and the signal is output as a high level signal after passing through chip 1. Therefore, the other input terminal 1 of chip 2 also obtains a high level signal. Since both input terminals 1 and 2 of chip 2 obtain high level signals, the synchronous rectification drive signal is high at this time, and the secondary synchronous rectification is turned on.

[0013] After a period of time t, the voltage across C1 gradually becomes high level, the input end of chip 1 obtains a high level signal and outputs a low level signal; the input end 1 of chip 2 obtains a low level signal and outputs a low level signal. At this time, the synchronous rectification of the LLC resonant converter is turned off.

[0014] When the PWM signal is converted from high level to low level, the voltage is 0V. At this time, the input terminal 2 of the chip 2 obtains a low level signal, and the output is always a low level signal. At this time, Q1 is turned on to discharge the capacitor C1 through R4.

[0015] The LLC synchronous rectification driving circuit utilizes an integrated chip to implement some or all of the logic operation functions in the circuit.

[0016] The beneficial effects achieved by the present invention are: first, the driving method is the primary side drive of the converter, and there is no need to change the original main power circuit parameters; second, the circuit principle is simple and easy to design; finally, it can be built using discrete components and the components used can all be used in the aerospace field. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0018] Figure 1 This is the LLC synchronous rectification circuit control block diagram; S1 and S2 are field effect tubes, C s1 , C s2 For capacitors, S1, S2 and C s1 , C s2 It forms a switch network that can convert the input DC power into AC power. D1 and D2 are the body diodes of S1 and S2 field effect tubes. C o1 , C o2 is the parasitic capacitance of S1 and S2 field effect transistors, L r is the resonant inductor, C r is the resonant capacitor, L m is the transformer magnetizing inductance, L r , C r , L m A resonant network is formed, S4 and S3 are synchronous rectifiers, C f For filter capacitors, S4, S3 and C f It constitutes a rectifier filter network, R Ld The load resistor is a load resistor, and the drive control circuit generates two complementary square waves PWMA and PWMB to control the on and off of S1 and S2. PWMA and PWMB generate synchronous rectification square waves SRA and SRB through the synchronous rectification drive control circuit and the secondary drive circuit.

[0019] Figure 2 It is an LLC synchronous rectification drive control circuit; PWMA is a primary switch tube drive signal; resistors R1 and R2 are connected in series, and the midpoints of R1 and R2 are connected to the input terminal 2 of chip 2; resistor R3 is connected in series with capacitor C1, and R3 is connected to the drive PWMA of the primary switch tube; C1 is grounded, and the midpoint between C1 and R3 is connected to the emitter of PNP transistor Q1 and the input terminal of chip 1; the collector of Q1 is grounded, and the base is connected to the PWMA drive signal through resistor R4, and the output terminal of chip 1 is connected to the input terminal 1 of chip 2;

[0020] Figure 3 This is the LLC synchronous rectification control circuit waveform diagram; the waveform works at f r (resonance frequency) is less than f s The first line is the driving waveform of the S1 and S2 field effect transistors; the second line is the main waveform of the switching frequency. Figure 1 The voltage between points A and B is v AB, V in is the input voltage; the third line is i Lr Resonant current waveform and magnetizing inductor current waveform i Lm ; The fourth line is the current waveform of the synchronous rectifier tubes S3 and S4; the fifth line is Figure 2 The voltage waveform across capacitor C1 in the middle; the sixth line is the driving waveform of synchronous rectifier tubes S3 and S4.

[0021] Figure 4 This is the LLC synchronous rectification simulation waveform diagram; the first line is the PWM input signal; the second line is the voltage across C1; the third line is the output synchronous rectification drive waveform.

[0022] Figure 5 The left side is the light-carrying waveform, the right side is the full-carrying waveform, the first line is the driving waveform of S1, and the second line is Figure 2 The voltage waveform across the capacitor C1 in the figure, the third line is the synchronous rectification drive waveform, and the fourth line is the resonant current waveform.

[0023] Specific implementation methods

[0024] The present invention will be further described below in conjunction with the accompanying drawings.

[0025] The present invention is described in detail below in conjunction with examples and drawings. The following embodiments will help those skilled in the art to further understand the present invention, but are not intended to limit the present invention in any form.

[0026] One application scenario of the circuit proposed by the present invention is Figure 1 The LLC synchronous rectification circuit shown in the figure. The LLC synchronous rectification driving control circuit of the aerospace secondary power supply proposed by the present invention is as follows Figure 2 As shown, the synchronous rectification drive control circuit is composed of resistors R1, R2, R3, R4, capacitor C1, PNP transistor Q1, chip 1 and chip 2.

[0027] like Figure 3 As shown, when the LLC resonant converter operates at f s <f r , at the resonant current i Lr Resonance to the excitation current i Lm When the resonant current i is equal, the secondary synchronous rectifier should be turned off to ensure that the input capacitor will not be short-circuited through the synchronous rectifier, causing power loss. This requires that the LLC secondary synchronous rectifier should be Lr Resonance to the excitation current i Lm Shut off before equality.

[0028] like Figure 3As shown, from time t1 to t3, capacitor C1 is charged via R3, and before time t2, the synchronous rectification control circuit outputs a low level, turning off the synchronous rectification tube in advance to avoid power loss.

[0029] In actual engineering, the UC1707 chip can be used. This chip integrates the NOT gate and AND gate used in the circuit, and has two drive circuits, which can simultaneously control the two synchronous rectifiers of the LLC resonant converter. The experimental waveform of the actual application circuit is as follows: Figure 5 shown.

[0030] The voltage at the UC1707 input port must not be higher than 5.5V. Figure 3 It can be seen that at [t1, t3], the base voltage of transistor Q1 is the PWMA voltage, and the transistor emitter power supply is the voltage across C1, which is a slow rising process and is lower than the emitter voltage. The transistor is cut off and the capacitor C1 is charged until the high level threshold t2' of the UC1707 chip is reached. The pulse width of the synchronous rectification can be controlled by adjusting the values ​​of capacitor C1 and resistor R3. The closer the drive off time t2' of S3 is to t2, the less the conduction loss of the synchronous rectification. However, it is necessary to ensure that t2' is before t2, otherwise the current flowing through the synchronous rectification on the secondary side will pass zero in each cycle, causing unnecessary losses. At [t3, t6], the emitter voltage of transistor Q1 is the voltage across C1, the base voltage is zero, and the voltage across capacitor C1 is gradually pulled down by the transistor. It can be seen that the early shutdown of the drive can be achieved through this circuit.

[0031] The above specific implementation modes are used to illustrate the present invention. Any modifications and changes made to the present invention within the spirit of the present invention and the protection scope of the claims shall fall within the protection scope of the present invention.

Claims

1. An LLC synchronous rectification drive control circuit, characterized in that: It includes a primary switch tube drive signal PWM, resistors R1, R2, R3, R4, capacitor C1, PNP transistor Q1, chip 1 and chip 2; the resistors R1 and R2 are connected in series for voltage division, and the primary switch tube drive signal PWM is transmitted to an input terminal 2 of chip 2 after voltage division; the resistor R3 is connected in series with the capacitor C1, and the midpoint of the series connection of the resistor R3 and the capacitor C1 is connected to chip 1; the output terminal of chip 1 is connected to another input terminal 1 of chip 2; the emitter of the PNP transistor Q1 is connected to the midpoint of the series connection of the resistor R3 and the capacitor C1, the collector is connected to the ground, and the base is connected to the primary switch tube drive signal PWM through the resistor R4.

2. The LLC synchronous rectification drive control circuit according to claim 1, characterized in that: The resistor R1 may be short-circuited.

3. The LLC synchronous rectification drive control circuit according to claim 1, characterized in that: The resistor R2 may be an open circuit.

4. The LLC synchronous rectification drive control circuit according to claim 1, characterized in that: By designing the parameters of the resistor R3 and the capacitor C1 , the synchronous rectification drive signal is switched to a low level before the resonant current of the resonant converter is equal to the excitation current.

5. The LLC synchronous rectification drive control circuit according to claim 1, characterized in that: When the primary switch tube driving signal PWM is converted from low level to high level, after the resistors R1 and R2 are connected in series to divide the voltage, the input terminal 2 of chip 2 obtains a high level signal; the voltage across the capacitor C1 cannot change suddenly, the input terminal of chip 1 obtains a low level signal, and the signal is output as a high level signal after passing through chip 1; the other input terminal 1 of chip 2 obtains a high level signal, and the output signal of chip 2 is high level.

6. The LLC synchronous rectification drive control circuit according to claim 1, characterized in that: When the voltage across capacitor C1 becomes high, the input terminal of chip 1 obtains a high-level signal and outputs a low-level signal; the input terminal 1 of chip 2 obtains a low-level signal and outputs a low-level signal. At this time, the synchronous rectification drive signal is low.

7. The LLC synchronous rectification drive control circuit according to claim 1, characterized in that: When the primary switch tube driving signal PWM is converted from high level to low level, the voltage is 0V, the input terminal 2 of the chip 2 obtains a low level signal, and the output is a low level signal. The PNP transistor Q1 is turned on, and the capacitor C1 is discharged through the resistor R4.

8. An LLC synchronous rectification drive control circuit according to claims 1-7, characterized in that: Use integrated chips to implement some or all of the logical operations in the circuit.

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