Flash memory read delay performance analysis method and device

Abstract

The invention provides a method and a device for analyzing read delay performance of a flash memory. The method comprises the following steps of: executing read operation of the flash memory; obtaining the number of read operation times of the flash memory in each preset time interval and read operation delay time of each read operation; and generating a read operation delay time performance distribution report according to the read operation times and the read operation delay time. According to the flash memory read delay performance analysis method and device provided by the invention, statistics and analysis of read operation delay time are realized, and optimization of flash memory performance is facilitated.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a flash memory read latency performance analysis method and device. Background Art

[0002] With the rapid development of information technology, flash memory, as a non-volatile storage device, has been widely used in smart phones, tablet computers, solid-state drives (SSDs) and other fields. Read operation delay time is a key indicator for evaluating flash memory performance, which directly affects the overall response speed of the device and user experience. Existing flash memory performance testing methods mostly focus on average read and write speeds or performance testing under specific conditions, and lack statistics and analysis of read operation delay time. Summary of the invention

[0003] The present invention provides a flash memory read delay performance analysis method and device, which are used to solve the defect of lack of statistics and analysis of read operation delay time in the prior art, and realize statistics and analysis of read operation delay time.

[0004] The present invention provides a flash memory read delay performance analysis method, comprising the following steps: executing a flash memory read operation; obtaining the number of flash memory read operations and the read operation delay time of each read operation within each preset time interval; and generating a read operation delay time performance distribution report according to the number of read operations and the read operation delay time.

[0005] According to a flash memory read latency performance analysis method provided by the present invention, before executing the flash memory read operation, the method also includes: setting multiple groups of control parameter combinations of the flash memory controller; executing the flash memory read operation includes: executing the flash memory read operations separately under the control of the multiple groups of control parameter combinations.

[0006] According to a flash memory read delay performance analysis method provided by the present invention, after generating a read operation delay time performance distribution report according to the number of read operations and the read operation delay time, the method further includes: in response to the current preset time interval not being a time interval of a preset minimum granularity, performing a first adjustment on the control parameters of the flash memory controller, and reducing the preset time interval, and switching to the processing step of executing the flash memory read operation; wherein the first adjustment on the control parameters of the flash memory controller includes: screening the multiple groups of control parameter combinations according to the read operation delay time performance distribution report, retaining the control parameter combinations that meet the read delay performance requirements corresponding to the current preset time interval; adjusting the value of at least one control parameter in the control parameter combination; and / or adding a new control parameter combination.

[0007] According to a flash memory read delay performance analysis method provided by the present invention, after generating a read operation delay time performance distribution report according to the number of read operations and the read operation delay time, the method further includes: in response to the current preset time interval being the time interval of the preset minimum granularity, and knowing according to the read operation delay time performance distribution report that at least one of the multiple control parameter combinations satisfies the read delay performance requirement corresponding to the current preset time interval, terminating the execution of the flash memory read delay performance analysis method, and recording the at least one control parameter combination that satisfies the read delay performance requirement corresponding to the current preset time interval; in response to the current preset time interval being the time interval of the preset minimum granularity, and knowing according to the read operation delay time performance distribution report that there is no control parameter combination that satisfies the read delay performance requirement corresponding to the current preset time interval among the multiple control parameter combinations, performing a second adjustment on the control parameters of the flash memory controller, and proceeding to the processing step of executing the read operation of the flash memory; wherein the second adjustment on the control parameters of the flash memory controller includes: adjusting the value of at least one control parameter in the control parameter combination; and / or adding a new control parameter combination.

[0008] According to a flash memory read latency performance analysis method provided by the present invention, the execution of the flash memory read operation includes: performing the flash memory read operation according to a first preset number of read operations within the preset time interval; and / or, randomly performing the flash memory read operation according to a second preset number of read-write mixed operations within the preset time interval.

[0009] According to a flash memory read latency performance analysis method provided by the present invention, the method further includes: outputting the read operation latency time performance distribution report and optimized parameter settings in the form of a visual chart or a data file.

[0010] The present invention also provides a flash memory read delay performance analysis device, comprising the following modules: an execution module, used to: execute the read operation of the flash memory; an acquisition module, used to: obtain the number of read operations of the flash memory within each preset time interval and the read operation delay time of each read operation; a generation module, used to: generate a read operation delay time performance distribution report based on the number of read operations and the read operation delay time.

[0011] The present invention also provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the flash memory read delay performance analysis method described above is implemented.

[0012] The present invention also provides a non-transitory computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the flash memory read delay performance analysis method as described in any one of the above is implemented.

[0013] The present invention also provides a computer program product, comprising a computer program, wherein when the computer program is executed by a processor, the computer program implements any of the above-mentioned flash memory read delay performance analysis methods.

[0014] The flash memory read delay performance analysis method and device provided by the present invention obtain the number of flash memory read operations and the read operation delay time of each read operation within each preset time interval by executing the flash memory read operation, and generate a read operation delay time performance distribution report according to the number of read operations and the read operation delay time, thereby realizing the statistics and analysis of the read operation delay time, which is conducive to optimizing the flash memory performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0016] Figure 1 This is one of the flow charts of the flash memory read latency performance analysis method provided by the present invention.

[0017] Figure 2 This is the second flow chart of the flash memory read latency performance analysis method provided by the present invention.

[0018] Figure 3 It is a structural schematic diagram of a flash memory read latency performance analysis device provided by the present invention.

[0019] Figure 4 It is a structural schematic diagram of the electronic device provided by the present invention. DETAILED DESCRIPTION

[0020] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0021] Figure 1 FIG. 1 is one of the flow charts of the flash memory read latency performance analysis method provided by the present invention, such as Figure 1As shown, the method includes the following: Step S1, executing a read operation of the flash memory.

[0022] The flash memory read operation can be executed according to the set read operation execution mode, and the read operation can be monitored in real time through the monitoring program. Among them, the monitoring logic can be integrated in the flash memory controller to realize the real-time monitoring and recording of the read operation.

[0023] Step S2: Obtain the number of read operations of the flash memory within each preset time interval and the read operation delay time of each read operation.

[0024] The monitoring mechanism of read operations can capture the start and end time of each read operation in real time, thereby obtaining the delay time of the read operation, providing a reliable basis for accurate calculation of the delay time and performance analysis. The timestamp array can be set to capture and record the start and end time of each read operation with high precision, providing detailed time data support for performance analysis.

[0025] By setting a counter that matches the preset time interval, it is ensured that the number of read operations within each preset time interval can be accurately recorded.

[0026] Step S3: Generate a read operation delay time performance distribution report according to the number of read operations and the read operation delay time.

[0027] According to the preset time interval, the calculated read operation delay time is carefully classified and counted to generate a read operation delay time performance distribution report. The read operation frequency and delay distribution characteristics within each preset time interval are analyzed to reveal the system performance bottleneck and room for improvement.

[0028] The flash memory read delay performance analysis method provided by the present invention obtains the number of flash memory read operations and the read operation delay time of each read operation within each preset time interval by executing the flash memory read operation, and generates a read operation delay time performance distribution report according to the number of read operations and the read operation delay time, thereby realizing the statistics and analysis of the read operation delay time, which is beneficial to optimizing the flash memory performance.

[0029] According to a flash memory read latency performance analysis method provided by the present invention, before executing the flash memory read operation, the method also includes: setting multiple groups of control parameter combinations of the flash memory controller; executing the flash memory read operation includes: executing the flash memory read operations separately under the control of the multiple groups of control parameter combinations.

[0030] The flash memory controller is used to manage the data stored in the flash memory and communicate with the computer or electronic device. When the system or device needs to read data or write data to the flash memory, it interacts through the flash memory controller. By setting the control parameters of the flash memory controller, the read operation of the flash memory can be controlled.

[0031] In an embodiment of the present invention, multiple control parameter combinations of a flash memory controller are set, and each control parameter combination is used to control the read operation of the flash memory. When executing the read operation of the flash memory, the read operation of the flash memory is executed respectively under the control of the multiple control parameter combinations, so as to obtain the number of read operations of the flash memory in each preset time interval and the read operation delay time of each read operation under the control of each control parameter combination. In addition, the read operation delay time performance distribution report generated according to the number of read operations and the read operation delay time includes the read operation delay time performance distribution report generated according to the number of read operations and the read operation delay time corresponding to the control of each control parameter combination.

[0032] The flash memory read delay performance analysis method provided by the present invention realizes the read operation under the control of the multiple control parameter combinations by setting multiple control parameter combinations of the flash memory controller, and respectively executes the read operation of the flash memory under the control of the multiple control parameter combinations, thereby obtaining a read operation delay time performance distribution report under the control of the multiple control parameter combinations, which provides a basis for the optimization of the control parameters.

[0033] According to a flash memory read delay performance analysis method provided by the present invention, after generating a read operation delay time performance distribution report according to the number of read operations and the read operation delay time, the method further includes: in response to the current preset time interval not being a time interval of a preset minimum granularity, performing a first adjustment on the control parameters of the flash memory controller, and reducing the preset time interval, and switching to the processing step of executing the flash memory read operation; wherein the first adjustment on the control parameters of the flash memory controller includes: screening the multiple groups of control parameter combinations according to the read operation delay time performance distribution report, retaining the control parameter combinations that meet the read delay performance requirements corresponding to the current preset time interval; adjusting the value of at least one control parameter in the control parameter combination; and / or adding a new control parameter combination.

[0034] When the number of read operations of the flash memory and the read operation delay time of each read operation are counted, the statistics are performed for the time range corresponding to the preset time interval. If the granularity of the preset time interval is set to be small, such as 10us, the amount of data obtained is large and the consumption of computing resources is large. Therefore, in order to balance the optimization of flash memory controller parameters and the consumption of computing resources, the embodiment of the present invention sets preset time intervals of different granularities, such as 10us, 100us, and 1ms.

[0035] Different preset time intervals correspond to different read latency performance requirements, and the read latency performance requirements include the read operation delay time. If the control parameter combination cannot meet the corresponding read latency performance requirements under the setting of a large-granularity preset time interval, then the corresponding read latency performance requirements will not be met under the setting of a small-granularity preset time interval. If the control parameter combination can meet the corresponding read latency performance requirements under the setting of a large-granularity preset time interval, then the corresponding read latency performance requirements may or may not be met under the setting of a small-granularity preset time interval.

[0036] Therefore, the preset time interval changes from large to small. In this way, the control parameters are optimized at the value of the preset time interval with large granularity first, and then the preset time interval is gradually reduced to achieve the gradual optimization of the flash memory controller control parameters.

[0037] After generating a read operation delay time performance distribution report based on the number of read operations and the read operation delay time, if the current preset time interval is not a time interval with a preset minimum granularity, a first adjustment is made to the control parameters of the flash memory controller, and according to the setting of the preset time interval, the preset time interval is reduced to the next level, and the processing step of executing the flash memory read operation is executed, and then the number of flash memory read operations and the read operation delay time of each read operation within each preset time interval are re-acquired, and a read operation delay time performance distribution report is generated based on the number of read operations and the read operation delay time.

[0038] The first adjustment of the control parameters of the flash memory controller includes at least one of the following operations: Screening multiple control parameter combinations according to the read operation delay time performance distribution report, retaining the control parameter combinations that meet the read delay performance requirements corresponding to the current preset time interval, and discarding the control parameter combinations that do not meet the read delay performance requirements corresponding to the current preset time interval; Adjusting the value of at least one control parameter in one or more control parameter combinations; Add new control parameter combinations.

[0039] The control parameters may include the maximum waiting time during a write operation suspension, the maximum number of read operations that can be executed during a write command suspension, the maximum ratio of read and write commands, and the maximum time for continuous read execution. The multiple groups of control parameter combinations may have different compositions of control parameters or different values ​​of control parameters. The order of adjusting the preset time interval and the first adjustment of the control parameters of the flash memory controller may be performed in sequence according to the setting, or may be performed simultaneously.

[0040] The flash memory read latency performance analysis method provided by the present invention implements parameter optimization of the flash memory controller and adjustment of the preset time interval by first adjusting the control parameters of the flash memory controller in response to the current preset time interval not being a time interval of the preset minimum granularity, reducing the preset time interval, and switching to the processing step of executing the flash memory read operation, thereby realizing the adjustment of the preset time interval.

[0041] According to a flash memory read delay performance analysis method provided by the present invention, after generating a read operation delay time performance distribution report according to the number of read operations and the read operation delay time, the method further includes: in response to the current preset time interval being the time interval of the preset minimum granularity, and knowing according to the read operation delay time performance distribution report that at least one of the multiple control parameter combinations satisfies the read delay performance requirement corresponding to the current preset time interval, terminating the execution of the flash memory read delay performance analysis method, and recording the at least one control parameter combination that satisfies the read delay performance requirement corresponding to the current preset time interval; in response to the current preset time interval being the time interval of the preset minimum granularity, and knowing according to the read operation delay time performance distribution report that there is no control parameter combination that satisfies the read delay performance requirement corresponding to the current preset time interval among the multiple control parameter combinations, performing a second adjustment on the control parameters of the flash memory controller, and proceeding to the processing step of executing the read operation of the flash memory; wherein the second adjustment on the control parameters of the flash memory controller includes: adjusting the value of at least one control parameter in the control parameter combination; and / or adding a new control parameter combination.

[0042] After generating a read operation delay time performance distribution report based on the number of read operations and the read operation delay time, if the current preset time interval is the time interval with the preset minimum granularity, it means that there is no need to reduce the preset time interval, and if it is known from the read operation delay time performance distribution report that there is at least one group of control parameter combinations among the multiple groups of control parameter combinations that meets the read delay performance requirements corresponding to the current preset time interval, it means that the optimized control parameters that can meet the final read delay performance requirements have been found, then the execution of the flash memory read delay performance analysis method is terminated, and the control parameter combination that meets the read delay performance requirements corresponding to the current preset time interval is recorded.

[0043] After generating a read operation delay time performance distribution report according to the number of read operations and the read operation delay time, if the current preset time interval is the time interval with the preset minimum granularity, it means that there is no need to further reduce the preset time interval, and if it is learned from the read operation delay time performance distribution report that there is no control parameter combination that meets the read delay performance requirement corresponding to the current preset time interval in the multiple groups of control parameter combinations, it means that the optimized control parameters that can meet the final read delay performance requirement (the read delay performance requirement corresponding to the preset time interval with the smallest granularity) have not yet been found, then a second adjustment is made to the control parameters of the flash memory controller, and the processing step of executing the read operation of the flash memory is turned to re-acquire the number of read operations of the flash memory in each preset time interval and the read operation delay time of each read operation, and a read operation delay time performance distribution report is generated according to the number of read operations and the read operation delay time.

[0044] The second adjustment of the control parameters of the flash memory controller includes: adjusting the value of at least one control parameter in one or more control parameter combinations; and / or adding a new control parameter combination.

[0045] The flash memory read delay performance analysis method provided by the present invention terminates the execution of the flash memory read delay performance analysis method in response to the current preset time interval being a time interval of preset minimum granularity and knowing that at least one control parameter combination among multiple control parameter combinations satisfies the read delay performance requirement corresponding to the current preset time interval according to a read operation delay time performance distribution report, and records at least one control parameter combination that satisfies the read delay performance requirement corresponding to the current preset time interval; in response to the current preset time interval being a time interval of preset minimum granularity and knowing that at least one control parameter combination among multiple control parameter combinations satisfies the read delay performance requirement corresponding to the current preset time interval according to a read operation delay time performance distribution report, a second adjustment is made to the control parameters of the flash memory controller, and the processing step of executing the read operation of the flash memory is turned to, thereby realizing the termination of the program after the control parameter optimization is successful and the further optimization and testing of the control parameters when the optimized control parameters that meet the final read delay performance requirement have not been found.

[0046] According to a flash memory read latency performance analysis method provided by the present invention, the method further includes: outputting the read operation latency time performance distribution report and optimized parameter settings in the form of a visual chart or a data file.

[0047] Output the read operation delay time performance distribution report, optimized parameter settings (control parameter combinations that meet the final flash memory delay performance requirements) and performance improvement to the display module or storage module in the form of visual charts or data files for user viewing and subsequent application. Among them, the visual charts include histograms, line charts, etc., which are used to intuitively display the delay time performance.

[0048] The flash memory read delay performance analysis method provided by the present invention outputs a read operation delay time performance distribution report and optimized parameter settings in the form of a visual chart or a data file, thereby realizing information transmission of the operation delay time performance distribution report and the optimized parameter settings.

[0049] According to a flash memory read latency performance analysis method provided by the present invention, the execution of the flash memory read operation includes: performing the flash memory read operation according to a first preset number of read operations within the preset time interval; and / or, randomly performing the flash memory read operation according to a second preset number of read-write mixed operations within the preset time interval.

[0050] When executing a read operation of the flash memory, the number of read operations of the flash memory in each preset time interval and the read operation delay time of each read operation are obtained. The read operation can be controlled by setting the read operation mode of the preset time interval. For example, in a scenario where a read operation is simply performed, a first preset number of read operations in a preset time interval can be set, and the read operation of the flash memory is performed according to the first preset number of read operations in the preset time interval. In a mixed read-write scenario, a second preset number of read operations and write operations in a preset time interval can be set, that is, the sum of the number of read operations and write operations in the preset time interval is the second preset number, and the read operation of the flash memory is randomly performed according to the second preset number of mixed read-write operations in the preset time interval.

[0051] The flash memory read delay performance analysis method provided by the present invention realizes the control of the flash memory read operation by performing the flash memory read operation according to a first preset number of read operations within a preset time interval, and / or randomly performing the flash memory read operation according to a second preset number of read-write mixed operations within a preset time interval, which is beneficial to obtaining the read delay performance of a variety of different read operation modes and optimizing the parameters of the flash memory controller based on the various different read operation modes.

[0052] Figure 2 This is the second flow chart of the flash memory read delay performance analysis method provided by the present invention. Figure 2 The flash memory read latency performance analysis method provided by the present invention is introduced by taking NAND flash memory as an example.

[0053] Glossary: NFC: nand flash controller, NAND flash controller; NAND: Nand Flash (NAND Flash) is a common non-volatile storage medium; Read latency: The time delay between when a system or device issues a read operation request and when the data is actually available (that is, read to the specified location).

[0054] Write suspend: In a mixed read-write scenario, the write operation can be suspended during the write operation to perform the read operation, and the write operation can be completed after the read operation is completed.

[0055] like Figure 2 As shown, the flash memory read latency performance analysis method provided by the present invention comprises the following steps: (1) Flexible setting of time interval benchmark

[0056] The present invention first dynamically builds a set of finely divided time interval benchmark systems according to the specific needs and accuracy requirements of the test. The system includes but is not limited to key time nodes such as 10 microseconds (10us), 100 microseconds (100us) to 1 millisecond (1ms), aiming to ensure the high accuracy of the analysis process and provide a solid foundation for in-depth insight and evaluation of system performance or device response speed.

[0057] (2) Initialize the statistical framework

[0058] In order to efficiently and accurately count the read operation data, the present invention constructs a comprehensive statistical data structure framework. The framework has built-in counters that match the benchmarks of each time interval to ensure that the frequency of read operations in each specific time interval can be accurately recorded. At the same time, the framework also initializes the timestamp array to capture and record the start and end time of each read operation with high precision, providing detailed time data support for performance analysis.

[0059] (3) NFC parameter optimization configuration

[0060] In response to various test scenarios and performance optimization goals, the present invention implements a set of flexible NFC parameter configuration strategies. This strategy covers the optimization configuration of key parameters such as fine adjustment of the maximum waiting time during the write operation suspension, setting the maximum number of read operations that can be performed during a write command suspension process, and adjusting the maximum ratio of read and write commands and the reasonable maximum time value (the maximum time for continuous read execution). This series of parameter configurations aims to balance the system response speed and resource utilization efficiency, improve the fluency of read and write interactions, and lay a solid foundation for subsequent performance testing.

[0061] (4) Real-time monitoring of read operations

[0062] Integrate monitoring logic in the NFC system to monitor and record read operations in real time. This monitoring mechanism can capture the start and end time of each read operation in real time, providing a reliable basis for accurate calculation of delay time and performance analysis.

[0063] (5) Execute read operation and delay calculation

[0064] Design and execute a fixed number of mixed read / write or pure read operation sequences (e.g., 10,000) to comprehensively evaluate the read latency performance of NAND flash memory under different workloads. For each read operation, accurately calculate its latency based on the start and end time of the monitoring record.

[0065] (6) Statistical classification and performance analysis

[0066] According to the preset time interval benchmark, the calculated read latency time is carefully classified and counted. The read operation frequency and latency distribution characteristics in each time interval are analyzed to reveal the system performance bottleneck and room for improvement.

[0067] (7) Performance distribution report generation and parameter tuning

[0068] Based on the statistical results, a performance distribution report of NAND read latency is generated, including visual charts such as histograms and line charts, which intuitively display the latency performance. Based on the report analysis results, a rigorous evaluation process is implemented to determine whether the NFC parameters need to be further optimized. If optimization is required, key parameters are adjusted in a targeted manner and the performance test process is restarted. Through iterative testing and continuous tuning, the optimal state of NAND flash read performance is continuously approached.

[0069] (8) Result output

[0070] The final analysis results, optimized parameter settings and performance improvements are output to the display module or storage module in the form of a graphical interface or data file for user viewing and subsequent application.

[0071] The flash memory read delay performance analysis method provided by the present invention counts the NAND read delay time based on a fixed time interval, and obtains a performance distribution diagram of the read delay time by accurately counting the number of read operations in each time interval, thereby comprehensively evaluating the performance of the NAND device, providing a scientific basis for NFC parameter optimization, and effectively improving the read efficiency and stability of the NAND flash memory. This is of great significance for optimizing system performance, predicting potential problems, and adjusting storage strategies.

[0072] The flash memory read latency performance analysis method provided by the present invention can achieve: (1) Comprehensive performance evaluation: By counting read latency at fixed time intervals, a detailed performance distribution chart is obtained to fully reflect the performance of the NAND device.

[0073] (2) Optimizing parameter settings: Provides strong support for adjusting NFC parameters and helps find the best parameter combination to optimize reading performance.

[0074] (3) Improve user experience: By optimizing the read operation performance of NAND devices, the overall response speed and user experience of the device can be improved.

[0075] The flash memory read delay performance analysis device provided by the present invention is described below. The flash memory read delay performance analysis device described below and the flash memory read delay performance analysis method described above can be referenced to each other.

[0076] Figure 3 Schematic diagram of the structure of the flash memory read delay performance analysis device provided by the present invention. Figure 3 As shown, the device includes an execution module 10, an acquisition module 20 and a generation module 30, wherein: the execution module 10 is used to: execute the read operation of the flash memory; the acquisition module 20 is used to: obtain the number of read operations of the flash memory within each preset time interval and the read operation delay time of each read operation; the generation module 30 is used to: generate a read operation delay time performance distribution report according to the number of read operations and the read operation delay time.

[0077] The flash memory read delay performance analysis device provided by the present invention executes the flash memory read operation, obtains the number of flash memory read operations and the read operation delay time of each read operation within each preset time interval, generates a read operation delay time performance distribution report according to the number of read operations and the read operation delay time, realizes the statistics and analysis of the read operation delay time, and is conducive to optimizing the flash memory performance.

[0078] Figure 4 An example of a physical structure diagram of an electronic device is shown in FIG. Figure 4 As shown, the electronic device may include: a processor 410, a communication interface 420, a memory 430 and a communication bus 440, wherein the processor 410, the communication interface 420 and the memory 430 communicate with each other through the communication bus 440. The processor 410 may call the logic instructions in the memory 430 to execute the flash memory read delay performance analysis method, which includes: executing a flash memory read operation; obtaining the number of flash memory read operations and the read operation delay time of each read operation within each preset time interval; and generating a read operation delay time performance distribution report according to the number of read operations and the read operation delay time.

[0079] In addition, the logic instructions in the above-mentioned memory 430 can be implemented in the form of a software functional unit and can be stored in a computer-readable storage medium when it is sold or used as an independent product. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc. Various media that can store program codes.

[0080] On the other hand, the present invention also provides a computer program product, which includes a computer program. The computer program can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the flash memory read delay performance analysis method provided by the above methods, the method including: executing a flash memory read operation; obtaining the number of flash memory read operations and the read operation delay time of each read operation within each preset time interval; generating a read operation delay time performance distribution report based on the number of read operations and the read operation delay time.

[0081] On the other hand, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, it is implemented to execute the flash memory read delay performance analysis method provided by the above-mentioned methods. The method includes: executing a flash memory read operation; obtaining the number of flash memory read operations and the read operation delay time of each read operation within each preset time interval; and generating a read operation delay time performance distribution report based on the number of read operations and the read operation delay time.

[0082] The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative labor.

[0083] Through the description of the above implementation methods, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course, can also be implemented by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the prior art can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a disk, an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0084] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A flash memory read latency performance analysis method, characterized in that: include: Perform a read operation on the flash memory; Obtaining the number of read operations of the flash memory within each preset time interval and the read operation delay time of each read operation; A read operation delay time performance distribution report is generated according to the number of read operations and the read operation delay time.

2. The flash memory read latency performance analysis method according to claim 1, characterized in that: Before executing the read operation of the flash memory, the method further includes: setting a plurality of control parameter combinations of the flash memory controller; The performing of the flash memory read operation comprises: performing the flash memory read operation respectively under the control of the plurality of control parameter combinations.

3. The flash memory read latency performance analysis method according to claim 2, characterized in that: After generating a read operation delay time performance distribution report according to the number of read operations and the read operation delay time, the method further includes: In response to the current preset time interval not being a time interval of preset minimum granularity, a first adjustment is made to the control parameter of the flash memory controller, and the preset time interval is reduced, and the process proceeds to the step of executing the flash memory read operation; The first adjustment of the control parameters of the flash memory controller includes: The multiple groups of control parameter combinations are screened according to the read operation delay time performance distribution report, and the control parameter combinations that meet the read delay performance requirements corresponding to the current preset time interval are retained; the value of at least one control parameter in the control parameter combination is adjusted; and / or, a new control parameter combination is added.

4. The flash memory read latency performance analysis method according to claim 3, characterized in that: After generating a read operation delay time performance distribution report according to the number of read operations and the read operation delay time, the method further includes: In response to the current preset time interval being the preset minimum granularity time interval, and knowing according to the read operation delay time performance distribution report that there is at least one group of control parameter combinations among the multiple groups of control parameter combinations that meets the read delay performance requirement corresponding to the current preset time interval, then terminating the execution of the flash memory read delay performance analysis method, and recording the at least one group of control parameter combinations that meets the read delay performance requirement corresponding to the current preset time interval; In response to the current preset time interval being the preset minimum granularity time interval, and knowing according to the read operation delay time performance distribution report that there is no control parameter combination that meets the read delay performance requirement corresponding to the current preset time interval among the multiple control parameter combinations, a second adjustment is made to the control parameters of the flash memory controller, and the process proceeds to the step of executing the read operation of the flash memory; The second adjustment of the control parameters of the flash memory controller includes: Adjusting the value of at least one control parameter in the control parameter combination; and / or adding a new control parameter combination.

5. The flash memory read latency performance analysis method according to claim 4, characterized in that: The method further comprises: The read operation delay time performance distribution report and optimized parameter settings are output in the form of a visual chart or data file.

6. The flash memory read latency performance analysis method according to claim 1, characterized in that: The performing of the flash memory read operation comprises: performing a read operation on the flash memory according to a first preset number of read operations within the preset time interval; And / or, randomly performing a read operation on the flash memory according to a second preset number of read-write mixed operations within the preset time interval.

7. A flash memory read latency performance analysis device, characterized in that: include: An execution module, used for: executing a read operation of the flash memory; An acquisition module is used to: acquire the number of read operations of the flash memory within each preset time interval and the read operation delay time of each read operation; A generating module is used to generate a read operation delay time performance distribution report according to the number of read operations and the read operation delay time.

8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the flash memory read latency performance analysis method according to any one of claims 1 to 6 is implemented.

9. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the flash memory read latency performance analysis method according to any one of claims 1 to 6 is implemented.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the flash memory read latency performance analysis method according to any one of claims 1 to 6 is implemented.

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