Filtering device for relieving stress and manufacturing method thereof

Abstract

The invention discloses a filtering device for relieving stress and a manufacturing method thereof. Relates to the technical field of filtering. An acoustic resonator in the filtering device is formed on the first side of a substrate serving as a carrier, and a capacitor structure is formed on the second side of the substrate, so that perforation can be started from the substrate serving as the carrier, a bonding layer is penetrated, and solid material layers such as a cut-off boundary layer, a sacrificial layer, a dielectric layer and a piezoelectric layer are sequentially penetrated; since the layers are mainly made of solid materials with high mechanical strength and toughness, the fracture risk caused by weak connection of the materials can be remarkably reduced during perforation, local stress concentration possibly introduced by perforation operation is reduced, and the electrical connection between the capacitor and the acoustic resonance electrode is realized. And the condition that the filtering device is broken due to perforation in the manufacturing and using processes is reduced. Therefore, the technical problem that the filtering device integrated with the acoustic resonator and the capacitive filter is easy to break in the prior art is solved.

Description

Technical Field

[0001] The present application relates to the field of filtering technology, and in particular to a stress-relieving filtering device and a manufacturing method thereof. Background Art

[0002] As filters are increasingly used, there are more and more ways to implement them. Among them, the Integrated Passive Device (IPD) technology uses thin-film inductors and capacitors to form filters, which can achieve high-frequency and wide-bandwidth performance requirements. Acoustic resonators can be divided into surface acoustic wave (SAW) filters and bulk acoustic wave (BAW) filters according to their different structures. They have the advantage of a higher Q value and can achieve rapid roll-off of the filter.

[0003] In order to achieve the purpose of having a high Q value while achieving the large bandwidth requirement, the existing solution makes the acoustic resonator and the capacitor on a wafer and integrates them into a filtering device. For example, the invention patent application with the publication number CN116846358A discloses a filtering device, which includes a substrate B as a carrier and a substrate C as a cap. The acoustic resonator is formed between the two substrates, and the capacitor is arranged on the side of the substrate C as the cap away from the acoustic resonator. In order to achieve the electrical connection between the capacitor and the electrode of the acoustic resonator, it is necessary to start perforating from the substrate C as the cap, and only after penetrating a bonding layer B, a through hole for achieving electrical connection between the capacitor and the acoustic resonance electrode is formed. However, since the bonding layer is an organic material such as BSiO2 or SiNx, the viscosity and strength are poor, so it is easy to break when opening the through hole.

[0004] With respect to the problem that existing filter devices integrating acoustic resonators and capacitive filters are prone to breakage, no effective solution has been proposed so far. Summary of the invention

[0005] The embodiments of the present disclosure provide a stress-relieving filter device and a manufacturing method thereof, so as to at least solve the technical problem in the prior art that the filter device integrating an acoustic resonator and a capacitive filter is prone to fracture.

[0006] According to one aspect of an embodiment of the present disclosure, a stress relief filtering device is provided, comprising: a substrate as a carrier, an acoustic resonator and at least one capacitor structure, wherein the acoustic resonator is formed on a first side of the substrate; and the capacitor structure is formed on a second side of the substrate and is electrically connected to at least one electrode of the acoustic resonator through a through hole.

[0007] Optionally, the acoustic resonator includes: a piezoelectric layer, a first electrode, a second electrode and a resonant cavity; wherein the first electrode is located on a side of the piezoelectric layer away from the substrate; the second electrode is located on a side of the piezoelectric layer close to the substrate; the resonant cavity is formed between the piezoelectric layer and the substrate; and the capacitor structure includes a first capacitor and / or a second capacitor; the first capacitor is electrically connected to the first electrode through a first through hole; and the second capacitor is electrically connected to the second electrode through a second through hole.

[0008] Optionally, the capacitor structure includes the first capacitor; the first through hole passes through the substrate, the piezoelectric layer and contacts the first electrode; and the first capacitor includes: a first signal lead, a portion of which is electrically connected to the first electrode through the first through hole; another portion of the first signal lead at least partially overlaps the substrate in a first direction; a first dielectric layer located on the second side of the substrate and covering the first signal lead; and a third electrode located on a side of the first dielectric layer away from the substrate.

[0009] Optionally, the capacitor structure includes the second capacitor; the second through hole passes through the substrate and contacts the second electrode; and the second capacitor includes: a second signal lead, a portion of which is electrically connected to the second electrode through the second through hole; another portion of the second signal lead at least partially overlaps the substrate in a first direction; a first dielectric layer located on the second side of the substrate and covering the second signal lead; and a fourth electrode located on a side of the first dielectric layer away from the substrate.

[0010] Optionally, the filtering device also includes: a second dielectric layer located on the surface of the second electrode on a side away from the piezoelectric layer; a sacrificial layer located on the surface of the second dielectric layer on a side away from the piezoelectric layer; a cutoff boundary layer located on the surface of the sacrificial layer on a side away from the second dielectric layer; a bonding layer located on the side of the cutoff boundary layer away from the second dielectric layer; and the first through hole sequentially penetrates the substrate, the bonding layer, the cutoff boundary layer, the sacrificial layer, and the piezoelectric layer to contact the first electrode; the second through hole sequentially penetrates the substrate, the bonding layer, the cutoff boundary layer, the sacrificial layer, and the second dielectric layer to contact the second electrode.

[0011] Optionally, the number of capacitors included in the filtering device is greater than or equal to three.

[0012] Optionally, the filtering device also includes: a third dielectric layer located on a side of the first dielectric layer away from the substrate and covering the third electrode and the fourth electrode; and a first inductor and / or a second inductor located on a side of the third dielectric layer away from the substrate; wherein the first inductor is electrically connected to the fourth electrode, and the second inductor is electrically connected to the first signal lead.

[0013] Optionally, the filtering device further includes: a fourth dielectric layer located on a side of the third dielectric layer away from the substrate and covering the first inductor and the second inductor; and a third inductor and / or a fourth inductor located on a side of the fourth dielectric layer away from the substrate; wherein the third inductor is electrically connected to the first inductor, and the fourth inductor is electrically connected to the second inductor.

[0014] According to another aspect of an embodiment of the present disclosure, a method for manufacturing a stress-relief filtering device is also provided, comprising: manufacturing a substrate as a carrier, an acoustic resonator, and at least one capacitor structure, wherein the acoustic resonator is formed on a first side of the substrate; and the capacitor structure is formed on a second side of the substrate and is electrically connected to at least one electrode of the acoustic resonator through a through hole.

[0015] Optionally, the steps of making the acoustic resonator include: making a piezoelectric layer, a first electrode, a second electrode and a resonant cavity; wherein the first electrode is located on a side of the piezoelectric layer away from the substrate; the second electrode is located on a side of the piezoelectric layer close to the substrate; the resonant cavity is formed between the piezoelectric layer and the substrate; and the steps of making the capacitor structure include: making a first capacitor and / or a second capacitor; the first capacitor is electrically connected to the first electrode through a first through hole; the second capacitor is electrically connected to the second electrode through a second through hole.

[0016] Optionally, the capacitor structure includes the first capacitor; the operation of making the first through hole includes: starting the first through hole from the substrate, penetrating the piezoelectric layer, until the first through hole contacts the first electrode; and the steps of making the first capacitor include: making a first signal lead, a part of the first signal lead is electrically connected to the first electrode through the first through hole; another part of the first signal lead at least partially overlaps the substrate in a first direction; making a first dielectric layer located on the second side of the substrate and covering the first signal lead; and making a third electrode located on the side of the first dielectric layer away from the substrate.

[0017] Optionally, the capacitor structure includes the second capacitor; the operation of making the second through hole includes: opening the second through hole from the substrate until the second through hole contacts the second electrode; and the steps of making the second capacitor include: making a second signal lead, a part of the second signal lead is electrically connected to the second electrode through the second through hole; another part of the second signal lead at least partially overlaps the substrate in a first direction; making a first dielectric layer located on the second side of the substrate and covering the second signal lead; and making a fourth electrode located on the side of the first dielectric layer away from the substrate.

[0018] Optionally, the manufacturing method further comprises: manufacturing a second dielectric layer located on a surface of the second electrode away from the piezoelectric layer; manufacturing a sacrificial layer located on a surface of the second dielectric layer away from the piezoelectric layer; manufacturing a cutoff boundary layer located on a surface of the sacrificial layer away from the second dielectric layer; manufacturing a bonding layer located on a side of the cutoff boundary layer away from the second dielectric layer; Furthermore, the operation of making the first through hole includes: opening a first through hole from the substrate, and sequentially penetrating the bonding layer, the cutoff boundary layer, the sacrificial layer, and the piezoelectric layer until the first through hole contacts the first electrode; the operation of making the second through hole includes: opening a second through hole from the substrate, and sequentially penetrating the bonding layer, the cutoff boundary layer, the sacrificial layer, and the second dielectric layer until the second through hole contacts the second electrode.

[0019] In the stress-relief filter device proposed in the present application, the acoustic resonator is formed on the first side of the substrate as a carrier, and the capacitor structure is formed on the second side of the substrate, so that the perforation can be started from the substrate as a carrier, not only penetrating the bonding layer, but also sequentially penetrating the cut-off boundary layer, sacrificial layer, dielectric layer, piezoelectric layer and other solid material layers to form a through hole for realizing the electrical connection between the capacitor and the acoustic resonance electrode. Since these layers are mainly composed of solid materials with high mechanical strength and toughness, the risk of fracture caused by weak material connection (such as bonding layer) can be significantly reduced during perforation, and the local stress concentration that may be introduced by the perforation operation is reduced, which greatly reduces the fracture of the filter device caused by perforation during the manufacturing and use process, and improves the reliability and stability of the filter device. This solves the technical problem that the filter device integrating the acoustic resonator and the capacitor filter is prone to fracture in the prior art. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The drawings described herein are used to provide a further understanding of the present disclosure and constitute a part of the present application. The illustrative embodiments of the present disclosure and their descriptions are used to explain the present disclosure and do not constitute an improper limitation on the present disclosure. In the drawings: Figure 1-Figure 36Schematic diagram of various structures during the manufacturing process of the filtering device provided in one embodiment of the present application. DETAILED DESCRIPTION

[0021] In order to enable those skilled in the art to better understand the technical solutions of the present disclosure, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only embodiments of a part of the present disclosure, not all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in this field without making creative work should fall within the scope of protection of the present disclosure.

[0022] It should be noted that the terms "first", "second", etc. in the specification and claims of the present disclosure and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present disclosure described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products, or devices.

[0023] Secondly, the present application is described in detail with reference to the schematic diagram. When describing the embodiments of the present application in detail, for the sake of convenience, the cross-sectional diagrams showing the device structure will not be partially enlarged according to the general scale, and the schematic diagrams are only examples, which should not limit the scope of protection of the present application. In addition, in actual production, the three-dimensional dimensions of length, width and depth should be included.

[0024] As described in the background technology section, in a layout in which the capacitor is disposed on the side of the substrate C serving as a cap away from the acoustic resonator, only one bonding layer B is penetrated when a through hole is opened. Since the bonding layer is made of organic materials such as BSiO2 or SiNx, which have poor viscosity and strength, it is easy to break when the through hole is opened.

[0025] In view of this, an embodiment of the present application provides a stress-relief filter device and a manufacturing method thereof, so as to reduce the breakage of the filter device due to perforation during the manufacturing and use of the filter device and improve the reliability and stability of the filter device.

[0026] In the following, in conjunction with specific embodiments, the stress relief filter device and the manufacturing method thereof provided in the embodiments of the present application are described. For ease of understanding, the present application first describes the manufacturing method of the stress relief filter device.

[0027] The manufacturing method of the stress-relief filter device provided in the embodiment of the present application includes: manufacturing a substrate as a carrier, an acoustic resonator and at least one capacitor structure, wherein the acoustic resonator is formed on the first side of the substrate; and the capacitor structure is formed on the second side of the substrate and is electrically connected to at least one electrode of the acoustic resonator through a through hole. Thus, the perforation can be started from the substrate as a carrier, not only penetrating the bonding layer, but also sequentially penetrating the cut-off boundary layer, the sacrificial layer, the dielectric layer, the piezoelectric layer and other solid material layers to form a through hole for realizing the electrical connection between the capacitor and the acoustic resonance electrode. Since these layers are mainly composed of solid materials with high mechanical strength and toughness, the risk of fracture caused by weak connection of materials (such as bonding layer) can be significantly reduced during perforation, and the local stress concentration that may be introduced by the perforation operation is reduced, which greatly reduces the fracture of the filter device caused by perforation during the manufacturing and use process, and improves the reliability and stability of the filter device.

[0028] It should be noted that, in this embodiment, the stress relief filtering device includes: a substrate as a carrier, an acoustic resonator and at least one capacitor structure, wherein the acoustic resonator is formed on a first side of the substrate; and the capacitor structure is formed on a second side of the substrate and is electrically connected to at least one electrode of the acoustic resonator through a through hole.

[0029] Specifically, the manufacturing method of the stress relief filter device provided in the embodiment of the present application includes: like Figure 1 As shown, a transition layer 110, a seed layer 120, a first electrode layer 130, a piezoelectric layer 140 and a second electrode layer 150 are sequentially fabricated on a substrate A100 used as a temporary substrate. The first electrode layer is used to fabricate a first electrode, and the second electrode layer is used to fabricate a second electrode.

[0030] Optionally, in one embodiment of the present application, the substrate A100 is a silicon substrate, a silicon-on-insulator substrate, a glass substrate, a silicon carbide substrate, or a gallium arsenide (GaAs) substrate, etc.; The transition layer 110 may be a silicon oxide (SiO2) layer or a silicon nitride (SiNx) layer, etc., and may be formed by a thermal oxidation process, a physical vapor deposition (PVD) process, or a chemical vapor deposition (CVD) process, etc.; The seed layer 120 may be an aluminum nitride (AlN) layer, which is formed by a physical vapor deposition (PVD) process, specifically a magnetron sputtering process; The first electrode layer 130 may be an Al layer, a Cu layer, a Mo layer, an Au layer or a Pt layer, and may be formed by a physical vapor deposition (PVD) process; similarly, the second electrode layer 150 may be an Al layer, a Cu layer, a Mo layer, an Au layer or a Pt layer, and may be formed by a physical vapor deposition (PVD) process; The piezoelectric layer 140 can be an AlN layer, a scandium-doped aluminum nitride (AlxSc1-xN) layer, a lithium niobate (LiNbO3) layer, a lithium tantalate (LiTaO3) layer or a quartz layer, etc. It can be a polycrystalline layer or a single crystal layer, and can be formed by PVD or metal organic chemical vapor deposition (MOCVD), etc.

[0031] like Figure 2 As shown, the first region of the second electrode layer 150 is etched to form a step structure 151 in the second electrode layer 150 to improve the performance of the acoustic resonator. It should be noted that in this embodiment, the distance between the boundary of the first region and the boundary of the second electrode layer is greater than zero.

[0032] Specifically, in one embodiment of the present application, the process of etching the second electrode layer may be a dry etching process or a wet etching process, but the present application does not limit this and it depends on the specific circumstances.

[0033] like Figure 3 As shown, a dielectric layer A160 (corresponding to the second dielectric layer) is formed on the side of the second electrode layer 150 away from the substrate A100. Optionally, the formation process of the dielectric layer A160 is a deposition process, specifically PVD or CVD, etc. The material of the dielectric layer A160 can be SiO2, SiNx or AlN, etc., and the present application does not limit this, depending on the specific circumstances.

[0034] It should be noted that, in the embodiment of the present application, the dielectric layer A160 is a protective layer for the second electrode layer 150 to prevent the second electrode layer 150 from being oxidized. Optionally, the dielectric layer A also serves as a dielectric layer for a capacitor formed subsequently.

[0035] like Figure 4 As shown, the second region of the second electrode layer 150 and the portion of the dielectric layer A160 located on the surface of the second region of the second electrode layer are etched to obtain a lower electrode pattern structure, the lower electrode pattern structure includes the remaining portion of the second electrode layer (i.e., the second electrode 152) and the portion of the dielectric layer A located on the surface of the second electrode 152, and the second region is located on the first side of the step structure in a plane parallel to the substrate A. Optionally, the process of etching the dielectric layer A and the second electrode layer can be a wet etching process or a dry etching process.

[0036] A fifth electrode is fabricated on the surface of the dielectric layer A away from the piezoelectric layer. The fifth electrode is located on one side of the first resonant cavity and forms a capacitor A with the dielectric layer A and the second electrode. Specifically, fabricating the fifth electrode on the surface of the dielectric layer A away from the piezoelectric layer includes: like Figure 5 As shown, a fifth electrode 170 is formed in the third region on the surface of the lower electrode pattern structure, that is, the fifth electrode 170 is formed in the third region on the surface of the dielectric layer A160 away from the piezoelectric layer 140. In a plane parallel to the substrate A100, the third region is located on the second side of the step structure 151, and the second side is opposite to the first side. It should be noted that in this embodiment, the fifth electrode 170, the dielectric layer A160, and the second electrode 152 form a capacitor A. Optionally, the material of the fifth electrode can be Al, Cu, Mo, Au or Pt, etc., which is not limited in this application and depends on the specific situation.

[0037] Specifically, in one embodiment of the present application, forming a fifth electrode in the third area on the surface of the lower electrode pattern structure includes: Forming a third electrode layer on the surface of the lower electrode pattern structure and the exposed surface of the piezoelectric layer, wherein the third electrode layer may be formed by PVD, electroplating or chemical plating; The third electrode layer is etched to remove a portion of the third electrode layer located on the surface of the piezoelectric layer and a portion of the third electrode layer located on the surface of the lower electrode pattern structure, and a portion of the third electrode layer located on the surface of the lower electrode pattern structure is retained (i.e., a portion of the third electrode layer located in a third area on the surface of the lower electrode pattern structure is retained) to form a fifth electrode. Optionally, the etching process of the third electrode layer can be wet etching or dry etching.

[0038] like Figure 6 As shown, a sacrificial layer 180 is formed on the side of the lower electrode pattern structure away from the piezoelectric layer 140, and the sacrificial layer 180 also covers the exposed portion of the piezoelectric layer 140 and the fifth electrode 170, that is, a sacrificial layer is formed on the side of the fifth electrode 170 away from the dielectric layer A160, and the projection of the sacrificial layer on the substrate A coincides with the substrate A. Optionally, the material of the sacrificial layer 180 may be SiO2, PSG, USG, a-Si or photoresist, etc.; the formation process of the sacrificial layer 180 may be PVD, CVD or spin coating, etc.

[0039] like Figure 7As shown, the sacrificial layer 180 is etched to form a through hole A181 and a through hole B182 in the sacrificial layer 180, wherein the through hole A181 exposes a portion of the surface of the piezoelectric layer 140, and the through hole B182 exposes a portion of the surface of the dielectric layer A160. Specifically, the etching process of the sacrificial layer 180 can be dry etching or wet etching.

[0040] like Figure 8 As shown, a cut-off boundary layer 190 is formed on the side of the sacrificial layer 180 away from the dielectric layer A160, and the cut-off boundary layer 190 also fills the through hole A181 and the through hole B182, that is, the cut-off boundary layer 190 covers the sacrificial layer 180 and the side wall of the through hole A181, the bottom of the through hole A181, the side wall of the through hole B182, and the bottom of the through hole B182. It should be noted that, in this embodiment, the cut-off boundary layer 190 has a first protrusion and a second protrusion facing the piezoelectric layer 140, the first protrusion corresponds to the through hole A181 and contacts the exposed area of ​​the piezoelectric layer, and the second protrusion corresponds to the through hole B182 and contacts the dielectric layer A.

[0041] It should also be noted that, in this embodiment, the cut-off boundary layer 190 and the sacrificial layer 180 are made of different materials, so that the chemical substances used when etching the sacrificial layer 180 will not damage the cut-off boundary layer 190. Optionally, the cut-off boundary layer 190 may be made of SiO2 or polycrystalline silicon (poly-Si), and the formation process may be PVD, CVD, etc.

[0042] like Fig. 9 As shown, a bonding layer A200 is formed on the side of the cut-off boundary layer 190 away from the piezoelectric layer 140, and the bonding layer A200 covers the surface of the cut-off boundary layer 190 and fills the through hole A and the through hole B. Optionally, the material of the bonding layer A may be SiO2, and the formation process may be PVD or CVD, etc., which is not limited in the present application and depends on the specific situation.

[0043] like Fig.10 As shown, a substrate B210 serving as a carrier is bonded to the bonding layer A200 on a side away from the cut-off boundary layer 190 .

[0044] like Fig.11 As shown, the wafer composed of the various structures manufactured as described above is flipped over, and the substrate A100 and the transition layer 110 are removed from the side of the substrate A100 away from the substrate B210. Optionally, the removal process of the substrate A100 and the transition layer 110 can be grinding or chemical mechanical polishing (CMP), which is not limited in the present application and depends on the specific circumstances.

[0045] like Fig.12 As shown, the seed layer 120 and the first electrode layer 130 are etched in the fourth region to expose a portion of the surface of the piezoelectric layer 140 to form an upper electrode pattern structure, wherein the upper electrode pattern includes a first electrode 131 and a portion of the seed layer located on the surface of the first electrode 131. The first electrode 131 is located in the fifth region of the first side of the piezoelectric layer 140.

[0046] Optionally, the etching process of the seed layer 120 and the first electrode layer 130 may be wet etching or dry etching.

[0047] like Fig.13 As shown, a through hole C1401 is formed in the exposed portion of the piezoelectric layer 140, and the through hole C1401 penetrates the piezoelectric layer 140 to expose a portion of the surface of the second electrode 152, so as to facilitate the extraction of the second electrode 152. The second electrode 152 is located in the sixth region of the second side of the piezoelectric layer 140. In the first direction, the fifth region and the sixth region partially overlap and partially do not overlap.

[0048] Optionally, the formation process of the through hole C1401 may be a wet etching process or a dry etching process.

[0049] like Fig.14 As shown, a through hole D1201 is formed in the seed layer 120, and the through hole D1201 exposes a portion of the surface of the first electrode 131 to facilitate the extraction of the first electrode 131. Specifically, the through hole D1201 may be formed by a wet etching process or a dry etching process.

[0050] like Fig.15 As shown, a first conductive layer 230 is formed in the through hole D, the first conductive layer 230 covers the side wall and the bottom of the through hole D, and also extends to cover a portion of the surface of the seed layer 120; a second conductive layer 220 is formed in the through hole C, the second conductive layer 220 covers the side wall and the bottom of the through hole C, and also extends to cover a portion of the surface of the piezoelectric layer 140. It should be noted that, in this embodiment, the first conductive layer is electrically connected to the first electrode, and compared with the first electrode, the first conductive layer has a higher conductivity; the second conductive layer is electrically connected to the second electrode, and compared with the second electrode, the second conductive layer has a higher conductivity.

[0051] Optionally, in one embodiment of the present application, the material of the first conductive layer may be Au, Cu or Al, etc., and the formation method may be PVD or electroplating, etc.; similarly, the material of the second conductive layer may be Au, Cu or Al, etc., and the formation method may be PVD or electroplating, etc.

[0052] Optionally, the second conductive layer and the first conductive layer are formed simultaneously to simplify the forming process of the filter device. Specifically, in one embodiment of the present application, the method for forming the first conductive layer and the second conductive layer includes: Forming a conductive layer on a side of the seed layer away from the piezoelectric layer, the conductive layer covers the surface of the seed layer, the surface of the through hole D, the exposed surface of the piezoelectric layer and the surface of the through hole C; The conductive layer is etched to form a first conductive layer and a second conductive layer, wherein the first conductive layer covers the side wall and the bottom of the through hole D, and also extends to cover a portion of the surface of the seed layer, and the second conductive layer covers the side wall and the bottom of the through hole C, and also extends to cover a portion of the surface of the piezoelectric layer.

[0053] It should be noted that, in this embodiment, the etching process of the conductive layer may be a wet etching process or a dry etching process.

[0054] like Fig.16 As shown, a preset area of ​​the sacrificial layer 180 is released, and a first resonant cavity 1801 is formed below the acoustic resonator, wherein the preset area is located between the first protrusion and the second protrusion, that is, the portion of the sacrificial layer 180 located between the first protrusion and the second protrusion is released, and the portion of the sacrificial layer located on the side of the first protrusion away from the second protrusion is retained to form a first sacrificial layer, and the portion of the second protrusion located on the side of the second protrusion away from the first protrusion is retained to form a second sacrificial layer, and the first resonant cavity 1801 is an area defined by the piezoelectric layer 140, the dielectric layer A160, the first protrusion, the second protrusion, and the cut-off boundary layer 190. At least a portion of the first resonant cavity 1801 is in contact with the piezoelectric layer 140.

[0055] Optionally, in one embodiment of the present application, releasing a preset area of ​​the sacrificial layer to form a first resonant cavity below the acoustic resonator includes: using a liquid phase etching or a vapor phase etching method to release a preset area of ​​the sacrificial layer to form a first resonant cavity below the acoustic resonator.

[0056] Specifically, in one embodiment of the present application, using a liquid phase etching method or a gas phase etching method to release a preset area of ​​the sacrificial layer, and forming a first resonant cavity below the acoustic resonator includes: Using a liquid phase etching solution such as a hydrofluoric acid solution (HF) or a buffered oxide etchant (BOE) to etch a preset area of ​​the sacrificial layer to form a first resonant cavity below the acoustic resonator; Alternatively, a gas such as gaseous hydrogen fluoride (HF) or xenon difluoride (XeF2) is used to etch a preset area of ​​the sacrificial layer to form a first resonant cavity below the acoustic resonator.

[0057] like Fig.17 As shown, a bonding layer B240 is formed, and the bonding layer B240 is located on the side of the first electrode 131 away from the piezoelectric layer 140, that is, the bonding layer B240 is located on the side of the seed layer 120 away from the piezoelectric layer 140, and the bonding layer B240 also covers the exposed surface of the piezoelectric layer 140.

[0058] Optionally, in one embodiment of the present application, the material of the bonding layer B is SiO2 or SiNx, etc., and the formation process may be PVD or CVD, etc.; in another embodiment of the present application, the bonding layer B is a photoresist-like dry film material, which is formed by spin coating, photolithography and other processes. The present application does not limit this, and it depends on the specific circumstances.

[0059] like Fig.18 As shown, a second resonant cavity 2400 is formed above the acoustic resonator, and at least a portion of the second resonant cavity 2400 is in contact with the piezoelectric layer 140. Fig.19 As shown, a substrate C250 is bonded to the bonding layer B240 at a side away from the seed layer 120 as a cap, and the area defined by the substrate C250, the bonding layer B240, the first electrode 131 and the piezoelectric layer 140 is the second resonant cavity 2400. Optionally, the material of the substrate C can be silicon, glass, SiC, GaAs, etc., which is not limited in the present application and depends on the specific circumstances.

[0060] like Fig. 20 As shown, the substrate C250 is thinned.

[0061] like Fig.21 As shown, the wafers composed of the various structures manufactured as described above are turned over.

[0062] like Fig. 22As shown, the substrate B210 is perforated to form a through hole E2101 (corresponding to the first through hole) and a through hole F2102 (corresponding to the second through hole). The through hole E2101 penetrates the substrate B210, the bonding layer A200, the cut-off boundary layer 190, the sacrificial layer 180 and the piezoelectric layer 140, exposing a portion of the surface of the first electrode 131 to facilitate the lead-out of the first electrode 131. The through hole F2102 penetrates the substrate B210, the bonding layer A200, the cut-off boundary layer 190, the sacrificial layer 180 and the dielectric layer A160, exposing a portion of the surface of the second electrode 152 to facilitate the lead-out of the second electrode 152.

[0063] Optionally, in one embodiment of the present application, the formation process of the through hole E2101 and the through hole F2102 is a dry etching process, specifically, using deep reactive ion etching (DRIE) equipment and process, the substrate B210, the bonding layer A200, the cut-off boundary layer 190, the sacrificial layer 180 and the piezoelectric layer 140 are dry-etched to form the through hole E2101. Using deep reactive ion etching (DRIE) equipment and process, the substrate B210, the bonding layer A200, the cut-off boundary layer 190, the sacrificial layer 180 and the dielectric layer A160 are dry-etched to form the through hole F2102.

[0064] like Fig.23 As shown, a third conductive layer 260 is formed on the surface of the through hole E2101, and the third conductive layer 260 covers the side wall and the bottom of the through hole E2101, and also extends to cover a part of the surface of the substrate B210; a fourth conductive layer 270 is formed on the surface of the through hole F2102, and the fourth conductive layer 270 covers the side wall and the bottom of the through hole F2102, and also extends to cover a part of the surface of the substrate B210; It should be noted that, in this embodiment, the third conductive layer 260 is electrically connected to the first electrode 131, and has a higher conductivity than the first electrode 131; the fourth conductive layer 270 is electrically connected to the second electrode 152, and has a higher conductivity than the second electrode 152.

[0065] Optionally, in one embodiment of the present application, the material of the third conductive layer 260 may be Au, Cu or Al, etc., and the formation method may be PVD or electroplating, etc.; similarly, the material of the fourth conductive layer 270 may be Au, Cu or Al, etc., and the formation method may be PVD or electroplating, etc.

[0066] Optionally, the third conductive layer 260 and the fourth conductive layer 270 are formed simultaneously to simplify the forming process of the filter device. Specifically, in one embodiment of the present application, the forming method of the third conductive layer 260 and the fourth conductive layer 270 includes: A conducting layer is formed on a side of the substrate B210 away from the piezoelectric layer 140 , wherein the conducting layer covers the surface of the substrate B210 , the surface of the through hole E2101 , the exposed surface of the piezoelectric layer 140 , and the surface of the through hole F2102 ; The conductive layer is etched to form a third conductive layer 260 and a fourth conductive layer 270, wherein the third conductive layer 260 covers the side walls and the bottom of the through hole E2101 and the exposed surface of the piezoelectric layer 140, and also extends to cover a portion of the surface of the substrate B210; the fourth conductive layer 270 covers the side walls and the bottom of the through hole F2102 and the exposed surface of the piezoelectric layer 140, and also extends to cover a portion of the surface of the substrate B210.

[0067] It should be noted that, in this embodiment, the etching process of the conductive layer may be a wet etching process or a dry etching process.

[0068] like Fig.24 As shown, a first signal lead 280 and a second signal lead 290 are made on the side of the substrate B210 away from the piezoelectric layer 140, the first signal lead 280 is electrically connected to the first electrode 131, and the second signal lead 290 is electrically connected to the second electrode 152. Specifically, the first signal lead 280 is formed on the surface of the third conductive layer 260, and the first signal lead 280 is electrically connected to the first electrode 131 through the third conductive layer 260, and the second signal lead 290 is formed on the surface of the fourth conductive layer 270, and the second signal lead 290 is electrically connected to the second electrode 152 through the fourth conductive layer 270. It should be noted that in the embodiment of the present application, the first signal lead and the second signal lead are signal leads of the acoustic resonator. Optionally, the first signal lead and the second signal lead can also be used as the lower electrode of the capacitor made later.

[0069] Optionally, in an embodiment of the present application, the material of the first signal lead may be Cu, Al, Au or Ag, etc. Similarly, the material of the second signal lead may also be Cu, Al, Au or Ag, etc. Optionally, the second signal lead and the first signal lead are made of the same material, so that the second signal lead and the first signal lead can be made at the same time, but the present application does not limit this, and it depends on the specific situation.

[0070] Specifically, in one embodiment of the present application, forming a second signal lead on the surface of the fourth conductive layer and forming a first signal lead on the surface of the third conductive layer includes: Forming a metal layer on the surface of the fourth conductive layer, the surface of the third conductive layer and the surface of the substrate B; The metal layer is etched to remove a portion of the metal layer located on the surface of the substrate B, and a portion of the metal layer located on the surface of the third conductive layer and a portion of the metal layer located on the surface of the fourth conductive layer are retained to obtain a first signal lead located on the surface of the third conductive layer and a second signal lead located on the surface of the fourth conductive layer.

[0071] Optionally, in one embodiment of the present application, the formation process of the metal layer can be PVD, including evaporation, sputtering, or electroplating; the etching process of the metal layer can be a wet etching process or a dry etching process, which is not limited in the present application and depends on the specific circumstances.

[0072] like Fig.25 As shown, a dielectric layer B300 (corresponding to the first dielectric layer) is formed on the side of the first signal lead 280 and the second signal lead 290 away from the substrate B, and the dielectric layer B300 covers the first signal lead 280, the second signal lead 290 and the exposed surface of the substrate B. It should be noted that in this embodiment, the dielectric layer B is a capacitor dielectric layer of the capacitor B (corresponding to the first capacitor) and the capacitor C (corresponding to the second capacitor) formed subsequently. Optionally, the material of the dielectric layer B can be SiO2 or SiNx, etc., and the formation process can be CVD, etc., which is not limited in this application and depends on the specific situation.

[0073] Continue as Fig.25 As shown, a fourth electrode layer 310 is formed on the side of the dielectric layer B300 away from the substrate B.

[0074] like Fig.26 As shown, the fourth electrode layer 310 is etched to form a third electrode 3102 and a fourth electrode 3101. In the first direction, the third electrode 3102 at least partially overlaps with the first signal lead 280. The third electrode 3102, the first signal lead 280 and the dielectric layer B300 constitute a capacitor B (corresponding to the first capacitor). In the first direction, the fourth electrode 3101 at least partially overlaps with the second signal lead 290 , and the fourth electrode 3101 , the second signal lead 290 and the dielectric layer B300 form a capacitor C (corresponding to a second capacitor).

[0075] It should be noted that, in this embodiment, the projection of the fourth electrode in the plane where the dielectric layer B is located is located within the projection range of the second signal lead in the plane where the dielectric layer B is located, and the projection area of ​​the fourth electrode is smaller than the projection area of ​​the second signal lead; similarly, the projection of the third electrode in the plane where the dielectric layer B is located is located within the projection range of the first signal lead in the plane where the dielectric layer B is located, and the projection area of ​​the third electrode is smaller than the projection area of ​​the first signal lead.

[0076] It should also be noted that Fig.26 The filtering device shown includes both a first capacitor and a second capacitor, but the present application is not limited to this. In other embodiments of the present application, the filtering device may also include only the first capacitor, or only the second capacitor, depending on the specific circumstances.

[0077] Optionally, the etching process of the fourth electrode layer may be a dry etching process or a wet etching process.

[0078] like Figure 27-Figure 36 As shown, a first electrode lead-out structure and a second electrode lead-out structure are manufactured, wherein the first electrode lead-out structure is used to realize electrical connection between the first electrode and the outside world, and the second electrode lead-out structure is used to realize electrical connection between the second electrode and the outside world. The second electrode lead-out structure can be electrically connected to the second signal lead to realize the lead-out of the second electrode, and can also be electrically connected to the fourth electrode to realize the lead-out of the second electrode; similarly, the first electrode lead-out structure can be electrically connected to the first signal lead to realize the lead-out of the first electrode, and can also be electrically connected to the fifth electrode to realize the lead-out of the first electrode.

[0079] Specifically, Fig. 27 As shown, the dielectric layer B300 is etched to form a through hole P3001 in the dielectric layer B300, and the through hole P exposes a portion of the first signal lead 280 to facilitate the lead-out of the lower electrode of the third capacitor filter, that is, the lead-out of the first signal lead 280, thereby facilitating the subsequent electrical connection between the first electrode and the outside world. Specifically, the etching process of the dielectric layer B300 can be a dry etching process or a wet etching process, which is not limited in this application and depends on the specific situation.

[0080] like Fig.28As shown, a dielectric layer C320 (corresponding to the third dielectric layer) is formed on the side of the dielectric layer B300 away from the substrate B, and the dielectric layer C320 covers the dielectric layer B300, the fourth electrode 3101 and the third electrode 3102. Optionally, the material of the dielectric layer C can be a photosensitive organic material, such as polyimide (abbreviated as PI), benzocyclobutene (BCB), etc., which is formed by spin coating.

[0081] like Fig.29 As shown, the dielectric layer C320 is etched to form a through hole Q3201 and a through hole R3202 in the dielectric layer C320, wherein the through hole Q3201 is connected to the through hole P3001 to form a through hole S, and the through hole S exposes a partial area of ​​the first signal lead 280, and the through hole R3202 penetrates the dielectric layer C to expose a partial area of ​​the fourth electrode 3101. Specifically, in one embodiment of the present application, the through hole Q3201 and the through hole R3202 are obtained by exposing and developing the dielectric layer C.

[0082] It should be noted that although Fig.29 It is shown that the through hole S exposes a partial area of ​​the first signal lead 280 to achieve electrical connection between the first electrode and the outside world, but the present application does not limit this. In other embodiments of the present application, it is also possible to choose not to use the through hole S to expose a partial area of ​​the first signal lead 280, but to choose to use the through hole Q to expose a partial area of ​​the third electrode 3102 to achieve electrical connection between the first electrode and the outside world. The present application does not limit this, and it depends on the specific situation.

[0083] Similarly, although Fig.29 It is shown that the through hole R3202 in the dielectric layer C320 exposes a partial area of ​​the fourth electrode 3101 to achieve electrical connection between the second electrode 152 and the outside world, but the present application does not limit this. In other embodiments of the present application, the through hole R3202 in the dielectric layer C320 may not choose to expose a partial area of ​​the fourth electrode 3101 to achieve electrical connection between the second electrode and the outside world, but may choose to expose a partial area of ​​the second signal lead 290 to achieve electrical connection between the second electrode and the outside world. The present application does not limit this, and it depends on the specific circumstances.

[0084] like Fig.30As shown, a first inductor layer 330 is formed on the side of the dielectric layer C320 away from the dielectric layer B300. The first inductor layer 330 covers the dielectric layer C320 and fills the through hole S and the through hole R. Optionally, the material of the first inductor layer can be nickel-zinc ferrite material, manganese-zinc ferrite material or metal soft magnetic material, preferably manganese-zinc ferrite material. The formation process can be winding method, lamination method, powder metallurgy method, laser direct forming method or thin film technology. The present application does not limit this and it depends on the specific situation.

[0085] like Fig.31 As shown, the first inductor layer 330 is patterned to form a first inductor 3301 and a second inductor 3302, wherein the first inductor 3301 is electrically connected to the fourth electrode 3101, and the second inductor 3302 is electrically connected to the first signal lead 280. Specifically, the patterning method of the first inductor layer 330 can be wet etching or dry etching.

[0086] It should also be noted that Fig.31 The filtering device shown includes both a first inductor and a second inductor, but the present application does not limit this. In other embodiments of the present application, the filtering device may also include only the first inductor, or only the second inductor, depending on the specific circumstances.

[0087] like Fig.32 As shown, a dielectric layer D340 (corresponding to the fourth dielectric layer) is formed on the side of the first inductor 3301 and the second inductor 3302 away from the dielectric layer C320, and the dielectric layer D340 has a through hole T3401 and a through hole U3402, wherein the through hole T exposes a part of the first inductor 3301, and the through hole U3402 exposes a part of the second inductor 3302. Optionally, the material of the dielectric layer D may be a photosensitive organic material, such as polyimide (abbreviated as PI), benzocyclobutene (BCB), etc., which is formed by spin coating; the through hole T3401 and the through hole U3402 may be obtained by exposure and development.

[0088] like Fig.33 As shown, a second inductor layer 350 is formed on the side of the dielectric layer D340 away from the dielectric layer C320, and the second inductor layer 350 also fills the through hole T3401 and the through hole U3402; like Fig.34 As shown, the second inductor layer 350 is patterned to obtain a third inductor 3501 and a fourth inductor 3502, wherein the third inductor 3501 is electrically connected to the first inductor 3301 through the through hole T3401, and the fourth inductor 3502 is electrically connected to the second inductor 3302 through the through hole U3402.

[0089] Optionally, the material of the second inductor layer may be nickel-zinc ferrite material, manganese-zinc ferrite material or metal soft magnetic material, and the formation process may be winding method, lamination method, powder metallurgy method, laser direct forming method or thin film technology; the graphic process of the second inductor layer may be a dry etching process or a wet etching process, which is not limited in the present application and depends on the specific circumstances.

[0090] It should be noted that, in this embodiment, Fig.34 The filtering device shown includes not only the first inductor and the second inductor, but also a third inductor and a fourth inductor, but the present application does not limit this. In other embodiments of the present application, the filtering device may also include more inductors, depending on the specific circumstances.

[0091] like Fig.35 As shown, a dielectric layer E360 is formed on the side of the third inductor 3501 and the fourth inductor 3502 away from the dielectric layer D340, and the dielectric layer E360 has a through hole V3601 and a through hole W3602, wherein the through hole V3601 exposes a partial surface area of ​​the third inductor 3501, and the through hole W3602 exposes a partial surface area of ​​the fourth inductor 3502. Optionally, the material of the dielectric layer E can be a photosensitive organic material, such as polyimide (abbreviated as PI), benzocyclobutene (BCB), etc., which can be obtained by spin coating; the through hole V3601 and the through hole W3602 are obtained by exposure and development.

[0092] It should be noted that, in this embodiment, the through hole V3601 and the through hole W3602 are used for electrical connection with the outside world.

[0093] Specifically, in one embodiment of the present application, the third inductor 3501 and the fourth inductor 3502 are connected to the outside world through the through hole V3601 and the through hole W3602 by wire bonding to perform electrical signal connection.

[0094] In another embodiment of the present application, Fig.36 As shown, a pad 370 and a solder ball 380 are sequentially formed in the through hole V3601 and the through hole W3602, and then electrically connected to the outside through a bumping method.

[0095] As can be seen from the above, the filter device manufactured by the manufacturing method of the stress-relief filter device provided by the embodiment of the present application includes: a substrate as a carrier, an acoustic resonator and at least one capacitor structure, wherein the acoustic resonator is formed on the first side of the substrate; and the capacitor structure is formed on the second side of the substrate and is electrically connected to at least one electrode of the acoustic resonator through a through hole. Thus, the perforation can be started from the substrate as a carrier, not only penetrating the bonding layer, but also sequentially penetrating the cut-off boundary layer, the sacrificial layer, the dielectric layer, the piezoelectric layer and other solid material layers to form a through hole for realizing the electrical connection between the capacitor and the acoustic resonance electrode. Since these layers are mainly composed of solid materials with high mechanical strength and toughness, the risk of fracture caused by weak connection of materials (such as bonding layer) can be significantly reduced during perforation, and the local stress concentration that may be introduced by the perforation operation is reduced. The fracture of the filter device caused by perforation during manufacturing and use is greatly reduced, and the reliability and stability of the filter device are improved. Thus, the technical problem that the filter device integrating the acoustic resonator and the capacitor filter is prone to fracture in the prior art is solved.

[0096] In addition, an embodiment of the present application also provides a stress relief filter device manufactured using the manufacturing method provided by any of the above embodiments.

[0097] like Fig.36 As shown, the stress relief filtering device provided in an embodiment of the present application includes: a substrate B210 as a carrier, an acoustic resonator and at least one capacitor structure, wherein the acoustic resonator is formed on a first side of the substrate; and the capacitor structure is formed on a second side of the substrate B210 and is electrically connected to at least one electrode of the acoustic resonator through a through hole.

[0098] Optionally, the acoustic resonator includes: a piezoelectric layer 140, a first electrode 131 and a second electrode 152; wherein the first electrode 131 is located on a side of the piezoelectric layer 140 away from the substrate B210; the second electrode 152 is located on a side of the piezoelectric layer 140 close to the substrate B210; and the capacitor structure includes a first capacitor and / or a second capacitor; the first capacitor is electrically connected to the first electrode through a first through hole; and the second capacitor is electrically connected to the second electrode through a second through hole.

[0099] Optionally, the capacitor structure includes the first capacitor; the first through hole passes through the substrate B210, the piezoelectric layer 140 and contacts the first electrode 131; and the first capacitor includes: a first signal lead 280 located in the first through hole and electrically connected to the first electrode 131; a dielectric layer B300 located on the second side of the substrate B210 and covering the first signal lead 280; and a third electrode 3102 located on the side of the dielectric layer B300 away from the substrate B210.

[0100] Optionally, the capacitor structure includes the second capacitor; the second through hole passes through the substrate B210 and contacts the second electrode 152; and the second capacitor includes: a second signal lead 290 located in the second through hole and electrically connected to the second electrode 152; a dielectric layer B300 located on the second side of the substrate B210 and covering the second signal lead 290; and a fourth electrode 3101 located on the side of the dielectric layer B300 away from the substrate B210.

[0101] Optionally, the filtering device also includes: a dielectric layer A160 located on the surface of the second electrode 152 on the side away from the piezoelectric layer 140; a sacrificial layer 180 located on the surface of the dielectric layer A160 on the side away from the piezoelectric layer 140; a cutoff boundary layer 190 located on the surface of the sacrificial layer 180 on the side away from the dielectric layer A160; a bonding layer A200 located on the side of the cutoff boundary layer 190 away from the dielectric layer A160; and, the first through hole sequentially penetrates the substrate B210, the bonding layer A200, the cutoff boundary layer 190, the sacrificial layer 180, the piezoelectric layer 140 and contacts the first electrode 131; the second through hole sequentially penetrates the substrate B210, the bonding layer A200, the cutoff boundary layer 190, the sacrificial layer 180, the dielectric layer A160 and contacts the second electrode 152.

[0102] On the basis of the above embodiments, in one embodiment of the present application, the filtering device includes a fourth electrode 3101 and the third electrode 3102, and the filtering device also includes: a first electrode lead-out structure and a second electrode lead-out structure; wherein the first electrode lead-out structure is electrically connected to the first signal lead 280, or is electrically connected to the third electrode 3102, and is used to lead out the electrical connection end of the first electrode 131 for electrical connection to the outside world; the second electrode lead-out structure is electrically connected to the second signal lead 290, or is electrically connected to the fourth electrode 3101, and is used to lead out the electrical connection end of the second electrode 152 for electrical connection to the outside world.

[0103] Optionally, in one embodiment of the present application, the filter device further includes: a pad and a solder ball electrically connected to the second electrode lead-out structure and the first electrode lead-out structure. Specifically, the filter device includes: A first pad and a first solder ball, wherein the first pad is electrically connected to the first electrode lead-out structure, and the first solder ball is electrically connected to the first pad, and is used to electrically connect the first electrode lead-out structure to the outside; A second pad and a second solder ball, wherein the second pad is electrically connected to the second electrode lead-out structure, and the second solder ball is electrically connected to the second pad, and is used to electrically connect the second electrode lead-out structure to the outside.

[0104] It should be noted that, since the detailed structure of the filter device has been described in detail in the manufacturing method of the filter device, it will not be repeated here.

[0105] It should also be noted that although the stress relief filtering device and its manufacturing method provided in the embodiment of the present application are described by taking the filtering device as an example including three capacitors, the present application is not limited to this. In other embodiments of the present application, the filtering device may also include other numbers of capacitors, depending on the specific circumstances.

[0106] Although the stress relief filter device and its manufacturing method provided in the embodiment of the present application are described by taking the filter device including four inductors as an example, the present application does not limit this. In other embodiments of the present application, the filter device may also include other numbers of inductors, depending on the specific circumstances.

[0107] In summary, in the stress-relief filter device and its manufacturing method provided in the embodiment of the present application, the acoustic resonator is formed on the first side of the substrate as a carrier, and the capacitor structure is formed on the second side of the substrate, so that the perforation can be started from the substrate as a carrier, not only penetrating the bonding layer, but also sequentially penetrating the cut-off boundary layer, sacrificial layer, dielectric layer, piezoelectric layer and other solid material layers to form a through hole for realizing the electrical connection between the capacitor and the acoustic resonance electrode. Since these layers are mainly composed of solid materials with high mechanical strength and toughness, the risk of fracture caused by weak material connection (such as bonding layer) can be significantly reduced during perforation, and the local stress concentration that may be introduced by the perforation operation is reduced, which greatly reduces the fracture of the filter device caused by perforation during the manufacturing and use process, and improves the reliability and stability of the filter device. This solves the technical problem that the filter device integrating the acoustic resonator and the capacitor filter is prone to fracture in the prior art.

[0108] The various parts in this manual are described in a progressive manner, and each part focuses on the differences from other parts. The same or similar parts between the various parts can be referenced to each other.

[0109] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A stress relief filtering device, characterized in that: include: a substrate as a carrier, an acoustic resonator and at least one capacitive structure, wherein The acoustic resonator is formed on a first side of the substrate; as well as The capacitor structure is formed on the second side of the substrate and is electrically connected to at least one electrode of the acoustic resonator through a through hole.

2. The filtering device according to claim 1, characterized in that The acoustic resonator comprises: a piezoelectric layer, a first electrode, a second electrode and a resonant cavity; wherein the first electrode is located on a side of the piezoelectric layer away from the substrate; the second electrode is located on a side of the piezoelectric layer close to the substrate; the resonant cavity is formed between the piezoelectric layer and the substrate; Furthermore, the capacitor structure includes a first capacitor and / or a second capacitor; the first capacitor is electrically connected to the first electrode through a first through hole; and the second capacitor is electrically connected to the second electrode through a second through hole.

3. The filtering device according to claim 2, characterized in that: The capacitor structure includes the first capacitor; the first through hole penetrates the substrate and the piezoelectric layer and contacts the first electrode; and the first capacitor includes: a first signal lead, a portion of which is electrically connected to the first electrode through the first through hole; another portion of which at least partially overlaps the substrate in a first direction; a first dielectric layer located on the second side of the substrate and covering the first signal lead; and A third electrode is located on a side of the first dielectric layer away from the substrate.

4. The filtering device according to claim 3, characterized in that: The capacitor structure includes the second capacitor; the second through hole penetrates the substrate and contacts the second electrode; and the second capacitor includes: a second signal lead, a portion of which is electrically connected to the second electrode through the second through hole; another portion of which at least partially overlaps the substrate in the first direction; a first dielectric layer located on the second side of the substrate and covering the second signal lead; and A fourth electrode is located on a side of the first dielectric layer away from the substrate.

5. The filtering device according to claim 2, characterized in that: The filter device further comprises: a second dielectric layer located on a surface of the second electrode away from the piezoelectric layer; a sacrificial layer located on a surface of the second dielectric layer away from the piezoelectric layer; a cutoff boundary layer located on a surface of the sacrificial layer away from the second dielectric layer; and a bonding layer located on a side of the cutoff boundary layer away from the second dielectric layer. Furthermore, the first through hole sequentially penetrates the substrate, the bonding layer, the cutoff boundary layer, the sacrificial layer, and the piezoelectric layer to contact the first electrode; the second through hole sequentially penetrates the substrate, the bonding layer, the cutoff boundary layer, the sacrificial layer, and the second dielectric layer to contact the second electrode.

6. The filtering device according to claim 1, characterized in that: The number of capacitors included in the filtering device is greater than or equal to three.

7. The filtering device according to claim 4, characterized in that: The filtering device also includes: a third dielectric layer located on a side of the first dielectric layer away from the substrate and covering the third electrode and the fourth electrode; and A first inductor and / or a second inductor located on a side of the third dielectric layer away from the substrate; wherein the first inductor is electrically connected to the fourth electrode, and the second inductor is electrically connected to the first signal lead.

8. The filtering device according to claim 7, characterized in that: The filtering device also includes: a fourth dielectric layer located on a side of the third dielectric layer away from the substrate and covering the first inductor and the second inductor; and A third inductor and / or a fourth inductor located on a side of the fourth dielectric layer away from the substrate; wherein the third inductor is electrically connected to the first inductor, and the fourth inductor is electrically connected to the second inductor.

9. A method for manufacturing a stress-relieving filter device, characterized in that: include: Producing a substrate as a carrier, an acoustic resonator, and at least one capacitive structure, wherein the acoustic resonator is formed on a first side of the substrate; And the capacitor structure is formed on the second side of the substrate and is electrically connected to at least one electrode of the acoustic resonator through a through hole.

10. The manufacturing method according to claim 9, characterized in that: The steps of making the acoustic resonator include: making a piezoelectric layer, a first electrode, a second electrode and a resonant cavity; wherein the first electrode is located on a side of the piezoelectric layer away from the substrate; the second electrode is located on a side of the piezoelectric layer close to the substrate; the resonant cavity is formed between the piezoelectric layer and the substrate; Furthermore, the step of manufacturing the capacitor structure includes: manufacturing a first capacitor and / or a second capacitor; the first capacitor is electrically connected to the first electrode through a first through hole; and the second capacitor is electrically connected to the second electrode through a second through hole.

11. The manufacturing method according to claim 10, characterized in that: The capacitor structure includes the first capacitor; the operation of making the first through hole includes: starting from the substrate, the first through hole penetrates the piezoelectric layer until the first through hole contacts the first electrode; and the steps of making the first capacitor include: making a first signal lead, a part of the first signal lead is electrically connected to the first electrode through the first through hole; another part of the first signal lead at least partially overlaps the substrate in a first direction; making a first dielectric layer located on the second side of the substrate and covering the first signal lead; and making a third electrode located on the side of the first dielectric layer away from the substrate; and / or The capacitor structure includes the second capacitor; the operation of making the second through hole includes: opening the second through hole from the substrate until the second through hole contacts the second electrode; and the steps of making the second capacitor include: making a second signal lead, a part of the second signal lead is electrically connected to the second electrode through the second through hole; another part of the second signal lead at least partially overlaps the substrate in a first direction; making a first dielectric layer located on the second side of the substrate and covering the second signal lead; and making a fourth electrode located on a side of the first dielectric layer away from the substrate.

12. The manufacturing method according to claim 10, characterized in that: Also includes: Manufacturing a second dielectric layer located on a surface of the second electrode away from the piezoelectric layer; manufacturing a sacrificial layer located on a surface of the second dielectric layer away from the piezoelectric layer; Manufacturing a cut-off boundary layer located on a surface of the sacrificial layer away from the second dielectric layer; manufacturing a bonding layer located on a side of the cut-off boundary layer away from the second dielectric layer; Furthermore, the operation of making the first through hole includes: opening a first through hole from the substrate, and sequentially penetrating the bonding layer, the cutoff boundary layer, the sacrificial layer, and the piezoelectric layer until the first through hole contacts the first electrode; the operation of making the second through hole includes: opening a second through hole from the substrate, and sequentially penetrating the bonding layer, the cutoff boundary layer, the sacrificial layer, and the second dielectric layer until the second through hole contacts the second electrode.

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