Media channel configuration method and device, storage medium and electronic equipment
The media path data is parsed and configured in low-power mode through DMA and chip logic, which solves the problem of frequent restarting and increasing power consumption in the configuration process in the prior art, and realizes flexible and low-power media path configuration.
Patent Information
- Application Number
- CN202411574355.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-06
- Publication Date
- 2025-02-14
AI Technical Summary
The lack of flexibility and adaptability in dynamically changing environments leads to frequent restarts or reloading configurations when dealing with video streams of different resolutions, frame rates, or color spaces, increasing system delays and resource waste, and configuration The process requires CPU participation, increasing power consumption.
The configuration data of the current frame is obtained in low-power mode through DMA, the configuration data is parsed using chip logic to obtain the target configuration address and configuration value, and the configuration value is configured into the shadow register through DMA, and the effective bit is set in the shadow register. The active bit is triggered when the frame interrupt signal is received, so that the configuration value is immediately effective.
Media path configuration is implemented in low-power mode, avoiding CPU participation in the configuration process, reducing power consumption in the media path configuration process, and improving system flexibility and adaptability.
Smart Images
Figure CN119450151A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the field of communication technology, and specifically to a media channel configuration method, device, storage medium and electronic device. Background Art
[0002] With the rapid development of multimedia technology, video and image processing are becoming increasingly important in various applications. Especially in the fields of real-time video processing, surveillance systems, intelligent transportation, and virtual reality, the demand for efficient and flexible media processing capabilities is increasing. Therefore, how to efficiently configure and manage multiple media channels to achieve optimal performance is a difficult problem that needs to be solved urgently.
[0003] Currently, static configuration is usually used to set fixed parameters for media channels. This method may be effective in specific scenarios, but it lacks flexibility and adaptability in dynamically changing environments. For example, when processing video streams with different resolutions, frame rates, or color spaces, traditional configuration methods often require frequent restarts or reloads of configurations, which not only increases system latency but can also lead to a waste of resources. In addition, traditional methods usually require the participation of the central processing unit (CPU) during the configuration process, which increases the burden on the system and causes an increase in power consumption. Summary of the invention
[0004] Embodiments of the present application provide a media path configuration method, device, storage medium, and electronic device, which can reduce power consumption during the media path configuration process.
[0005] In a first aspect, an embodiment of the present application provides a media path configuration method, including:
[0006] In low power mode, the configuration data of the current frame is obtained from the specified location of the storage device through DMA;
[0007] The configuration data is parsed using chip logic to obtain a target configuration address and a configuration value;
[0008] configuring the configuration value into a shadow register of the target configuration address through DMA, wherein a validity bit is set in the shadow register;
[0009] When a frame interrupt signal or a designated line interrupt signal is received, the validity bit is triggered to make the configuration value take effect immediately.
[0010] In a second aspect, an embodiment of the present application provides a media path configuration device, including:
[0011] An acquisition unit, used for acquiring configuration data of a current frame from a specified location of a storage device through DMA in a low power consumption mode;
[0012] A parsing unit, used to parse the configuration data using chip logic to obtain a target configuration address and a configuration value;
[0013] A configuration unit, configured to configure the configuration value into a shadow register of the target configuration address through DMA, wherein a validity bit is set in the shadow register;
[0014] The validation unit is used to trigger the validation bit when receiving a frame interrupt signal or a designated line interrupt signal, so that the configuration value takes effect immediately.
[0015] In a third aspect, the present application provides a storage medium storing a plurality of instructions suitable for loading by a processor to execute any of the above-mentioned media channel configuration methods.
[0016] In a fourth aspect, the present application provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements any of the above-mentioned media channel configuration methods when executing the computer program.
[0017] In summary, the media channel configuration method provided in the embodiment of the present application adopts the following method: in low power mode, the configuration data of the current frame is obtained from the specified location of the storage device through DMA; the configuration data is parsed by chip logic to obtain the target configuration address and configuration value; the configuration value is configured to the shadow register of the target configuration address through DMA, and the shadow register is provided with an effective bit; when a frame interrupt signal or a specified line interrupt signal is received, the effective bit is triggered to make the configuration value effective immediately. In this scheme, the configuration data at the specified location in the storage device can be directly read and parsed through DMA in low power mode, and the final configuration value can be directly configured in the shadow register of the target configuration address, so that the media channel can work normally, avoid the CPU from participating in the process of media channel configuration, and thus reduce the power consumption of the media channel configuration process. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.
[0019] Figure 1 It is a flowchart of the media channel configuration method provided in an embodiment of the present application.
[0020] Figure 2This is another flowchart of the media channel configuration method provided in an embodiment of the present application.
[0021] Figure 3 This is another flowchart of the media channel configuration method provided in an embodiment of the present application.
[0022] Figure 4 It is a structural diagram of the media channel configuration device provided in an embodiment of the present application.
[0023] Figure 5 It is another structural schematic diagram of the media channel configuration device provided in an embodiment of the present application.
[0024] Figure 6 It is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0025] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.
[0026] It should be noted that, in this article, the terms "include", "comprises" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "includes a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element. In addition, components, features, and elements with the same name in different embodiments of the present application may have the same meaning or different meanings, and their specific meanings need to be determined by their explanation in the specific embodiment or further combined with the context of the specific embodiment.
[0027] It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0028] In the subsequent description, the suffixes such as "module", "component" or "unit" used to represent elements are only used to facilitate the description of the present application, and have no specific meanings. Therefore, "module", "component" or "unit" can be used in a mixed manner.
[0029] In the description of the present application, it should be noted that the terms "upper", "lower", "left", "right", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, terms such as "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.
[0030] Currently, static configuration is usually used to set fixed parameters for media channels. This method may be effective in specific scenarios, but it lacks flexibility and adaptability in dynamically changing environments. For example, when processing video streams with different resolutions, frame rates, or color spaces, traditional configuration methods often require frequent restarts or reloads of configurations, which not only increases system latency but can also lead to a waste of resources. In addition, traditional methods usually require CPU involvement during the configuration process, which increases the burden on the system and leads to an increase in power consumption.
[0031] Based on this, an embodiment of the present application provides a media channel configuration method, device, storage medium and electronic device. Specifically, the media channel configuration device can be integrated in an electronic device, and the electronic device can be a server or a terminal or other device; wherein the terminal can include a mobile phone, a wearable smart device, a tablet computer, a laptop computer, and a personal computer (PC), etc.; the server can be a single server or a server cluster composed of multiple servers, and can be a physical server or a virtual server.
[0032] The technical solutions shown in the present application will be described in detail below through specific embodiments. It should be noted that the description order of the following embodiments is not intended to limit the priority order of the embodiments.
[0033] See also Figure 1 , Figure 1 : is a flow chart of a media channel configuration method provided in an embodiment of the present application. The specific flow of the media channel configuration method may be as follows:
[0034] 101. In low power mode, obtain configuration data of the current frame from a specified location of a storage device through DMA.
[0035] Direct Memory Access (DMA) is a technology in computer systems that allows hardware devices to interact directly with memory without CPU intervention, thereby reducing the burden on the CPU and improving system performance and response speed.
[0036] The storage device may be EMMC, FLASH, etc. In a specific implementation process, one or more designated locations may be pre-set on the storage device, and then the configuration data of the current frame or multiple frames may be stored in the designated locations.
[0037] It should be noted that the configuration data is saved in TLV (Type-Length-Value) format.
[0038] Among them, Type refers to the target configuration address identifier, which is used to indicate the specific media channel or functional module corresponding to the configuration data. For example, video input (VII), image signal processing (Image Signal Process, ISP), ISP front end (ISP-PRE), ISP back end (ISP-BE), video pre-processing (VPP), image processing engine (GPE) and end of configuration (End of Configuration, EOC), etc. In addition, Type will also define the starting address of the shadow register of the corresponding media channel (or module) to indicate the shadow register to be configured in the system.
[0039] Among them, Length refers to the data length, which is used to indicate the number of bytes of configuration data moved through DMA.
[0040] Among them, Value refers to the configuration value corresponding to Length, which is the actual parameter or data to be configured, such as resolution, frame rate or color space, etc. These configuration values will be written to the specified shadow register to implement the specific configuration of the media channel.
[0041] 102. Use chip logic to parse the configuration data to obtain a target configuration address and a configuration value.
[0042] By integrating the parsing process into the chip logic, the system can quickly identify the target configuration address and its corresponding configuration value at the hardware level, thereby reducing dependence on the CPU.
[0043] Specifically, the chip logic can be used to parse the configuration data according to a preset format to extract the target configuration address identifier and data length; then the target configuration address to be configured is determined according to the target configuration address identifier; finally, the configuration value of the corresponding length is read according to the data length.
[0044] In the specific implementation process, the construction of chip logic can be realized by hardware description languages such as Verilog or VHDL. The chip logic can parse the configuration data one by one in TLV format to obtain the target configuration address identifier and data length, and then read the configuration value of the corresponding length according to the data length.
[0045] In some embodiments, a media path table may be preset in the chip logic, in which a target configuration address identifier and a target configuration address having a mapping relationship are stored. The target configuration address may be a specific media path (or functional module) and a starting address of a shadow register of a corresponding path (or module). After obtaining the target configuration address identifier, the corresponding target configuration address may be obtained by querying the media path table.
[0046] 103. The configuration value is configured into a shadow register of the target configuration address through DMA, and a valid bit is set in the shadow register.
[0047] Shadow registers are special registers used to store device configuration parameters for quick access and modification during system startup or operation. In the shadow register, in addition to the configuration value itself, a special effective bit is set. This effective bit is used to indicate whether the configuration value is ready and effective. When a new configuration value is written to the shadow register, by setting this effective bit, it can be ensured that the new configuration value can take effect immediately after receiving the instruction.
[0048] In actual application, it is possible that the new configuration value is the same as the current configuration value of the target configuration address. At this time, if the configuration value is configured to the shadow register of the target configuration address through DMA, unnecessary write operations will be added, thereby increasing power consumption.
[0049] Therefore, in some embodiments, the configuration value may be compared with the current configuration value of the target configuration address before step 103, and whether to execute step 103 is determined according to the comparison result. Specifically, if the configuration value is the same as the current configuration value, the current configuration value of the target configuration address is not updated; if the configuration value is different from the current configuration value, step 103 is executed.
[0050] 104. When a frame interrupt signal or a specified line interrupt signal is received, the effective bit is triggered to make the configuration value take effect immediately.
[0051] In the specific implementation process, when the system receives new frame data, the frame interrupt signal will be triggered to notify the system to prepare for configuration update. In some applications, the configuration update can be triggered by specifying a line interrupt signal, which is usually related to the line scanning of the image.
[0052] It can be understood that after the effective bit is triggered, the above steps can be repeated to move the corresponding configuration value of the next frame to the shadow register through the same process, waiting for the next frame interrupt or specified line interrupt signal to be received to trigger the effective bit in the shadow register.
[0053] It should be noted that in the embodiment of the present application, the parsing process and the configuration process are performed simultaneously, that is, parsing and configuration are performed at the same time.
[0054] In addition, in the embodiment of the present application, a dip switch or a corresponding register configuration may be used to control the opening (enable) and closing (disable) of the media path configuration method.
[0055] Furthermore, the configuration data stored in the storage device may be configuration data of the same video stream, or may be configuration data of multiple video streams. That is, the embodiment of the present application may simultaneously perform media path configuration (switching) on multiple video streams.
[0056] In actual application, the configuration data obtained from the storage device through DMA can be all the configuration data of the current frame, or it can be part of the configuration data of the current frame. It can be understood that when the configuration data obtained from the storage device through DMA is all the configuration data of the current frame, the step of obtaining the configuration data of the current frame from the specified position of the storage device through DMA only needs to be performed once. When the configuration data obtained from the storage device through DMA is part of the configuration data of the current frame, the step of obtaining the configuration data of the current frame from the specified position of the storage device through DMA needs to be performed multiple times.
[0057] For example, when the configuration data obtained from the storage device through DMA is part of the configuration data of the current frame, the media channel configuration method provided in the embodiment of the present application can be as follows: Figure 2 As shown, specifically:
[0058] 201. In low power mode, obtain configuration data of the current frame from a specified location of a storage device through DMA;
[0059] 202. Use chip logic to parse the configuration data to obtain a target configuration address and a configuration value;
[0060] 203. The configuration value is configured into a shadow register of the target configuration address through DMA, and a valid bit is set in the shadow register;
[0061] 204. Return to the step of reading the configuration data of the current frame from the specified location of the storage device through DMA until the configuration data is parsed using chip logic to obtain an end mark;
[0062] 205. When a frame interrupt signal or a specified line interrupt signal is received, the effective bit is triggered so that the configuration value takes effect immediately.
[0063] For example, when the configuration data obtained from the storage device through DMA is all the configuration data of the current frame, the media channel configuration method provided in the embodiment of the present application can be as follows: Figure 3As shown, specifically:
[0064] 301. In low power mode, obtain configuration data of the current frame from a specified location of a storage device through DMA;
[0065] 302. Use chip logic to parse the configuration data to obtain a target configuration address and a configuration value;
[0066] 303. The configuration value is configured into a shadow register of the target configuration address through DMA, and a valid bit is set in the shadow register;
[0067] 304. Return to the step of parsing the configuration data using chip logic until the configuration data is parsed using chip logic and an end mark is obtained;
[0068] 305. When a frame interrupt signal or a specified line interrupt signal is received, the effective bit is triggered to make the configuration value take effect immediately.
[0069] It can be understood that the end mark (End of Configuration, EOC) is encapsulated in the last TLV of the configuration data of the current frame. When EOC is parsed, it means that the configuration data of the current frame has been fully parsed, and the configuration data obtained from the storage device through DMA is the configuration data of the current frame.
[0070] In summary, the media channel configuration method provided in the embodiment of the present application adopts the following method: in low power mode, the configuration data of the current frame is obtained from the specified position of the storage device through DMA; the configuration data is parsed by chip logic to obtain the target configuration address and configuration value; the configuration value is configured to the shadow register of the target configuration address through DMA, and the shadow register is provided with an effective bit; when a frame interrupt signal or a specified line interrupt signal is received, the effective bit is triggered to make the configuration value effective immediately. In this scheme, the configuration data at the specified position in the storage device can be directly read and parsed through DMA in low power mode, and the final configuration value can be directly configured in the shadow register of the target configuration address, so that the media channel can work normally, avoid the CPU from participating in the process of media channel configuration, and thus reduce the power consumption of the media channel configuration process.
[0071] In order to better implement the media channel configuration method provided in the embodiment of the present application, the embodiment of the present application also provides a media channel configuration device, wherein the meanings of the terms are the same as those in the above media channel configuration method, and the specific implementation details can refer to the description in the method embodiment.
[0072] See also Figure 4 , Figure 4401 is a schematic diagram of the structure of the media channel configuration device provided in the embodiment of the present application. The media channel configuration device may include an acquisition unit 401, a parsing unit 402, a configuration unit 403 and an effectiveness unit 404.
[0073] The acquisition unit 401 is used to acquire the configuration data of the current frame from a specified location of the storage device through DMA in the low power consumption mode;
[0074] The parsing unit 402 is used to parse the configuration data using chip logic to obtain a target configuration address and a configuration value;
[0075] A configuration unit 403, configured to configure the configuration value into a shadow register of a target configuration address through DMA, wherein a valid bit is set in the shadow register;
[0076] The validation unit 404 is used to trigger the validation bit when receiving a frame interrupt signal or a designated line interrupt signal, so that the configuration value takes effect immediately.
[0077] like Figure 5 As shown, in some embodiments, the media channel configuration device may also include a loop unit 405, which is used to return to the step of parsing the configuration data using chip logic until the configuration data is parsed using the chip logic and an end mark is obtained; or to return to the step of reading the configuration data of the current frame from a specified location of a storage device through DMA until the configuration data is parsed using chip logic and an end mark is obtained.
[0078] The specific implementation of each of the above units can refer to the above-mentioned embodiment of the media channel configuration method, which will not be described one by one here.
[0079] In summary, the media channel configuration device provided in the embodiment of the present application can obtain the configuration data of the current frame from the specified position of the storage device through DMA by the acquisition unit 401 in the low power mode; the parsing unit 402 uses chip logic to parse the configuration data to obtain the target configuration address and configuration value; the configuration unit 403 configures the configuration value to the shadow register of the target configuration address through DMA, and the shadow register is set with an effective bit; the effective unit 404 triggers the effective bit when receiving the frame interrupt signal or the specified line interrupt signal, so that the configuration value takes effect immediately. In this scheme, the configuration data at the specified position in the storage device can be directly read and parsed through DMA in the low power mode, and the final configuration value can be directly configured in the shadow register of the target configuration address, so that the media channel can work normally, avoid the CPU from participating in the media channel configuration process, and thus reduce the power consumption of the media channel configuration process.
[0080] The present application also provides an electronic device, in which the media channel configuration device of the present application can be integrated, such as Figure 6 As shown, it shows a schematic diagram of the structure of the electronic device involved in the embodiment of the present application, specifically:
[0081] The electronic device may include one or more processors 501 of processing cores and one or more computer-readable storage media memories 502 and other components. Those skilled in the art will appreciate that Figure 6 The electronic device structure shown in the figure does not constitute a limitation on the electronic device, and may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently.
[0082] The processor 501 is the control center of the electronic device, and uses various interfaces and lines to connect various parts of the entire electronic device. By running or executing the software program and / or the present application stored in the memory 502, and calling the data stored in the memory 502, the processor 501 performs various functions of the electronic device and processes data, thereby monitoring the electronic device as a whole. Optionally, the processor 501 may include one or more processing cores; preferably, the processor 501 may integrate an application processor and a modem processor, wherein the application processor mainly processes the operation storage medium, user interface and application program, etc., and the modem processor mainly processes wireless communication. It is understandable that the above-mentioned modem processor may not be integrated into the processor 501.
[0083] The memory 502 can be used to store software programs and the present application. The processor 501 executes various functional applications and data processing by running the software programs and the present application stored in the memory 502. The memory 502 may mainly include a program storage area and a data storage area, wherein the program storage area may store an operating storage medium, an application required for at least one function (such as a sound playback function, an image playback function, etc.), etc.; the data storage area may store data created according to the use of the electronic device, etc. In addition, the memory 502 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other volatile solid-state storage devices. Accordingly, the memory 502 may also include a memory controller to provide the processor 501 with access to the memory 502.
[0084] Although not shown, the electronic device may further include a display unit, an input unit, a power supply, etc., which will not be described in detail herein. Specifically in this embodiment, the processor 501 in the electronic device will load the executable files corresponding to the processes of one or more application programs into the memory 502 according to the following instructions, and the processor 501 will run the application programs stored in the memory 502, thereby realizing various functions, as follows:
[0085] In low power mode, the configuration data of the current frame is obtained from the specified location of the storage device through DMA;
[0086] Use chip logic to parse the configuration data to obtain the target configuration address and configuration value;
[0087] The configuration value is configured into the shadow register of the target configuration address through DMA, and the shadow register has a valid bit set;
[0088] When a frame interrupt signal or a specified line interrupt signal is received, the effective bit is triggered to make the configuration value take effect immediately.
[0089] A person of ordinary skill in the art will appreciate that all or part of the steps in the various methods of the above embodiments may be completed by instructions, or by controlling related hardware through instructions. The instructions may be stored in a computer-readable storage medium and loaded and executed by a processor.
[0090] To this end, an embodiment of the present application provides a storage medium in which a plurality of instructions are stored, and the instructions can be loaded by a processor to execute the steps in any one of the generation methods provided in the embodiments of the present application. For example, the instructions can execute the following steps:
[0091] In low power mode, the configuration data of the current frame is obtained from the specified location of the storage device through DMA;
[0092] Use chip logic to parse the configuration data to obtain the target configuration address and configuration value;
[0093] The configuration value is configured into the shadow register of the target configuration address through DMA, and the shadow register has a valid bit set;
[0094] When a frame interrupt signal or a specified line interrupt signal is received, the effective bit is triggered to make the configuration value take effect immediately.
[0095] The specific implementation of the above operations can be found in the previous embodiments, which will not be described in detail here.
[0096] The storage medium may include: a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, etc.
[0097] Since the instructions stored in the storage medium can execute the steps in any method provided in the embodiments of the present application, the beneficial effects that can be achieved by any method provided in the embodiments of the present application can be achieved. Please refer to the previous embodiments for details and will not be repeated here.
[0098] The above respectively introduces in detail the media path configuration method, device, storage medium and electronic device provided by the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the core idea of the present application; at the same time, for technical personnel in this field, according to the idea of the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.
Claims
1. A media channel configuration method, characterized in that: include: In low power mode, the configuration data of the current frame is obtained from the specified location of the storage device through DMA; The configuration data is parsed using chip logic to obtain a target configuration address and a configuration value; The configuration value is configured into a shadow register of the target configuration address through DMA, wherein a validity bit is set in the shadow register; When a frame interrupt signal or a designated line interrupt signal is received, the validity bit is triggered to make the configuration value take effect immediately.
2. The media channel configuration method according to claim 1, characterized in that: After configuring the configuration value into the shadow register of the target configuration address through DMA, and setting a valid bit in the shadow register, and before triggering the valid bit when receiving a frame interrupt signal or a designated line interrupt signal to make the configuration value immediately valid, the method further includes: Return to the step of reading the configuration data of the current frame from the specified location of the storage device through DMA until the configuration data is parsed using chip logic to obtain an end mark.
3. The media channel configuration method according to claim 1, characterized in that: After configuring the configuration value into the shadow register of the target configuration address through DMA, and setting a valid bit in the shadow register, and before triggering the valid bit when receiving a frame interrupt signal or a designated line interrupt signal to make the configuration value immediately valid, the method further includes: Return to the step of parsing the configuration data using chip logic until the configuration data is parsed using chip logic to obtain an end mark.
4. The media channel configuration method according to claim 1, characterized in that: The adopting chip logic to parse the configuration data to obtain a target configuration address and a configuration value includes: The configuration data is parsed according to a preset format using chip logic to extract a target configuration address identifier and data length; Determining a target configuration address to be configured according to the target configuration address identifier; According to the data length, read the configuration value of the corresponding length.
5. The media channel configuration method according to claim 1, characterized in that: After the chip logic is used to parse the configuration data to obtain the target configuration address and the configuration value, and before the configuration value is configured into the shadow register of the target configuration address through DMA, the method further includes: comparing the configuration value with a current configuration value of a target configuration address; Determine whether to execute the step of configuring the configuration value into the shadow register of the target configuration address through DMA according to the comparison result.
6. The media channel configuration method according to claim 5, characterized in that: The step of determining whether to configure the configuration value into the shadow register of the target configuration address through DMA according to the comparison result includes: If the configuration value is the same as the current configuration value, then the current configuration value of the target configuration address is not updated; If the configuration value is different from the current configuration value, a step of configuring the configuration value into a shadow register of the target configuration address through DMA is performed.
7. The media channel configuration method according to claim 1, characterized in that: Before acquiring the configuration data of the current frame from the specified location of the storage device through DMA in the low power consumption mode, the method further includes: presetting one or more designated locations on a storage device; The configuration data of the current frame or frames are stored at the designated location.
8. A media channel configuration device, characterized in that: include: An acquisition unit, used for acquiring configuration data of a current frame from a specified location of a storage device through DMA in a low power consumption mode; A parsing unit, used to parse the configuration data using chip logic to obtain a target configuration address and a configuration value; A configuration unit, configured to configure the configuration value into a shadow register of the target configuration address through DMA, wherein a validity bit is set in the shadow register; The validation unit is used to trigger the validation bit when receiving a frame interrupt signal or a designated line interrupt signal, so that the configuration value takes effect immediately.
9. A storage medium, characterized in that: The storage medium stores a plurality of instructions, and the instructions are suitable for being loaded by a processor to execute the media channel configuration method according to any one of claims 1-7.
10. An electronic device, characterized in that: The method comprises a memory, a processor and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the media channel configuration method according to any one of claims 1 to 7 is implemented.