Classic conditioned reflex memcapacitance neural network circuit

Abstract

The invention relates to the technical field of conditioned reflex neural networks, in particular to a classical conditioned reflex memcapacitance neural network circuit, which comprises a food module, a ringtone module, a memcapacitance circuit and a leakage current detection circuit, and is characterized in that the food module, the ringtone module and the memcapacitance circuit are electrically connected with the leakage current detection circuit; wherein the food module is used for generating a food signal; the ringtone module is used for generating a ringtone signal; the memory capacitor circuit is used for adjusting the leakage current of the leakage current detection circuit; the leakage current detection circuit simulates learning and memorizing processes in animal classical conditioned reflex according to whether leakage current exists at different moments. The invention solves the problem of lack of a memcapacitor neural network circuit for generating classical conditioned reflex by regulating and controlling the capacitance value of the memristor in the existing circuit design.

Description

Technical Field

[0001] The invention relates to the technical field of conditioned reflex neural networks, and in particular to a classical conditioned reflex memory capacity neural network circuit. Background Art

[0002] A memcapacitor is a capacitor that can store electric charge and maintain the stored charge state when the power is off. The working principle of a memcapacitor is similar to that of a memristor, both of which are based on the electrical properties of the material.

[0003] Memcapacitors have broad application prospects and can be used in electronic storage, sensors, energy harvesters and other fields. In terms of electronic storage, memcapacitors can achieve higher storage density and lower energy consumption, while also improving the reliability and stability of storage. In the future, with the continuous development and improvement of memcapacitor technology, it will be applied in more fields. Summary of the invention

[0004] In view of the deficiencies of existing circuits, the present invention solves the problem in existing circuit designs that there is a lack of a memristor neural network circuit for generating classical conditioned reflexes by regulating the capacitance value of a memristor.

[0005] The technical solution adopted by the present invention is: a classical conditioned reflex memory capacity neural network circuit comprises:

[0006] A food module, a ringtone module, a memcapacitor circuit and a leakage current detection circuit, wherein the food module, the ringtone module, the memcapacitor circuit and the leakage current detection circuit are electrically connected; wherein,

[0007] The food module is used to generate food signals;

[0008] The ringtone module is used to generate a ringtone signal;

[0009] The memcapacitor circuit is used to adjust the leakage current of the leakage current detection circuit;

[0010] The leakage current detection circuit simulates the learning and memory process in the animal's classical conditioning reflex according to whether there is leakage current at different times.

[0011] As a preferred embodiment of the present invention, the learning and memory process in the classical conditioning includes: the animal salivating when seeing food, the animal not salivating when hearing the bell signal but no food is provided, the animal's learning process when given food and bells, the animal still salivating when the bell is continued to be given to the animal but no food after the animal has successfully learned, the animal continues to be given bell signals but no food for a period of time after learning, and the animal's successful forgetting.

[0012] As a preferred embodiment of the present invention, the food module includes: resistors R1 to R4, capacitor C1 and operational amplifiers U1 to U2, the right end of R1 is connected to the same-direction input end of U1, the reverse input end of U1 is connected to the output end of U1, the left end of C1 and the left end of R2, the right end of R2 is respectively connected to the left end of R4, the right end of R3 and the reverse input end of U2, and the right end of R4 is connected to the output end of U2.

[0013] As a preferred embodiment of the present invention, the ringtone module includes: resistors R6 to R 11 and operational amplifiers U3 to U5, the left end of R6 is connected to the left end of R1, the right end of R6 is respectively connected to the right end of R7, the left end of R8 and the inverting input end of U4, the right end of R8 is respectively connected to the output end of U4 and the left end of R9, the right end of R9 is respectively connected to R 10 The left end of the U5 is connected to the inverting input terminal, R 10 The right end is connected to the output end of U5 and R 11 The left end of the connection, R 11 The right end of R3 is connected to the same-direction input end of U3, and the reverse input end of U3 is respectively connected to the output end of U3 and the left end of R3.

[0014] As a preferred embodiment of the present invention, the memcapacitor circuit comprises: a memcapacitor M1, the left end of M1 is respectively connected to R 11 The right end of M1 is connected to the same-direction input terminal of U3, and the right end of M1 is grounded.

[0015] As a preferred embodiment of the present invention, the leakage current detection circuit includes: an NMOS tube N1 and a resistor R5, the gate of N1 is connected to the output end of U2, and the drain of N1 is connected to the lower end of R5.

[0016] As a preferred embodiment of the present invention, the operational amplifiers U1 to U5 are of type AD8538.

[0017] As a preferred implementation of the present invention, the model of the NMOS tube N1 is M2SK530.

[0018] As a preferred embodiment of the present invention, the classical conditioning memory neural network system includes: a memory for storing instructions executable by a processor; a processor for executing the instructions to implement a classical conditioning memory neural network circuit.

[0019] As a preferred embodiment of the present invention, a computer readable medium stores a computer program code, and the computer program code implements a classical conditioning memory neural network circuit when executed by a processor.

[0020] Beneficial effects of the present invention:

[0021] 1. Since the memcapporat can dynamically adjust the capacitance value and save its state, the circuit of the present invention can more accurately simulate the learning and memory process in the classical conditioning reflex, which is helpful for developing a more efficient intelligent learning system;

[0022] 2. Compared with traditional neural network circuits, the introduction of memcapacitors reduces the power consumption of circuits because memcapacitors can maintain their storage state even when power is off, reducing the energy consumption of data storage and processing;

[0023] 3. Through the adaptive characteristics of the memcapacitor and the precise regulation of the voltage signal, the stability and reliability of the circuit during long-term operation have been significantly improved, reducing the possibility of signal interference and errors. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 It is a schematic diagram of a memory capacity classical conditioning circuit of the present invention;

[0025] Figure 2 It is a circuit simulation diagram of the memory capacity classical conditioning reflex of the present invention. DETAILED DESCRIPTION

[0026] The present invention is further described below in conjunction with the accompanying drawings and embodiments. This figure is a simplified schematic diagram, which only illustrates the basic structure of the present invention in a schematic manner, and therefore it only shows the components related to the present invention.

[0027] like Figure 1 As shown, a classical conditioning memory neural network circuit includes:

[0028] Resistors R1 to R 11 , capacitor C1, operational amplifiers U1 to U5, NMOS tube N1 and memory capacitor M1, food voltage signal V 食物 One end of R1 and R6 are input respectively, the other end of R1 is connected to the same-direction input end of U1, the reverse input end of U1 is connected to the output end of U1, the output end of U1 is connected to one end of C1 and R2 respectively, the other end of C1 is grounded, the other end of R2 is connected to the reverse input end of U2, one end of R3 and R4 respectively, the other end of R4 is connected to the output end of U2 and the gate of N1, the drain of N1 is connected to one end of R5, the other end of R5 is connected to a 3.5V voltage, and the other end of R3 is connected to the output end and reverse input end of U3.

[0029] Ringing voltage V 铃声 The other end of R7 is connected to the other end of R6 and one end of R8. The other end of R8 is connected to the output end of U4 and one end of R9. The other end of R9 is connected to the reverse input end of U5 and R 10 One end, R 10 The other end is connected to the output of U5 and R11 One end of the connection, R 11 The other end is connected to the same-direction input end of U3 and one end of M1 respectively. The other end of M1, the source of N1, the other end of C1, and the same-direction input point of U4 and U5 are grounded.

[0030] The memcapacitor M1 can be from the literature VTEAM-M:A General Model for Voltage-ControlledMemcapacitive-Coupled Memristors, or other conventional memcapacitors; the operational amplifier model is AD8538, the NMOS tube N1 model is M2SK530, the capacitor C1 is 0.1nF, and the resistors R1 and R 11 The resistance is 700kΩ, resistors R2, R3, R4, R6, R7, R8, R9, R 10 , R 11 The resistance value is 1kΩ, and the resistance value of resistor R5 is 10kΩ.

[0031] The input signal includes a sinusoidal food signal V with an amplitude of 2.2V and a frequency of 3HZ 食物 And a sinusoidal ringing signal V with an amplitude of 3V and a frequency of 3HZ 铃声 One branch of the food signal input is connected to the voltage follower U1 and then input to the capacitor C1. The other branch of the food signal and the ring signal are connected to the adder U4 together. The voltage V output after passing through the voltage follower U5 is OUT Input to M1, V OUT The expression is:

[0032] V OUT =V 食物 +V 铃声 (1)

[0033] M1 capacitance value at voltage V OUT The capacitive reactance of M1 is X M1 Change, X M1 The expression is:

[0034]

[0035] Among them, C M1 is the capacitance of the memristor M1, and f is the frequency of the input signal.

[0036] The change of memristor makes M1 and R 11 After voltage division, the voltage V divided across the memory capacitor M1 is M1 V M1 The expression is:

[0037]

[0038] The voltage across M1 passes through the voltage follower U3 and the voltage across capacitor C1 and enters the adder U2. After being summed by U2, it is output to the gate of NMOS tube N1 with a cut-off voltage of 2.1V. The voltage V g The expression is:

[0039]

[0040] V C1 is the voltage of capacitor C1. Vg determines the conduction and cutoff of NMOS tube N1, so it can be observed whether there is leakage current I D The emergence of this phenomenon is used to determine the various stages of the animal's classical conditioning.

[0041] like Figure 2 As shown in the figure, at 0-5s, the food signal is input into the circuit through the voltage follower U1 and then fed into the capacitor C1. However, the ring signal is not input at this time. The voltage of the capacitor C1 is output to the gate of the NMOS tube N1 through the adder U2, which exceeds the threshold voltage of 2.1V. Therefore, a leakage current I D , which corresponds to the part of the classical conditioning in which animals salivate when they see food; at 5-10s, the bell signal is input into the circuit, but no food signal is input at this time. The bell signal is input into the memcapacitor M1 through the adder U4 and the voltage follower U5, which is lower than the negative threshold voltage of the memcapacitor M1 -1.8V but does not exceed the positive threshold voltage of 3V. The memcapacitor value rises slightly, and the resistor R 11 After voltage division, the voltage across the memory capacitor is V M1 The voltage across the capacitor V M1 There is no leakage current I when it is output to the gate of NMOS tube N1 through voltage follower U3 and adder U2. D The signal appears, which corresponds to the part of the classical conditioning reflex in which the animal does not salivate when hearing the bell signal but no food is provided; at 10-16s, the food signal and the bell signal are simultaneously input into the circuit, and after being summed by the adder U4, a sinusoidal signal V with an amplitude of 5.2V and a frequency of 3HZ is formed through the voltage follower U5. OUT The input voltage is higher than the positive threshold voltage 3V and negative threshold voltage -1.8V of the memcapacitor M1. The memcapacitor value decreases faster than it increases. Therefore, the overall trend of the memcapacitor value decreases. The voltage V across the memcapacitor is M1 Through the voltage follower U3 and the voltage V across the capacitor C1 C1 After being summed by adder U2, it exceeds the threshold voltage of NMOS tube N1, so the leakage current I of NMOS tube N1 at this time DIt still exists, which corresponds to the learning process of animals when food and bell are given to animals at the same time in classical conditioning; at 16-25s, the bell signal continues to be input, but no food signal is input at this time. Due to the learning process at 10-16s, the memory capacitance value decreases, and the memory capacitance M1 and the resistor R 11 The voltage V obtained by voltage division M1 Exceeds the threshold voltage of NMOS tube N1, so when the voltage across the capacitor V M1 When the voltage is summed by the voltage follower U3 and the adder U2 and then output to the gate of the NMOS tube N1, leakage current I will still appear. D , which corresponds to the stage in classical conditioning where the animal continues to salivate after learning successfully but does not receive food; at 25-37s, the bell signal is input into the circuit, but there is no food signal. At this time, the bell signal is input into the memory capacitor M1 through the adder U4 and the voltage follower U5, which is lower than the negative threshold voltage -1.8V of the memory capacitor M1 but does not exceed the positive threshold voltage 3V. The memory value of the memory capacitor M1 increases during this period, which corresponds to the forgetting process after the animal continues to receive the bell signal but does not receive food for a period of time after learning in the classical conditioning; at 37s, when the memory capacitance value rises to 91.6nF, the memory capacitor and R 11 The voltage V obtained after voltage division M1 Just below the threshold voltage of NMOS tube N1, 2.1V, the leakage current I D The disappearance corresponds to the animal's successful forgetting in the classical conditioning reflex; at 37-50s, a separate 3V sinusoidal ring signal input circuit is input into the memory capacitor M1 through the adder U4 and the voltage follower U5. Due to the forgetting process at 25-37s, the memory capacitor M1 increases in value, and the memory capacitor M1 and the resistor R 11 The voltage V obtained by voltage division M1 Descending, 37s later V M1 does not exceed the threshold voltage of NMOS tube N1, so when the positive terminal voltage of the memcapacitor V M1 There is no leakage current I when it is output to the gate of NMOS tube N1 through voltage follower U3 and adder U2. D This is part of the classical conditioning where animals are given a bell but no food for a period of time before successfully forgetting.

[0042] Based on the above ideal embodiments of the present invention, the relevant staff can make various changes and modifications without departing from the technical concept of the present invention through the above description. The technical scope of the present invention is not limited to the contents of the specification, and its technical scope must be determined according to the scope of the claims.

Claims

1. A classical conditioning memory neural network circuit, characterized in that: include: A food module, a ringtone module, a memcapacitor circuit and a leakage current detection circuit, wherein the food module, the ringtone module, the memcapacitor circuit and the leakage current detection circuit are electrically connected; wherein, The food module is used to generate food signals; The ringtone module is used to generate a ringtone signal; The memcapacitor circuit is used to adjust the leakage current of the leakage current detection circuit; The leakage current detection circuit simulates the learning and memory process in the animal's classical conditioning reflex according to whether there is leakage current at different times.

2. The classical conditioning reflex memory neural network circuit according to claim 1, characterized in that: The learning and memory process in classical conditioning includes: the animal salivating when seeing food, the animal not salivating when hearing the bell signal but no food is provided, the animal's learning process when given food and bells, the animal salivating when the bell is continued to be given but not food after the animal has successfully learned, the animal's forgetting process after a period of time when the bell signal is continued but not given food after the animal has learned, and the animal's successful forgetting.

3. The classical conditioning reflex memory neural network circuit according to claim 1, characterized in that: The food module includes: resistors R1 to R4, capacitor C1 and operational amplifiers U1 to U2, the right end of R1 is connected to the same-direction input end of U1, the reverse input end of U1 is connected to the output end of U1, the left end of C1 and the left end of R2, the right end of R2 is respectively connected to the left end of R4, the right end of R3 and the reverse input end of U2, and the right end of R4 is connected to the output end of U2.

4. The classical conditioning memory neural network circuit according to claim 3, characterized in that: The ringtone module includes: resistors R6 to R 11 and operational amplifiers U3 to U5, the left end of R6 is connected to the left end of R1, the right end of R6 is respectively connected to the right end of R7, the left end of R8 and the inverting input end of U4, the right end of R8 is respectively connected to the output end of U4 and the left end of R9, the right end of R9 is respectively connected to R 10 The left end of the U5 is connected to the inverting input terminal, R 10 The right end is connected to the output end of U5 and R 11 The left end of the connection, R 11 The right end of R3 is connected to the same-direction input end of U3, and the reverse input end of U3 is respectively connected to the output end of U3 and the left end of R3.

5. The classical conditioning reflex memory neural network circuit according to claim 4, characterized in that: The memcapacitor circuit includes: memcapacitor M1, the left end of M1 is connected to R 11 The right end of M1 is connected to the same-direction input terminal of U3, and the right end of M1 is grounded.

6. The classical conditioning reflex memory neural network circuit according to claim 5, characterized in that: The leakage current detection circuit includes: an NMOS tube N1 and a resistor R5, the gate of N1 is connected to the output end of U2, and the drain of N1 is connected to the lower end of R5.

7. The classical conditioning reflex memory neural network circuit according to any one of claims 3 to 6, characterized in that: The operational amplifiers U1 to U5 are AD8538.

8. The classical conditioning reflex memory neural network circuit according to claim 6, characterized in that: The model of NMOS tube N1 is M2SK530.

9. Classical conditioning memory neural network system, characterized in that: include: a memory for storing instructions executable by a processor; A processor, used to execute instructions to implement the classical conditioning memory neural network circuit as described in any one of claims 1-8.

10. A computer readable medium storing computer program code, characterized in that: The computer program code, when executed by a processor, implements the classical conditioning memory neural network circuit as described in any one of claims 1 to 8.

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